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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefix=GFX8 %s4; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10 %s5; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefix=GFX10 %s6 7; TODO: Switch test to use -new-reg-bank-select after adding G_FNEG support.8 9define <2 x half> @v_fmul_v2f16(<2 x half> %a, <2 x half> %b) {10; GFX9-LABEL: v_fmul_v2f16:11; GFX9: ; %bb.0:12; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; GFX9-NEXT: v_pk_mul_f16 v0, v0, v114; GFX9-NEXT: s_setpc_b64 s[30:31]15;16; GFX8-LABEL: v_fmul_v2f16:17; GFX8: ; %bb.0:18; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)19; GFX8-NEXT: v_mul_f16_e32 v2, v0, v120; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_121; GFX8-NEXT: v_or_b32_e32 v0, v2, v022; GFX8-NEXT: s_setpc_b64 s[30:31]23;24; GFX10-LABEL: v_fmul_v2f16:25; GFX10: ; %bb.0:26; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)27; GFX10-NEXT: v_pk_mul_f16 v0, v0, v128; GFX10-NEXT: s_setpc_b64 s[30:31]29 %mul = fmul <2 x half> %a, %b30 ret <2 x half> %mul31}32 33define <2 x half> @v_fmul_v2f16_fneg_lhs(<2 x half> %a, <2 x half> %b) {34; GFX9-LABEL: v_fmul_v2f16_fneg_lhs:35; GFX9: ; %bb.0:36; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)37; GFX9-NEXT: v_pk_mul_f16 v0, v0, v1 neg_lo:[1,0] neg_hi:[1,0]38; GFX9-NEXT: s_setpc_b64 s[30:31]39;40; GFX8-LABEL: v_fmul_v2f16_fneg_lhs:41; GFX8: ; %bb.0:42; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)43; GFX8-NEXT: v_xor_b32_e32 v0, 0x80008000, v044; GFX8-NEXT: v_mul_f16_e32 v2, v0, v145; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_146; GFX8-NEXT: v_or_b32_e32 v0, v2, v047; GFX8-NEXT: s_setpc_b64 s[30:31]48;49; GFX10-LABEL: v_fmul_v2f16_fneg_lhs:50; GFX10: ; %bb.0:51; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)52; GFX10-NEXT: v_pk_mul_f16 v0, v0, v1 neg_lo:[1,0] neg_hi:[1,0]53; GFX10-NEXT: s_setpc_b64 s[30:31]54 %neg.a = fneg <2 x half> %a55 %mul = fmul <2 x half> %neg.a, %b56 ret <2 x half> %mul57}58 59define <2 x half> @v_fmul_v2f16_fneg_rhs(<2 x half> %a, <2 x half> %b) {60; GFX9-LABEL: v_fmul_v2f16_fneg_rhs:61; GFX9: ; %bb.0:62; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)63; GFX9-NEXT: v_pk_mul_f16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1]64; GFX9-NEXT: s_setpc_b64 s[30:31]65;66; GFX8-LABEL: v_fmul_v2f16_fneg_rhs:67; GFX8: ; %bb.0:68; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)69; GFX8-NEXT: v_xor_b32_e32 v1, 0x80008000, v170; GFX8-NEXT: v_mul_f16_e32 v2, v0, v171; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_172; GFX8-NEXT: v_or_b32_e32 v0, v2, v073; GFX8-NEXT: s_setpc_b64 s[30:31]74;75; GFX10-LABEL: v_fmul_v2f16_fneg_rhs:76; GFX10: ; %bb.0:77; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)78; GFX10-NEXT: v_pk_mul_f16 v0, v0, v1 neg_lo:[0,1] neg_hi:[0,1]79; GFX10-NEXT: s_setpc_b64 s[30:31]80 %neg.b = fneg <2 x half> %b81 %mul = fmul <2 x half> %a, %neg.b82 ret <2 x half> %mul83}84 85define <2 x half> @v_fmul_v2f16_fneg_lhs_fneg_rhs(<2 x half> %a, <2 x half> %b) {86; GFX9-LABEL: v_fmul_v2f16_fneg_lhs_fneg_rhs:87; GFX9: ; %bb.0:88; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)89; GFX9-NEXT: v_pk_mul_f16 v0, v0, v190; GFX9-NEXT: s_setpc_b64 s[30:31]91;92; GFX8-LABEL: v_fmul_v2f16_fneg_lhs_fneg_rhs:93; GFX8: ; %bb.0:94; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)95; GFX8-NEXT: v_mul_f16_e32 v2, v0, v196; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_197; GFX8-NEXT: v_or_b32_e32 v0, v2, v098; GFX8-NEXT: s_setpc_b64 s[30:31]99;100; GFX10-LABEL: v_fmul_v2f16_fneg_lhs_fneg_rhs:101; GFX10: ; %bb.0:102; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)103; GFX10-NEXT: v_pk_mul_f16 v0, v0, v1104; GFX10-NEXT: s_setpc_b64 s[30:31]105 %neg.a = fneg <2 x half> %a106 %neg.b = fneg <2 x half> %b107 %mul = fmul <2 x half> %neg.a, %neg.b108 ret <2 x half> %mul109}110 111define <2 x half> @v_fmul_v2f16_partial_neg(<2 x half> %a, <2 x half> %b) {112; GFX9-LABEL: v_fmul_v2f16_partial_neg:113; GFX9: ; %bb.0:114; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; GFX9-NEXT: v_pk_mul_f16 v0, v1, v0 neg_hi:[1,0]116; GFX9-NEXT: v_pk_mul_f16 v0, v1, v0 neg_lo:[1,0]117; GFX9-NEXT: s_setpc_b64 s[30:31]118;119; GFX8-LABEL: v_fmul_v2f16_partial_neg:120; GFX8: ; %bb.0:121; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)122; GFX8-NEXT: v_xor_b32_e32 v1, 0x80000000, v1123; GFX8-NEXT: v_xor_b32_e32 v2, 0x80008000, v1124; GFX8-NEXT: v_mul_f16_e32 v3, v1, v0125; GFX8-NEXT: v_mul_f16_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1126; GFX8-NEXT: v_mul_f16_e32 v1, v2, v3127; GFX8-NEXT: v_mul_f16_sdwa v0, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD128; GFX8-NEXT: v_or_b32_e32 v0, v1, v0129; GFX8-NEXT: s_setpc_b64 s[30:31]130;131; GFX10-LABEL: v_fmul_v2f16_partial_neg:132; GFX10: ; %bb.0:133; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)134; GFX10-NEXT: v_pk_mul_f16 v0, v1, v0 neg_hi:[1,0]135; GFX10-NEXT: v_pk_mul_f16 v0, v1, v0 neg_lo:[1,0]136; GFX10-NEXT: s_setpc_b64 s[30:31]137 %b1 = bitcast <2 x half> %b to float138 %b2 = fneg float %b1139 %b3 = bitcast float %b2 to <2 x half>140 %b4 = fneg <2 x half> %b3141 %mul1 = fmul <2 x half> %b3, %a142 %mul2 = fmul <2 x half> %b4, %mul1143 ret <2 x half> %mul2144}145 146define <2 x half> @fmul_v2_half_neg_hi(<2 x half> %a, <2 x half> %b) #0 {147; GFX9-LABEL: fmul_v2_half_neg_hi:148; GFX9: ; %bb.0:149; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)150; GFX9-NEXT: v_pk_mul_f16 v0, v0, v1 neg_hi:[0,1]151; GFX9-NEXT: s_setpc_b64 s[30:31]152;153; GFX8-LABEL: fmul_v2_half_neg_hi:154; GFX8: ; %bb.0:155; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)156; GFX8-NEXT: v_xor_b32_e32 v2, 0x80000000, v1157; GFX8-NEXT: v_mul_f16_e32 v1, v0, v1158; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1159; GFX8-NEXT: v_or_b32_e32 v0, v1, v0160; GFX8-NEXT: s_setpc_b64 s[30:31]161;162; GFX10-LABEL: fmul_v2_half_neg_hi:163; GFX10: ; %bb.0:164; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)165; GFX10-NEXT: v_pk_mul_f16 v0, v0, v1 neg_hi:[0,1]166; GFX10-NEXT: s_setpc_b64 s[30:31]167 %b1 = bitcast <2 x half> %b to float168 %b2 = fneg float %b1169 %b3 = bitcast float %b2 to <2 x half>170 %b4 = extractelement <2 x half> %b3, i64 1171 %tmp = insertelement <2 x half> poison, half %b4, i64 0172 %k = shufflevector <2 x half> %tmp, <2 x half> %b, <2 x i32> <i32 2, i32 0>173 %mul = fmul <2 x half> %a, %k174 ret <2 x half> %mul175}176 177 178define <2 x half> @fmul_v2_half_neg_lo1(<2 x half> %a, <2 x half> %b) #0 {179; GFX9-LABEL: fmul_v2_half_neg_lo1:180; GFX9: ; %bb.0:181; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)182; GFX9-NEXT: v_pk_mul_f16 v0, v0, v1 op_sel_hi:[1,0]183; GFX9-NEXT: s_setpc_b64 s[30:31]184;185; GFX8-LABEL: fmul_v2_half_neg_lo1:186; GFX8: ; %bb.0:187; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)188; GFX8-NEXT: v_xor_b32_e32 v2, 0x80000000, v1189; GFX8-NEXT: v_mul_f16_e32 v1, v0, v1190; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD191; GFX8-NEXT: v_or_b32_e32 v0, v1, v0192; GFX8-NEXT: s_setpc_b64 s[30:31]193;194; GFX10-LABEL: fmul_v2_half_neg_lo1:195; GFX10: ; %bb.0:196; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)197; GFX10-NEXT: v_pk_mul_f16 v0, v0, v1 op_sel_hi:[1,0]198; GFX10-NEXT: s_setpc_b64 s[30:31]199 %b1 = bitcast <2 x half> %b to float200 %b2 = fneg float %b1201 %b3 = bitcast float %b2 to <2 x half>202 %b4 = extractelement <2 x half> %b3, i64 0203 %tmp = insertelement <2 x half> poison, half %b4, i64 0204 %k = shufflevector <2 x half> %tmp, <2 x half> %b, <2 x i32> <i32 2, i32 0>205 %mul = fmul <2 x half> %a, %k206 ret <2 x half> %mul207}208 209define <3 x half> @v_fmul_v3f16(<3 x half> %a, <3 x half> %b) {210; GFX9-LABEL: v_fmul_v3f16:211; GFX9: ; %bb.0:212; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)213; GFX9-NEXT: v_pk_mul_f16 v0, v0, v2214; GFX9-NEXT: v_pk_mul_f16 v1, v1, v3215; GFX9-NEXT: s_setpc_b64 s[30:31]216;217; GFX8-LABEL: v_fmul_v3f16:218; GFX8: ; %bb.0:219; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)220; GFX8-NEXT: v_mul_f16_e32 v4, v0, v2221; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1222; GFX8-NEXT: v_mul_f16_e32 v1, v1, v3223; GFX8-NEXT: v_or_b32_e32 v0, v4, v0224; GFX8-NEXT: s_setpc_b64 s[30:31]225;226; GFX10-LABEL: v_fmul_v3f16:227; GFX10: ; %bb.0:228; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)229; GFX10-NEXT: v_pk_mul_f16 v0, v0, v2230; GFX10-NEXT: v_pk_mul_f16 v1, v1, v3231; GFX10-NEXT: s_setpc_b64 s[30:31]232 %mul = fmul <3 x half> %a, %b233 ret <3 x half> %mul234}235 236define <3 x half> @v_fmul_v3f16_fneg_lhs(<3 x half> %a, <3 x half> %b) {237; GFX9-LABEL: v_fmul_v3f16_fneg_lhs:238; GFX9: ; %bb.0:239; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)240; GFX9-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[1,0] neg_hi:[1,0]241; GFX9-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[1,0] neg_hi:[1,0]242; GFX9-NEXT: s_setpc_b64 s[30:31]243;244; GFX8-LABEL: v_fmul_v3f16_fneg_lhs:245; GFX8: ; %bb.0:246; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)247; GFX8-NEXT: v_xor_b32_e32 v0, 0x80008000, v0248; GFX8-NEXT: v_xor_b32_e32 v1, 0x80008000, v1249; GFX8-NEXT: v_mul_f16_e32 v4, v0, v2250; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1251; GFX8-NEXT: v_mul_f16_e32 v1, v1, v3252; GFX8-NEXT: v_or_b32_e32 v0, v4, v0253; GFX8-NEXT: s_setpc_b64 s[30:31]254;255; GFX10-LABEL: v_fmul_v3f16_fneg_lhs:256; GFX10: ; %bb.0:257; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)258; GFX10-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[1,0] neg_hi:[1,0]259; GFX10-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[1,0] neg_hi:[1,0]260; GFX10-NEXT: s_setpc_b64 s[30:31]261 %neg.a = fneg <3 x half> %a262 %mul = fmul <3 x half> %neg.a, %b263 ret <3 x half> %mul264}265 266define <3 x half> @v_fmul_v3f16_fneg_rhs(<3 x half> %a, <3 x half> %b) {267; GFX9-LABEL: v_fmul_v3f16_fneg_rhs:268; GFX9: ; %bb.0:269; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)270; GFX9-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]271; GFX9-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]272; GFX9-NEXT: s_setpc_b64 s[30:31]273;274; GFX8-LABEL: v_fmul_v3f16_fneg_rhs:275; GFX8: ; %bb.0:276; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)277; GFX8-NEXT: v_xor_b32_e32 v2, 0x80008000, v2278; GFX8-NEXT: v_xor_b32_e32 v3, 0x80008000, v3279; GFX8-NEXT: v_mul_f16_e32 v4, v0, v2280; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1281; GFX8-NEXT: v_mul_f16_e32 v1, v1, v3282; GFX8-NEXT: v_or_b32_e32 v0, v4, v0283; GFX8-NEXT: s_setpc_b64 s[30:31]284;285; GFX10-LABEL: v_fmul_v3f16_fneg_rhs:286; GFX10: ; %bb.0:287; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)288; GFX10-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]289; GFX10-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]290; GFX10-NEXT: s_setpc_b64 s[30:31]291 %neg.b = fneg <3 x half> %b292 %mul = fmul <3 x half> %a, %neg.b293 ret <3 x half> %mul294}295 296define <3 x half> @v_fmul_v3f16_fneg_lhs_fneg_rhs(<3 x half> %a, <3 x half> %b) {297; GFX9-LABEL: v_fmul_v3f16_fneg_lhs_fneg_rhs:298; GFX9: ; %bb.0:299; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)300; GFX9-NEXT: v_pk_mul_f16 v0, v0, v2301; GFX9-NEXT: v_pk_mul_f16 v1, v1, v3302; GFX9-NEXT: s_setpc_b64 s[30:31]303;304; GFX8-LABEL: v_fmul_v3f16_fneg_lhs_fneg_rhs:305; GFX8: ; %bb.0:306; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)307; GFX8-NEXT: v_mul_f16_e32 v4, v0, v2308; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1309; GFX8-NEXT: v_mul_f16_e32 v1, v1, v3310; GFX8-NEXT: v_or_b32_e32 v0, v4, v0311; GFX8-NEXT: s_setpc_b64 s[30:31]312;313; GFX10-LABEL: v_fmul_v3f16_fneg_lhs_fneg_rhs:314; GFX10: ; %bb.0:315; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)316; GFX10-NEXT: v_pk_mul_f16 v0, v0, v2317; GFX10-NEXT: v_pk_mul_f16 v1, v1, v3318; GFX10-NEXT: s_setpc_b64 s[30:31]319 %neg.a = fneg <3 x half> %a320 %neg.b = fneg <3 x half> %b321 %mul = fmul <3 x half> %neg.a, %neg.b322 ret <3 x half> %mul323}324 325define <4 x half> @v_fmul_v4f16(<4 x half> %a, <4 x half> %b) {326; GFX9-LABEL: v_fmul_v4f16:327; GFX9: ; %bb.0:328; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)329; GFX9-NEXT: v_pk_mul_f16 v0, v0, v2330; GFX9-NEXT: v_pk_mul_f16 v1, v1, v3331; GFX9-NEXT: s_setpc_b64 s[30:31]332;333; GFX8-LABEL: v_fmul_v4f16:334; GFX8: ; %bb.0:335; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)336; GFX8-NEXT: v_mul_f16_e32 v4, v0, v2337; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1338; GFX8-NEXT: v_mul_f16_e32 v2, v1, v3339; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1340; GFX8-NEXT: v_or_b32_e32 v0, v4, v0341; GFX8-NEXT: v_or_b32_e32 v1, v2, v1342; GFX8-NEXT: s_setpc_b64 s[30:31]343;344; GFX10-LABEL: v_fmul_v4f16:345; GFX10: ; %bb.0:346; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)347; GFX10-NEXT: v_pk_mul_f16 v0, v0, v2348; GFX10-NEXT: v_pk_mul_f16 v1, v1, v3349; GFX10-NEXT: s_setpc_b64 s[30:31]350 %mul = fmul <4 x half> %a, %b351 ret <4 x half> %mul352}353 354define <4 x half> @v_fmul_v4f16_fneg_lhs(<4 x half> %a, <4 x half> %b) {355; GFX9-LABEL: v_fmul_v4f16_fneg_lhs:356; GFX9: ; %bb.0:357; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)358; GFX9-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[1,0] neg_hi:[1,0]359; GFX9-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[1,0] neg_hi:[1,0]360; GFX9-NEXT: s_setpc_b64 s[30:31]361;362; GFX8-LABEL: v_fmul_v4f16_fneg_lhs:363; GFX8: ; %bb.0:364; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)365; GFX8-NEXT: v_xor_b32_e32 v0, 0x80008000, v0366; GFX8-NEXT: v_xor_b32_e32 v1, 0x80008000, v1367; GFX8-NEXT: v_mul_f16_e32 v4, v0, v2368; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1369; GFX8-NEXT: v_mul_f16_e32 v2, v1, v3370; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1371; GFX8-NEXT: v_or_b32_e32 v0, v4, v0372; GFX8-NEXT: v_or_b32_e32 v1, v2, v1373; GFX8-NEXT: s_setpc_b64 s[30:31]374;375; GFX10-LABEL: v_fmul_v4f16_fneg_lhs:376; GFX10: ; %bb.0:377; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)378; GFX10-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[1,0] neg_hi:[1,0]379; GFX10-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[1,0] neg_hi:[1,0]380; GFX10-NEXT: s_setpc_b64 s[30:31]381 %neg.a = fneg <4 x half> %a382 %mul = fmul <4 x half> %neg.a, %b383 ret <4 x half> %mul384}385 386define <4 x half> @v_fmul_v4f16_fneg_rhs(<4 x half> %a, <4 x half> %b) {387; GFX9-LABEL: v_fmul_v4f16_fneg_rhs:388; GFX9: ; %bb.0:389; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)390; GFX9-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]391; GFX9-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]392; GFX9-NEXT: s_setpc_b64 s[30:31]393;394; GFX8-LABEL: v_fmul_v4f16_fneg_rhs:395; GFX8: ; %bb.0:396; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)397; GFX8-NEXT: v_xor_b32_e32 v2, 0x80008000, v2398; GFX8-NEXT: v_xor_b32_e32 v3, 0x80008000, v3399; GFX8-NEXT: v_mul_f16_e32 v4, v0, v2400; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1401; GFX8-NEXT: v_mul_f16_e32 v2, v1, v3402; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1403; GFX8-NEXT: v_or_b32_e32 v0, v4, v0404; GFX8-NEXT: v_or_b32_e32 v1, v2, v1405; GFX8-NEXT: s_setpc_b64 s[30:31]406;407; GFX10-LABEL: v_fmul_v4f16_fneg_rhs:408; GFX10: ; %bb.0:409; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)410; GFX10-NEXT: v_pk_mul_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]411; GFX10-NEXT: v_pk_mul_f16 v1, v1, v3 neg_lo:[0,1] neg_hi:[0,1]412; GFX10-NEXT: s_setpc_b64 s[30:31]413 %neg.b = fneg <4 x half> %b414 %mul = fmul <4 x half> %a, %neg.b415 ret <4 x half> %mul416}417 418define <4 x half> @v_fmul_v4f16_fneg_lhs_fneg_rhs(<4 x half> %a, <4 x half> %b) {419; GFX9-LABEL: v_fmul_v4f16_fneg_lhs_fneg_rhs:420; GFX9: ; %bb.0:421; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)422; GFX9-NEXT: v_pk_mul_f16 v0, v0, v2423; GFX9-NEXT: v_pk_mul_f16 v1, v1, v3424; GFX9-NEXT: s_setpc_b64 s[30:31]425;426; GFX8-LABEL: v_fmul_v4f16_fneg_lhs_fneg_rhs:427; GFX8: ; %bb.0:428; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)429; GFX8-NEXT: v_mul_f16_e32 v4, v0, v2430; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1431; GFX8-NEXT: v_mul_f16_e32 v2, v1, v3432; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1433; GFX8-NEXT: v_or_b32_e32 v0, v4, v0434; GFX8-NEXT: v_or_b32_e32 v1, v2, v1435; GFX8-NEXT: s_setpc_b64 s[30:31]436;437; GFX10-LABEL: v_fmul_v4f16_fneg_lhs_fneg_rhs:438; GFX10: ; %bb.0:439; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)440; GFX10-NEXT: v_pk_mul_f16 v0, v0, v2441; GFX10-NEXT: v_pk_mul_f16 v1, v1, v3442; GFX10-NEXT: s_setpc_b64 s[30:31]443 %neg.a = fneg <4 x half> %a444 %neg.b = fneg <4 x half> %b445 %mul = fmul <4 x half> %neg.a, %neg.b446 ret <4 x half> %mul447}448 449define <6 x half> @v_fmul_v6f16(<6 x half> %a, <6 x half> %b) {450; GFX9-LABEL: v_fmul_v6f16:451; GFX9: ; %bb.0:452; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)453; GFX9-NEXT: v_pk_mul_f16 v0, v0, v3454; GFX9-NEXT: v_pk_mul_f16 v1, v1, v4455; GFX9-NEXT: v_pk_mul_f16 v2, v2, v5456; GFX9-NEXT: s_setpc_b64 s[30:31]457;458; GFX8-LABEL: v_fmul_v6f16:459; GFX8: ; %bb.0:460; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)461; GFX8-NEXT: v_mul_f16_e32 v6, v0, v3462; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1463; GFX8-NEXT: v_mul_f16_e32 v3, v1, v4464; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1465; GFX8-NEXT: v_mul_f16_e32 v4, v2, v5466; GFX8-NEXT: v_mul_f16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1467; GFX8-NEXT: v_or_b32_e32 v0, v6, v0468; GFX8-NEXT: v_or_b32_e32 v1, v3, v1469; GFX8-NEXT: v_or_b32_e32 v2, v4, v2470; GFX8-NEXT: s_setpc_b64 s[30:31]471;472; GFX10-LABEL: v_fmul_v6f16:473; GFX10: ; %bb.0:474; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)475; GFX10-NEXT: v_pk_mul_f16 v0, v0, v3476; GFX10-NEXT: v_pk_mul_f16 v1, v1, v4477; GFX10-NEXT: v_pk_mul_f16 v2, v2, v5478; GFX10-NEXT: s_setpc_b64 s[30:31]479 %mul = fmul <6 x half> %a, %b480 ret <6 x half> %mul481}482 483define <6 x half> @v_fmul_v6f16_fneg_lhs(<6 x half> %a, <6 x half> %b) {484; GFX9-LABEL: v_fmul_v6f16_fneg_lhs:485; GFX9: ; %bb.0:486; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)487; GFX9-NEXT: v_pk_mul_f16 v0, v0, v3 neg_lo:[1,0] neg_hi:[1,0]488; GFX9-NEXT: v_pk_mul_f16 v1, v1, v4 neg_lo:[1,0] neg_hi:[1,0]489; GFX9-NEXT: v_pk_mul_f16 v2, v2, v5 neg_lo:[1,0] neg_hi:[1,0]490; GFX9-NEXT: s_setpc_b64 s[30:31]491;492; GFX8-LABEL: v_fmul_v6f16_fneg_lhs:493; GFX8: ; %bb.0:494; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)495; GFX8-NEXT: v_xor_b32_e32 v0, 0x80008000, v0496; GFX8-NEXT: v_xor_b32_e32 v1, 0x80008000, v1497; GFX8-NEXT: v_xor_b32_e32 v2, 0x80008000, v2498; GFX8-NEXT: v_mul_f16_e32 v6, v0, v3499; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1500; GFX8-NEXT: v_mul_f16_e32 v3, v1, v4501; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1502; GFX8-NEXT: v_mul_f16_e32 v4, v2, v5503; GFX8-NEXT: v_mul_f16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1504; GFX8-NEXT: v_or_b32_e32 v0, v6, v0505; GFX8-NEXT: v_or_b32_e32 v1, v3, v1506; GFX8-NEXT: v_or_b32_e32 v2, v4, v2507; GFX8-NEXT: s_setpc_b64 s[30:31]508;509; GFX10-LABEL: v_fmul_v6f16_fneg_lhs:510; GFX10: ; %bb.0:511; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)512; GFX10-NEXT: v_pk_mul_f16 v0, v0, v3 neg_lo:[1,0] neg_hi:[1,0]513; GFX10-NEXT: v_pk_mul_f16 v1, v1, v4 neg_lo:[1,0] neg_hi:[1,0]514; GFX10-NEXT: v_pk_mul_f16 v2, v2, v5 neg_lo:[1,0] neg_hi:[1,0]515; GFX10-NEXT: s_setpc_b64 s[30:31]516 %neg.a = fneg <6 x half> %a517 %mul = fmul <6 x half> %neg.a, %b518 ret <6 x half> %mul519}520 521define <6 x half> @v_fmul_v6f16_fneg_rhs(<6 x half> %a, <6 x half> %b) {522; GFX9-LABEL: v_fmul_v6f16_fneg_rhs:523; GFX9: ; %bb.0:524; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)525; GFX9-NEXT: v_pk_mul_f16 v0, v0, v3 neg_lo:[0,1] neg_hi:[0,1]526; GFX9-NEXT: v_pk_mul_f16 v1, v1, v4 neg_lo:[0,1] neg_hi:[0,1]527; GFX9-NEXT: v_pk_mul_f16 v2, v2, v5 neg_lo:[0,1] neg_hi:[0,1]528; GFX9-NEXT: s_setpc_b64 s[30:31]529;530; GFX8-LABEL: v_fmul_v6f16_fneg_rhs:531; GFX8: ; %bb.0:532; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)533; GFX8-NEXT: v_xor_b32_e32 v3, 0x80008000, v3534; GFX8-NEXT: v_xor_b32_e32 v4, 0x80008000, v4535; GFX8-NEXT: v_xor_b32_e32 v5, 0x80008000, v5536; GFX8-NEXT: v_mul_f16_e32 v6, v0, v3537; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1538; GFX8-NEXT: v_mul_f16_e32 v3, v1, v4539; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1540; GFX8-NEXT: v_mul_f16_e32 v4, v2, v5541; GFX8-NEXT: v_mul_f16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1542; GFX8-NEXT: v_or_b32_e32 v0, v6, v0543; GFX8-NEXT: v_or_b32_e32 v1, v3, v1544; GFX8-NEXT: v_or_b32_e32 v2, v4, v2545; GFX8-NEXT: s_setpc_b64 s[30:31]546;547; GFX10-LABEL: v_fmul_v6f16_fneg_rhs:548; GFX10: ; %bb.0:549; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)550; GFX10-NEXT: v_pk_mul_f16 v0, v0, v3 neg_lo:[0,1] neg_hi:[0,1]551; GFX10-NEXT: v_pk_mul_f16 v1, v1, v4 neg_lo:[0,1] neg_hi:[0,1]552; GFX10-NEXT: v_pk_mul_f16 v2, v2, v5 neg_lo:[0,1] neg_hi:[0,1]553; GFX10-NEXT: s_setpc_b64 s[30:31]554 %neg.b = fneg <6 x half> %b555 %mul = fmul <6 x half> %a, %neg.b556 ret <6 x half> %mul557}558 559define <6 x half> @v_fmul_v6f16_fneg_lhs_fneg_rhs(<6 x half> %a, <6 x half> %b) {560; GFX9-LABEL: v_fmul_v6f16_fneg_lhs_fneg_rhs:561; GFX9: ; %bb.0:562; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)563; GFX9-NEXT: v_pk_mul_f16 v0, v0, v3564; GFX9-NEXT: v_pk_mul_f16 v1, v1, v4565; GFX9-NEXT: v_pk_mul_f16 v2, v2, v5566; GFX9-NEXT: s_setpc_b64 s[30:31]567;568; GFX8-LABEL: v_fmul_v6f16_fneg_lhs_fneg_rhs:569; GFX8: ; %bb.0:570; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)571; GFX8-NEXT: v_mul_f16_e32 v6, v0, v3572; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1573; GFX8-NEXT: v_mul_f16_e32 v3, v1, v4574; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1575; GFX8-NEXT: v_mul_f16_e32 v4, v2, v5576; GFX8-NEXT: v_mul_f16_sdwa v2, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1577; GFX8-NEXT: v_or_b32_e32 v0, v6, v0578; GFX8-NEXT: v_or_b32_e32 v1, v3, v1579; GFX8-NEXT: v_or_b32_e32 v2, v4, v2580; GFX8-NEXT: s_setpc_b64 s[30:31]581;582; GFX10-LABEL: v_fmul_v6f16_fneg_lhs_fneg_rhs:583; GFX10: ; %bb.0:584; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)585; GFX10-NEXT: v_pk_mul_f16 v0, v0, v3586; GFX10-NEXT: v_pk_mul_f16 v1, v1, v4587; GFX10-NEXT: v_pk_mul_f16 v2, v2, v5588; GFX10-NEXT: s_setpc_b64 s[30:31]589 %neg.a = fneg <6 x half> %a590 %neg.b = fneg <6 x half> %b591 %mul = fmul <6 x half> %neg.a, %neg.b592 ret <6 x half> %mul593}594 595define <8 x half> @v_fmul_v8f16(<8 x half> %a, <8 x half> %b) {596; GFX9-LABEL: v_fmul_v8f16:597; GFX9: ; %bb.0:598; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)599; GFX9-NEXT: v_pk_mul_f16 v0, v0, v4600; GFX9-NEXT: v_pk_mul_f16 v1, v1, v5601; GFX9-NEXT: v_pk_mul_f16 v2, v2, v6602; GFX9-NEXT: v_pk_mul_f16 v3, v3, v7603; GFX9-NEXT: s_setpc_b64 s[30:31]604;605; GFX8-LABEL: v_fmul_v8f16:606; GFX8: ; %bb.0:607; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)608; GFX8-NEXT: v_mul_f16_e32 v8, v0, v4609; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1610; GFX8-NEXT: v_mul_f16_e32 v4, v1, v5611; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1612; GFX8-NEXT: v_mul_f16_e32 v5, v2, v6613; GFX8-NEXT: v_mul_f16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1614; GFX8-NEXT: v_mul_f16_e32 v6, v3, v7615; GFX8-NEXT: v_mul_f16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1616; GFX8-NEXT: v_or_b32_e32 v0, v8, v0617; GFX8-NEXT: v_or_b32_e32 v1, v4, v1618; GFX8-NEXT: v_or_b32_e32 v2, v5, v2619; GFX8-NEXT: v_or_b32_e32 v3, v6, v3620; GFX8-NEXT: s_setpc_b64 s[30:31]621;622; GFX10-LABEL: v_fmul_v8f16:623; GFX10: ; %bb.0:624; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)625; GFX10-NEXT: v_pk_mul_f16 v0, v0, v4626; GFX10-NEXT: v_pk_mul_f16 v1, v1, v5627; GFX10-NEXT: v_pk_mul_f16 v2, v2, v6628; GFX10-NEXT: v_pk_mul_f16 v3, v3, v7629; GFX10-NEXT: s_setpc_b64 s[30:31]630 %mul = fmul <8 x half> %a, %b631 ret <8 x half> %mul632}633 634define <8 x half> @v_fmul_v8f16_fneg_lhs(<8 x half> %a, <8 x half> %b) {635; GFX9-LABEL: v_fmul_v8f16_fneg_lhs:636; GFX9: ; %bb.0:637; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)638; GFX9-NEXT: v_pk_mul_f16 v0, v0, v4 neg_lo:[1,0] neg_hi:[1,0]639; GFX9-NEXT: v_pk_mul_f16 v1, v1, v5 neg_lo:[1,0] neg_hi:[1,0]640; GFX9-NEXT: v_pk_mul_f16 v2, v2, v6 neg_lo:[1,0] neg_hi:[1,0]641; GFX9-NEXT: v_pk_mul_f16 v3, v3, v7 neg_lo:[1,0] neg_hi:[1,0]642; GFX9-NEXT: s_setpc_b64 s[30:31]643;644; GFX8-LABEL: v_fmul_v8f16_fneg_lhs:645; GFX8: ; %bb.0:646; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)647; GFX8-NEXT: v_xor_b32_e32 v0, 0x80008000, v0648; GFX8-NEXT: v_xor_b32_e32 v1, 0x80008000, v1649; GFX8-NEXT: v_xor_b32_e32 v2, 0x80008000, v2650; GFX8-NEXT: v_xor_b32_e32 v3, 0x80008000, v3651; GFX8-NEXT: v_mul_f16_e32 v8, v0, v4652; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1653; GFX8-NEXT: v_mul_f16_e32 v4, v1, v5654; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1655; GFX8-NEXT: v_mul_f16_e32 v5, v2, v6656; GFX8-NEXT: v_mul_f16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1657; GFX8-NEXT: v_mul_f16_e32 v6, v3, v7658; GFX8-NEXT: v_mul_f16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1659; GFX8-NEXT: v_or_b32_e32 v0, v8, v0660; GFX8-NEXT: v_or_b32_e32 v1, v4, v1661; GFX8-NEXT: v_or_b32_e32 v2, v5, v2662; GFX8-NEXT: v_or_b32_e32 v3, v6, v3663; GFX8-NEXT: s_setpc_b64 s[30:31]664;665; GFX10-LABEL: v_fmul_v8f16_fneg_lhs:666; GFX10: ; %bb.0:667; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)668; GFX10-NEXT: v_pk_mul_f16 v0, v0, v4 neg_lo:[1,0] neg_hi:[1,0]669; GFX10-NEXT: v_pk_mul_f16 v1, v1, v5 neg_lo:[1,0] neg_hi:[1,0]670; GFX10-NEXT: v_pk_mul_f16 v2, v2, v6 neg_lo:[1,0] neg_hi:[1,0]671; GFX10-NEXT: v_pk_mul_f16 v3, v3, v7 neg_lo:[1,0] neg_hi:[1,0]672; GFX10-NEXT: s_setpc_b64 s[30:31]673 %neg.a = fneg <8 x half> %a674 %mul = fmul <8 x half> %neg.a, %b675 ret <8 x half> %mul676}677 678define <8 x half> @v_fmul_v8f16_fneg_rhs(<8 x half> %a, <8 x half> %b) {679; GFX9-LABEL: v_fmul_v8f16_fneg_rhs:680; GFX9: ; %bb.0:681; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)682; GFX9-NEXT: v_pk_mul_f16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1]683; GFX9-NEXT: v_pk_mul_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]684; GFX9-NEXT: v_pk_mul_f16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1]685; GFX9-NEXT: v_pk_mul_f16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1]686; GFX9-NEXT: s_setpc_b64 s[30:31]687;688; GFX8-LABEL: v_fmul_v8f16_fneg_rhs:689; GFX8: ; %bb.0:690; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)691; GFX8-NEXT: v_xor_b32_e32 v4, 0x80008000, v4692; GFX8-NEXT: v_xor_b32_e32 v5, 0x80008000, v5693; GFX8-NEXT: v_xor_b32_e32 v6, 0x80008000, v6694; GFX8-NEXT: v_xor_b32_e32 v7, 0x80008000, v7695; GFX8-NEXT: v_mul_f16_e32 v8, v0, v4696; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1697; GFX8-NEXT: v_mul_f16_e32 v4, v1, v5698; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1699; GFX8-NEXT: v_mul_f16_e32 v5, v2, v6700; GFX8-NEXT: v_mul_f16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1701; GFX8-NEXT: v_mul_f16_e32 v6, v3, v7702; GFX8-NEXT: v_mul_f16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1703; GFX8-NEXT: v_or_b32_e32 v0, v8, v0704; GFX8-NEXT: v_or_b32_e32 v1, v4, v1705; GFX8-NEXT: v_or_b32_e32 v2, v5, v2706; GFX8-NEXT: v_or_b32_e32 v3, v6, v3707; GFX8-NEXT: s_setpc_b64 s[30:31]708;709; GFX10-LABEL: v_fmul_v8f16_fneg_rhs:710; GFX10: ; %bb.0:711; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)712; GFX10-NEXT: v_pk_mul_f16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1]713; GFX10-NEXT: v_pk_mul_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]714; GFX10-NEXT: v_pk_mul_f16 v2, v2, v6 neg_lo:[0,1] neg_hi:[0,1]715; GFX10-NEXT: v_pk_mul_f16 v3, v3, v7 neg_lo:[0,1] neg_hi:[0,1]716; GFX10-NEXT: s_setpc_b64 s[30:31]717 %neg.b = fneg <8 x half> %b718 %mul = fmul <8 x half> %a, %neg.b719 ret <8 x half> %mul720}721 722define <8 x half> @v_fmul_v8f16_fneg_lhs_fneg_rhs(<8 x half> %a, <8 x half> %b) {723; GFX9-LABEL: v_fmul_v8f16_fneg_lhs_fneg_rhs:724; GFX9: ; %bb.0:725; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)726; GFX9-NEXT: v_pk_mul_f16 v0, v0, v4727; GFX9-NEXT: v_pk_mul_f16 v1, v1, v5728; GFX9-NEXT: v_pk_mul_f16 v2, v2, v6729; GFX9-NEXT: v_pk_mul_f16 v3, v3, v7730; GFX9-NEXT: s_setpc_b64 s[30:31]731;732; GFX8-LABEL: v_fmul_v8f16_fneg_lhs_fneg_rhs:733; GFX8: ; %bb.0:734; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)735; GFX8-NEXT: v_mul_f16_e32 v8, v0, v4736; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1737; GFX8-NEXT: v_mul_f16_e32 v4, v1, v5738; GFX8-NEXT: v_mul_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1739; GFX8-NEXT: v_mul_f16_e32 v5, v2, v6740; GFX8-NEXT: v_mul_f16_sdwa v2, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1741; GFX8-NEXT: v_mul_f16_e32 v6, v3, v7742; GFX8-NEXT: v_mul_f16_sdwa v3, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1743; GFX8-NEXT: v_or_b32_e32 v0, v8, v0744; GFX8-NEXT: v_or_b32_e32 v1, v4, v1745; GFX8-NEXT: v_or_b32_e32 v2, v5, v2746; GFX8-NEXT: v_or_b32_e32 v3, v6, v3747; GFX8-NEXT: s_setpc_b64 s[30:31]748;749; GFX10-LABEL: v_fmul_v8f16_fneg_lhs_fneg_rhs:750; GFX10: ; %bb.0:751; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)752; GFX10-NEXT: v_pk_mul_f16 v0, v0, v4753; GFX10-NEXT: v_pk_mul_f16 v1, v1, v5754; GFX10-NEXT: v_pk_mul_f16 v2, v2, v6755; GFX10-NEXT: v_pk_mul_f16 v3, v3, v7756; GFX10-NEXT: s_setpc_b64 s[30:31]757 %neg.a = fneg <8 x half> %a758 %neg.b = fneg <8 x half> %b759 %mul = fmul <8 x half> %neg.a, %neg.b760 ret <8 x half> %mul761}762