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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=GFX6 %s3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefix=GFX8 %s4; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s5; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10 %s6; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s7; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s8 9define float @v_pow_f32(float %x, float %y) {10; GFX6-LABEL: v_pow_f32:11; GFX6: ; %bb.0:12; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; GFX6-NEXT: v_mov_b32_e32 v2, 0x80000014; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v215; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc16; GFX6-NEXT: v_lshlrev_b32_e32 v2, 5, v217; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v218; GFX6-NEXT: v_log_f32_e32 v0, v019; GFX6-NEXT: v_mov_b32_e32 v2, 0x4200000020; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc21; GFX6-NEXT: v_sub_f32_e32 v0, v0, v222; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v123; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc000024; GFX6-NEXT: v_mov_b32_e32 v2, 0x4280000025; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v126; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc27; GFX6-NEXT: v_add_f32_e32 v0, v0, v128; GFX6-NEXT: v_exp_f32_e32 v0, v029; GFX6-NEXT: v_not_b32_e32 v1, 6330; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc31; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v132; GFX6-NEXT: s_setpc_b64 s[30:31]33;34; GFX8-LABEL: v_pow_f32:35; GFX8: ; %bb.0:36; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)37; GFX8-NEXT: v_mov_b32_e32 v2, 0x80000038; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v239; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc40; GFX8-NEXT: v_lshlrev_b32_e32 v2, 5, v241; GFX8-NEXT: v_ldexp_f32 v0, v0, v242; GFX8-NEXT: v_log_f32_e32 v0, v043; GFX8-NEXT: v_mov_b32_e32 v2, 0x4200000044; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc45; GFX8-NEXT: v_sub_f32_e32 v0, v0, v246; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v147; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc000048; GFX8-NEXT: v_mov_b32_e32 v2, 0x4280000049; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v150; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc51; GFX8-NEXT: v_add_f32_e32 v0, v0, v152; GFX8-NEXT: v_exp_f32_e32 v0, v053; GFX8-NEXT: v_not_b32_e32 v1, 6354; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc55; GFX8-NEXT: v_ldexp_f32 v0, v0, v156; GFX8-NEXT: s_setpc_b64 s[30:31]57;58; GFX9-LABEL: v_pow_f32:59; GFX9: ; %bb.0:60; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)61; GFX9-NEXT: v_mov_b32_e32 v2, 0x80000062; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v263; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc64; GFX9-NEXT: v_lshlrev_b32_e32 v2, 5, v265; GFX9-NEXT: v_ldexp_f32 v0, v0, v266; GFX9-NEXT: v_log_f32_e32 v0, v067; GFX9-NEXT: v_mov_b32_e32 v2, 0x4200000068; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc69; GFX9-NEXT: v_sub_f32_e32 v0, v0, v270; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v171; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc000072; GFX9-NEXT: v_mov_b32_e32 v2, 0x4280000073; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v174; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc75; GFX9-NEXT: v_add_f32_e32 v0, v0, v176; GFX9-NEXT: v_exp_f32_e32 v0, v077; GFX9-NEXT: v_not_b32_e32 v1, 6378; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc79; GFX9-NEXT: v_ldexp_f32 v0, v0, v180; GFX9-NEXT: s_setpc_b64 s[30:31]81;82; GFX10-LABEL: v_pow_f32:83; GFX10: ; %bb.0:84; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)85; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v086; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo87; GFX10-NEXT: v_lshlrev_b32_e32 v2, 5, v288; GFX10-NEXT: v_ldexp_f32 v0, v0, v289; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, vcc_lo90; GFX10-NEXT: v_log_f32_e32 v0, v091; GFX10-NEXT: v_sub_f32_e32 v0, v0, v292; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v193; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v094; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo95; GFX10-NEXT: v_add_f32_e32 v0, v0, v196; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo97; GFX10-NEXT: v_exp_f32_e32 v0, v098; GFX10-NEXT: v_ldexp_f32 v0, v0, v199; GFX10-NEXT: s_setpc_b64 s[30:31]100;101; GFX11-LABEL: v_pow_f32:102; GFX11: ; %bb.0:103; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)104; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0105; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo106; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)107; GFX11-NEXT: v_lshlrev_b32_e32 v2, 5, v2108; GFX11-NEXT: v_ldexp_f32 v0, v0, v2109; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, vcc_lo110; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)111; GFX11-NEXT: v_log_f32_e32 v0, v0112; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)113; GFX11-NEXT: v_sub_f32_e32 v0, v0, v2114; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v1115; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)116; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0117; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo118; GFX11-NEXT: v_add_f32_e32 v0, v0, v1119; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo120; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)121; GFX11-NEXT: v_exp_f32_e32 v0, v0122; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)123; GFX11-NEXT: v_ldexp_f32 v0, v0, v1124; GFX11-NEXT: s_setpc_b64 s[30:31]125 %pow = call float @llvm.pow.f32(float %x, float %y)126 ret float %pow127}128 129define <2 x float> @v_pow_v2f32(<2 x float> %x, <2 x float> %y) {130; GFX6-LABEL: v_pow_v2f32:131; GFX6: ; %bb.0:132; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)133; GFX6-NEXT: v_mov_b32_e32 v4, 0x800000134; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v4135; GFX6-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc136; GFX6-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v4137; GFX6-NEXT: v_lshlrev_b32_e32 v5, 5, v5138; GFX6-NEXT: v_cndmask_b32_e64 v4, 0, 1, s[4:5]139; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v5140; GFX6-NEXT: v_lshlrev_b32_e32 v4, 5, v4141; GFX6-NEXT: v_log_f32_e32 v0, v0142; GFX6-NEXT: v_ldexp_f32_e32 v1, v1, v4143; GFX6-NEXT: v_log_f32_e32 v1, v1144; GFX6-NEXT: v_mov_b32_e32 v5, 0x42000000145; GFX6-NEXT: v_cndmask_b32_e32 v6, 0, v5, vcc146; GFX6-NEXT: v_sub_f32_e32 v0, v0, v6147; GFX6-NEXT: v_cndmask_b32_e64 v5, 0, v5, s[4:5]148; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v2149; GFX6-NEXT: v_mov_b32_e32 v2, 0xc2fc0000150; GFX6-NEXT: v_sub_f32_e32 v1, v1, v5151; GFX6-NEXT: v_mov_b32_e32 v6, 0x42800000152; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v2153; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v1, v3154; GFX6-NEXT: v_cndmask_b32_e32 v7, 0, v6, vcc155; GFX6-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v2156; GFX6-NEXT: v_add_f32_e32 v0, v0, v7157; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, v6, s[4:5]158; GFX6-NEXT: v_exp_f32_e32 v0, v0159; GFX6-NEXT: v_add_f32_e32 v1, v1, v2160; GFX6-NEXT: v_exp_f32_e32 v1, v1161; GFX6-NEXT: v_not_b32_e32 v4, 63162; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc163; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v2164; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, v4, s[4:5]165; GFX6-NEXT: v_ldexp_f32_e32 v1, v1, v2166; GFX6-NEXT: s_setpc_b64 s[30:31]167;168; GFX8-LABEL: v_pow_v2f32:169; GFX8: ; %bb.0:170; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)171; GFX8-NEXT: v_mov_b32_e32 v4, 0x800000172; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v4173; GFX8-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc174; GFX8-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v4175; GFX8-NEXT: v_lshlrev_b32_e32 v5, 5, v5176; GFX8-NEXT: v_cndmask_b32_e64 v4, 0, 1, s[4:5]177; GFX8-NEXT: v_ldexp_f32 v0, v0, v5178; GFX8-NEXT: v_lshlrev_b32_e32 v4, 5, v4179; GFX8-NEXT: v_log_f32_e32 v0, v0180; GFX8-NEXT: v_ldexp_f32 v1, v1, v4181; GFX8-NEXT: v_log_f32_e32 v1, v1182; GFX8-NEXT: v_mov_b32_e32 v5, 0x42000000183; GFX8-NEXT: v_cndmask_b32_e32 v6, 0, v5, vcc184; GFX8-NEXT: v_sub_f32_e32 v0, v0, v6185; GFX8-NEXT: v_cndmask_b32_e64 v5, 0, v5, s[4:5]186; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v2187; GFX8-NEXT: v_mov_b32_e32 v2, 0xc2fc0000188; GFX8-NEXT: v_sub_f32_e32 v1, v1, v5189; GFX8-NEXT: v_mov_b32_e32 v6, 0x42800000190; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v2191; GFX8-NEXT: v_mul_legacy_f32_e32 v1, v1, v3192; GFX8-NEXT: v_cndmask_b32_e32 v7, 0, v6, vcc193; GFX8-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v2194; GFX8-NEXT: v_add_f32_e32 v0, v0, v7195; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, v6, s[4:5]196; GFX8-NEXT: v_exp_f32_e32 v0, v0197; GFX8-NEXT: v_add_f32_e32 v1, v1, v2198; GFX8-NEXT: v_exp_f32_e32 v1, v1199; GFX8-NEXT: v_not_b32_e32 v4, 63200; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc201; GFX8-NEXT: v_ldexp_f32 v0, v0, v2202; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, v4, s[4:5]203; GFX8-NEXT: v_ldexp_f32 v1, v1, v2204; GFX8-NEXT: s_setpc_b64 s[30:31]205;206; GFX9-LABEL: v_pow_v2f32:207; GFX9: ; %bb.0:208; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)209; GFX9-NEXT: v_mov_b32_e32 v4, 0x800000210; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v4211; GFX9-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc212; GFX9-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v4213; GFX9-NEXT: v_lshlrev_b32_e32 v5, 5, v5214; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, s[4:5]215; GFX9-NEXT: v_ldexp_f32 v0, v0, v5216; GFX9-NEXT: v_lshlrev_b32_e32 v4, 5, v4217; GFX9-NEXT: v_log_f32_e32 v0, v0218; GFX9-NEXT: v_ldexp_f32 v1, v1, v4219; GFX9-NEXT: v_log_f32_e32 v1, v1220; GFX9-NEXT: v_mov_b32_e32 v5, 0x42000000221; GFX9-NEXT: v_cndmask_b32_e32 v6, 0, v5, vcc222; GFX9-NEXT: v_sub_f32_e32 v0, v0, v6223; GFX9-NEXT: v_cndmask_b32_e64 v5, 0, v5, s[4:5]224; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v2225; GFX9-NEXT: v_mov_b32_e32 v2, 0xc2fc0000226; GFX9-NEXT: v_sub_f32_e32 v1, v1, v5227; GFX9-NEXT: v_mov_b32_e32 v6, 0x42800000228; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v2229; GFX9-NEXT: v_mul_legacy_f32_e32 v1, v1, v3230; GFX9-NEXT: v_cndmask_b32_e32 v7, 0, v6, vcc231; GFX9-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v2232; GFX9-NEXT: v_add_f32_e32 v0, v0, v7233; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, v6, s[4:5]234; GFX9-NEXT: v_exp_f32_e32 v0, v0235; GFX9-NEXT: v_add_f32_e32 v1, v1, v2236; GFX9-NEXT: v_exp_f32_e32 v1, v1237; GFX9-NEXT: v_not_b32_e32 v4, 63238; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc239; GFX9-NEXT: v_ldexp_f32 v0, v0, v2240; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, v4, s[4:5]241; GFX9-NEXT: v_ldexp_f32 v1, v1, v2242; GFX9-NEXT: s_setpc_b64 s[30:31]243;244; GFX10-LABEL: v_pow_v2f32:245; GFX10: ; %bb.0:246; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)247; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0248; GFX10-NEXT: v_cmp_gt_f32_e64 s4, 0x800000, v1249; GFX10-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo250; GFX10-NEXT: v_cndmask_b32_e64 v5, 0, 1, s4251; GFX10-NEXT: v_lshlrev_b32_e32 v4, 5, v4252; GFX10-NEXT: v_lshlrev_b32_e32 v5, 5, v5253; GFX10-NEXT: v_ldexp_f32 v0, v0, v4254; GFX10-NEXT: v_ldexp_f32 v1, v1, v5255; GFX10-NEXT: v_cndmask_b32_e64 v4, 0, 0x42000000, vcc_lo256; GFX10-NEXT: v_cndmask_b32_e64 v5, 0, 0x42000000, s4257; GFX10-NEXT: v_log_f32_e32 v0, v0258; GFX10-NEXT: v_log_f32_e32 v1, v1259; GFX10-NEXT: v_sub_f32_e32 v0, v0, v4260; GFX10-NEXT: v_sub_f32_e32 v1, v1, v5261; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v2262; GFX10-NEXT: v_mul_legacy_f32_e32 v1, v1, v3263; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0264; GFX10-NEXT: v_cmp_gt_f32_e64 s4, 0xc2fc0000, v1265; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo266; GFX10-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s4267; GFX10-NEXT: v_add_f32_e32 v0, v0, v2268; GFX10-NEXT: v_add_f32_e32 v1, v1, v3269; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo270; GFX10-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s4271; GFX10-NEXT: v_exp_f32_e32 v0, v0272; GFX10-NEXT: v_exp_f32_e32 v1, v1273; GFX10-NEXT: v_ldexp_f32 v0, v0, v2274; GFX10-NEXT: v_ldexp_f32 v1, v1, v3275; GFX10-NEXT: s_setpc_b64 s[30:31]276;277; GFX11-LABEL: v_pow_v2f32:278; GFX11: ; %bb.0:279; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)280; GFX11-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, v1281; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0282; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)283; GFX11-NEXT: v_cndmask_b32_e64 v5, 0, 1, s0284; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo285; GFX11-NEXT: v_lshlrev_b32_e32 v5, 5, v5286; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)287; GFX11-NEXT: v_ldexp_f32 v1, v1, v5288; GFX11-NEXT: v_cndmask_b32_e64 v5, 0, 0x42000000, s0289; GFX11-NEXT: v_log_f32_e32 v1, v1290; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)291; GFX11-NEXT: v_dual_sub_f32 v1, v1, v5 :: v_dual_lshlrev_b32 v4, 5, v4292; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)293; GFX11-NEXT: v_ldexp_f32 v0, v0, v4294; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, 0x42000000, vcc_lo295; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v1, v1, v3296; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)297; GFX11-NEXT: v_log_f32_e32 v0, v0298; GFX11-NEXT: v_cmp_gt_f32_e64 s0, 0xc2fc0000, v1299; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)300; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 0x42800000, s0301; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)302; GFX11-NEXT: v_dual_sub_f32 v0, v0, v4 :: v_dual_add_f32 v1, v1, v3303; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v2304; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 0xffffffc0, s0305; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)306; GFX11-NEXT: v_exp_f32_e32 v1, v1307; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v0308; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0x42800000, vcc_lo309; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)310; GFX11-NEXT: v_ldexp_f32 v1, v1, v3311; GFX11-NEXT: v_add_f32_e32 v0, v0, v2312; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0xffffffc0, vcc_lo313; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)314; GFX11-NEXT: v_exp_f32_e32 v0, v0315; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)316; GFX11-NEXT: v_ldexp_f32 v0, v0, v2317; GFX11-NEXT: s_setpc_b64 s[30:31]318 %pow = call <2 x float> @llvm.pow.v2f32(<2 x float> %x, <2 x float> %y)319 ret <2 x float> %pow320}321 322define half @v_pow_f16(half %x, half %y) {323; GFX6-LABEL: v_pow_f16:324; GFX6: ; %bb.0:325; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)326; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0327; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1328; GFX6-NEXT: v_mov_b32_e32 v2, 0xc2fc0000329; GFX6-NEXT: v_mov_b32_e32 v3, 0x42800000330; GFX6-NEXT: v_log_f32_e32 v0, v0331; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v1332; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v2333; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc334; GFX6-NEXT: v_add_f32_e32 v0, v0, v1335; GFX6-NEXT: v_exp_f32_e32 v0, v0336; GFX6-NEXT: v_not_b32_e32 v1, 63337; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc338; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v1339; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0340; GFX6-NEXT: s_setpc_b64 s[30:31]341;342; GFX8-LABEL: v_pow_f16:343; GFX8: ; %bb.0:344; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)345; GFX8-NEXT: v_log_f16_e32 v0, v0346; GFX8-NEXT: v_cvt_f32_f16_e32 v1, v1347; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0348; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v1349; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0350; GFX8-NEXT: v_exp_f16_e32 v0, v0351; GFX8-NEXT: s_setpc_b64 s[30:31]352;353; GFX9-LABEL: v_pow_f16:354; GFX9: ; %bb.0:355; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)356; GFX9-NEXT: v_log_f16_e32 v0, v0357; GFX9-NEXT: v_cvt_f32_f16_e32 v1, v1358; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0359; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v1360; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0361; GFX9-NEXT: v_exp_f16_e32 v0, v0362; GFX9-NEXT: s_setpc_b64 s[30:31]363;364; GFX10-LABEL: v_pow_f16:365; GFX10: ; %bb.0:366; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)367; GFX10-NEXT: v_log_f16_e32 v0, v0368; GFX10-NEXT: v_cvt_f32_f16_e32 v1, v1369; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0370; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v1371; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0372; GFX10-NEXT: v_exp_f16_e32 v0, v0373; GFX10-NEXT: s_setpc_b64 s[30:31]374;375; GFX11-TRUE16-LABEL: v_pow_f16:376; GFX11-TRUE16: ; %bb.0:377; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)378; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l379; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.l380; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)381; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l382; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)383; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v1384; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0385; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)386; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.l, v0.l387; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]388;389; GFX11-FAKE16-LABEL: v_pow_f16:390; GFX11-FAKE16: ; %bb.0:391; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)392; GFX11-FAKE16-NEXT: v_log_f16_e32 v0, v0393; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1394; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)395; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0396; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)397; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v1398; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0399; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)400; GFX11-FAKE16-NEXT: v_exp_f16_e32 v0, v0401; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]402 %pow = call half @llvm.pow.f16(half %x, half %y)403 ret half %pow404}405 406define <2 x half> @v_pow_v2f16(<2 x half> %x, <2 x half> %y) {407; GFX6-LABEL: v_pow_v2f16:408; GFX6: ; %bb.0:409; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)410; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0411; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2412; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1413; GFX6-NEXT: v_mov_b32_e32 v4, 0xc2fc0000414; GFX6-NEXT: v_log_f32_e32 v0, v0415; GFX6-NEXT: v_mov_b32_e32 v5, 0x42800000416; GFX6-NEXT: v_log_f32_e32 v1, v1417; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v2418; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v4419; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v5, vcc420; GFX6-NEXT: v_add_f32_e32 v0, v0, v2421; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v3422; GFX6-NEXT: v_not_b32_e32 v3, 63423; GFX6-NEXT: v_cndmask_b32_e32 v6, 0, v3, vcc424; GFX6-NEXT: v_exp_f32_e32 v0, v0425; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v1, v2426; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v1, v4427; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v5, vcc428; GFX6-NEXT: v_add_f32_e32 v1, v1, v2429; GFX6-NEXT: v_exp_f32_e32 v1, v1430; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v3, vcc431; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v6432; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0433; GFX6-NEXT: v_ldexp_f32_e32 v1, v1, v2434; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1435; GFX6-NEXT: s_setpc_b64 s[30:31]436;437; GFX8-LABEL: v_pow_v2f16:438; GFX8: ; %bb.0:439; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)440; GFX8-NEXT: v_log_f16_e32 v2, v0441; GFX8-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1442; GFX8-NEXT: v_cvt_f32_f16_e32 v3, v1443; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1444; GFX8-NEXT: v_cvt_f32_f16_e32 v2, v2445; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0446; GFX8-NEXT: v_mul_legacy_f32_e32 v2, v2, v3447; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v1448; GFX8-NEXT: v_cvt_f16_f32_e32 v1, v2449; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0450; GFX8-NEXT: v_exp_f16_e32 v1, v1451; GFX8-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD452; GFX8-NEXT: v_or_b32_e32 v0, v1, v0453; GFX8-NEXT: s_setpc_b64 s[30:31]454;455; GFX9-LABEL: v_pow_v2f16:456; GFX9: ; %bb.0:457; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)458; GFX9-NEXT: v_log_f16_e32 v2, v0459; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1460; GFX9-NEXT: v_cvt_f32_f16_e32 v3, v1461; GFX9-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1462; GFX9-NEXT: v_cvt_f32_f16_e32 v2, v2463; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0464; GFX9-NEXT: v_mul_legacy_f32_e32 v2, v2, v3465; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v1466; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v2467; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0468; GFX9-NEXT: v_exp_f16_e32 v1, v1469; GFX9-NEXT: v_exp_f16_e32 v0, v0470; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1471; GFX9-NEXT: s_setpc_b64 s[30:31]472;473; GFX10-LABEL: v_pow_v2f16:474; GFX10: ; %bb.0:475; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)476; GFX10-NEXT: v_log_f16_e32 v2, v0477; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1478; GFX10-NEXT: v_cvt_f32_f16_e32 v3, v1479; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1480; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v2481; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0482; GFX10-NEXT: v_mul_legacy_f32_e32 v2, v2, v3483; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v1484; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2485; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0486; GFX10-NEXT: v_exp_f16_e32 v1, v2487; GFX10-NEXT: v_exp_f16_e32 v0, v0488; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v1489; GFX10-NEXT: v_lshl_or_b32 v0, v0, 16, v1490; GFX10-NEXT: s_setpc_b64 s[30:31]491;492; GFX11-TRUE16-LABEL: v_pow_v2f16:493; GFX11-TRUE16: ; %bb.0:494; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)495; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l496; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h497; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v1.l498; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.h499; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)500; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v0.l501; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.h502; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)503; GFX11-TRUE16-NEXT: v_dual_mul_dx9_zero_f32 v2, v3, v2 :: v_dual_mul_dx9_zero_f32 v1, v0, v1504; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v2505; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)506; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v1507; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.l, v0.l508; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)509; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.h, v0.h510; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]511;512; GFX11-FAKE16-LABEL: v_pow_v2f16:513; GFX11-FAKE16: ; %bb.0:514; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)515; GFX11-FAKE16-NEXT: v_log_f16_e32 v2, v0516; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0517; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1518; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1519; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)520; GFX11-FAKE16-NEXT: v_log_f16_e32 v0, v0521; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, v3522; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)523; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v2524; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0525; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)526; GFX11-FAKE16-NEXT: v_dual_mul_dx9_zero_f32 v1, v2, v1 :: v_dual_mul_dx9_zero_f32 v0, v0, v3527; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1528; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)529; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0530; GFX11-FAKE16-NEXT: v_exp_f16_e32 v1, v1531; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)532; GFX11-FAKE16-NEXT: v_exp_f16_e32 v0, v0533; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)534; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1535; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 16, v1536; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]537 %pow = call <2 x half> @llvm.pow.v2f16(<2 x half> %x, <2 x half> %y)538 ret <2 x half> %pow539}540 541define <2 x half> @v_pow_v2f16_fneg_lhs(<2 x half> %x, <2 x half> %y) {542; GFX6-LABEL: v_pow_v2f16_fneg_lhs:543; GFX6: ; %bb.0:544; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)545; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1546; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0547; GFX6-NEXT: v_or_b32_e32 v0, v1, v0548; GFX6-NEXT: v_xor_b32_e32 v0, 0x80008000, v0549; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v0550; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0551; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0552; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2553; GFX6-NEXT: v_log_f32_e32 v1, v1554; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v3555; GFX6-NEXT: v_log_f32_e32 v0, v0556; GFX6-NEXT: v_mov_b32_e32 v4, 0x42800000557; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v1, v2558; GFX6-NEXT: v_mov_b32_e32 v2, 0xc2fc0000559; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v1, v2560; GFX6-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc561; GFX6-NEXT: v_add_f32_e32 v1, v1, v5562; GFX6-NEXT: v_not_b32_e32 v5, 63563; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v3564; GFX6-NEXT: v_cndmask_b32_e32 v6, 0, v5, vcc565; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v2566; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc567; GFX6-NEXT: v_exp_f32_e32 v1, v1568; GFX6-NEXT: v_add_f32_e32 v0, v0, v2569; GFX6-NEXT: v_exp_f32_e32 v2, v0570; GFX6-NEXT: v_ldexp_f32_e32 v0, v1, v6571; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v5, vcc572; GFX6-NEXT: v_ldexp_f32_e32 v1, v2, v1573; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0574; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1575; GFX6-NEXT: s_setpc_b64 s[30:31]576;577; GFX8-LABEL: v_pow_v2f16_fneg_lhs:578; GFX8: ; %bb.0:579; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)580; GFX8-NEXT: v_xor_b32_e32 v0, 0x80008000, v0581; GFX8-NEXT: v_log_f16_e32 v2, v0582; GFX8-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1583; GFX8-NEXT: v_cvt_f32_f16_e32 v3, v1584; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1585; GFX8-NEXT: v_cvt_f32_f16_e32 v2, v2586; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0587; GFX8-NEXT: v_mul_legacy_f32_e32 v2, v2, v3588; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v1589; GFX8-NEXT: v_cvt_f16_f32_e32 v1, v2590; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0591; GFX8-NEXT: v_exp_f16_e32 v1, v1592; GFX8-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD593; GFX8-NEXT: v_or_b32_e32 v0, v1, v0594; GFX8-NEXT: s_setpc_b64 s[30:31]595;596; GFX9-LABEL: v_pow_v2f16_fneg_lhs:597; GFX9: ; %bb.0:598; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)599; GFX9-NEXT: v_xor_b32_e32 v0, 0x80008000, v0600; GFX9-NEXT: v_log_f16_e32 v2, v0601; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1602; GFX9-NEXT: v_cvt_f32_f16_e32 v3, v1603; GFX9-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1604; GFX9-NEXT: v_cvt_f32_f16_e32 v2, v2605; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0606; GFX9-NEXT: v_mul_legacy_f32_e32 v2, v2, v3607; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v1608; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v2609; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0610; GFX9-NEXT: v_exp_f16_e32 v1, v1611; GFX9-NEXT: v_exp_f16_e32 v0, v0612; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1613; GFX9-NEXT: s_setpc_b64 s[30:31]614;615; GFX10-LABEL: v_pow_v2f16_fneg_lhs:616; GFX10: ; %bb.0:617; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)618; GFX10-NEXT: v_xor_b32_e32 v0, 0x80008000, v0619; GFX10-NEXT: v_cvt_f32_f16_e32 v3, v1620; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1621; GFX10-NEXT: v_log_f16_e32 v2, v0622; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1623; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v2624; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0625; GFX10-NEXT: v_mul_legacy_f32_e32 v2, v2, v3626; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v1627; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2628; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0629; GFX10-NEXT: v_exp_f16_e32 v1, v2630; GFX10-NEXT: v_exp_f16_e32 v0, v0631; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v1632; GFX10-NEXT: v_lshl_or_b32 v0, v0, 16, v1633; GFX10-NEXT: s_setpc_b64 s[30:31]634;635; GFX11-TRUE16-LABEL: v_pow_v2f16_fneg_lhs:636; GFX11-TRUE16: ; %bb.0:637; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)638; GFX11-TRUE16-NEXT: v_xor_b32_e32 v0, 0x80008000, v0639; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v1.l640; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.h641; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)642; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l643; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h644; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)645; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v0.l646; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.h647; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)648; GFX11-TRUE16-NEXT: v_dual_mul_dx9_zero_f32 v2, v3, v2 :: v_dual_mul_dx9_zero_f32 v1, v0, v1649; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v2650; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)651; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v1652; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.l, v0.l653; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)654; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.h, v0.h655; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]656;657; GFX11-FAKE16-LABEL: v_pow_v2f16_fneg_lhs:658; GFX11-FAKE16: ; %bb.0:659; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)660; GFX11-FAKE16-NEXT: v_xor_b32_e32 v0, 0x80008000, v0661; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1662; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1663; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)664; GFX11-FAKE16-NEXT: v_log_f16_e32 v2, v0665; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0666; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, v3667; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)668; GFX11-FAKE16-NEXT: v_log_f16_e32 v0, v0669; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)670; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v2671; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0672; GFX11-FAKE16-NEXT: v_dual_mul_dx9_zero_f32 v1, v2, v1 :: v_dual_mul_dx9_zero_f32 v0, v0, v3673; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)674; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1675; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0676; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)677; GFX11-FAKE16-NEXT: v_exp_f16_e32 v1, v1678; GFX11-FAKE16-NEXT: v_exp_f16_e32 v0, v0679; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)680; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1681; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)682; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 16, v1683; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]684 %x.fneg = fneg <2 x half> %x685 %pow = call <2 x half> @llvm.pow.v2f16(<2 x half> %x.fneg, <2 x half> %y)686 ret <2 x half> %pow687}688 689define <2 x half> @v_pow_v2f16_fneg_rhs(<2 x half> %x, <2 x half> %y) {690; GFX6-LABEL: v_pow_v2f16_fneg_rhs:691; GFX6: ; %bb.0:692; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)693; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0694; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3695; GFX6-NEXT: v_and_b32_e32 v2, 0xffff, v2696; GFX6-NEXT: v_or_b32_e32 v2, v3, v2697; GFX6-NEXT: v_xor_b32_e32 v2, 0x80008000, v2698; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1699; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v2700; GFX6-NEXT: v_log_f32_e32 v0, v0701; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2702; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2703; GFX6-NEXT: v_log_f32_e32 v1, v1704; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v3705; GFX6-NEXT: v_mov_b32_e32 v3, 0xc2fc0000706; GFX6-NEXT: v_mov_b32_e32 v4, 0x42800000707; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v3708; GFX6-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc709; GFX6-NEXT: v_add_f32_e32 v0, v0, v5710; GFX6-NEXT: v_not_b32_e32 v5, 63711; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v1, v2712; GFX6-NEXT: v_cndmask_b32_e32 v6, 0, v5, vcc713; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v1, v3714; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc715; GFX6-NEXT: v_add_f32_e32 v1, v1, v2716; GFX6-NEXT: v_exp_f32_e32 v0, v0717; GFX6-NEXT: v_exp_f32_e32 v1, v1718; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v5, vcc719; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v6720; GFX6-NEXT: v_ldexp_f32_e32 v1, v1, v2721; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0722; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1723; GFX6-NEXT: s_setpc_b64 s[30:31]724;725; GFX8-LABEL: v_pow_v2f16_fneg_rhs:726; GFX8: ; %bb.0:727; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)728; GFX8-NEXT: v_log_f16_e32 v2, v0729; GFX8-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1730; GFX8-NEXT: v_xor_b32_e32 v1, 0x80008000, v1731; GFX8-NEXT: v_cvt_f32_f16_e32 v3, v1732; GFX8-NEXT: v_cvt_f32_f16_e32 v2, v2733; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1734; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0735; GFX8-NEXT: v_mul_legacy_f32_e32 v2, v2, v3736; GFX8-NEXT: v_cvt_f16_f32_e32 v2, v2737; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v1738; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0739; GFX8-NEXT: v_exp_f16_e32 v1, v2740; GFX8-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD741; GFX8-NEXT: v_or_b32_e32 v0, v1, v0742; GFX8-NEXT: s_setpc_b64 s[30:31]743;744; GFX9-LABEL: v_pow_v2f16_fneg_rhs:745; GFX9: ; %bb.0:746; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)747; GFX9-NEXT: v_log_f16_e32 v2, v0748; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1749; GFX9-NEXT: v_xor_b32_e32 v1, 0x80008000, v1750; GFX9-NEXT: v_cvt_f32_f16_e32 v3, v1751; GFX9-NEXT: v_cvt_f32_f16_e32 v2, v2752; GFX9-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1753; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0754; GFX9-NEXT: v_mul_legacy_f32_e32 v2, v2, v3755; GFX9-NEXT: v_cvt_f16_f32_e32 v2, v2756; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v1757; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0758; GFX9-NEXT: v_exp_f16_e32 v1, v2759; GFX9-NEXT: v_exp_f16_e32 v0, v0760; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1761; GFX9-NEXT: s_setpc_b64 s[30:31]762;763; GFX10-LABEL: v_pow_v2f16_fneg_rhs:764; GFX10: ; %bb.0:765; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)766; GFX10-NEXT: v_log_f16_e32 v2, v0767; GFX10-NEXT: v_xor_b32_e32 v1, 0x80008000, v1768; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1769; GFX10-NEXT: v_cvt_f32_f16_e32 v3, v1770; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1771; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v2772; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0773; GFX10-NEXT: v_mul_legacy_f32_e32 v2, v2, v3774; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v1775; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2776; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0777; GFX10-NEXT: v_exp_f16_e32 v1, v2778; GFX10-NEXT: v_exp_f16_e32 v0, v0779; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v1780; GFX10-NEXT: v_lshl_or_b32 v0, v0, 16, v1781; GFX10-NEXT: s_setpc_b64 s[30:31]782;783; GFX11-TRUE16-LABEL: v_pow_v2f16_fneg_rhs:784; GFX11-TRUE16: ; %bb.0:785; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)786; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l787; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h788; GFX11-TRUE16-NEXT: v_xor_b32_e32 v1, 0x80008000, v1789; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)790; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v1.l791; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.h792; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)793; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v0.l794; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.h795; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)796; GFX11-TRUE16-NEXT: v_dual_mul_dx9_zero_f32 v2, v3, v2 :: v_dual_mul_dx9_zero_f32 v1, v0, v1797; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v2798; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)799; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v1800; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.l, v0.l801; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)802; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.h, v0.h803; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]804;805; GFX11-FAKE16-LABEL: v_pow_v2f16_fneg_rhs:806; GFX11-FAKE16: ; %bb.0:807; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)808; GFX11-FAKE16-NEXT: v_log_f16_e32 v2, v0809; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0810; GFX11-FAKE16-NEXT: v_xor_b32_e32 v1, 0x80008000, v1811; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)812; GFX11-FAKE16-NEXT: v_log_f16_e32 v0, v0813; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1814; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1815; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)816; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v2817; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, v3818; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0819; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)820; GFX11-FAKE16-NEXT: v_dual_mul_dx9_zero_f32 v1, v2, v1 :: v_dual_mul_dx9_zero_f32 v0, v0, v3821; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1822; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)823; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0824; GFX11-FAKE16-NEXT: v_exp_f16_e32 v1, v1825; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)826; GFX11-FAKE16-NEXT: v_exp_f16_e32 v0, v0827; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)828; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1829; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 16, v1830; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]831 %y.fneg = fneg <2 x half> %y832 %pow = call <2 x half> @llvm.pow.v2f16(<2 x half> %x, <2 x half> %y.fneg)833 ret <2 x half> %pow834}835 836define <2 x half> @v_pow_v2f16_fneg_lhs_rhs(<2 x half> %x, <2 x half> %y) {837; GFX6-LABEL: v_pow_v2f16_fneg_lhs_rhs:838; GFX6: ; %bb.0:839; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)840; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1841; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0842; GFX6-NEXT: v_or_b32_e32 v0, v1, v0843; GFX6-NEXT: v_xor_b32_e32 v0, 0x80008000, v0844; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v3845; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v0846; GFX6-NEXT: v_and_b32_e32 v2, 0xffff, v2847; GFX6-NEXT: v_or_b32_e32 v1, v1, v2848; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0849; GFX6-NEXT: v_xor_b32_e32 v1, 0x80008000, v1850; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0851; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v1852; GFX6-NEXT: v_log_f32_e32 v3, v3853; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1854; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1855; GFX6-NEXT: v_log_f32_e32 v0, v0856; GFX6-NEXT: v_mul_legacy_f32_e32 v2, v3, v2857; GFX6-NEXT: v_mov_b32_e32 v3, 0xc2fc0000858; GFX6-NEXT: v_mov_b32_e32 v4, 0x42800000859; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v2, v3860; GFX6-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc861; GFX6-NEXT: v_add_f32_e32 v2, v2, v5862; GFX6-NEXT: v_not_b32_e32 v5, 63863; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v1864; GFX6-NEXT: v_cndmask_b32_e32 v6, 0, v5, vcc865; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v3866; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v4, vcc867; GFX6-NEXT: v_exp_f32_e32 v2, v2868; GFX6-NEXT: v_add_f32_e32 v0, v0, v1869; GFX6-NEXT: v_exp_f32_e32 v1, v0870; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v6871; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v5, vcc872; GFX6-NEXT: v_ldexp_f32_e32 v1, v1, v2873; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0874; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1875; GFX6-NEXT: s_setpc_b64 s[30:31]876;877; GFX8-LABEL: v_pow_v2f16_fneg_lhs_rhs:878; GFX8: ; %bb.0:879; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)880; GFX8-NEXT: v_xor_b32_e32 v0, 0x80008000, v0881; GFX8-NEXT: v_log_f16_e32 v2, v0882; GFX8-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1883; GFX8-NEXT: v_xor_b32_e32 v1, 0x80008000, v1884; GFX8-NEXT: v_cvt_f32_f16_e32 v3, v1885; GFX8-NEXT: v_cvt_f32_f16_e32 v2, v2886; GFX8-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1887; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0888; GFX8-NEXT: v_mul_legacy_f32_e32 v2, v2, v3889; GFX8-NEXT: v_cvt_f16_f32_e32 v2, v2890; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v1891; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0892; GFX8-NEXT: v_exp_f16_e32 v1, v2893; GFX8-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD894; GFX8-NEXT: v_or_b32_e32 v0, v1, v0895; GFX8-NEXT: s_setpc_b64 s[30:31]896;897; GFX9-LABEL: v_pow_v2f16_fneg_lhs_rhs:898; GFX9: ; %bb.0:899; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)900; GFX9-NEXT: v_xor_b32_e32 v0, 0x80008000, v0901; GFX9-NEXT: v_log_f16_e32 v2, v0902; GFX9-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1903; GFX9-NEXT: v_xor_b32_e32 v1, 0x80008000, v1904; GFX9-NEXT: v_cvt_f32_f16_e32 v3, v1905; GFX9-NEXT: v_cvt_f32_f16_e32 v2, v2906; GFX9-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1907; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0908; GFX9-NEXT: v_mul_legacy_f32_e32 v2, v2, v3909; GFX9-NEXT: v_cvt_f16_f32_e32 v2, v2910; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v1911; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0912; GFX9-NEXT: v_exp_f16_e32 v1, v2913; GFX9-NEXT: v_exp_f16_e32 v0, v0914; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1915; GFX9-NEXT: s_setpc_b64 s[30:31]916;917; GFX10-LABEL: v_pow_v2f16_fneg_lhs_rhs:918; GFX10: ; %bb.0:919; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)920; GFX10-NEXT: v_xor_b32_e32 v0, 0x80008000, v0921; GFX10-NEXT: v_xor_b32_e32 v1, 0x80008000, v1922; GFX10-NEXT: v_log_f16_e32 v2, v0923; GFX10-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1924; GFX10-NEXT: v_cvt_f32_f16_e32 v3, v1925; GFX10-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1926; GFX10-NEXT: v_cvt_f32_f16_e32 v2, v2927; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0928; GFX10-NEXT: v_mul_legacy_f32_e32 v2, v2, v3929; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v1930; GFX10-NEXT: v_cvt_f16_f32_e32 v2, v2931; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0932; GFX10-NEXT: v_exp_f16_e32 v1, v2933; GFX10-NEXT: v_exp_f16_e32 v0, v0934; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v1935; GFX10-NEXT: v_lshl_or_b32 v0, v0, 16, v1936; GFX10-NEXT: s_setpc_b64 s[30:31]937;938; GFX11-TRUE16-LABEL: v_pow_v2f16_fneg_lhs_rhs:939; GFX11-TRUE16: ; %bb.0:940; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)941; GFX11-TRUE16-NEXT: v_xor_b32_e32 v0, 0x80008000, v0942; GFX11-TRUE16-NEXT: v_xor_b32_e32 v1, 0x80008000, v1943; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)944; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l945; GFX11-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h946; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)947; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v1.l948; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.h949; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)950; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v0.l951; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.h952; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)953; GFX11-TRUE16-NEXT: v_dual_mul_dx9_zero_f32 v2, v3, v2 :: v_dual_mul_dx9_zero_f32 v1, v0, v1954; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v2955; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)956; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v1957; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.l, v0.l958; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)959; GFX11-TRUE16-NEXT: v_exp_f16_e32 v0.h, v0.h960; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]961;962; GFX11-FAKE16-LABEL: v_pow_v2f16_fneg_lhs_rhs:963; GFX11-FAKE16: ; %bb.0:964; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)965; GFX11-FAKE16-NEXT: v_xor_b32_e32 v0, 0x80008000, v0966; GFX11-FAKE16-NEXT: v_xor_b32_e32 v1, 0x80008000, v1967; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)968; GFX11-FAKE16-NEXT: v_log_f16_e32 v2, v0969; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0970; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1971; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1972; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)973; GFX11-FAKE16-NEXT: v_log_f16_e32 v0, v0974; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, v3975; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)976; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v2977; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0978; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)979; GFX11-FAKE16-NEXT: v_dual_mul_dx9_zero_f32 v1, v2, v1 :: v_dual_mul_dx9_zero_f32 v0, v0, v3980; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1981; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)982; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0983; GFX11-FAKE16-NEXT: v_exp_f16_e32 v1, v1984; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)985; GFX11-FAKE16-NEXT: v_exp_f16_e32 v0, v0986; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)987; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v1988; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 16, v1989; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]990 %x.fneg = fneg <2 x half> %x991 %y.fneg = fneg <2 x half> %y992 %pow = call <2 x half> @llvm.pow.v2f16(<2 x half> %x.fneg, <2 x half> %y.fneg)993 ret <2 x half> %pow994}995 996; FIXME997; define double @v_pow_f64(double %x, double %y) {998; %pow = call double @llvm.pow.f64(double %x, double %y)999; ret double %pow1000; }1001 1002define float @v_pow_f32_fabs_lhs(float %x, float %y) {1003; GFX6-LABEL: v_pow_f32_fabs_lhs:1004; GFX6: ; %bb.0:1005; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1006; GFX6-NEXT: v_mov_b32_e32 v2, 0x8000001007; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v21008; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1009; GFX6-NEXT: v_lshlrev_b32_e32 v2, 5, v21010; GFX6-NEXT: v_ldexp_f32_e64 v0, |v0|, v21011; GFX6-NEXT: v_log_f32_e32 v0, v01012; GFX6-NEXT: v_mov_b32_e32 v2, 0x420000001013; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1014; GFX6-NEXT: v_sub_f32_e32 v0, v0, v21015; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v11016; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc00001017; GFX6-NEXT: v_mov_b32_e32 v2, 0x428000001018; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11019; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1020; GFX6-NEXT: v_add_f32_e32 v0, v0, v11021; GFX6-NEXT: v_exp_f32_e32 v0, v01022; GFX6-NEXT: v_not_b32_e32 v1, 631023; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1024; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11025; GFX6-NEXT: s_setpc_b64 s[30:31]1026;1027; GFX8-LABEL: v_pow_f32_fabs_lhs:1028; GFX8: ; %bb.0:1029; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1030; GFX8-NEXT: v_mov_b32_e32 v2, 0x8000001031; GFX8-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v21032; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1033; GFX8-NEXT: v_lshlrev_b32_e32 v2, 5, v21034; GFX8-NEXT: v_ldexp_f32 v0, |v0|, v21035; GFX8-NEXT: v_log_f32_e32 v0, v01036; GFX8-NEXT: v_mov_b32_e32 v2, 0x420000001037; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1038; GFX8-NEXT: v_sub_f32_e32 v0, v0, v21039; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v11040; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc00001041; GFX8-NEXT: v_mov_b32_e32 v2, 0x428000001042; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11043; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1044; GFX8-NEXT: v_add_f32_e32 v0, v0, v11045; GFX8-NEXT: v_exp_f32_e32 v0, v01046; GFX8-NEXT: v_not_b32_e32 v1, 631047; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1048; GFX8-NEXT: v_ldexp_f32 v0, v0, v11049; GFX8-NEXT: s_setpc_b64 s[30:31]1050;1051; GFX9-LABEL: v_pow_f32_fabs_lhs:1052; GFX9: ; %bb.0:1053; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1054; GFX9-NEXT: v_mov_b32_e32 v2, 0x8000001055; GFX9-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v21056; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1057; GFX9-NEXT: v_lshlrev_b32_e32 v2, 5, v21058; GFX9-NEXT: v_ldexp_f32 v0, |v0|, v21059; GFX9-NEXT: v_log_f32_e32 v0, v01060; GFX9-NEXT: v_mov_b32_e32 v2, 0x420000001061; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1062; GFX9-NEXT: v_sub_f32_e32 v0, v0, v21063; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v11064; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc00001065; GFX9-NEXT: v_mov_b32_e32 v2, 0x428000001066; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11067; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1068; GFX9-NEXT: v_add_f32_e32 v0, v0, v11069; GFX9-NEXT: v_exp_f32_e32 v0, v01070; GFX9-NEXT: v_not_b32_e32 v1, 631071; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1072; GFX9-NEXT: v_ldexp_f32 v0, v0, v11073; GFX9-NEXT: s_setpc_b64 s[30:31]1074;1075; GFX10-LABEL: v_pow_f32_fabs_lhs:1076; GFX10: ; %bb.0:1077; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1078; GFX10-NEXT: v_cmp_gt_f32_e64 s4, 0x800000, |v0|1079; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41080; GFX10-NEXT: v_lshlrev_b32_e32 v2, 5, v21081; GFX10-NEXT: v_ldexp_f32 v0, |v0|, v21082; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, s41083; GFX10-NEXT: v_log_f32_e32 v0, v01084; GFX10-NEXT: v_sub_f32_e32 v0, v0, v21085; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v11086; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01087; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1088; GFX10-NEXT: v_add_f32_e32 v0, v0, v11089; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1090; GFX10-NEXT: v_exp_f32_e32 v0, v01091; GFX10-NEXT: v_ldexp_f32 v0, v0, v11092; GFX10-NEXT: s_setpc_b64 s[30:31]1093;1094; GFX11-LABEL: v_pow_f32_fabs_lhs:1095; GFX11: ; %bb.0:1096; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1097; GFX11-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, |v0|1098; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1099; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s01100; GFX11-NEXT: v_lshlrev_b32_e32 v2, 5, v21101; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1102; GFX11-NEXT: v_ldexp_f32 v0, |v0|, v21103; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, s01104; GFX11-NEXT: v_log_f32_e32 v0, v01105; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1106; GFX11-NEXT: v_sub_f32_e32 v0, v0, v21107; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1108; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v11109; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01110; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1111; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1112; GFX11-NEXT: v_add_f32_e32 v0, v0, v11113; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1114; GFX11-NEXT: v_exp_f32_e32 v0, v01115; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1116; GFX11-NEXT: v_ldexp_f32 v0, v0, v11117; GFX11-NEXT: s_setpc_b64 s[30:31]1118 %fabs.x = call float @llvm.fabs.f32(float %x)1119 %pow = call float @llvm.pow.f32(float %fabs.x, float %y)1120 ret float %pow1121}1122 1123define float @v_pow_f32_fabs_rhs(float %x, float %y) {1124; GFX6-LABEL: v_pow_f32_fabs_rhs:1125; GFX6: ; %bb.0:1126; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1127; GFX6-NEXT: v_mov_b32_e32 v2, 0x8000001128; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v21129; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1130; GFX6-NEXT: v_lshlrev_b32_e32 v2, 5, v21131; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v21132; GFX6-NEXT: v_log_f32_e32 v0, v01133; GFX6-NEXT: v_mov_b32_e32 v2, 0x420000001134; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1135; GFX6-NEXT: v_sub_f32_e32 v0, v0, v21136; GFX6-NEXT: v_mul_legacy_f32_e64 v0, v0, |v1|1137; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc00001138; GFX6-NEXT: v_mov_b32_e32 v2, 0x428000001139; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11140; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1141; GFX6-NEXT: v_add_f32_e32 v0, v0, v11142; GFX6-NEXT: v_exp_f32_e32 v0, v01143; GFX6-NEXT: v_not_b32_e32 v1, 631144; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1145; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11146; GFX6-NEXT: s_setpc_b64 s[30:31]1147;1148; GFX8-LABEL: v_pow_f32_fabs_rhs:1149; GFX8: ; %bb.0:1150; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1151; GFX8-NEXT: v_mov_b32_e32 v2, 0x8000001152; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v21153; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1154; GFX8-NEXT: v_lshlrev_b32_e32 v2, 5, v21155; GFX8-NEXT: v_ldexp_f32 v0, v0, v21156; GFX8-NEXT: v_log_f32_e32 v0, v01157; GFX8-NEXT: v_mov_b32_e32 v2, 0x420000001158; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1159; GFX8-NEXT: v_sub_f32_e32 v0, v0, v21160; GFX8-NEXT: v_mul_legacy_f32_e64 v0, v0, |v1|1161; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc00001162; GFX8-NEXT: v_mov_b32_e32 v2, 0x428000001163; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11164; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1165; GFX8-NEXT: v_add_f32_e32 v0, v0, v11166; GFX8-NEXT: v_exp_f32_e32 v0, v01167; GFX8-NEXT: v_not_b32_e32 v1, 631168; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1169; GFX8-NEXT: v_ldexp_f32 v0, v0, v11170; GFX8-NEXT: s_setpc_b64 s[30:31]1171;1172; GFX9-LABEL: v_pow_f32_fabs_rhs:1173; GFX9: ; %bb.0:1174; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1175; GFX9-NEXT: v_mov_b32_e32 v2, 0x8000001176; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v21177; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1178; GFX9-NEXT: v_lshlrev_b32_e32 v2, 5, v21179; GFX9-NEXT: v_ldexp_f32 v0, v0, v21180; GFX9-NEXT: v_log_f32_e32 v0, v01181; GFX9-NEXT: v_mov_b32_e32 v2, 0x420000001182; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1183; GFX9-NEXT: v_sub_f32_e32 v0, v0, v21184; GFX9-NEXT: v_mul_legacy_f32_e64 v0, v0, |v1|1185; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc00001186; GFX9-NEXT: v_mov_b32_e32 v2, 0x428000001187; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11188; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1189; GFX9-NEXT: v_add_f32_e32 v0, v0, v11190; GFX9-NEXT: v_exp_f32_e32 v0, v01191; GFX9-NEXT: v_not_b32_e32 v1, 631192; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1193; GFX9-NEXT: v_ldexp_f32 v0, v0, v11194; GFX9-NEXT: s_setpc_b64 s[30:31]1195;1196; GFX10-LABEL: v_pow_f32_fabs_rhs:1197; GFX10: ; %bb.0:1198; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1199; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v01200; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo1201; GFX10-NEXT: v_lshlrev_b32_e32 v2, 5, v21202; GFX10-NEXT: v_ldexp_f32 v0, v0, v21203; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, vcc_lo1204; GFX10-NEXT: v_log_f32_e32 v0, v01205; GFX10-NEXT: v_sub_f32_e32 v0, v0, v21206; GFX10-NEXT: v_mul_legacy_f32_e64 v0, v0, |v1|1207; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01208; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1209; GFX10-NEXT: v_add_f32_e32 v0, v0, v11210; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1211; GFX10-NEXT: v_exp_f32_e32 v0, v01212; GFX10-NEXT: v_ldexp_f32 v0, v0, v11213; GFX10-NEXT: s_setpc_b64 s[30:31]1214;1215; GFX11-LABEL: v_pow_f32_fabs_rhs:1216; GFX11: ; %bb.0:1217; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1218; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v01219; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo1220; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1221; GFX11-NEXT: v_lshlrev_b32_e32 v2, 5, v21222; GFX11-NEXT: v_ldexp_f32 v0, v0, v21223; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, vcc_lo1224; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1225; GFX11-NEXT: v_log_f32_e32 v0, v01226; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1227; GFX11-NEXT: v_sub_f32_e32 v0, v0, v21228; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, v0, |v1|1229; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1230; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01231; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1232; GFX11-NEXT: v_add_f32_e32 v0, v0, v11233; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1234; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)1235; GFX11-NEXT: v_exp_f32_e32 v0, v01236; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1237; GFX11-NEXT: v_ldexp_f32 v0, v0, v11238; GFX11-NEXT: s_setpc_b64 s[30:31]1239 %fabs.y = call float @llvm.fabs.f32(float %y)1240 %pow = call float @llvm.pow.f32(float %x, float %fabs.y)1241 ret float %pow1242}1243 1244define float @v_pow_f32_fabs_lhs_rhs(float %x, float %y) {1245; GFX6-LABEL: v_pow_f32_fabs_lhs_rhs:1246; GFX6: ; %bb.0:1247; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1248; GFX6-NEXT: v_mov_b32_e32 v2, 0x8000001249; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v21250; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1251; GFX6-NEXT: v_lshlrev_b32_e32 v2, 5, v21252; GFX6-NEXT: v_ldexp_f32_e64 v0, |v0|, v21253; GFX6-NEXT: v_log_f32_e32 v0, v01254; GFX6-NEXT: v_mov_b32_e32 v2, 0x420000001255; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1256; GFX6-NEXT: v_sub_f32_e32 v0, v0, v21257; GFX6-NEXT: v_mul_legacy_f32_e64 v0, v0, |v1|1258; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc00001259; GFX6-NEXT: v_mov_b32_e32 v2, 0x428000001260; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11261; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1262; GFX6-NEXT: v_add_f32_e32 v0, v0, v11263; GFX6-NEXT: v_exp_f32_e32 v0, v01264; GFX6-NEXT: v_not_b32_e32 v1, 631265; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1266; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11267; GFX6-NEXT: s_setpc_b64 s[30:31]1268;1269; GFX8-LABEL: v_pow_f32_fabs_lhs_rhs:1270; GFX8: ; %bb.0:1271; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1272; GFX8-NEXT: v_mov_b32_e32 v2, 0x8000001273; GFX8-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v21274; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1275; GFX8-NEXT: v_lshlrev_b32_e32 v2, 5, v21276; GFX8-NEXT: v_ldexp_f32 v0, |v0|, v21277; GFX8-NEXT: v_log_f32_e32 v0, v01278; GFX8-NEXT: v_mov_b32_e32 v2, 0x420000001279; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1280; GFX8-NEXT: v_sub_f32_e32 v0, v0, v21281; GFX8-NEXT: v_mul_legacy_f32_e64 v0, v0, |v1|1282; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc00001283; GFX8-NEXT: v_mov_b32_e32 v2, 0x428000001284; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11285; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1286; GFX8-NEXT: v_add_f32_e32 v0, v0, v11287; GFX8-NEXT: v_exp_f32_e32 v0, v01288; GFX8-NEXT: v_not_b32_e32 v1, 631289; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1290; GFX8-NEXT: v_ldexp_f32 v0, v0, v11291; GFX8-NEXT: s_setpc_b64 s[30:31]1292;1293; GFX9-LABEL: v_pow_f32_fabs_lhs_rhs:1294; GFX9: ; %bb.0:1295; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1296; GFX9-NEXT: v_mov_b32_e32 v2, 0x8000001297; GFX9-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v21298; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1299; GFX9-NEXT: v_lshlrev_b32_e32 v2, 5, v21300; GFX9-NEXT: v_ldexp_f32 v0, |v0|, v21301; GFX9-NEXT: v_log_f32_e32 v0, v01302; GFX9-NEXT: v_mov_b32_e32 v2, 0x420000001303; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1304; GFX9-NEXT: v_sub_f32_e32 v0, v0, v21305; GFX9-NEXT: v_mul_legacy_f32_e64 v0, v0, |v1|1306; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc00001307; GFX9-NEXT: v_mov_b32_e32 v2, 0x428000001308; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11309; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1310; GFX9-NEXT: v_add_f32_e32 v0, v0, v11311; GFX9-NEXT: v_exp_f32_e32 v0, v01312; GFX9-NEXT: v_not_b32_e32 v1, 631313; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1314; GFX9-NEXT: v_ldexp_f32 v0, v0, v11315; GFX9-NEXT: s_setpc_b64 s[30:31]1316;1317; GFX10-LABEL: v_pow_f32_fabs_lhs_rhs:1318; GFX10: ; %bb.0:1319; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1320; GFX10-NEXT: v_cmp_gt_f32_e64 s4, 0x800000, |v0|1321; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41322; GFX10-NEXT: v_lshlrev_b32_e32 v2, 5, v21323; GFX10-NEXT: v_ldexp_f32 v0, |v0|, v21324; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, s41325; GFX10-NEXT: v_log_f32_e32 v0, v01326; GFX10-NEXT: v_sub_f32_e32 v0, v0, v21327; GFX10-NEXT: v_mul_legacy_f32_e64 v0, v0, |v1|1328; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01329; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1330; GFX10-NEXT: v_add_f32_e32 v0, v0, v11331; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1332; GFX10-NEXT: v_exp_f32_e32 v0, v01333; GFX10-NEXT: v_ldexp_f32 v0, v0, v11334; GFX10-NEXT: s_setpc_b64 s[30:31]1335;1336; GFX11-LABEL: v_pow_f32_fabs_lhs_rhs:1337; GFX11: ; %bb.0:1338; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1339; GFX11-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, |v0|1340; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1341; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s01342; GFX11-NEXT: v_lshlrev_b32_e32 v2, 5, v21343; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1344; GFX11-NEXT: v_ldexp_f32 v0, |v0|, v21345; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, s01346; GFX11-NEXT: v_log_f32_e32 v0, v01347; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1348; GFX11-NEXT: v_sub_f32_e32 v0, v0, v21349; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1350; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, v0, |v1|1351; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01352; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1353; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1354; GFX11-NEXT: v_add_f32_e32 v0, v0, v11355; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1356; GFX11-NEXT: v_exp_f32_e32 v0, v01357; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1358; GFX11-NEXT: v_ldexp_f32 v0, v0, v11359; GFX11-NEXT: s_setpc_b64 s[30:31]1360 %fabs.x = call float @llvm.fabs.f32(float %x)1361 %fabs.y = call float @llvm.fabs.f32(float %y)1362 %pow = call float @llvm.pow.f32(float %fabs.x, float %fabs.y)1363 ret float %pow1364}1365 1366define amdgpu_ps float @v_pow_f32_sgpr_vgpr(float inreg %x, float %y) {1367; GFX6-LABEL: v_pow_f32_sgpr_vgpr:1368; GFX6: ; %bb.0:1369; GFX6-NEXT: v_mov_b32_e32 v1, 0x8000001370; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, s0, v11371; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1372; GFX6-NEXT: v_lshlrev_b32_e32 v1, 5, v11373; GFX6-NEXT: v_ldexp_f32_e32 v1, s0, v11374; GFX6-NEXT: v_log_f32_e32 v1, v11375; GFX6-NEXT: v_mov_b32_e32 v2, 0x420000001376; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1377; GFX6-NEXT: v_sub_f32_e32 v1, v1, v21378; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v1, v01379; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc00001380; GFX6-NEXT: v_mov_b32_e32 v2, 0x428000001381; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11382; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1383; GFX6-NEXT: v_add_f32_e32 v0, v0, v11384; GFX6-NEXT: v_exp_f32_e32 v0, v01385; GFX6-NEXT: v_not_b32_e32 v1, 631386; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1387; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11388; GFX6-NEXT: ; return to shader part epilog1389;1390; GFX8-LABEL: v_pow_f32_sgpr_vgpr:1391; GFX8: ; %bb.0:1392; GFX8-NEXT: v_mov_b32_e32 v1, 0x8000001393; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, s0, v11394; GFX8-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1395; GFX8-NEXT: v_lshlrev_b32_e32 v1, 5, v11396; GFX8-NEXT: v_ldexp_f32 v1, s0, v11397; GFX8-NEXT: v_log_f32_e32 v1, v11398; GFX8-NEXT: v_mov_b32_e32 v2, 0x420000001399; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1400; GFX8-NEXT: v_sub_f32_e32 v1, v1, v21401; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v1, v01402; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc00001403; GFX8-NEXT: v_mov_b32_e32 v2, 0x428000001404; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11405; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1406; GFX8-NEXT: v_add_f32_e32 v0, v0, v11407; GFX8-NEXT: v_exp_f32_e32 v0, v01408; GFX8-NEXT: v_not_b32_e32 v1, 631409; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1410; GFX8-NEXT: v_ldexp_f32 v0, v0, v11411; GFX8-NEXT: ; return to shader part epilog1412;1413; GFX9-LABEL: v_pow_f32_sgpr_vgpr:1414; GFX9: ; %bb.0:1415; GFX9-NEXT: v_mov_b32_e32 v1, 0x8000001416; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, s0, v11417; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1418; GFX9-NEXT: v_lshlrev_b32_e32 v1, 5, v11419; GFX9-NEXT: v_ldexp_f32 v1, s0, v11420; GFX9-NEXT: v_log_f32_e32 v1, v11421; GFX9-NEXT: v_mov_b32_e32 v2, 0x420000001422; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1423; GFX9-NEXT: v_sub_f32_e32 v1, v1, v21424; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v1, v01425; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc00001426; GFX9-NEXT: v_mov_b32_e32 v2, 0x428000001427; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11428; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1429; GFX9-NEXT: v_add_f32_e32 v0, v0, v11430; GFX9-NEXT: v_exp_f32_e32 v0, v01431; GFX9-NEXT: v_not_b32_e32 v1, 631432; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1433; GFX9-NEXT: v_ldexp_f32 v0, v0, v11434; GFX9-NEXT: ; return to shader part epilog1435;1436; GFX10-LABEL: v_pow_f32_sgpr_vgpr:1437; GFX10: ; %bb.0:1438; GFX10-NEXT: v_cmp_gt_f32_e64 s1, 0x800000, s01439; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 1, s11440; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, s11441; GFX10-NEXT: v_lshlrev_b32_e32 v1, 5, v11442; GFX10-NEXT: v_ldexp_f32 v1, s0, v11443; GFX10-NEXT: v_log_f32_e32 v1, v11444; GFX10-NEXT: v_sub_f32_e32 v1, v1, v21445; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v1, v01446; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01447; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1448; GFX10-NEXT: v_add_f32_e32 v0, v0, v11449; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1450; GFX10-NEXT: v_exp_f32_e32 v0, v01451; GFX10-NEXT: v_ldexp_f32 v0, v0, v11452; GFX10-NEXT: ; return to shader part epilog1453;1454; GFX11-LABEL: v_pow_f32_sgpr_vgpr:1455; GFX11: ; %bb.0:1456; GFX11-NEXT: v_cmp_gt_f32_e64 s1, 0x800000, s01457; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1458; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1, s11459; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, s11460; GFX11-NEXT: v_lshlrev_b32_e32 v1, 5, v11461; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1462; GFX11-NEXT: v_ldexp_f32 v1, s0, v11463; GFX11-NEXT: v_log_f32_e32 v1, v11464; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1465; GFX11-NEXT: v_sub_f32_e32 v1, v1, v21466; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1467; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v01468; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01469; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1470; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1471; GFX11-NEXT: v_add_f32_e32 v0, v0, v11472; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1473; GFX11-NEXT: v_exp_f32_e32 v0, v01474; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1475; GFX11-NEXT: v_ldexp_f32 v0, v0, v11476; GFX11-NEXT: ; return to shader part epilog1477 %pow = call float @llvm.pow.f32(float %x, float %y)1478 ret float %pow1479}1480 1481define amdgpu_ps float @v_pow_f32_vgpr_sgpr(float %x, float inreg %y) {1482; GFX6-LABEL: v_pow_f32_vgpr_sgpr:1483; GFX6: ; %bb.0:1484; GFX6-NEXT: v_mov_b32_e32 v1, 0x8000001485; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11486; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1487; GFX6-NEXT: v_lshlrev_b32_e32 v1, 5, v11488; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11489; GFX6-NEXT: v_log_f32_e32 v0, v01490; GFX6-NEXT: v_mov_b32_e32 v1, 0x420000001491; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1492; GFX6-NEXT: v_mov_b32_e32 v2, 0x428000001493; GFX6-NEXT: v_sub_f32_e32 v0, v0, v11494; GFX6-NEXT: v_mul_legacy_f32_e32 v0, s0, v01495; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc00001496; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11497; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1498; GFX6-NEXT: v_add_f32_e32 v0, v0, v11499; GFX6-NEXT: v_exp_f32_e32 v0, v01500; GFX6-NEXT: v_not_b32_e32 v1, 631501; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1502; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11503; GFX6-NEXT: ; return to shader part epilog1504;1505; GFX8-LABEL: v_pow_f32_vgpr_sgpr:1506; GFX8: ; %bb.0:1507; GFX8-NEXT: v_mov_b32_e32 v1, 0x8000001508; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11509; GFX8-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1510; GFX8-NEXT: v_lshlrev_b32_e32 v1, 5, v11511; GFX8-NEXT: v_ldexp_f32 v0, v0, v11512; GFX8-NEXT: v_log_f32_e32 v0, v01513; GFX8-NEXT: v_mov_b32_e32 v1, 0x420000001514; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1515; GFX8-NEXT: v_mov_b32_e32 v2, 0x428000001516; GFX8-NEXT: v_sub_f32_e32 v0, v0, v11517; GFX8-NEXT: v_mul_legacy_f32_e32 v0, s0, v01518; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc00001519; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11520; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1521; GFX8-NEXT: v_add_f32_e32 v0, v0, v11522; GFX8-NEXT: v_exp_f32_e32 v0, v01523; GFX8-NEXT: v_not_b32_e32 v1, 631524; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1525; GFX8-NEXT: v_ldexp_f32 v0, v0, v11526; GFX8-NEXT: ; return to shader part epilog1527;1528; GFX9-LABEL: v_pow_f32_vgpr_sgpr:1529; GFX9: ; %bb.0:1530; GFX9-NEXT: v_mov_b32_e32 v1, 0x8000001531; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11532; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1533; GFX9-NEXT: v_lshlrev_b32_e32 v1, 5, v11534; GFX9-NEXT: v_ldexp_f32 v0, v0, v11535; GFX9-NEXT: v_log_f32_e32 v0, v01536; GFX9-NEXT: v_mov_b32_e32 v1, 0x420000001537; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1538; GFX9-NEXT: v_mov_b32_e32 v2, 0x428000001539; GFX9-NEXT: v_sub_f32_e32 v0, v0, v11540; GFX9-NEXT: v_mul_legacy_f32_e32 v0, s0, v01541; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc00001542; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11543; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1544; GFX9-NEXT: v_add_f32_e32 v0, v0, v11545; GFX9-NEXT: v_exp_f32_e32 v0, v01546; GFX9-NEXT: v_not_b32_e32 v1, 631547; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1548; GFX9-NEXT: v_ldexp_f32 v0, v0, v11549; GFX9-NEXT: ; return to shader part epilog1550;1551; GFX10-LABEL: v_pow_f32_vgpr_sgpr:1552; GFX10: ; %bb.0:1553; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v01554; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1555; GFX10-NEXT: v_lshlrev_b32_e32 v1, 5, v11556; GFX10-NEXT: v_ldexp_f32 v0, v0, v11557; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42000000, vcc_lo1558; GFX10-NEXT: v_log_f32_e32 v0, v01559; GFX10-NEXT: v_sub_f32_e32 v0, v0, v11560; GFX10-NEXT: v_mul_legacy_f32_e32 v0, s0, v01561; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01562; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1563; GFX10-NEXT: v_add_f32_e32 v0, v0, v11564; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1565; GFX10-NEXT: v_exp_f32_e32 v0, v01566; GFX10-NEXT: v_ldexp_f32 v0, v0, v11567; GFX10-NEXT: ; return to shader part epilog1568;1569; GFX11-LABEL: v_pow_f32_vgpr_sgpr:1570; GFX11: ; %bb.0:1571; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v01572; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1573; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1574; GFX11-NEXT: v_lshlrev_b32_e32 v1, 5, v11575; GFX11-NEXT: v_ldexp_f32 v0, v0, v11576; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42000000, vcc_lo1577; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1578; GFX11-NEXT: v_log_f32_e32 v0, v01579; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1580; GFX11-NEXT: v_sub_f32_e32 v0, v0, v11581; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, s0, v01582; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1583; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01584; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1585; GFX11-NEXT: v_add_f32_e32 v0, v0, v11586; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1587; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)1588; GFX11-NEXT: v_exp_f32_e32 v0, v01589; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1590; GFX11-NEXT: v_ldexp_f32 v0, v0, v11591; GFX11-NEXT: ; return to shader part epilog1592 %pow = call float @llvm.pow.f32(float %x, float %y)1593 ret float %pow1594}1595 1596define amdgpu_ps float @v_pow_f32_sgpr_sgpr(float inreg %x, float inreg %y) {1597; GFX6-LABEL: v_pow_f32_sgpr_sgpr:1598; GFX6: ; %bb.0:1599; GFX6-NEXT: v_mov_b32_e32 v0, 0x8000001600; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, s0, v01601; GFX6-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1602; GFX6-NEXT: v_lshlrev_b32_e32 v0, 5, v01603; GFX6-NEXT: v_ldexp_f32_e32 v0, s0, v01604; GFX6-NEXT: v_log_f32_e32 v0, v01605; GFX6-NEXT: v_mov_b32_e32 v1, 0x420000001606; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1607; GFX6-NEXT: v_mov_b32_e32 v2, 0x428000001608; GFX6-NEXT: v_sub_f32_e32 v0, v0, v11609; GFX6-NEXT: v_mul_legacy_f32_e32 v0, s1, v01610; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc00001611; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11612; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1613; GFX6-NEXT: v_add_f32_e32 v0, v0, v11614; GFX6-NEXT: v_exp_f32_e32 v0, v01615; GFX6-NEXT: v_not_b32_e32 v1, 631616; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1617; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11618; GFX6-NEXT: ; return to shader part epilog1619;1620; GFX8-LABEL: v_pow_f32_sgpr_sgpr:1621; GFX8: ; %bb.0:1622; GFX8-NEXT: v_mov_b32_e32 v0, 0x8000001623; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, s0, v01624; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1625; GFX8-NEXT: v_lshlrev_b32_e32 v0, 5, v01626; GFX8-NEXT: v_ldexp_f32 v0, s0, v01627; GFX8-NEXT: v_log_f32_e32 v0, v01628; GFX8-NEXT: v_mov_b32_e32 v1, 0x420000001629; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1630; GFX8-NEXT: v_mov_b32_e32 v2, 0x428000001631; GFX8-NEXT: v_sub_f32_e32 v0, v0, v11632; GFX8-NEXT: v_mul_legacy_f32_e32 v0, s1, v01633; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc00001634; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11635; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1636; GFX8-NEXT: v_add_f32_e32 v0, v0, v11637; GFX8-NEXT: v_exp_f32_e32 v0, v01638; GFX8-NEXT: v_not_b32_e32 v1, 631639; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1640; GFX8-NEXT: v_ldexp_f32 v0, v0, v11641; GFX8-NEXT: ; return to shader part epilog1642;1643; GFX9-LABEL: v_pow_f32_sgpr_sgpr:1644; GFX9: ; %bb.0:1645; GFX9-NEXT: v_mov_b32_e32 v0, 0x8000001646; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, s0, v01647; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1648; GFX9-NEXT: v_lshlrev_b32_e32 v0, 5, v01649; GFX9-NEXT: v_ldexp_f32 v0, s0, v01650; GFX9-NEXT: v_log_f32_e32 v0, v01651; GFX9-NEXT: v_mov_b32_e32 v1, 0x420000001652; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1653; GFX9-NEXT: v_mov_b32_e32 v2, 0x428000001654; GFX9-NEXT: v_sub_f32_e32 v0, v0, v11655; GFX9-NEXT: v_mul_legacy_f32_e32 v0, s1, v01656; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc00001657; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11658; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1659; GFX9-NEXT: v_add_f32_e32 v0, v0, v11660; GFX9-NEXT: v_exp_f32_e32 v0, v01661; GFX9-NEXT: v_not_b32_e32 v1, 631662; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1663; GFX9-NEXT: v_ldexp_f32 v0, v0, v11664; GFX9-NEXT: ; return to shader part epilog1665;1666; GFX10-LABEL: v_pow_f32_sgpr_sgpr:1667; GFX10: ; %bb.0:1668; GFX10-NEXT: v_cmp_gt_f32_e64 s2, 0x800000, s01669; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, s21670; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42000000, s21671; GFX10-NEXT: v_lshlrev_b32_e32 v0, 5, v01672; GFX10-NEXT: v_ldexp_f32 v0, s0, v01673; GFX10-NEXT: v_log_f32_e32 v0, v01674; GFX10-NEXT: v_sub_f32_e32 v0, v0, v11675; GFX10-NEXT: v_mul_legacy_f32_e32 v0, s1, v01676; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01677; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1678; GFX10-NEXT: v_add_f32_e32 v0, v0, v11679; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1680; GFX10-NEXT: v_exp_f32_e32 v0, v01681; GFX10-NEXT: v_ldexp_f32 v0, v0, v11682; GFX10-NEXT: ; return to shader part epilog1683;1684; GFX11-LABEL: v_pow_f32_sgpr_sgpr:1685; GFX11: ; %bb.0:1686; GFX11-NEXT: v_cmp_gt_f32_e64 s2, 0x800000, s01687; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1688; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, s21689; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42000000, s21690; GFX11-NEXT: v_lshlrev_b32_e32 v0, 5, v01691; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1692; GFX11-NEXT: v_ldexp_f32 v0, s0, v01693; GFX11-NEXT: v_log_f32_e32 v0, v01694; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1695; GFX11-NEXT: v_sub_f32_e32 v0, v0, v11696; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1697; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, s1, v01698; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01699; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1700; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1701; GFX11-NEXT: v_add_f32_e32 v0, v0, v11702; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1703; GFX11-NEXT: v_exp_f32_e32 v0, v01704; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1705; GFX11-NEXT: v_ldexp_f32 v0, v0, v11706; GFX11-NEXT: ; return to shader part epilog1707 %pow = call float @llvm.pow.f32(float %x, float %y)1708 ret float %pow1709}1710 1711define float @v_pow_f32_fneg_lhs(float %x, float %y) {1712; GFX6-LABEL: v_pow_f32_fneg_lhs:1713; GFX6: ; %bb.0:1714; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1715; GFX6-NEXT: v_mov_b32_e32 v2, 0x8000001716; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v21717; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1718; GFX6-NEXT: v_lshlrev_b32_e32 v2, 5, v21719; GFX6-NEXT: v_ldexp_f32_e64 v0, -v0, v21720; GFX6-NEXT: v_log_f32_e32 v0, v01721; GFX6-NEXT: v_mov_b32_e32 v2, 0x420000001722; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1723; GFX6-NEXT: v_sub_f32_e32 v0, v0, v21724; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v11725; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc00001726; GFX6-NEXT: v_mov_b32_e32 v2, 0x428000001727; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11728; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1729; GFX6-NEXT: v_add_f32_e32 v0, v0, v11730; GFX6-NEXT: v_exp_f32_e32 v0, v01731; GFX6-NEXT: v_not_b32_e32 v1, 631732; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1733; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11734; GFX6-NEXT: s_setpc_b64 s[30:31]1735;1736; GFX8-LABEL: v_pow_f32_fneg_lhs:1737; GFX8: ; %bb.0:1738; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1739; GFX8-NEXT: v_mov_b32_e32 v2, 0x8000001740; GFX8-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v21741; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1742; GFX8-NEXT: v_lshlrev_b32_e32 v2, 5, v21743; GFX8-NEXT: v_ldexp_f32 v0, -v0, v21744; GFX8-NEXT: v_log_f32_e32 v0, v01745; GFX8-NEXT: v_mov_b32_e32 v2, 0x420000001746; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1747; GFX8-NEXT: v_sub_f32_e32 v0, v0, v21748; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v11749; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc00001750; GFX8-NEXT: v_mov_b32_e32 v2, 0x428000001751; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11752; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1753; GFX8-NEXT: v_add_f32_e32 v0, v0, v11754; GFX8-NEXT: v_exp_f32_e32 v0, v01755; GFX8-NEXT: v_not_b32_e32 v1, 631756; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1757; GFX8-NEXT: v_ldexp_f32 v0, v0, v11758; GFX8-NEXT: s_setpc_b64 s[30:31]1759;1760; GFX9-LABEL: v_pow_f32_fneg_lhs:1761; GFX9: ; %bb.0:1762; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1763; GFX9-NEXT: v_mov_b32_e32 v2, 0x8000001764; GFX9-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v21765; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1766; GFX9-NEXT: v_lshlrev_b32_e32 v2, 5, v21767; GFX9-NEXT: v_ldexp_f32 v0, -v0, v21768; GFX9-NEXT: v_log_f32_e32 v0, v01769; GFX9-NEXT: v_mov_b32_e32 v2, 0x420000001770; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1771; GFX9-NEXT: v_sub_f32_e32 v0, v0, v21772; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v11773; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc00001774; GFX9-NEXT: v_mov_b32_e32 v2, 0x428000001775; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11776; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1777; GFX9-NEXT: v_add_f32_e32 v0, v0, v11778; GFX9-NEXT: v_exp_f32_e32 v0, v01779; GFX9-NEXT: v_not_b32_e32 v1, 631780; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1781; GFX9-NEXT: v_ldexp_f32 v0, v0, v11782; GFX9-NEXT: s_setpc_b64 s[30:31]1783;1784; GFX10-LABEL: v_pow_f32_fneg_lhs:1785; GFX10: ; %bb.0:1786; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1787; GFX10-NEXT: v_cmp_gt_f32_e64 s4, 0x800000, -v01788; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41789; GFX10-NEXT: v_lshlrev_b32_e32 v2, 5, v21790; GFX10-NEXT: v_ldexp_f32 v0, -v0, v21791; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, s41792; GFX10-NEXT: v_log_f32_e32 v0, v01793; GFX10-NEXT: v_sub_f32_e32 v0, v0, v21794; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v11795; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01796; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1797; GFX10-NEXT: v_add_f32_e32 v0, v0, v11798; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1799; GFX10-NEXT: v_exp_f32_e32 v0, v01800; GFX10-NEXT: v_ldexp_f32 v0, v0, v11801; GFX10-NEXT: s_setpc_b64 s[30:31]1802;1803; GFX11-LABEL: v_pow_f32_fneg_lhs:1804; GFX11: ; %bb.0:1805; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1806; GFX11-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, -v01807; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1808; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s01809; GFX11-NEXT: v_lshlrev_b32_e32 v2, 5, v21810; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1811; GFX11-NEXT: v_ldexp_f32 v0, -v0, v21812; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, s01813; GFX11-NEXT: v_log_f32_e32 v0, v01814; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1815; GFX11-NEXT: v_sub_f32_e32 v0, v0, v21816; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1817; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v11818; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01819; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1820; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1821; GFX11-NEXT: v_add_f32_e32 v0, v0, v11822; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1823; GFX11-NEXT: v_exp_f32_e32 v0, v01824; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1825; GFX11-NEXT: v_ldexp_f32 v0, v0, v11826; GFX11-NEXT: s_setpc_b64 s[30:31]1827 %neg.x = fneg float %x1828 %pow = call float @llvm.pow.f32(float %neg.x, float %y)1829 ret float %pow1830}1831 1832define float @v_pow_f32_fneg_rhs(float %x, float %y) {1833; GFX6-LABEL: v_pow_f32_fneg_rhs:1834; GFX6: ; %bb.0:1835; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1836; GFX6-NEXT: v_mov_b32_e32 v2, 0x8000001837; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v21838; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1839; GFX6-NEXT: v_lshlrev_b32_e32 v2, 5, v21840; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v21841; GFX6-NEXT: v_log_f32_e32 v0, v01842; GFX6-NEXT: v_mov_b32_e32 v2, 0x420000001843; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1844; GFX6-NEXT: v_sub_f32_e32 v0, v0, v21845; GFX6-NEXT: v_mul_legacy_f32_e64 v0, v0, -v11846; GFX6-NEXT: v_mov_b32_e32 v1, 0xc2fc00001847; GFX6-NEXT: v_mov_b32_e32 v2, 0x428000001848; GFX6-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11849; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1850; GFX6-NEXT: v_add_f32_e32 v0, v0, v11851; GFX6-NEXT: v_exp_f32_e32 v0, v01852; GFX6-NEXT: v_not_b32_e32 v1, 631853; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1854; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v11855; GFX6-NEXT: s_setpc_b64 s[30:31]1856;1857; GFX8-LABEL: v_pow_f32_fneg_rhs:1858; GFX8: ; %bb.0:1859; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1860; GFX8-NEXT: v_mov_b32_e32 v2, 0x8000001861; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v21862; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1863; GFX8-NEXT: v_lshlrev_b32_e32 v2, 5, v21864; GFX8-NEXT: v_ldexp_f32 v0, v0, v21865; GFX8-NEXT: v_log_f32_e32 v0, v01866; GFX8-NEXT: v_mov_b32_e32 v2, 0x420000001867; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1868; GFX8-NEXT: v_sub_f32_e32 v0, v0, v21869; GFX8-NEXT: v_mul_legacy_f32_e64 v0, v0, -v11870; GFX8-NEXT: v_mov_b32_e32 v1, 0xc2fc00001871; GFX8-NEXT: v_mov_b32_e32 v2, 0x428000001872; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11873; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1874; GFX8-NEXT: v_add_f32_e32 v0, v0, v11875; GFX8-NEXT: v_exp_f32_e32 v0, v01876; GFX8-NEXT: v_not_b32_e32 v1, 631877; GFX8-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1878; GFX8-NEXT: v_ldexp_f32 v0, v0, v11879; GFX8-NEXT: s_setpc_b64 s[30:31]1880;1881; GFX9-LABEL: v_pow_f32_fneg_rhs:1882; GFX9: ; %bb.0:1883; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1884; GFX9-NEXT: v_mov_b32_e32 v2, 0x8000001885; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v21886; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1887; GFX9-NEXT: v_lshlrev_b32_e32 v2, 5, v21888; GFX9-NEXT: v_ldexp_f32 v0, v0, v21889; GFX9-NEXT: v_log_f32_e32 v0, v01890; GFX9-NEXT: v_mov_b32_e32 v2, 0x420000001891; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1892; GFX9-NEXT: v_sub_f32_e32 v0, v0, v21893; GFX9-NEXT: v_mul_legacy_f32_e64 v0, v0, -v11894; GFX9-NEXT: v_mov_b32_e32 v1, 0xc2fc00001895; GFX9-NEXT: v_mov_b32_e32 v2, 0x428000001896; GFX9-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11897; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1898; GFX9-NEXT: v_add_f32_e32 v0, v0, v11899; GFX9-NEXT: v_exp_f32_e32 v0, v01900; GFX9-NEXT: v_not_b32_e32 v1, 631901; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1902; GFX9-NEXT: v_ldexp_f32 v0, v0, v11903; GFX9-NEXT: s_setpc_b64 s[30:31]1904;1905; GFX10-LABEL: v_pow_f32_fneg_rhs:1906; GFX10: ; %bb.0:1907; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1908; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v01909; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo1910; GFX10-NEXT: v_lshlrev_b32_e32 v2, 5, v21911; GFX10-NEXT: v_ldexp_f32 v0, v0, v21912; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, vcc_lo1913; GFX10-NEXT: v_log_f32_e32 v0, v01914; GFX10-NEXT: v_sub_f32_e32 v0, v0, v21915; GFX10-NEXT: v_mul_legacy_f32_e64 v0, v0, -v11916; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01917; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1918; GFX10-NEXT: v_add_f32_e32 v0, v0, v11919; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1920; GFX10-NEXT: v_exp_f32_e32 v0, v01921; GFX10-NEXT: v_ldexp_f32 v0, v0, v11922; GFX10-NEXT: s_setpc_b64 s[30:31]1923;1924; GFX11-LABEL: v_pow_f32_fneg_rhs:1925; GFX11: ; %bb.0:1926; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1927; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v01928; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo1929; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1930; GFX11-NEXT: v_lshlrev_b32_e32 v2, 5, v21931; GFX11-NEXT: v_ldexp_f32 v0, v0, v21932; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 0x42000000, vcc_lo1933; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1934; GFX11-NEXT: v_log_f32_e32 v0, v01935; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1936; GFX11-NEXT: v_sub_f32_e32 v0, v0, v21937; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, v0, -v11938; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1939; GFX11-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0xc2fc0000, v01940; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x42800000, vcc_lo1941; GFX11-NEXT: v_add_f32_e32 v0, v0, v11942; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0xffffffc0, vcc_lo1943; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)1944; GFX11-NEXT: v_exp_f32_e32 v0, v01945; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1946; GFX11-NEXT: v_ldexp_f32 v0, v0, v11947; GFX11-NEXT: s_setpc_b64 s[30:31]1948 %neg.y = fneg float %y1949 %pow = call float @llvm.pow.f32(float %x, float %neg.y)1950 ret float %pow1951}1952 1953declare half @llvm.pow.f16(half, half)1954declare float @llvm.pow.f32(float, float)1955declare double @llvm.pow.f64(double, double)1956 1957declare half @llvm.fabs.f16(half)1958declare float @llvm.fabs.f32(float)1959 1960declare <2 x half> @llvm.pow.v2f16(<2 x half>, <2 x half>)1961declare <2 x float> @llvm.pow.v2f32(<2 x float>, <2 x float>)1962