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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=tahiti -o - %s | FileCheck -check-prefixes=GCN,GFX6 %s3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=fiji -o - %s | FileCheck -check-prefixes=GCN,GFX8 %s4; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -o - %s | FileCheck -check-prefixes=GCN,GFX9 %s5; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -o - %s | FileCheck -check-prefixes=GCN,GFX10 %s6; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 -o - %s | FileCheck -check-prefixes=GFX11 %s7 8define amdgpu_ps i7 @s_fshl_i7(i7 inreg %lhs, i7 inreg %rhs, i7 inreg %amt) {9; GFX6-LABEL: s_fshl_i7:10; GFX6: ; %bb.0:11; GFX6-NEXT: v_cvt_f32_ubyte0_e32 v0, 712; GFX6-NEXT: v_rcp_iflag_f32_e32 v0, v013; GFX6-NEXT: s_and_b32 s2, s2, 0x7f14; GFX6-NEXT: s_bfe_u32 s1, s1, 0x6000115; GFX6-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v016; GFX6-NEXT: v_cvt_u32_f32_e32 v0, v017; GFX6-NEXT: v_mul_lo_u32 v1, v0, -718; GFX6-NEXT: v_mul_hi_u32 v1, v0, v119; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v120; GFX6-NEXT: v_mul_hi_u32 v0, s2, v021; GFX6-NEXT: v_mul_lo_u32 v0, v0, 722; GFX6-NEXT: v_sub_i32_e32 v0, vcc, s2, v023; GFX6-NEXT: v_add_i32_e32 v1, vcc, -7, v024; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 7, v025; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc26; GFX6-NEXT: v_add_i32_e32 v1, vcc, -7, v027; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 7, v028; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc29; GFX6-NEXT: v_sub_i32_e32 v1, vcc, 6, v030; GFX6-NEXT: v_and_b32_e32 v0, 0x7f, v031; GFX6-NEXT: v_and_b32_e32 v1, 0x7f, v132; GFX6-NEXT: v_lshl_b32_e32 v0, s0, v033; GFX6-NEXT: v_lshr_b32_e32 v1, s1, v134; GFX6-NEXT: v_or_b32_e32 v0, v0, v135; GFX6-NEXT: v_readfirstlane_b32 s0, v036; GFX6-NEXT: ; return to shader part epilog37;38; GFX8-LABEL: s_fshl_i7:39; GFX8: ; %bb.0:40; GFX8-NEXT: v_cvt_f32_ubyte0_e32 v0, 741; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v042; GFX8-NEXT: s_and_b32 s2, s2, 0x7f43; GFX8-NEXT: s_and_b32 s1, s1, 0x7f44; GFX8-NEXT: s_lshr_b32 s1, s1, 145; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v046; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v047; GFX8-NEXT: v_mul_lo_u32 v1, v0, -748; GFX8-NEXT: v_mul_hi_u32 v1, v0, v149; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v150; GFX8-NEXT: v_mul_hi_u32 v0, s2, v051; GFX8-NEXT: v_mul_lo_u32 v0, v0, 752; GFX8-NEXT: v_sub_u32_e32 v0, vcc, s2, v053; GFX8-NEXT: v_add_u32_e32 v1, vcc, -7, v054; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 7, v055; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc56; GFX8-NEXT: v_add_u32_e32 v1, vcc, -7, v057; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 7, v058; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc59; GFX8-NEXT: v_sub_u16_e32 v1, 6, v060; GFX8-NEXT: v_and_b32_e32 v0, 0x7f, v061; GFX8-NEXT: v_and_b32_e32 v1, 0x7f, v162; GFX8-NEXT: v_lshlrev_b16_e64 v0, v0, s063; GFX8-NEXT: v_lshrrev_b16_e64 v1, v1, s164; GFX8-NEXT: v_or_b32_e32 v0, v0, v165; GFX8-NEXT: v_readfirstlane_b32 s0, v066; GFX8-NEXT: ; return to shader part epilog67;68; GFX9-LABEL: s_fshl_i7:69; GFX9: ; %bb.0:70; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, 771; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v072; GFX9-NEXT: s_and_b32 s2, s2, 0x7f73; GFX9-NEXT: s_and_b32 s1, s1, 0x7f74; GFX9-NEXT: s_lshr_b32 s1, s1, 175; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v076; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v077; GFX9-NEXT: v_mul_lo_u32 v1, v0, -778; GFX9-NEXT: v_mul_hi_u32 v1, v0, v179; GFX9-NEXT: v_add_u32_e32 v0, v0, v180; GFX9-NEXT: v_mul_hi_u32 v0, s2, v081; GFX9-NEXT: v_mul_lo_u32 v0, v0, 782; GFX9-NEXT: v_sub_u32_e32 v0, s2, v083; GFX9-NEXT: v_add_u32_e32 v1, -7, v084; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 7, v085; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc86; GFX9-NEXT: v_add_u32_e32 v1, -7, v087; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 7, v088; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc89; GFX9-NEXT: v_sub_u16_e32 v1, 6, v090; GFX9-NEXT: v_and_b32_e32 v0, 0x7f, v091; GFX9-NEXT: v_and_b32_e32 v1, 0x7f, v192; GFX9-NEXT: v_lshlrev_b16_e64 v0, v0, s093; GFX9-NEXT: v_lshrrev_b16_e64 v1, v1, s194; GFX9-NEXT: v_or_b32_e32 v0, v0, v195; GFX9-NEXT: v_readfirstlane_b32 s0, v096; GFX9-NEXT: ; return to shader part epilog97;98; GFX10-LABEL: s_fshl_i7:99; GFX10: ; %bb.0:100; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, 7101; GFX10-NEXT: s_and_b32 s2, s2, 0x7f102; GFX10-NEXT: s_and_b32 s1, s1, 0x7f103; GFX10-NEXT: s_lshr_b32 s1, s1, 1104; GFX10-NEXT: v_rcp_iflag_f32_e32 v0, v0105; GFX10-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0106; GFX10-NEXT: v_cvt_u32_f32_e32 v0, v0107; GFX10-NEXT: v_mul_lo_u32 v1, v0, -7108; GFX10-NEXT: v_mul_hi_u32 v1, v0, v1109; GFX10-NEXT: v_add_nc_u32_e32 v0, v0, v1110; GFX10-NEXT: v_mul_hi_u32 v0, s2, v0111; GFX10-NEXT: v_mul_lo_u32 v0, v0, 7112; GFX10-NEXT: v_sub_nc_u32_e32 v0, s2, v0113; GFX10-NEXT: v_add_nc_u32_e32 v1, -7, v0114; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 7, v0115; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo116; GFX10-NEXT: v_add_nc_u32_e32 v1, -7, v0117; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 7, v0118; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo119; GFX10-NEXT: v_sub_nc_u16 v1, 6, v0120; GFX10-NEXT: v_and_b32_e32 v0, 0x7f, v0121; GFX10-NEXT: v_and_b32_e32 v1, 0x7f, v1122; GFX10-NEXT: v_lshlrev_b16 v0, v0, s0123; GFX10-NEXT: v_lshrrev_b16 v1, v1, s1124; GFX10-NEXT: v_or_b32_e32 v0, v0, v1125; GFX10-NEXT: v_readfirstlane_b32 s0, v0126; GFX10-NEXT: ; return to shader part epilog127;128; GFX11-LABEL: s_fshl_i7:129; GFX11: ; %bb.0:130; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, 7131; GFX11-NEXT: s_and_b32 s2, s2, 0x7f132; GFX11-NEXT: s_and_b32 s1, s1, 0x7f133; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)134; GFX11-NEXT: s_lshr_b32 s1, s1, 1135; GFX11-NEXT: v_rcp_iflag_f32_e32 v0, v0136; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)137; GFX11-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0138; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)139; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v0140; GFX11-NEXT: v_mul_lo_u32 v1, v0, -7141; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)142; GFX11-NEXT: v_mul_hi_u32 v1, v0, v1143; GFX11-NEXT: v_add_nc_u32_e32 v0, v0, v1144; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)145; GFX11-NEXT: v_mul_hi_u32 v0, s2, v0146; GFX11-NEXT: v_mul_lo_u32 v0, v0, 7147; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)148; GFX11-NEXT: v_sub_nc_u32_e32 v0, s2, v0149; GFX11-NEXT: v_add_nc_u32_e32 v1, -7, v0150; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 7, v0151; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)152; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo153; GFX11-NEXT: v_add_nc_u32_e32 v1, -7, v0154; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 7, v0155; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)156; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo157; GFX11-NEXT: v_sub_nc_u16 v1, 6, v0158; GFX11-NEXT: v_and_b32_e32 v0, 0x7f, v0159; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)160; GFX11-NEXT: v_and_b32_e32 v1, 0x7f, v1161; GFX11-NEXT: v_lshlrev_b16 v0, v0, s0162; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)163; GFX11-NEXT: v_lshrrev_b16 v1, v1, s1164; GFX11-NEXT: v_or_b32_e32 v0, v0, v1165; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)166; GFX11-NEXT: v_readfirstlane_b32 s0, v0167; GFX11-NEXT: ; return to shader part epilog168 %result = call i7 @llvm.fshl.i7(i7 %lhs, i7 %rhs, i7 %amt)169 ret i7 %result170}171 172define i7 @v_fshl_i7(i7 %lhs, i7 %rhs, i7 %amt) {173; GFX6-LABEL: v_fshl_i7:174; GFX6: ; %bb.0:175; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)176; GFX6-NEXT: v_cvt_f32_ubyte0_e32 v3, 7177; GFX6-NEXT: v_rcp_iflag_f32_e32 v3, v3178; GFX6-NEXT: v_and_b32_e32 v2, 0x7f, v2179; GFX6-NEXT: v_bfe_u32 v1, v1, 1, 6180; GFX6-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3181; GFX6-NEXT: v_cvt_u32_f32_e32 v3, v3182; GFX6-NEXT: v_mul_lo_u32 v4, v3, -7183; GFX6-NEXT: v_mul_hi_u32 v4, v3, v4184; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v4185; GFX6-NEXT: v_mul_hi_u32 v3, v2, v3186; GFX6-NEXT: v_mul_lo_u32 v3, v3, 7187; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v3188; GFX6-NEXT: v_add_i32_e32 v3, vcc, -7, v2189; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 7, v2190; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc191; GFX6-NEXT: v_add_i32_e32 v3, vcc, -7, v2192; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 7, v2193; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc194; GFX6-NEXT: v_sub_i32_e32 v3, vcc, 6, v2195; GFX6-NEXT: v_and_b32_e32 v2, 0x7f, v2196; GFX6-NEXT: v_lshlrev_b32_e32 v0, v2, v0197; GFX6-NEXT: v_and_b32_e32 v2, 0x7f, v3198; GFX6-NEXT: v_lshrrev_b32_e32 v1, v2, v1199; GFX6-NEXT: v_or_b32_e32 v0, v0, v1200; GFX6-NEXT: s_setpc_b64 s[30:31]201;202; GFX8-LABEL: v_fshl_i7:203; GFX8: ; %bb.0:204; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)205; GFX8-NEXT: v_cvt_f32_ubyte0_e32 v3, 7206; GFX8-NEXT: v_rcp_iflag_f32_e32 v3, v3207; GFX8-NEXT: v_and_b32_e32 v2, 0x7f, v2208; GFX8-NEXT: v_and_b32_e32 v1, 0x7f, v1209; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v1210; GFX8-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3211; GFX8-NEXT: v_cvt_u32_f32_e32 v3, v3212; GFX8-NEXT: v_mul_lo_u32 v4, v3, -7213; GFX8-NEXT: v_mul_hi_u32 v4, v3, v4214; GFX8-NEXT: v_add_u32_e32 v3, vcc, v3, v4215; GFX8-NEXT: v_mul_hi_u32 v3, v2, v3216; GFX8-NEXT: v_mul_lo_u32 v3, v3, 7217; GFX8-NEXT: v_sub_u32_e32 v2, vcc, v2, v3218; GFX8-NEXT: v_add_u32_e32 v3, vcc, -7, v2219; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 7, v2220; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc221; GFX8-NEXT: v_add_u32_e32 v3, vcc, -7, v2222; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 7, v2223; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc224; GFX8-NEXT: v_sub_u16_e32 v3, 6, v2225; GFX8-NEXT: v_and_b32_e32 v2, 0x7f, v2226; GFX8-NEXT: v_lshlrev_b16_e32 v0, v2, v0227; GFX8-NEXT: v_and_b32_e32 v2, 0x7f, v3228; GFX8-NEXT: v_lshrrev_b16_e32 v1, v2, v1229; GFX8-NEXT: v_or_b32_e32 v0, v0, v1230; GFX8-NEXT: s_setpc_b64 s[30:31]231;232; GFX9-LABEL: v_fshl_i7:233; GFX9: ; %bb.0:234; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)235; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v3, 7236; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v3237; GFX9-NEXT: v_and_b32_e32 v2, 0x7f, v2238; GFX9-NEXT: v_and_b32_e32 v1, 0x7f, v1239; GFX9-NEXT: v_lshrrev_b16_e32 v1, 1, v1240; GFX9-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3241; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v3242; GFX9-NEXT: v_mul_lo_u32 v4, v3, -7243; GFX9-NEXT: v_mul_hi_u32 v4, v3, v4244; GFX9-NEXT: v_add_u32_e32 v3, v3, v4245; GFX9-NEXT: v_mul_hi_u32 v3, v2, v3246; GFX9-NEXT: v_mul_lo_u32 v3, v3, 7247; GFX9-NEXT: v_sub_u32_e32 v2, v2, v3248; GFX9-NEXT: v_add_u32_e32 v3, -7, v2249; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 7, v2250; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc251; GFX9-NEXT: v_add_u32_e32 v3, -7, v2252; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 7, v2253; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc254; GFX9-NEXT: v_sub_u16_e32 v3, 6, v2255; GFX9-NEXT: v_and_b32_e32 v2, 0x7f, v2256; GFX9-NEXT: v_lshlrev_b16_e32 v0, v2, v0257; GFX9-NEXT: v_and_b32_e32 v2, 0x7f, v3258; GFX9-NEXT: v_lshrrev_b16_e32 v1, v2, v1259; GFX9-NEXT: v_or_b32_e32 v0, v0, v1260; GFX9-NEXT: s_setpc_b64 s[30:31]261;262; GFX10-LABEL: v_fshl_i7:263; GFX10: ; %bb.0:264; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)265; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v3, 7266; GFX10-NEXT: v_and_b32_e32 v2, 0x7f, v2267; GFX10-NEXT: v_and_b32_e32 v1, 0x7f, v1268; GFX10-NEXT: v_rcp_iflag_f32_e32 v3, v3269; GFX10-NEXT: v_lshrrev_b16 v1, 1, v1270; GFX10-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3271; GFX10-NEXT: v_cvt_u32_f32_e32 v3, v3272; GFX10-NEXT: v_mul_lo_u32 v4, v3, -7273; GFX10-NEXT: v_mul_hi_u32 v4, v3, v4274; GFX10-NEXT: v_add_nc_u32_e32 v3, v3, v4275; GFX10-NEXT: v_mul_hi_u32 v3, v2, v3276; GFX10-NEXT: v_mul_lo_u32 v3, v3, 7277; GFX10-NEXT: v_sub_nc_u32_e32 v2, v2, v3278; GFX10-NEXT: v_add_nc_u32_e32 v3, -7, v2279; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 7, v2280; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo281; GFX10-NEXT: v_add_nc_u32_e32 v3, -7, v2282; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 7, v2283; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo284; GFX10-NEXT: v_sub_nc_u16 v3, 6, v2285; GFX10-NEXT: v_and_b32_e32 v2, 0x7f, v2286; GFX10-NEXT: v_and_b32_e32 v3, 0x7f, v3287; GFX10-NEXT: v_lshlrev_b16 v0, v2, v0288; GFX10-NEXT: v_lshrrev_b16 v1, v3, v1289; GFX10-NEXT: v_or_b32_e32 v0, v0, v1290; GFX10-NEXT: s_setpc_b64 s[30:31]291;292; GFX11-LABEL: v_fshl_i7:293; GFX11: ; %bb.0:294; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)295; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v3, 7296; GFX11-NEXT: v_and_b32_e32 v2, 0x7f, v2297; GFX11-NEXT: v_and_b32_e32 v1, 0x7f, v1298; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)299; GFX11-NEXT: v_rcp_iflag_f32_e32 v3, v3300; GFX11-NEXT: v_lshrrev_b16 v1, 1, v1301; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)302; GFX11-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v3303; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)304; GFX11-NEXT: v_cvt_u32_f32_e32 v3, v3305; GFX11-NEXT: v_mul_lo_u32 v4, v3, -7306; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)307; GFX11-NEXT: v_mul_hi_u32 v4, v3, v4308; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v4309; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)310; GFX11-NEXT: v_mul_hi_u32 v3, v2, v3311; GFX11-NEXT: v_mul_lo_u32 v3, v3, 7312; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)313; GFX11-NEXT: v_sub_nc_u32_e32 v2, v2, v3314; GFX11-NEXT: v_add_nc_u32_e32 v3, -7, v2315; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 7, v2316; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)317; GFX11-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo318; GFX11-NEXT: v_add_nc_u32_e32 v3, -7, v2319; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 7, v2320; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)321; GFX11-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo322; GFX11-NEXT: v_sub_nc_u16 v3, 6, v2323; GFX11-NEXT: v_and_b32_e32 v2, 0x7f, v2324; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)325; GFX11-NEXT: v_and_b32_e32 v3, 0x7f, v3326; GFX11-NEXT: v_lshlrev_b16 v0, v2, v0327; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)328; GFX11-NEXT: v_lshrrev_b16 v1, v3, v1329; GFX11-NEXT: v_or_b32_e32 v0, v0, v1330; GFX11-NEXT: s_setpc_b64 s[30:31]331 %result = call i7 @llvm.fshl.i7(i7 %lhs, i7 %rhs, i7 %amt)332 ret i7 %result333}334 335define amdgpu_ps i8 @s_fshl_i8(i8 inreg %lhs, i8 inreg %rhs, i8 inreg %amt) {336; GFX6-LABEL: s_fshl_i8:337; GFX6: ; %bb.0:338; GFX6-NEXT: s_and_b32 s3, s2, 7339; GFX6-NEXT: s_andn2_b32 s2, 7, s2340; GFX6-NEXT: s_bfe_u32 s1, s1, 0x70001341; GFX6-NEXT: s_lshl_b32 s0, s0, s3342; GFX6-NEXT: s_lshr_b32 s1, s1, s2343; GFX6-NEXT: s_or_b32 s0, s0, s1344; GFX6-NEXT: ; return to shader part epilog345;346; GFX8-LABEL: s_fshl_i8:347; GFX8: ; %bb.0:348; GFX8-NEXT: s_and_b32 s1, s1, 0xff349; GFX8-NEXT: s_and_b32 s3, s2, 7350; GFX8-NEXT: s_lshr_b32 s1, s1, 1351; GFX8-NEXT: s_andn2_b32 s2, 7, s2352; GFX8-NEXT: s_lshl_b32 s0, s0, s3353; GFX8-NEXT: s_lshr_b32 s1, s1, s2354; GFX8-NEXT: s_or_b32 s0, s0, s1355; GFX8-NEXT: ; return to shader part epilog356;357; GFX9-LABEL: s_fshl_i8:358; GFX9: ; %bb.0:359; GFX9-NEXT: s_and_b32 s1, s1, 0xff360; GFX9-NEXT: s_and_b32 s3, s2, 7361; GFX9-NEXT: s_lshr_b32 s1, s1, 1362; GFX9-NEXT: s_andn2_b32 s2, 7, s2363; GFX9-NEXT: s_lshl_b32 s0, s0, s3364; GFX9-NEXT: s_lshr_b32 s1, s1, s2365; GFX9-NEXT: s_or_b32 s0, s0, s1366; GFX9-NEXT: ; return to shader part epilog367;368; GFX10-LABEL: s_fshl_i8:369; GFX10: ; %bb.0:370; GFX10-NEXT: s_and_b32 s1, s1, 0xff371; GFX10-NEXT: s_and_b32 s3, s2, 7372; GFX10-NEXT: s_lshr_b32 s1, s1, 1373; GFX10-NEXT: s_andn2_b32 s2, 7, s2374; GFX10-NEXT: s_lshl_b32 s0, s0, s3375; GFX10-NEXT: s_lshr_b32 s1, s1, s2376; GFX10-NEXT: s_or_b32 s0, s0, s1377; GFX10-NEXT: ; return to shader part epilog378;379; GFX11-LABEL: s_fshl_i8:380; GFX11: ; %bb.0:381; GFX11-NEXT: s_and_b32 s1, s1, 0xff382; GFX11-NEXT: s_and_b32 s3, s2, 7383; GFX11-NEXT: s_lshr_b32 s1, s1, 1384; GFX11-NEXT: s_and_not1_b32 s2, 7, s2385; GFX11-NEXT: s_lshl_b32 s0, s0, s3386; GFX11-NEXT: s_lshr_b32 s1, s1, s2387; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)388; GFX11-NEXT: s_or_b32 s0, s0, s1389; GFX11-NEXT: ; return to shader part epilog390 %result = call i8 @llvm.fshl.i8(i8 %lhs, i8 %rhs, i8 %amt)391 ret i8 %result392}393 394define i8 @v_fshl_i8(i8 %lhs, i8 %rhs, i8 %amt) {395; GFX6-LABEL: v_fshl_i8:396; GFX6: ; %bb.0:397; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)398; GFX6-NEXT: v_and_b32_e32 v3, 7, v2399; GFX6-NEXT: v_bfi_b32 v2, v2, 0, 7400; GFX6-NEXT: v_bfe_u32 v1, v1, 1, 7401; GFX6-NEXT: v_lshlrev_b32_e32 v0, v3, v0402; GFX6-NEXT: v_lshrrev_b32_e32 v1, v2, v1403; GFX6-NEXT: v_or_b32_e32 v0, v0, v1404; GFX6-NEXT: s_setpc_b64 s[30:31]405;406; GFX8-LABEL: v_fshl_i8:407; GFX8: ; %bb.0:408; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)409; GFX8-NEXT: v_and_b32_e32 v3, 7, v2410; GFX8-NEXT: v_lshlrev_b16_e32 v0, v3, v0411; GFX8-NEXT: v_mov_b32_e32 v3, 1412; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2413; GFX8-NEXT: v_lshrrev_b16_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0414; GFX8-NEXT: v_and_b32_e32 v2, 7, v2415; GFX8-NEXT: v_lshrrev_b16_e32 v1, v2, v1416; GFX8-NEXT: v_or_b32_e32 v0, v0, v1417; GFX8-NEXT: s_setpc_b64 s[30:31]418;419; GFX9-LABEL: v_fshl_i8:420; GFX9: ; %bb.0:421; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)422; GFX9-NEXT: v_and_b32_e32 v3, 7, v2423; GFX9-NEXT: v_lshlrev_b16_e32 v0, v3, v0424; GFX9-NEXT: v_mov_b32_e32 v3, 1425; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2426; GFX9-NEXT: v_lshrrev_b16_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0427; GFX9-NEXT: v_and_b32_e32 v2, 7, v2428; GFX9-NEXT: v_lshrrev_b16_e32 v1, v2, v1429; GFX9-NEXT: v_or_b32_e32 v0, v0, v1430; GFX9-NEXT: s_setpc_b64 s[30:31]431;432; GFX10-LABEL: v_fshl_i8:433; GFX10: ; %bb.0:434; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)435; GFX10-NEXT: v_and_b32_e32 v1, 0xff, v1436; GFX10-NEXT: v_xor_b32_e32 v3, -1, v2437; GFX10-NEXT: v_and_b32_e32 v2, 7, v2438; GFX10-NEXT: v_lshrrev_b16 v1, 1, v1439; GFX10-NEXT: v_and_b32_e32 v3, 7, v3440; GFX10-NEXT: v_lshlrev_b16 v0, v2, v0441; GFX10-NEXT: v_lshrrev_b16 v1, v3, v1442; GFX10-NEXT: v_or_b32_e32 v0, v0, v1443; GFX10-NEXT: s_setpc_b64 s[30:31]444;445; GFX11-LABEL: v_fshl_i8:446; GFX11: ; %bb.0:447; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)448; GFX11-NEXT: v_and_b32_e32 v1, 0xff, v1449; GFX11-NEXT: v_xor_b32_e32 v3, -1, v2450; GFX11-NEXT: v_and_b32_e32 v2, 7, v2451; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)452; GFX11-NEXT: v_lshrrev_b16 v1, 1, v1453; GFX11-NEXT: v_and_b32_e32 v3, 7, v3454; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)455; GFX11-NEXT: v_lshlrev_b16 v0, v2, v0456; GFX11-NEXT: v_lshrrev_b16 v1, v3, v1457; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)458; GFX11-NEXT: v_or_b32_e32 v0, v0, v1459; GFX11-NEXT: s_setpc_b64 s[30:31]460 %result = call i8 @llvm.fshl.i8(i8 %lhs, i8 %rhs, i8 %amt)461 ret i8 %result462}463 464define amdgpu_ps i8 @s_fshl_i8_4(i8 inreg %lhs, i8 inreg %rhs) {465; GFX6-LABEL: s_fshl_i8_4:466; GFX6: ; %bb.0:467; GFX6-NEXT: s_lshl_b32 s0, s0, 4468; GFX6-NEXT: s_bfe_u32 s1, s1, 0x40004469; GFX6-NEXT: s_or_b32 s0, s0, s1470; GFX6-NEXT: ; return to shader part epilog471;472; GFX8-LABEL: s_fshl_i8_4:473; GFX8: ; %bb.0:474; GFX8-NEXT: s_and_b32 s1, s1, 0xff475; GFX8-NEXT: s_lshl_b32 s0, s0, 4476; GFX8-NEXT: s_lshr_b32 s1, s1, 4477; GFX8-NEXT: s_or_b32 s0, s0, s1478; GFX8-NEXT: ; return to shader part epilog479;480; GFX9-LABEL: s_fshl_i8_4:481; GFX9: ; %bb.0:482; GFX9-NEXT: s_and_b32 s1, s1, 0xff483; GFX9-NEXT: s_lshl_b32 s0, s0, 4484; GFX9-NEXT: s_lshr_b32 s1, s1, 4485; GFX9-NEXT: s_or_b32 s0, s0, s1486; GFX9-NEXT: ; return to shader part epilog487;488; GFX10-LABEL: s_fshl_i8_4:489; GFX10: ; %bb.0:490; GFX10-NEXT: s_and_b32 s1, s1, 0xff491; GFX10-NEXT: s_lshl_b32 s0, s0, 4492; GFX10-NEXT: s_lshr_b32 s1, s1, 4493; GFX10-NEXT: s_or_b32 s0, s0, s1494; GFX10-NEXT: ; return to shader part epilog495;496; GFX11-LABEL: s_fshl_i8_4:497; GFX11: ; %bb.0:498; GFX11-NEXT: s_and_b32 s1, s1, 0xff499; GFX11-NEXT: s_lshl_b32 s0, s0, 4500; GFX11-NEXT: s_lshr_b32 s1, s1, 4501; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)502; GFX11-NEXT: s_or_b32 s0, s0, s1503; GFX11-NEXT: ; return to shader part epilog504 %result = call i8 @llvm.fshl.i8(i8 %lhs, i8 %rhs, i8 4)505 ret i8 %result506}507 508define i8 @v_fshl_i8_4(i8 %lhs, i8 %rhs) {509; GFX6-LABEL: v_fshl_i8_4:510; GFX6: ; %bb.0:511; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)512; GFX6-NEXT: v_lshlrev_b32_e32 v0, 4, v0513; GFX6-NEXT: v_bfe_u32 v1, v1, 4, 4514; GFX6-NEXT: v_or_b32_e32 v0, v0, v1515; GFX6-NEXT: s_setpc_b64 s[30:31]516;517; GFX8-LABEL: v_fshl_i8_4:518; GFX8: ; %bb.0:519; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)520; GFX8-NEXT: v_mov_b32_e32 v2, 4521; GFX8-NEXT: v_lshlrev_b16_e32 v0, 4, v0522; GFX8-NEXT: v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0523; GFX8-NEXT: v_or_b32_e32 v0, v0, v1524; GFX8-NEXT: s_setpc_b64 s[30:31]525;526; GFX9-LABEL: v_fshl_i8_4:527; GFX9: ; %bb.0:528; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)529; GFX9-NEXT: v_mov_b32_e32 v2, 4530; GFX9-NEXT: v_lshlrev_b16_e32 v0, 4, v0531; GFX9-NEXT: v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0532; GFX9-NEXT: v_or_b32_e32 v0, v0, v1533; GFX9-NEXT: s_setpc_b64 s[30:31]534;535; GFX10-LABEL: v_fshl_i8_4:536; GFX10: ; %bb.0:537; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)538; GFX10-NEXT: v_and_b32_e32 v1, 0xff, v1539; GFX10-NEXT: v_lshlrev_b16 v0, 4, v0540; GFX10-NEXT: v_lshrrev_b16 v1, 4, v1541; GFX10-NEXT: v_or_b32_e32 v0, v0, v1542; GFX10-NEXT: s_setpc_b64 s[30:31]543;544; GFX11-LABEL: v_fshl_i8_4:545; GFX11: ; %bb.0:546; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)547; GFX11-NEXT: v_and_b32_e32 v1, 0xff, v1548; GFX11-NEXT: v_lshlrev_b16 v0, 4, v0549; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)550; GFX11-NEXT: v_lshrrev_b16 v1, 4, v1551; GFX11-NEXT: v_or_b32_e32 v0, v0, v1552; GFX11-NEXT: s_setpc_b64 s[30:31]553 %result = call i8 @llvm.fshl.i8(i8 %lhs, i8 %rhs, i8 4)554 ret i8 %result555}556 557define amdgpu_ps i8 @s_fshl_i8_5(i8 inreg %lhs, i8 inreg %rhs) {558; GFX6-LABEL: s_fshl_i8_5:559; GFX6: ; %bb.0:560; GFX6-NEXT: s_lshl_b32 s0, s0, 5561; GFX6-NEXT: s_bfe_u32 s1, s1, 0x50003562; GFX6-NEXT: s_or_b32 s0, s0, s1563; GFX6-NEXT: ; return to shader part epilog564;565; GFX8-LABEL: s_fshl_i8_5:566; GFX8: ; %bb.0:567; GFX8-NEXT: s_and_b32 s1, s1, 0xff568; GFX8-NEXT: s_lshl_b32 s0, s0, 5569; GFX8-NEXT: s_lshr_b32 s1, s1, 3570; GFX8-NEXT: s_or_b32 s0, s0, s1571; GFX8-NEXT: ; return to shader part epilog572;573; GFX9-LABEL: s_fshl_i8_5:574; GFX9: ; %bb.0:575; GFX9-NEXT: s_and_b32 s1, s1, 0xff576; GFX9-NEXT: s_lshl_b32 s0, s0, 5577; GFX9-NEXT: s_lshr_b32 s1, s1, 3578; GFX9-NEXT: s_or_b32 s0, s0, s1579; GFX9-NEXT: ; return to shader part epilog580;581; GFX10-LABEL: s_fshl_i8_5:582; GFX10: ; %bb.0:583; GFX10-NEXT: s_and_b32 s1, s1, 0xff584; GFX10-NEXT: s_lshl_b32 s0, s0, 5585; GFX10-NEXT: s_lshr_b32 s1, s1, 3586; GFX10-NEXT: s_or_b32 s0, s0, s1587; GFX10-NEXT: ; return to shader part epilog588;589; GFX11-LABEL: s_fshl_i8_5:590; GFX11: ; %bb.0:591; GFX11-NEXT: s_and_b32 s1, s1, 0xff592; GFX11-NEXT: s_lshl_b32 s0, s0, 5593; GFX11-NEXT: s_lshr_b32 s1, s1, 3594; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)595; GFX11-NEXT: s_or_b32 s0, s0, s1596; GFX11-NEXT: ; return to shader part epilog597 %result = call i8 @llvm.fshl.i8(i8 %lhs, i8 %rhs, i8 5)598 ret i8 %result599}600 601define i8 @v_fshl_i8_5(i8 %lhs, i8 %rhs) {602; GFX6-LABEL: v_fshl_i8_5:603; GFX6: ; %bb.0:604; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)605; GFX6-NEXT: v_lshlrev_b32_e32 v0, 5, v0606; GFX6-NEXT: v_bfe_u32 v1, v1, 3, 5607; GFX6-NEXT: v_or_b32_e32 v0, v0, v1608; GFX6-NEXT: s_setpc_b64 s[30:31]609;610; GFX8-LABEL: v_fshl_i8_5:611; GFX8: ; %bb.0:612; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)613; GFX8-NEXT: v_mov_b32_e32 v2, 3614; GFX8-NEXT: v_lshlrev_b16_e32 v0, 5, v0615; GFX8-NEXT: v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0616; GFX8-NEXT: v_or_b32_e32 v0, v0, v1617; GFX8-NEXT: s_setpc_b64 s[30:31]618;619; GFX9-LABEL: v_fshl_i8_5:620; GFX9: ; %bb.0:621; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)622; GFX9-NEXT: v_mov_b32_e32 v2, 3623; GFX9-NEXT: v_lshlrev_b16_e32 v0, 5, v0624; GFX9-NEXT: v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0625; GFX9-NEXT: v_or_b32_e32 v0, v0, v1626; GFX9-NEXT: s_setpc_b64 s[30:31]627;628; GFX10-LABEL: v_fshl_i8_5:629; GFX10: ; %bb.0:630; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)631; GFX10-NEXT: v_and_b32_e32 v1, 0xff, v1632; GFX10-NEXT: v_lshlrev_b16 v0, 5, v0633; GFX10-NEXT: v_lshrrev_b16 v1, 3, v1634; GFX10-NEXT: v_or_b32_e32 v0, v0, v1635; GFX10-NEXT: s_setpc_b64 s[30:31]636;637; GFX11-LABEL: v_fshl_i8_5:638; GFX11: ; %bb.0:639; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)640; GFX11-NEXT: v_and_b32_e32 v1, 0xff, v1641; GFX11-NEXT: v_lshlrev_b16 v0, 5, v0642; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)643; GFX11-NEXT: v_lshrrev_b16 v1, 3, v1644; GFX11-NEXT: v_or_b32_e32 v0, v0, v1645; GFX11-NEXT: s_setpc_b64 s[30:31]646 %result = call i8 @llvm.fshl.i8(i8 %lhs, i8 %rhs, i8 5)647 ret i8 %result648}649 650define amdgpu_ps i16 @s_fshl_v2i8(i16 inreg %lhs.arg, i16 inreg %rhs.arg, i16 inreg %amt.arg) {651; GFX6-LABEL: s_fshl_v2i8:652; GFX6: ; %bb.0:653; GFX6-NEXT: s_and_b32 s5, s2, 7654; GFX6-NEXT: s_lshr_b32 s3, s0, 8655; GFX6-NEXT: s_lshr_b32 s4, s2, 8656; GFX6-NEXT: s_andn2_b32 s2, 7, s2657; GFX6-NEXT: s_lshl_b32 s0, s0, s5658; GFX6-NEXT: s_bfe_u32 s5, s1, 0x70001659; GFX6-NEXT: s_lshr_b32 s2, s5, s2660; GFX6-NEXT: s_bfe_u32 s1, s1, 0x80008661; GFX6-NEXT: s_or_b32 s0, s0, s2662; GFX6-NEXT: s_and_b32 s2, s4, 7663; GFX6-NEXT: s_andn2_b32 s4, 7, s4664; GFX6-NEXT: s_lshr_b32 s1, s1, 1665; GFX6-NEXT: s_lshl_b32 s2, s3, s2666; GFX6-NEXT: s_lshr_b32 s1, s1, s4667; GFX6-NEXT: s_or_b32 s1, s2, s1668; GFX6-NEXT: s_and_b32 s1, s1, 0xff669; GFX6-NEXT: s_and_b32 s0, s0, 0xff670; GFX6-NEXT: s_lshl_b32 s1, s1, 8671; GFX6-NEXT: s_or_b32 s0, s0, s1672; GFX6-NEXT: ; return to shader part epilog673;674; GFX8-LABEL: s_fshl_v2i8:675; GFX8: ; %bb.0:676; GFX8-NEXT: s_lshr_b32 s4, s1, 8677; GFX8-NEXT: s_and_b32 s1, s1, 0xff678; GFX8-NEXT: s_lshr_b32 s5, s2, 8679; GFX8-NEXT: s_and_b32 s6, s2, 7680; GFX8-NEXT: s_lshr_b32 s1, s1, 1681; GFX8-NEXT: s_andn2_b32 s2, 7, s2682; GFX8-NEXT: s_lshr_b32 s3, s0, 8683; GFX8-NEXT: s_lshl_b32 s0, s0, s6684; GFX8-NEXT: s_lshr_b32 s1, s1, s2685; GFX8-NEXT: s_or_b32 s0, s0, s1686; GFX8-NEXT: s_and_b32 s1, s5, 7687; GFX8-NEXT: s_and_b32 s2, s4, 0xff688; GFX8-NEXT: s_lshl_b32 s1, s3, s1689; GFX8-NEXT: s_lshr_b32 s2, s2, 1690; GFX8-NEXT: s_andn2_b32 s3, 7, s5691; GFX8-NEXT: s_lshr_b32 s2, s2, s3692; GFX8-NEXT: s_or_b32 s1, s1, s2693; GFX8-NEXT: s_and_b32 s1, s1, 0xff694; GFX8-NEXT: s_and_b32 s0, s0, 0xff695; GFX8-NEXT: s_lshl_b32 s1, s1, 8696; GFX8-NEXT: s_or_b32 s0, s0, s1697; GFX8-NEXT: ; return to shader part epilog698;699; GFX9-LABEL: s_fshl_v2i8:700; GFX9: ; %bb.0:701; GFX9-NEXT: s_lshr_b32 s4, s1, 8702; GFX9-NEXT: s_and_b32 s1, s1, 0xff703; GFX9-NEXT: s_lshr_b32 s5, s2, 8704; GFX9-NEXT: s_and_b32 s6, s2, 7705; GFX9-NEXT: s_lshr_b32 s1, s1, 1706; GFX9-NEXT: s_andn2_b32 s2, 7, s2707; GFX9-NEXT: s_lshr_b32 s3, s0, 8708; GFX9-NEXT: s_lshl_b32 s0, s0, s6709; GFX9-NEXT: s_lshr_b32 s1, s1, s2710; GFX9-NEXT: s_or_b32 s0, s0, s1711; GFX9-NEXT: s_and_b32 s1, s5, 7712; GFX9-NEXT: s_and_b32 s2, s4, 0xff713; GFX9-NEXT: s_lshl_b32 s1, s3, s1714; GFX9-NEXT: s_lshr_b32 s2, s2, 1715; GFX9-NEXT: s_andn2_b32 s3, 7, s5716; GFX9-NEXT: s_lshr_b32 s2, s2, s3717; GFX9-NEXT: s_or_b32 s1, s1, s2718; GFX9-NEXT: s_and_b32 s1, s1, 0xff719; GFX9-NEXT: s_and_b32 s0, s0, 0xff720; GFX9-NEXT: s_lshl_b32 s1, s1, 8721; GFX9-NEXT: s_or_b32 s0, s0, s1722; GFX9-NEXT: ; return to shader part epilog723;724; GFX10-LABEL: s_fshl_v2i8:725; GFX10: ; %bb.0:726; GFX10-NEXT: s_lshr_b32 s4, s1, 8727; GFX10-NEXT: s_lshr_b32 s5, s2, 8728; GFX10-NEXT: s_and_b32 s6, s2, 7729; GFX10-NEXT: s_and_b32 s4, s4, 0xff730; GFX10-NEXT: s_lshr_b32 s3, s0, 8731; GFX10-NEXT: s_and_b32 s1, s1, 0xff732; GFX10-NEXT: s_lshl_b32 s0, s0, s6733; GFX10-NEXT: s_and_b32 s6, s5, 7734; GFX10-NEXT: s_lshr_b32 s4, s4, 1735; GFX10-NEXT: s_andn2_b32 s5, 7, s5736; GFX10-NEXT: s_lshr_b32 s1, s1, 1737; GFX10-NEXT: s_andn2_b32 s2, 7, s2738; GFX10-NEXT: s_lshl_b32 s3, s3, s6739; GFX10-NEXT: s_lshr_b32 s4, s4, s5740; GFX10-NEXT: s_lshr_b32 s1, s1, s2741; GFX10-NEXT: s_or_b32 s2, s3, s4742; GFX10-NEXT: s_or_b32 s0, s0, s1743; GFX10-NEXT: s_and_b32 s1, s2, 0xff744; GFX10-NEXT: s_and_b32 s0, s0, 0xff745; GFX10-NEXT: s_lshl_b32 s1, s1, 8746; GFX10-NEXT: s_or_b32 s0, s0, s1747; GFX10-NEXT: ; return to shader part epilog748;749; GFX11-LABEL: s_fshl_v2i8:750; GFX11: ; %bb.0:751; GFX11-NEXT: s_lshr_b32 s4, s1, 8752; GFX11-NEXT: s_lshr_b32 s5, s2, 8753; GFX11-NEXT: s_and_b32 s6, s2, 7754; GFX11-NEXT: s_and_b32 s4, s4, 0xff755; GFX11-NEXT: s_lshr_b32 s3, s0, 8756; GFX11-NEXT: s_and_b32 s1, s1, 0xff757; GFX11-NEXT: s_lshl_b32 s0, s0, s6758; GFX11-NEXT: s_and_b32 s6, s5, 7759; GFX11-NEXT: s_lshr_b32 s4, s4, 1760; GFX11-NEXT: s_and_not1_b32 s5, 7, s5761; GFX11-NEXT: s_lshr_b32 s1, s1, 1762; GFX11-NEXT: s_and_not1_b32 s2, 7, s2763; GFX11-NEXT: s_lshl_b32 s3, s3, s6764; GFX11-NEXT: s_lshr_b32 s4, s4, s5765; GFX11-NEXT: s_lshr_b32 s1, s1, s2766; GFX11-NEXT: s_or_b32 s2, s3, s4767; GFX11-NEXT: s_or_b32 s0, s0, s1768; GFX11-NEXT: s_and_b32 s1, s2, 0xff769; GFX11-NEXT: s_and_b32 s0, s0, 0xff770; GFX11-NEXT: s_lshl_b32 s1, s1, 8771; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)772; GFX11-NEXT: s_or_b32 s0, s0, s1773; GFX11-NEXT: ; return to shader part epilog774 %lhs = bitcast i16 %lhs.arg to <2 x i8>775 %rhs = bitcast i16 %rhs.arg to <2 x i8>776 %amt = bitcast i16 %amt.arg to <2 x i8>777 %result = call <2 x i8> @llvm.fshl.v2i8(<2 x i8> %lhs, <2 x i8> %rhs, <2 x i8> %amt)778 %cast.result = bitcast <2 x i8> %result to i16779 ret i16 %cast.result780}781 782define i16 @v_fshl_v2i8(i16 %lhs.arg, i16 %rhs.arg, i16 %amt.arg) {783; GFX6-LABEL: v_fshl_v2i8:784; GFX6: ; %bb.0:785; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)786; GFX6-NEXT: v_and_b32_e32 v5, 7, v2787; GFX6-NEXT: v_lshrrev_b32_e32 v3, 8, v0788; GFX6-NEXT: v_lshrrev_b32_e32 v4, 8, v2789; GFX6-NEXT: v_bfi_b32 v2, v2, 0, 7790; GFX6-NEXT: v_lshlrev_b32_e32 v0, v5, v0791; GFX6-NEXT: v_bfe_u32 v5, v1, 1, 7792; GFX6-NEXT: v_lshrrev_b32_e32 v2, v2, v5793; GFX6-NEXT: v_bfe_u32 v1, v1, 8, 8794; GFX6-NEXT: v_or_b32_e32 v0, v0, v2795; GFX6-NEXT: v_and_b32_e32 v2, 7, v4796; GFX6-NEXT: v_bfi_b32 v4, v4, 0, 7797; GFX6-NEXT: v_lshrrev_b32_e32 v1, 1, v1798; GFX6-NEXT: v_lshlrev_b32_e32 v2, v2, v3799; GFX6-NEXT: v_lshrrev_b32_e32 v1, v4, v1800; GFX6-NEXT: v_or_b32_e32 v1, v2, v1801; GFX6-NEXT: v_and_b32_e32 v1, 0xff, v1802; GFX6-NEXT: v_and_b32_e32 v0, 0xff, v0803; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1804; GFX6-NEXT: v_or_b32_e32 v0, v0, v1805; GFX6-NEXT: s_setpc_b64 s[30:31]806;807; GFX8-LABEL: v_fshl_v2i8:808; GFX8: ; %bb.0:809; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)810; GFX8-NEXT: v_and_b32_e32 v6, 7, v2811; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0812; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v2813; GFX8-NEXT: v_lshlrev_b16_e32 v0, v6, v0814; GFX8-NEXT: v_mov_b32_e32 v6, 1815; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2816; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v1817; GFX8-NEXT: v_lshrrev_b16_sdwa v1, v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0818; GFX8-NEXT: v_and_b32_e32 v2, 7, v2819; GFX8-NEXT: v_lshrrev_b16_e32 v1, v2, v1820; GFX8-NEXT: v_or_b32_e32 v0, v0, v1821; GFX8-NEXT: v_and_b32_e32 v1, 7, v5822; GFX8-NEXT: v_lshlrev_b16_e32 v1, v1, v3823; GFX8-NEXT: v_xor_b32_e32 v3, -1, v5824; GFX8-NEXT: v_lshrrev_b16_sdwa v2, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0825; GFX8-NEXT: v_and_b32_e32 v3, 7, v3826; GFX8-NEXT: v_lshrrev_b16_e32 v2, v3, v2827; GFX8-NEXT: v_or_b32_e32 v1, v1, v2828; GFX8-NEXT: v_and_b32_e32 v1, 0xff, v1829; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1830; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD831; GFX8-NEXT: s_setpc_b64 s[30:31]832;833; GFX9-LABEL: v_fshl_v2i8:834; GFX9: ; %bb.0:835; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)836; GFX9-NEXT: v_and_b32_e32 v6, 7, v2837; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v0838; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v2839; GFX9-NEXT: v_lshlrev_b16_e32 v0, v6, v0840; GFX9-NEXT: v_mov_b32_e32 v6, 1841; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2842; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1843; GFX9-NEXT: v_lshrrev_b16_sdwa v1, v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0844; GFX9-NEXT: v_and_b32_e32 v2, 7, v2845; GFX9-NEXT: v_lshrrev_b16_e32 v1, v2, v1846; GFX9-NEXT: v_or_b32_e32 v0, v0, v1847; GFX9-NEXT: v_and_b32_e32 v1, 7, v5848; GFX9-NEXT: v_lshlrev_b16_e32 v1, v1, v3849; GFX9-NEXT: v_xor_b32_e32 v3, -1, v5850; GFX9-NEXT: v_lshrrev_b16_sdwa v2, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0851; GFX9-NEXT: v_and_b32_e32 v3, 7, v3852; GFX9-NEXT: v_lshrrev_b16_e32 v2, v3, v2853; GFX9-NEXT: v_or_b32_e32 v1, v1, v2854; GFX9-NEXT: v_and_b32_e32 v1, 0xff, v1855; GFX9-NEXT: v_lshlrev_b16_e32 v1, 8, v1856; GFX9-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD857; GFX9-NEXT: s_setpc_b64 s[30:31]858;859; GFX10-LABEL: v_fshl_v2i8:860; GFX10: ; %bb.0:861; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)862; GFX10-NEXT: v_lshrrev_b32_e32 v3, 8, v1863; GFX10-NEXT: v_lshrrev_b32_e32 v4, 8, v2864; GFX10-NEXT: v_lshrrev_b32_e32 v5, 8, v0865; GFX10-NEXT: v_and_b32_e32 v1, 0xff, v1866; GFX10-NEXT: v_xor_b32_e32 v7, -1, v2867; GFX10-NEXT: v_and_b32_e32 v3, 0xff, v3868; GFX10-NEXT: v_xor_b32_e32 v6, -1, v4869; GFX10-NEXT: v_and_b32_e32 v4, 7, v4870; GFX10-NEXT: v_and_b32_e32 v2, 7, v2871; GFX10-NEXT: v_lshrrev_b16 v1, 1, v1872; GFX10-NEXT: v_lshrrev_b16 v3, 1, v3873; GFX10-NEXT: v_and_b32_e32 v6, 7, v6874; GFX10-NEXT: v_and_b32_e32 v7, 7, v7875; GFX10-NEXT: v_lshlrev_b16 v4, v4, v5876; GFX10-NEXT: v_lshlrev_b16 v0, v2, v0877; GFX10-NEXT: v_lshrrev_b16 v3, v6, v3878; GFX10-NEXT: v_lshrrev_b16 v1, v7, v1879; GFX10-NEXT: v_or_b32_e32 v2, v4, v3880; GFX10-NEXT: v_mov_b32_e32 v3, 0xff881; GFX10-NEXT: v_or_b32_e32 v0, v0, v1882; GFX10-NEXT: v_and_b32_sdwa v1, v2, v3 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD883; GFX10-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD884; GFX10-NEXT: s_setpc_b64 s[30:31]885;886; GFX11-LABEL: v_fshl_v2i8:887; GFX11: ; %bb.0:888; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)889; GFX11-NEXT: v_lshrrev_b32_e32 v3, 8, v1890; GFX11-NEXT: v_lshrrev_b32_e32 v4, 8, v2891; GFX11-NEXT: v_lshrrev_b32_e32 v5, 8, v0892; GFX11-NEXT: v_and_b32_e32 v1, 0xff, v1893; GFX11-NEXT: v_xor_b32_e32 v7, -1, v2894; GFX11-NEXT: v_and_b32_e32 v3, 0xff, v3895; GFX11-NEXT: v_xor_b32_e32 v6, -1, v4896; GFX11-NEXT: v_and_b32_e32 v4, 7, v4897; GFX11-NEXT: v_and_b32_e32 v2, 7, v2898; GFX11-NEXT: v_lshrrev_b16 v1, 1, v1899; GFX11-NEXT: v_lshrrev_b16 v3, 1, v3900; GFX11-NEXT: v_and_b32_e32 v6, 7, v6901; GFX11-NEXT: v_and_b32_e32 v7, 7, v7902; GFX11-NEXT: v_lshlrev_b16 v4, v4, v5903; GFX11-NEXT: v_lshlrev_b16 v0, v2, v0904; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)905; GFX11-NEXT: v_lshrrev_b16 v3, v6, v3906; GFX11-NEXT: v_lshrrev_b16 v1, v7, v1907; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)908; GFX11-NEXT: v_or_b32_e32 v2, v4, v3909; GFX11-NEXT: v_or_b32_e32 v0, v0, v1910; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)911; GFX11-NEXT: v_and_b32_e32 v1, 0xff, v2912; GFX11-NEXT: v_and_b32_e32 v0, 0xff, v0913; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)914; GFX11-NEXT: v_lshlrev_b16 v1, 8, v1915; GFX11-NEXT: v_or_b32_e32 v0, v0, v1916; GFX11-NEXT: s_setpc_b64 s[30:31]917 %lhs = bitcast i16 %lhs.arg to <2 x i8>918 %rhs = bitcast i16 %rhs.arg to <2 x i8>919 %amt = bitcast i16 %amt.arg to <2 x i8>920 %result = call <2 x i8> @llvm.fshl.v2i8(<2 x i8> %lhs, <2 x i8> %rhs, <2 x i8> %amt)921 %cast.result = bitcast <2 x i8> %result to i16922 ret i16 %cast.result923}924 925define amdgpu_ps i32 @s_fshl_v4i8(i32 inreg %lhs.arg, i32 inreg %rhs.arg, i32 inreg %amt.arg) {926; GFX6-LABEL: s_fshl_v4i8:927; GFX6: ; %bb.0:928; GFX6-NEXT: s_and_b32 s9, s2, 7929; GFX6-NEXT: s_lshr_b32 s3, s0, 8930; GFX6-NEXT: s_lshr_b32 s4, s0, 16931; GFX6-NEXT: s_lshr_b32 s5, s0, 24932; GFX6-NEXT: s_lshr_b32 s6, s2, 8933; GFX6-NEXT: s_lshr_b32 s7, s2, 16934; GFX6-NEXT: s_lshr_b32 s8, s2, 24935; GFX6-NEXT: s_andn2_b32 s2, 7, s2936; GFX6-NEXT: s_lshl_b32 s0, s0, s9937; GFX6-NEXT: s_bfe_u32 s9, s1, 0x70001938; GFX6-NEXT: s_lshr_b32 s2, s9, s2939; GFX6-NEXT: s_or_b32 s0, s0, s2940; GFX6-NEXT: s_and_b32 s2, s6, 7941; GFX6-NEXT: s_lshl_b32 s2, s3, s2942; GFX6-NEXT: s_bfe_u32 s3, s1, 0x80008943; GFX6-NEXT: s_andn2_b32 s6, 7, s6944; GFX6-NEXT: s_lshr_b32 s3, s3, 1945; GFX6-NEXT: s_lshr_b32 s3, s3, s6946; GFX6-NEXT: s_or_b32 s2, s2, s3947; GFX6-NEXT: s_and_b32 s3, s7, 7948; GFX6-NEXT: s_lshl_b32 s3, s4, s3949; GFX6-NEXT: s_bfe_u32 s4, s1, 0x80010950; GFX6-NEXT: s_andn2_b32 s6, 7, s7951; GFX6-NEXT: s_lshr_b32 s4, s4, 1952; GFX6-NEXT: s_lshr_b32 s4, s4, s6953; GFX6-NEXT: s_or_b32 s3, s3, s4954; GFX6-NEXT: s_and_b32 s4, s8, 7955; GFX6-NEXT: s_andn2_b32 s6, 7, s8956; GFX6-NEXT: s_lshr_b32 s1, s1, 25957; GFX6-NEXT: s_and_b32 s2, s2, 0xff958; GFX6-NEXT: s_lshl_b32 s4, s5, s4959; GFX6-NEXT: s_lshr_b32 s1, s1, s6960; GFX6-NEXT: s_and_b32 s0, s0, 0xff961; GFX6-NEXT: s_lshl_b32 s2, s2, 8962; GFX6-NEXT: s_or_b32 s1, s4, s1963; GFX6-NEXT: s_or_b32 s0, s0, s2964; GFX6-NEXT: s_and_b32 s2, s3, 0xff965; GFX6-NEXT: s_lshl_b32 s2, s2, 16966; GFX6-NEXT: s_and_b32 s1, s1, 0xff967; GFX6-NEXT: s_or_b32 s0, s0, s2968; GFX6-NEXT: s_lshl_b32 s1, s1, 24969; GFX6-NEXT: s_or_b32 s0, s0, s1970; GFX6-NEXT: ; return to shader part epilog971;972; GFX8-LABEL: s_fshl_v4i8:973; GFX8: ; %bb.0:974; GFX8-NEXT: s_and_b32 s11, s2, 7975; GFX8-NEXT: s_lshr_b32 s3, s0, 8976; GFX8-NEXT: s_lshr_b32 s4, s0, 16977; GFX8-NEXT: s_lshr_b32 s5, s0, 24978; GFX8-NEXT: s_lshl_b32 s0, s0, s11979; GFX8-NEXT: s_and_b32 s11, s1, 0xff980; GFX8-NEXT: s_lshr_b32 s8, s2, 8981; GFX8-NEXT: s_lshr_b32 s9, s2, 16982; GFX8-NEXT: s_lshr_b32 s10, s2, 24983; GFX8-NEXT: s_lshr_b32 s11, s11, 1984; GFX8-NEXT: s_andn2_b32 s2, 7, s2985; GFX8-NEXT: s_lshr_b32 s2, s11, s2986; GFX8-NEXT: s_lshr_b32 s6, s1, 8987; GFX8-NEXT: s_or_b32 s0, s0, s2988; GFX8-NEXT: s_and_b32 s2, s8, 7989; GFX8-NEXT: s_lshl_b32 s2, s3, s2990; GFX8-NEXT: s_and_b32 s3, s6, 0xff991; GFX8-NEXT: s_lshr_b32 s3, s3, 1992; GFX8-NEXT: s_andn2_b32 s6, 7, s8993; GFX8-NEXT: s_lshr_b32 s3, s3, s6994; GFX8-NEXT: s_lshr_b32 s7, s1, 16995; GFX8-NEXT: s_or_b32 s2, s2, s3996; GFX8-NEXT: s_and_b32 s3, s9, 7997; GFX8-NEXT: s_lshl_b32 s3, s4, s3998; GFX8-NEXT: s_and_b32 s4, s7, 0xff999; GFX8-NEXT: s_lshr_b32 s4, s4, 11000; GFX8-NEXT: s_andn2_b32 s6, 7, s91001; GFX8-NEXT: s_lshr_b32 s4, s4, s61002; GFX8-NEXT: s_or_b32 s3, s3, s41003; GFX8-NEXT: s_and_b32 s4, s10, 71004; GFX8-NEXT: s_lshl_b32 s4, s5, s41005; GFX8-NEXT: s_lshr_b32 s1, s1, 251006; GFX8-NEXT: s_andn2_b32 s5, 7, s101007; GFX8-NEXT: s_and_b32 s2, s2, 0xff1008; GFX8-NEXT: s_lshr_b32 s1, s1, s51009; GFX8-NEXT: s_and_b32 s0, s0, 0xff1010; GFX8-NEXT: s_lshl_b32 s2, s2, 81011; GFX8-NEXT: s_or_b32 s1, s4, s11012; GFX8-NEXT: s_or_b32 s0, s0, s21013; GFX8-NEXT: s_and_b32 s2, s3, 0xff1014; GFX8-NEXT: s_lshl_b32 s2, s2, 161015; GFX8-NEXT: s_and_b32 s1, s1, 0xff1016; GFX8-NEXT: s_or_b32 s0, s0, s21017; GFX8-NEXT: s_lshl_b32 s1, s1, 241018; GFX8-NEXT: s_or_b32 s0, s0, s11019; GFX8-NEXT: ; return to shader part epilog1020;1021; GFX9-LABEL: s_fshl_v4i8:1022; GFX9: ; %bb.0:1023; GFX9-NEXT: s_and_b32 s11, s2, 71024; GFX9-NEXT: s_lshr_b32 s3, s0, 81025; GFX9-NEXT: s_lshr_b32 s4, s0, 161026; GFX9-NEXT: s_lshr_b32 s5, s0, 241027; GFX9-NEXT: s_lshl_b32 s0, s0, s111028; GFX9-NEXT: s_and_b32 s11, s1, 0xff1029; GFX9-NEXT: s_lshr_b32 s8, s2, 81030; GFX9-NEXT: s_lshr_b32 s9, s2, 161031; GFX9-NEXT: s_lshr_b32 s10, s2, 241032; GFX9-NEXT: s_lshr_b32 s11, s11, 11033; GFX9-NEXT: s_andn2_b32 s2, 7, s21034; GFX9-NEXT: s_lshr_b32 s2, s11, s21035; GFX9-NEXT: s_lshr_b32 s6, s1, 81036; GFX9-NEXT: s_or_b32 s0, s0, s21037; GFX9-NEXT: s_and_b32 s2, s8, 71038; GFX9-NEXT: s_lshl_b32 s2, s3, s21039; GFX9-NEXT: s_and_b32 s3, s6, 0xff1040; GFX9-NEXT: s_lshr_b32 s3, s3, 11041; GFX9-NEXT: s_andn2_b32 s6, 7, s81042; GFX9-NEXT: s_lshr_b32 s3, s3, s61043; GFX9-NEXT: s_lshr_b32 s7, s1, 161044; GFX9-NEXT: s_or_b32 s2, s2, s31045; GFX9-NEXT: s_and_b32 s3, s9, 71046; GFX9-NEXT: s_lshl_b32 s3, s4, s31047; GFX9-NEXT: s_and_b32 s4, s7, 0xff1048; GFX9-NEXT: s_lshr_b32 s4, s4, 11049; GFX9-NEXT: s_andn2_b32 s6, 7, s91050; GFX9-NEXT: s_lshr_b32 s4, s4, s61051; GFX9-NEXT: s_or_b32 s3, s3, s41052; GFX9-NEXT: s_and_b32 s4, s10, 71053; GFX9-NEXT: s_lshl_b32 s4, s5, s41054; GFX9-NEXT: s_lshr_b32 s1, s1, 251055; GFX9-NEXT: s_andn2_b32 s5, 7, s101056; GFX9-NEXT: s_and_b32 s2, s2, 0xff1057; GFX9-NEXT: s_lshr_b32 s1, s1, s51058; GFX9-NEXT: s_and_b32 s0, s0, 0xff1059; GFX9-NEXT: s_lshl_b32 s2, s2, 81060; GFX9-NEXT: s_or_b32 s1, s4, s11061; GFX9-NEXT: s_or_b32 s0, s0, s21062; GFX9-NEXT: s_and_b32 s2, s3, 0xff1063; GFX9-NEXT: s_lshl_b32 s2, s2, 161064; GFX9-NEXT: s_and_b32 s1, s1, 0xff1065; GFX9-NEXT: s_or_b32 s0, s0, s21066; GFX9-NEXT: s_lshl_b32 s1, s1, 241067; GFX9-NEXT: s_or_b32 s0, s0, s11068; GFX9-NEXT: ; return to shader part epilog1069;1070; GFX10-LABEL: s_fshl_v4i8:1071; GFX10: ; %bb.0:1072; GFX10-NEXT: s_lshr_b32 s6, s1, 81073; GFX10-NEXT: s_and_b32 s11, s1, 0xff1074; GFX10-NEXT: s_lshr_b32 s8, s2, 81075; GFX10-NEXT: s_lshr_b32 s9, s2, 161076; GFX10-NEXT: s_lshr_b32 s10, s2, 241077; GFX10-NEXT: s_and_b32 s12, s2, 71078; GFX10-NEXT: s_lshr_b32 s11, s11, 11079; GFX10-NEXT: s_andn2_b32 s2, 7, s21080; GFX10-NEXT: s_and_b32 s6, s6, 0xff1081; GFX10-NEXT: s_lshr_b32 s3, s0, 81082; GFX10-NEXT: s_lshr_b32 s2, s11, s21083; GFX10-NEXT: s_and_b32 s11, s8, 71084; GFX10-NEXT: s_lshr_b32 s6, s6, 11085; GFX10-NEXT: s_andn2_b32 s8, 7, s81086; GFX10-NEXT: s_lshr_b32 s4, s0, 161087; GFX10-NEXT: s_lshr_b32 s5, s0, 241088; GFX10-NEXT: s_lshr_b32 s7, s1, 161089; GFX10-NEXT: s_lshl_b32 s0, s0, s121090; GFX10-NEXT: s_lshl_b32 s3, s3, s111091; GFX10-NEXT: s_lshr_b32 s6, s6, s81092; GFX10-NEXT: s_or_b32 s0, s0, s21093; GFX10-NEXT: s_or_b32 s2, s3, s61094; GFX10-NEXT: s_and_b32 s3, s7, 0xff1095; GFX10-NEXT: s_and_b32 s6, s9, 71096; GFX10-NEXT: s_lshr_b32 s3, s3, 11097; GFX10-NEXT: s_andn2_b32 s7, 7, s91098; GFX10-NEXT: s_lshl_b32 s4, s4, s61099; GFX10-NEXT: s_lshr_b32 s3, s3, s71100; GFX10-NEXT: s_and_b32 s6, s10, 71101; GFX10-NEXT: s_lshr_b32 s1, s1, 251102; GFX10-NEXT: s_andn2_b32 s7, 7, s101103; GFX10-NEXT: s_lshl_b32 s5, s5, s61104; GFX10-NEXT: s_lshr_b32 s1, s1, s71105; GFX10-NEXT: s_or_b32 s3, s4, s31106; GFX10-NEXT: s_and_b32 s2, s2, 0xff1107; GFX10-NEXT: s_or_b32 s1, s5, s11108; GFX10-NEXT: s_and_b32 s0, s0, 0xff1109; GFX10-NEXT: s_lshl_b32 s2, s2, 81110; GFX10-NEXT: s_and_b32 s3, s3, 0xff1111; GFX10-NEXT: s_or_b32 s0, s0, s21112; GFX10-NEXT: s_lshl_b32 s2, s3, 161113; GFX10-NEXT: s_and_b32 s1, s1, 0xff1114; GFX10-NEXT: s_or_b32 s0, s0, s21115; GFX10-NEXT: s_lshl_b32 s1, s1, 241116; GFX10-NEXT: s_or_b32 s0, s0, s11117; GFX10-NEXT: ; return to shader part epilog1118;1119; GFX11-LABEL: s_fshl_v4i8:1120; GFX11: ; %bb.0:1121; GFX11-NEXT: s_lshr_b32 s6, s1, 81122; GFX11-NEXT: s_and_b32 s11, s1, 0xff1123; GFX11-NEXT: s_lshr_b32 s8, s2, 81124; GFX11-NEXT: s_lshr_b32 s9, s2, 161125; GFX11-NEXT: s_lshr_b32 s10, s2, 241126; GFX11-NEXT: s_and_b32 s12, s2, 71127; GFX11-NEXT: s_lshr_b32 s11, s11, 11128; GFX11-NEXT: s_and_not1_b32 s2, 7, s21129; GFX11-NEXT: s_and_b32 s6, s6, 0xff1130; GFX11-NEXT: s_lshr_b32 s3, s0, 81131; GFX11-NEXT: s_lshr_b32 s2, s11, s21132; GFX11-NEXT: s_and_b32 s11, s8, 71133; GFX11-NEXT: s_lshr_b32 s6, s6, 11134; GFX11-NEXT: s_and_not1_b32 s8, 7, s81135; GFX11-NEXT: s_lshr_b32 s4, s0, 161136; GFX11-NEXT: s_lshr_b32 s5, s0, 241137; GFX11-NEXT: s_lshr_b32 s7, s1, 161138; GFX11-NEXT: s_lshl_b32 s0, s0, s121139; GFX11-NEXT: s_lshl_b32 s3, s3, s111140; GFX11-NEXT: s_lshr_b32 s6, s6, s81141; GFX11-NEXT: s_or_b32 s0, s0, s21142; GFX11-NEXT: s_or_b32 s2, s3, s61143; GFX11-NEXT: s_and_b32 s3, s7, 0xff1144; GFX11-NEXT: s_and_b32 s6, s9, 71145; GFX11-NEXT: s_lshr_b32 s3, s3, 11146; GFX11-NEXT: s_and_not1_b32 s7, 7, s91147; GFX11-NEXT: s_lshl_b32 s4, s4, s61148; GFX11-NEXT: s_lshr_b32 s3, s3, s71149; GFX11-NEXT: s_and_b32 s6, s10, 71150; GFX11-NEXT: s_lshr_b32 s1, s1, 251151; GFX11-NEXT: s_and_not1_b32 s7, 7, s101152; GFX11-NEXT: s_lshl_b32 s5, s5, s61153; GFX11-NEXT: s_lshr_b32 s1, s1, s71154; GFX11-NEXT: s_or_b32 s3, s4, s31155; GFX11-NEXT: s_and_b32 s2, s2, 0xff1156; GFX11-NEXT: s_or_b32 s1, s5, s11157; GFX11-NEXT: s_and_b32 s0, s0, 0xff1158; GFX11-NEXT: s_lshl_b32 s2, s2, 81159; GFX11-NEXT: s_and_b32 s3, s3, 0xff1160; GFX11-NEXT: s_or_b32 s0, s0, s21161; GFX11-NEXT: s_lshl_b32 s2, s3, 161162; GFX11-NEXT: s_and_b32 s1, s1, 0xff1163; GFX11-NEXT: s_or_b32 s0, s0, s21164; GFX11-NEXT: s_lshl_b32 s1, s1, 241165; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1166; GFX11-NEXT: s_or_b32 s0, s0, s11167; GFX11-NEXT: ; return to shader part epilog1168 %lhs = bitcast i32 %lhs.arg to <4 x i8>1169 %rhs = bitcast i32 %rhs.arg to <4 x i8>1170 %amt = bitcast i32 %amt.arg to <4 x i8>1171 %result = call <4 x i8> @llvm.fshl.v4i8(<4 x i8> %lhs, <4 x i8> %rhs, <4 x i8> %amt)1172 %cast.result = bitcast <4 x i8> %result to i321173 ret i32 %cast.result1174}1175 1176define i32 @v_fshl_v4i8(i32 %lhs.arg, i32 %rhs.arg, i32 %amt.arg) {1177; GFX6-LABEL: v_fshl_v4i8:1178; GFX6: ; %bb.0:1179; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1180; GFX6-NEXT: v_and_b32_e32 v9, 7, v21181; GFX6-NEXT: v_lshrrev_b32_e32 v3, 8, v01182; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v01183; GFX6-NEXT: v_lshrrev_b32_e32 v5, 24, v01184; GFX6-NEXT: v_lshrrev_b32_e32 v6, 8, v21185; GFX6-NEXT: v_lshrrev_b32_e32 v7, 16, v21186; GFX6-NEXT: v_lshrrev_b32_e32 v8, 24, v21187; GFX6-NEXT: v_bfi_b32 v2, v2, 0, 71188; GFX6-NEXT: v_lshlrev_b32_e32 v0, v9, v01189; GFX6-NEXT: v_bfe_u32 v9, v1, 1, 71190; GFX6-NEXT: v_lshrrev_b32_e32 v2, v2, v91191; GFX6-NEXT: v_or_b32_e32 v0, v0, v21192; GFX6-NEXT: v_and_b32_e32 v2, 7, v61193; GFX6-NEXT: v_lshlrev_b32_e32 v2, v2, v31194; GFX6-NEXT: v_bfe_u32 v3, v1, 8, 81195; GFX6-NEXT: v_bfi_b32 v6, v6, 0, 71196; GFX6-NEXT: v_lshrrev_b32_e32 v3, 1, v31197; GFX6-NEXT: v_lshrrev_b32_e32 v3, v6, v31198; GFX6-NEXT: v_or_b32_e32 v2, v2, v31199; GFX6-NEXT: v_and_b32_e32 v3, 7, v71200; GFX6-NEXT: v_lshlrev_b32_e32 v3, v3, v41201; GFX6-NEXT: v_bfe_u32 v4, v1, 16, 81202; GFX6-NEXT: v_bfi_b32 v6, v7, 0, 71203; GFX6-NEXT: v_lshrrev_b32_e32 v4, 1, v41204; GFX6-NEXT: v_lshrrev_b32_e32 v4, v6, v41205; GFX6-NEXT: v_or_b32_e32 v3, v3, v41206; GFX6-NEXT: v_and_b32_e32 v4, 7, v81207; GFX6-NEXT: v_bfi_b32 v6, v8, 0, 71208; GFX6-NEXT: v_lshrrev_b32_e32 v1, 25, v11209; GFX6-NEXT: v_and_b32_e32 v2, 0xff, v21210; GFX6-NEXT: v_lshlrev_b32_e32 v4, v4, v51211; GFX6-NEXT: v_lshrrev_b32_e32 v1, v6, v11212; GFX6-NEXT: v_and_b32_e32 v0, 0xff, v01213; GFX6-NEXT: v_lshlrev_b32_e32 v2, 8, v21214; GFX6-NEXT: v_or_b32_e32 v1, v4, v11215; GFX6-NEXT: v_or_b32_e32 v0, v0, v21216; GFX6-NEXT: v_and_b32_e32 v2, 0xff, v31217; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v21218; GFX6-NEXT: v_and_b32_e32 v1, 0xff, v11219; GFX6-NEXT: v_or_b32_e32 v0, v0, v21220; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v11221; GFX6-NEXT: v_or_b32_e32 v0, v0, v11222; GFX6-NEXT: s_setpc_b64 s[30:31]1223;1224; GFX8-LABEL: v_fshl_v4i8:1225; GFX8: ; %bb.0:1226; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1227; GFX8-NEXT: v_mov_b32_e32 v8, 11228; GFX8-NEXT: v_xor_b32_e32 v10, -1, v21229; GFX8-NEXT: v_and_b32_e32 v6, 7, v21230; GFX8-NEXT: v_lshrrev_b16_sdwa v9, v8, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01231; GFX8-NEXT: v_and_b32_e32 v10, 7, v101232; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v21233; GFX8-NEXT: v_lshlrev_b16_e32 v6, v6, v01234; GFX8-NEXT: v_lshrrev_b16_e32 v9, v10, v91235; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v11236; GFX8-NEXT: v_or_b32_e32 v6, v6, v91237; GFX8-NEXT: v_and_b32_e32 v9, 7, v51238; GFX8-NEXT: v_xor_b32_e32 v5, -1, v51239; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v01240; GFX8-NEXT: v_lshrrev_b16_sdwa v4, v8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01241; GFX8-NEXT: v_and_b32_e32 v5, 7, v51242; GFX8-NEXT: v_lshlrev_b16_e32 v3, v9, v31243; GFX8-NEXT: v_lshrrev_b16_e32 v4, v5, v41244; GFX8-NEXT: v_mov_b32_e32 v7, 0xff1245; GFX8-NEXT: v_or_b32_e32 v3, v3, v41246; GFX8-NEXT: v_mov_b32_e32 v4, 71247; GFX8-NEXT: v_mov_b32_e32 v8, -11248; GFX8-NEXT: v_and_b32_sdwa v5, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1249; GFX8-NEXT: v_and_b32_sdwa v7, v1, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1250; GFX8-NEXT: v_xor_b32_sdwa v9, v2, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1251; GFX8-NEXT: v_and_b32_sdwa v4, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1252; GFX8-NEXT: v_xor_b32_sdwa v2, v2, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1253; GFX8-NEXT: v_lshrrev_b16_e32 v7, 1, v71254; GFX8-NEXT: v_and_b32_e32 v9, 7, v91255; GFX8-NEXT: v_lshrrev_b32_e32 v1, 25, v11256; GFX8-NEXT: v_and_b32_e32 v2, 7, v21257; GFX8-NEXT: v_lshlrev_b16_sdwa v5, v5, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11258; GFX8-NEXT: v_lshrrev_b16_e32 v7, v9, v71259; GFX8-NEXT: v_lshlrev_b16_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_31260; GFX8-NEXT: v_lshrrev_b16_e32 v1, v2, v11261; GFX8-NEXT: v_or_b32_e32 v5, v5, v71262; GFX8-NEXT: v_or_b32_e32 v0, v0, v11263; GFX8-NEXT: v_mov_b32_e32 v1, 81264; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01265; GFX8-NEXT: v_and_b32_e32 v2, 0xff, v51266; GFX8-NEXT: v_or_b32_sdwa v1, v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1267; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v21268; GFX8-NEXT: v_and_b32_e32 v0, 0xff, v01269; GFX8-NEXT: v_or_b32_e32 v1, v1, v21270; GFX8-NEXT: v_lshlrev_b32_e32 v0, 24, v01271; GFX8-NEXT: v_or_b32_e32 v0, v1, v01272; GFX8-NEXT: s_setpc_b64 s[30:31]1273;1274; GFX9-LABEL: v_fshl_v4i8:1275; GFX9: ; %bb.0:1276; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1277; GFX9-NEXT: v_mov_b32_e32 v8, 11278; GFX9-NEXT: v_xor_b32_e32 v10, -1, v21279; GFX9-NEXT: v_and_b32_e32 v6, 7, v21280; GFX9-NEXT: v_lshrrev_b16_sdwa v9, v8, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01281; GFX9-NEXT: v_and_b32_e32 v10, 7, v101282; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v21283; GFX9-NEXT: v_lshlrev_b16_e32 v6, v6, v01284; GFX9-NEXT: v_lshrrev_b16_e32 v9, v10, v91285; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v11286; GFX9-NEXT: v_or_b32_e32 v6, v6, v91287; GFX9-NEXT: v_and_b32_e32 v9, 7, v51288; GFX9-NEXT: v_xor_b32_e32 v5, -1, v51289; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v01290; GFX9-NEXT: v_lshrrev_b16_sdwa v4, v8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01291; GFX9-NEXT: v_and_b32_e32 v5, 7, v51292; GFX9-NEXT: v_lshlrev_b16_e32 v3, v9, v31293; GFX9-NEXT: v_lshrrev_b16_e32 v4, v5, v41294; GFX9-NEXT: v_mov_b32_e32 v7, 0xff1295; GFX9-NEXT: v_or_b32_e32 v3, v3, v41296; GFX9-NEXT: v_mov_b32_e32 v4, 71297; GFX9-NEXT: v_mov_b32_e32 v9, -11298; GFX9-NEXT: v_and_b32_sdwa v5, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1299; GFX9-NEXT: v_and_b32_sdwa v8, v1, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1300; GFX9-NEXT: v_xor_b32_sdwa v10, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1301; GFX9-NEXT: v_and_b32_sdwa v4, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1302; GFX9-NEXT: v_xor_b32_sdwa v2, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1303; GFX9-NEXT: v_lshrrev_b16_e32 v8, 1, v81304; GFX9-NEXT: v_and_b32_e32 v10, 7, v101305; GFX9-NEXT: v_lshrrev_b32_e32 v1, 25, v11306; GFX9-NEXT: v_and_b32_e32 v2, 7, v21307; GFX9-NEXT: v_lshlrev_b16_sdwa v5, v5, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11308; GFX9-NEXT: v_lshrrev_b16_e32 v8, v10, v81309; GFX9-NEXT: v_lshlrev_b16_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_31310; GFX9-NEXT: v_lshrrev_b16_e32 v1, v2, v11311; GFX9-NEXT: v_or_b32_e32 v5, v5, v81312; GFX9-NEXT: v_or_b32_e32 v0, v0, v11313; GFX9-NEXT: v_mov_b32_e32 v1, 81314; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01315; GFX9-NEXT: v_and_b32_e32 v2, 0xff, v51316; GFX9-NEXT: v_and_b32_e32 v0, 0xff, v01317; GFX9-NEXT: v_and_or_b32 v1, v6, v7, v11318; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v21319; GFX9-NEXT: v_lshlrev_b32_e32 v0, 24, v01320; GFX9-NEXT: v_or3_b32 v0, v1, v2, v01321; GFX9-NEXT: s_setpc_b64 s[30:31]1322;1323; GFX10-LABEL: v_fshl_v4i8:1324; GFX10: ; %bb.0:1325; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1326; GFX10-NEXT: v_lshrrev_b32_e32 v5, 8, v21327; GFX10-NEXT: v_lshrrev_b32_e32 v3, 8, v01328; GFX10-NEXT: v_and_b32_e32 v7, 7, v21329; GFX10-NEXT: v_and_b32_e32 v8, 0xff, v11330; GFX10-NEXT: v_xor_b32_e32 v9, -1, v21331; GFX10-NEXT: v_and_b32_e32 v10, 7, v51332; GFX10-NEXT: v_lshrrev_b32_e32 v11, 8, v11333; GFX10-NEXT: v_lshrrev_b32_e32 v4, 16, v01334; GFX10-NEXT: v_lshrrev_b32_e32 v6, 24, v01335; GFX10-NEXT: v_lshlrev_b16 v0, v7, v01336; GFX10-NEXT: v_lshrrev_b16 v7, 1, v81337; GFX10-NEXT: v_and_b32_e32 v8, 7, v91338; GFX10-NEXT: v_lshlrev_b16 v3, v10, v31339; GFX10-NEXT: v_and_b32_e32 v9, 0xff, v111340; GFX10-NEXT: v_mov_b32_e32 v10, 0xff1341; GFX10-NEXT: v_mov_b32_e32 v11, -11342; GFX10-NEXT: v_xor_b32_e32 v5, -1, v51343; GFX10-NEXT: v_mov_b32_e32 v12, 71344; GFX10-NEXT: v_lshrrev_b16 v9, 1, v91345; GFX10-NEXT: v_and_b32_sdwa v10, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1346; GFX10-NEXT: v_xor_b32_sdwa v13, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1347; GFX10-NEXT: v_xor_b32_sdwa v11, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1348; GFX10-NEXT: v_and_b32_e32 v5, 7, v51349; GFX10-NEXT: v_and_b32_sdwa v14, v2, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1350; GFX10-NEXT: v_lshrrev_b16 v10, 1, v101351; GFX10-NEXT: v_and_b32_e32 v13, 7, v131352; GFX10-NEXT: v_and_b32_sdwa v2, v2, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1353; GFX10-NEXT: v_lshrrev_b32_e32 v1, 25, v11354; GFX10-NEXT: v_and_b32_e32 v11, 7, v111355; GFX10-NEXT: v_lshrrev_b16 v5, v5, v91356; GFX10-NEXT: v_lshlrev_b16 v4, v14, v41357; GFX10-NEXT: v_lshrrev_b16 v9, v13, v101358; GFX10-NEXT: v_lshlrev_b16 v2, v2, v61359; GFX10-NEXT: v_lshrrev_b16 v1, v11, v11360; GFX10-NEXT: v_lshrrev_b16 v6, v8, v71361; GFX10-NEXT: v_or_b32_e32 v3, v3, v51362; GFX10-NEXT: v_mov_b32_e32 v5, 81363; GFX10-NEXT: v_or_b32_e32 v4, v4, v91364; GFX10-NEXT: v_or_b32_e32 v1, v2, v11365; GFX10-NEXT: v_or_b32_e32 v0, v0, v61366; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01367; GFX10-NEXT: v_and_b32_e32 v3, 0xff, v41368; GFX10-NEXT: v_and_b32_e32 v1, 0xff, v11369; GFX10-NEXT: v_and_or_b32 v0, 0xff, v0, v21370; GFX10-NEXT: v_lshlrev_b32_e32 v2, 16, v31371; GFX10-NEXT: v_lshlrev_b32_e32 v1, 24, v11372; GFX10-NEXT: v_or3_b32 v0, v0, v2, v11373; GFX10-NEXT: s_setpc_b64 s[30:31]1374;1375; GFX11-LABEL: v_fshl_v4i8:1376; GFX11: ; %bb.0:1377; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1378; GFX11-NEXT: v_lshrrev_b32_e32 v6, 8, v11379; GFX11-NEXT: v_lshrrev_b32_e32 v8, 8, v21380; GFX11-NEXT: v_lshrrev_b32_e32 v3, 8, v01381; GFX11-NEXT: v_lshrrev_b32_e32 v7, 16, v11382; GFX11-NEXT: v_lshrrev_b32_e32 v9, 16, v21383; GFX11-NEXT: v_and_b32_e32 v6, 0xff, v61384; GFX11-NEXT: v_xor_b32_e32 v13, -1, v81385; GFX11-NEXT: v_lshrrev_b32_e32 v10, 24, v21386; GFX11-NEXT: v_and_b32_e32 v8, 7, v81387; GFX11-NEXT: v_and_b32_e32 v7, 0xff, v71388; GFX11-NEXT: v_lshrrev_b16 v6, 1, v61389; GFX11-NEXT: v_and_b32_e32 v13, 7, v131390; GFX11-NEXT: v_lshrrev_b32_e32 v4, 16, v01391; GFX11-NEXT: v_lshlrev_b16 v3, v8, v31392; GFX11-NEXT: v_xor_b32_e32 v8, -1, v91393; GFX11-NEXT: v_lshrrev_b32_e32 v5, 24, v01394; GFX11-NEXT: v_lshrrev_b16 v6, v13, v61395; GFX11-NEXT: v_xor_b32_e32 v13, -1, v101396; GFX11-NEXT: v_and_b32_e32 v11, 7, v21397; GFX11-NEXT: v_and_b32_e32 v12, 0xff, v11398; GFX11-NEXT: v_xor_b32_e32 v2, -1, v21399; GFX11-NEXT: v_and_b32_e32 v9, 7, v91400; GFX11-NEXT: v_lshrrev_b16 v7, 1, v71401; GFX11-NEXT: v_and_b32_e32 v8, 7, v81402; GFX11-NEXT: v_and_b32_e32 v10, 7, v101403; GFX11-NEXT: v_lshrrev_b32_e32 v1, 25, v11404; GFX11-NEXT: v_and_b32_e32 v13, 7, v131405; GFX11-NEXT: v_lshrrev_b16 v12, 1, v121406; GFX11-NEXT: v_and_b32_e32 v2, 7, v21407; GFX11-NEXT: v_or_b32_e32 v3, v3, v61408; GFX11-NEXT: v_lshlrev_b16 v4, v9, v41409; GFX11-NEXT: v_lshrrev_b16 v6, v8, v71410; GFX11-NEXT: v_lshlrev_b16 v5, v10, v51411; GFX11-NEXT: v_lshrrev_b16 v1, v13, v11412; GFX11-NEXT: v_lshlrev_b16 v0, v11, v01413; GFX11-NEXT: v_lshrrev_b16 v2, v2, v121414; GFX11-NEXT: v_and_b32_e32 v3, 0xff, v31415; GFX11-NEXT: v_or_b32_e32 v4, v4, v61416; GFX11-NEXT: v_or_b32_e32 v1, v5, v11417; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1418; GFX11-NEXT: v_or_b32_e32 v0, v0, v21419; GFX11-NEXT: v_lshlrev_b32_e32 v2, 8, v31420; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1421; GFX11-NEXT: v_and_b32_e32 v3, 0xff, v41422; GFX11-NEXT: v_and_b32_e32 v1, 0xff, v11423; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1424; GFX11-NEXT: v_and_or_b32 v0, 0xff, v0, v21425; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v31426; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1427; GFX11-NEXT: v_lshlrev_b32_e32 v1, 24, v11428; GFX11-NEXT: v_or3_b32 v0, v0, v2, v11429; GFX11-NEXT: s_setpc_b64 s[30:31]1430 %lhs = bitcast i32 %lhs.arg to <4 x i8>1431 %rhs = bitcast i32 %rhs.arg to <4 x i8>1432 %amt = bitcast i32 %amt.arg to <4 x i8>1433 %result = call <4 x i8> @llvm.fshl.v4i8(<4 x i8> %lhs, <4 x i8> %rhs, <4 x i8> %amt)1434 %cast.result = bitcast <4 x i8> %result to i321435 ret i32 %cast.result1436}1437 1438define amdgpu_ps i24 @s_fshl_i24(i24 inreg %lhs, i24 inreg %rhs, i24 inreg %amt) {1439; GFX6-LABEL: s_fshl_i24:1440; GFX6: ; %bb.0:1441; GFX6-NEXT: v_cvt_f32_ubyte0_e32 v0, 241442; GFX6-NEXT: v_rcp_iflag_f32_e32 v0, v01443; GFX6-NEXT: v_not_b32_e32 v1, 231444; GFX6-NEXT: s_and_b32 s2, s2, 0xffffff1445; GFX6-NEXT: s_bfe_u32 s1, s1, 0x1700011446; GFX6-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v01447; GFX6-NEXT: v_cvt_u32_f32_e32 v0, v01448; GFX6-NEXT: v_mul_lo_u32 v2, v0, v11449; GFX6-NEXT: v_mul_hi_u32 v2, v0, v21450; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v21451; GFX6-NEXT: v_mul_hi_u32 v0, s2, v01452; GFX6-NEXT: v_mul_lo_u32 v0, v0, 241453; GFX6-NEXT: v_sub_i32_e32 v0, vcc, s2, v01454; GFX6-NEXT: v_add_i32_e32 v2, vcc, v0, v11455; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v01456; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1457; GFX6-NEXT: v_add_i32_e32 v1, vcc, v0, v11458; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v01459; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1460; GFX6-NEXT: v_sub_i32_e32 v1, vcc, 23, v01461; GFX6-NEXT: v_and_b32_e32 v0, 0xffffff, v01462; GFX6-NEXT: v_and_b32_e32 v1, 0xffffff, v11463; GFX6-NEXT: v_lshl_b32_e32 v0, s0, v01464; GFX6-NEXT: v_lshr_b32_e32 v1, s1, v11465; GFX6-NEXT: v_or_b32_e32 v0, v0, v11466; GFX6-NEXT: v_readfirstlane_b32 s0, v01467; GFX6-NEXT: ; return to shader part epilog1468;1469; GFX8-LABEL: s_fshl_i24:1470; GFX8: ; %bb.0:1471; GFX8-NEXT: v_cvt_f32_ubyte0_e32 v0, 241472; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v01473; GFX8-NEXT: v_not_b32_e32 v1, 231474; GFX8-NEXT: s_and_b32 s2, s2, 0xffffff1475; GFX8-NEXT: s_bfe_u32 s1, s1, 0x1700011476; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v01477; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v01478; GFX8-NEXT: v_mul_lo_u32 v2, v0, v11479; GFX8-NEXT: v_mul_hi_u32 v2, v0, v21480; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v21481; GFX8-NEXT: v_mul_hi_u32 v0, s2, v01482; GFX8-NEXT: v_mul_lo_u32 v0, v0, 241483; GFX8-NEXT: v_sub_u32_e32 v0, vcc, s2, v01484; GFX8-NEXT: v_add_u32_e32 v2, vcc, v0, v11485; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v01486; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1487; GFX8-NEXT: v_add_u32_e32 v1, vcc, v0, v11488; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v01489; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1490; GFX8-NEXT: v_sub_u32_e32 v1, vcc, 23, v01491; GFX8-NEXT: v_and_b32_e32 v0, 0xffffff, v01492; GFX8-NEXT: v_and_b32_e32 v1, 0xffffff, v11493; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s01494; GFX8-NEXT: v_lshrrev_b32_e64 v1, v1, s11495; GFX8-NEXT: v_or_b32_e32 v0, v0, v11496; GFX8-NEXT: v_readfirstlane_b32 s0, v01497; GFX8-NEXT: ; return to shader part epilog1498;1499; GFX9-LABEL: s_fshl_i24:1500; GFX9: ; %bb.0:1501; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, 241502; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v01503; GFX9-NEXT: v_not_b32_e32 v1, 231504; GFX9-NEXT: s_and_b32 s2, s2, 0xffffff1505; GFX9-NEXT: s_bfe_u32 s1, s1, 0x1700011506; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v01507; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v01508; GFX9-NEXT: v_mul_lo_u32 v1, v0, v11509; GFX9-NEXT: v_mul_hi_u32 v1, v0, v11510; GFX9-NEXT: v_add_u32_e32 v0, v0, v11511; GFX9-NEXT: v_mul_hi_u32 v0, s2, v01512; GFX9-NEXT: v_mul_lo_u32 v0, v0, 241513; GFX9-NEXT: v_sub_u32_e32 v0, s2, v01514; GFX9-NEXT: v_add_u32_e32 v1, 0xffffffe8, v01515; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v01516; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1517; GFX9-NEXT: v_add_u32_e32 v1, 0xffffffe8, v01518; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v01519; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1520; GFX9-NEXT: v_sub_u32_e32 v1, 23, v01521; GFX9-NEXT: v_and_b32_e32 v1, 0xffffff, v11522; GFX9-NEXT: v_and_b32_e32 v0, 0xffffff, v01523; GFX9-NEXT: v_lshrrev_b32_e64 v1, v1, s11524; GFX9-NEXT: v_lshl_or_b32 v0, s0, v0, v11525; GFX9-NEXT: v_readfirstlane_b32 s0, v01526; GFX9-NEXT: ; return to shader part epilog1527;1528; GFX10-LABEL: s_fshl_i24:1529; GFX10: ; %bb.0:1530; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, 241531; GFX10-NEXT: s_and_b32 s2, s2, 0xffffff1532; GFX10-NEXT: s_bfe_u32 s1, s1, 0x1700011533; GFX10-NEXT: v_rcp_iflag_f32_e32 v0, v01534; GFX10-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v01535; GFX10-NEXT: v_cvt_u32_f32_e32 v0, v01536; GFX10-NEXT: v_mul_lo_u32 v1, 0xffffffe8, v01537; GFX10-NEXT: v_mul_hi_u32 v1, v0, v11538; GFX10-NEXT: v_add_nc_u32_e32 v0, v0, v11539; GFX10-NEXT: v_mul_hi_u32 v0, s2, v01540; GFX10-NEXT: v_mul_lo_u32 v0, v0, 241541; GFX10-NEXT: v_sub_nc_u32_e32 v0, s2, v01542; GFX10-NEXT: v_add_nc_u32_e32 v1, 0xffffffe8, v01543; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v01544; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1545; GFX10-NEXT: v_add_nc_u32_e32 v1, 0xffffffe8, v01546; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v01547; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1548; GFX10-NEXT: v_sub_nc_u32_e32 v1, 23, v01549; GFX10-NEXT: v_and_b32_e32 v0, 0xffffff, v01550; GFX10-NEXT: v_and_b32_e32 v1, 0xffffff, v11551; GFX10-NEXT: v_lshrrev_b32_e64 v1, v1, s11552; GFX10-NEXT: v_lshl_or_b32 v0, s0, v0, v11553; GFX10-NEXT: v_readfirstlane_b32 s0, v01554; GFX10-NEXT: ; return to shader part epilog1555;1556; GFX11-LABEL: s_fshl_i24:1557; GFX11: ; %bb.0:1558; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, 241559; GFX11-NEXT: s_and_b32 s2, s2, 0xffffff1560; GFX11-NEXT: s_bfe_u32 s1, s1, 0x1700011561; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1562; GFX11-NEXT: v_rcp_iflag_f32_e32 v0, v01563; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1564; GFX11-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v01565; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v01566; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1567; GFX11-NEXT: v_mul_lo_u32 v1, 0xffffffe8, v01568; GFX11-NEXT: v_mul_hi_u32 v1, v0, v11569; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1570; GFX11-NEXT: v_add_nc_u32_e32 v0, v0, v11571; GFX11-NEXT: v_mul_hi_u32 v0, s2, v01572; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1573; GFX11-NEXT: v_mul_lo_u32 v0, v0, 241574; GFX11-NEXT: v_sub_nc_u32_e32 v0, s2, v01575; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1576; GFX11-NEXT: v_add_nc_u32_e32 v1, 0xffffffe8, v01577; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v01578; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1579; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1580; GFX11-NEXT: v_add_nc_u32_e32 v1, 0xffffffe8, v01581; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v01582; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1583; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1584; GFX11-NEXT: v_sub_nc_u32_e32 v1, 23, v01585; GFX11-NEXT: v_and_b32_e32 v0, 0xffffff, v01586; GFX11-NEXT: v_and_b32_e32 v1, 0xffffff, v11587; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1588; GFX11-NEXT: v_lshrrev_b32_e64 v1, v1, s11589; GFX11-NEXT: v_lshl_or_b32 v0, s0, v0, v11590; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1591; GFX11-NEXT: v_readfirstlane_b32 s0, v01592; GFX11-NEXT: ; return to shader part epilog1593 %result = call i24 @llvm.fshl.i24(i24 %lhs, i24 %rhs, i24 %amt)1594 ret i24 %result1595}1596 1597define i24 @v_fshl_i24(i24 %lhs, i24 %rhs, i24 %amt) {1598; GFX6-LABEL: v_fshl_i24:1599; GFX6: ; %bb.0:1600; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1601; GFX6-NEXT: v_cvt_f32_ubyte0_e32 v3, 241602; GFX6-NEXT: v_rcp_iflag_f32_e32 v3, v31603; GFX6-NEXT: v_not_b32_e32 v4, 231604; GFX6-NEXT: v_and_b32_e32 v2, 0xffffff, v21605; GFX6-NEXT: v_bfe_u32 v1, v1, 1, 231606; GFX6-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v31607; GFX6-NEXT: v_cvt_u32_f32_e32 v3, v31608; GFX6-NEXT: v_mul_lo_u32 v5, v3, v41609; GFX6-NEXT: v_mul_hi_u32 v5, v3, v51610; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v51611; GFX6-NEXT: v_mul_hi_u32 v3, v2, v31612; GFX6-NEXT: v_mul_lo_u32 v3, v3, 241613; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v31614; GFX6-NEXT: v_add_i32_e32 v3, vcc, v2, v41615; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v21616; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1617; GFX6-NEXT: v_add_i32_e32 v3, vcc, 0xffffffe8, v21618; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v21619; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1620; GFX6-NEXT: v_sub_i32_e32 v3, vcc, 23, v21621; GFX6-NEXT: v_and_b32_e32 v2, 0xffffff, v21622; GFX6-NEXT: v_lshlrev_b32_e32 v0, v2, v01623; GFX6-NEXT: v_and_b32_e32 v2, 0xffffff, v31624; GFX6-NEXT: v_lshrrev_b32_e32 v1, v2, v11625; GFX6-NEXT: v_or_b32_e32 v0, v0, v11626; GFX6-NEXT: s_setpc_b64 s[30:31]1627;1628; GFX8-LABEL: v_fshl_i24:1629; GFX8: ; %bb.0:1630; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1631; GFX8-NEXT: v_cvt_f32_ubyte0_e32 v3, 241632; GFX8-NEXT: v_rcp_iflag_f32_e32 v3, v31633; GFX8-NEXT: v_not_b32_e32 v4, 231634; GFX8-NEXT: v_and_b32_e32 v2, 0xffffff, v21635; GFX8-NEXT: v_bfe_u32 v1, v1, 1, 231636; GFX8-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v31637; GFX8-NEXT: v_cvt_u32_f32_e32 v3, v31638; GFX8-NEXT: v_mul_lo_u32 v5, v3, v41639; GFX8-NEXT: v_mul_hi_u32 v5, v3, v51640; GFX8-NEXT: v_add_u32_e32 v3, vcc, v3, v51641; GFX8-NEXT: v_mul_hi_u32 v3, v2, v31642; GFX8-NEXT: v_mul_lo_u32 v3, v3, 241643; GFX8-NEXT: v_sub_u32_e32 v2, vcc, v2, v31644; GFX8-NEXT: v_add_u32_e32 v3, vcc, v2, v41645; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v21646; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1647; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xffffffe8, v21648; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v21649; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1650; GFX8-NEXT: v_sub_u32_e32 v3, vcc, 23, v21651; GFX8-NEXT: v_and_b32_e32 v2, 0xffffff, v21652; GFX8-NEXT: v_lshlrev_b32_e32 v0, v2, v01653; GFX8-NEXT: v_and_b32_e32 v2, 0xffffff, v31654; GFX8-NEXT: v_lshrrev_b32_e32 v1, v2, v11655; GFX8-NEXT: v_or_b32_e32 v0, v0, v11656; GFX8-NEXT: s_setpc_b64 s[30:31]1657;1658; GFX9-LABEL: v_fshl_i24:1659; GFX9: ; %bb.0:1660; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1661; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v3, 241662; GFX9-NEXT: v_rcp_iflag_f32_e32 v3, v31663; GFX9-NEXT: v_not_b32_e32 v4, 231664; GFX9-NEXT: v_and_b32_e32 v2, 0xffffff, v21665; GFX9-NEXT: v_bfe_u32 v1, v1, 1, 231666; GFX9-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v31667; GFX9-NEXT: v_cvt_u32_f32_e32 v3, v31668; GFX9-NEXT: v_mul_lo_u32 v4, v3, v41669; GFX9-NEXT: v_mul_hi_u32 v4, v3, v41670; GFX9-NEXT: v_add_u32_e32 v3, v3, v41671; GFX9-NEXT: v_mul_hi_u32 v3, v2, v31672; GFX9-NEXT: v_mul_lo_u32 v3, v3, 241673; GFX9-NEXT: v_sub_u32_e32 v2, v2, v31674; GFX9-NEXT: v_add_u32_e32 v3, 0xffffffe8, v21675; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v21676; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1677; GFX9-NEXT: v_add_u32_e32 v3, 0xffffffe8, v21678; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v21679; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1680; GFX9-NEXT: v_sub_u32_e32 v3, 23, v21681; GFX9-NEXT: v_and_b32_e32 v3, 0xffffff, v31682; GFX9-NEXT: v_and_b32_e32 v2, 0xffffff, v21683; GFX9-NEXT: v_lshrrev_b32_e32 v1, v3, v11684; GFX9-NEXT: v_lshl_or_b32 v0, v0, v2, v11685; GFX9-NEXT: s_setpc_b64 s[30:31]1686;1687; GFX10-LABEL: v_fshl_i24:1688; GFX10: ; %bb.0:1689; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1690; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v3, 241691; GFX10-NEXT: v_and_b32_e32 v2, 0xffffff, v21692; GFX10-NEXT: v_bfe_u32 v1, v1, 1, 231693; GFX10-NEXT: v_rcp_iflag_f32_e32 v3, v31694; GFX10-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v31695; GFX10-NEXT: v_cvt_u32_f32_e32 v3, v31696; GFX10-NEXT: v_mul_lo_u32 v4, 0xffffffe8, v31697; GFX10-NEXT: v_mul_hi_u32 v4, v3, v41698; GFX10-NEXT: v_add_nc_u32_e32 v3, v3, v41699; GFX10-NEXT: v_mul_hi_u32 v3, v2, v31700; GFX10-NEXT: v_mul_lo_u32 v3, v3, 241701; GFX10-NEXT: v_sub_nc_u32_e32 v2, v2, v31702; GFX10-NEXT: v_add_nc_u32_e32 v3, 0xffffffe8, v21703; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v21704; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo1705; GFX10-NEXT: v_add_nc_u32_e32 v3, 0xffffffe8, v21706; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v21707; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo1708; GFX10-NEXT: v_sub_nc_u32_e32 v3, 23, v21709; GFX10-NEXT: v_and_b32_e32 v2, 0xffffff, v21710; GFX10-NEXT: v_and_b32_e32 v3, 0xffffff, v31711; GFX10-NEXT: v_lshrrev_b32_e32 v1, v3, v11712; GFX10-NEXT: v_lshl_or_b32 v0, v0, v2, v11713; GFX10-NEXT: s_setpc_b64 s[30:31]1714;1715; GFX11-LABEL: v_fshl_i24:1716; GFX11: ; %bb.0:1717; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1718; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v3, 241719; GFX11-NEXT: v_and_b32_e32 v2, 0xffffff, v21720; GFX11-NEXT: v_bfe_u32 v1, v1, 1, 231721; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)1722; GFX11-NEXT: v_rcp_iflag_f32_e32 v3, v31723; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1724; GFX11-NEXT: v_mul_f32_e32 v3, 0x4f7ffffe, v31725; GFX11-NEXT: v_cvt_u32_f32_e32 v3, v31726; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1727; GFX11-NEXT: v_mul_lo_u32 v4, 0xffffffe8, v31728; GFX11-NEXT: v_mul_hi_u32 v4, v3, v41729; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1730; GFX11-NEXT: v_add_nc_u32_e32 v3, v3, v41731; GFX11-NEXT: v_mul_hi_u32 v3, v2, v31732; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1733; GFX11-NEXT: v_mul_lo_u32 v3, v3, 241734; GFX11-NEXT: v_sub_nc_u32_e32 v2, v2, v31735; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1736; GFX11-NEXT: v_add_nc_u32_e32 v3, 0xffffffe8, v21737; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v21738; GFX11-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo1739; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1740; GFX11-NEXT: v_add_nc_u32_e32 v3, 0xffffffe8, v21741; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v21742; GFX11-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo1743; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1744; GFX11-NEXT: v_sub_nc_u32_e32 v3, 23, v21745; GFX11-NEXT: v_and_b32_e32 v2, 0xffffff, v21746; GFX11-NEXT: v_and_b32_e32 v3, 0xffffff, v31747; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1748; GFX11-NEXT: v_lshrrev_b32_e32 v1, v3, v11749; GFX11-NEXT: v_lshl_or_b32 v0, v0, v2, v11750; GFX11-NEXT: s_setpc_b64 s[30:31]1751 %result = call i24 @llvm.fshl.i24(i24 %lhs, i24 %rhs, i24 %amt)1752 ret i24 %result1753}1754 1755define amdgpu_ps i48 @s_fshl_v2i24(i48 inreg %lhs.arg, i48 inreg %rhs.arg, i48 inreg %amt.arg) {1756; GFX6-LABEL: s_fshl_v2i24:1757; GFX6: ; %bb.0:1758; GFX6-NEXT: v_cvt_f32_ubyte0_e32 v2, 241759; GFX6-NEXT: v_rcp_iflag_f32_e32 v2, v21760; GFX6-NEXT: s_bfe_u32 s9, s0, 0x800081761; GFX6-NEXT: s_lshr_b32 s6, s0, 161762; GFX6-NEXT: s_and_b32 s8, s0, 0xff1763; GFX6-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v21764; GFX6-NEXT: v_cvt_u32_f32_e32 v2, v21765; GFX6-NEXT: s_lshl_b32 s9, s9, 81766; GFX6-NEXT: s_lshr_b32 s7, s1, 81767; GFX6-NEXT: s_or_b32 s8, s8, s91768; GFX6-NEXT: s_and_b32 s6, s6, 0xff1769; GFX6-NEXT: s_and_b32 s1, s1, 0xff1770; GFX6-NEXT: v_mov_b32_e32 v0, s01771; GFX6-NEXT: s_and_b32 s8, 0xffff, s81772; GFX6-NEXT: s_lshl_b32 s6, s6, 161773; GFX6-NEXT: v_alignbit_b32 v0, s1, v0, 241774; GFX6-NEXT: s_and_b32 s0, s7, 0xff1775; GFX6-NEXT: v_not_b32_e32 v3, 231776; GFX6-NEXT: s_or_b32 s6, s8, s61777; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v01778; GFX6-NEXT: s_lshl_b32 s0, s0, 161779; GFX6-NEXT: s_bfe_u32 s8, s2, 0x800081780; GFX6-NEXT: v_mul_lo_u32 v4, v2, v31781; GFX6-NEXT: v_or_b32_e32 v0, s0, v01782; GFX6-NEXT: s_lshr_b32 s0, s2, 161783; GFX6-NEXT: s_and_b32 s7, s2, 0xff1784; GFX6-NEXT: s_lshl_b32 s8, s8, 81785; GFX6-NEXT: s_lshr_b32 s1, s3, 81786; GFX6-NEXT: s_or_b32 s7, s7, s81787; GFX6-NEXT: s_and_b32 s0, s0, 0xff1788; GFX6-NEXT: s_and_b32 s3, s3, 0xff1789; GFX6-NEXT: v_mov_b32_e32 v1, s21790; GFX6-NEXT: s_and_b32 s7, 0xffff, s71791; GFX6-NEXT: s_lshl_b32 s0, s0, 161792; GFX6-NEXT: v_alignbit_b32 v1, s3, v1, 241793; GFX6-NEXT: s_and_b32 s1, s1, 0xff1794; GFX6-NEXT: s_or_b32 s0, s7, s01795; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v11796; GFX6-NEXT: s_lshl_b32 s1, s1, 161797; GFX6-NEXT: s_bfe_u32 s7, s4, 0x800081798; GFX6-NEXT: v_mul_hi_u32 v4, v2, v41799; GFX6-NEXT: v_or_b32_e32 v1, s1, v11800; GFX6-NEXT: s_lshr_b32 s1, s4, 161801; GFX6-NEXT: s_and_b32 s3, s4, 0xff1802; GFX6-NEXT: s_lshl_b32 s7, s7, 81803; GFX6-NEXT: s_or_b32 s3, s3, s71804; GFX6-NEXT: s_and_b32 s1, s1, 0xff1805; GFX6-NEXT: s_and_b32 s3, 0xffff, s31806; GFX6-NEXT: s_lshl_b32 s1, s1, 161807; GFX6-NEXT: s_or_b32 s1, s3, s11808; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v41809; GFX6-NEXT: v_mul_hi_u32 v4, s1, v21810; GFX6-NEXT: s_lshr_b32 s2, s5, 81811; GFX6-NEXT: s_and_b32 s3, s5, 0xff1812; GFX6-NEXT: v_mov_b32_e32 v5, s41813; GFX6-NEXT: v_alignbit_b32 v5, s3, v5, 241814; GFX6-NEXT: s_and_b32 s2, s2, 0xff1815; GFX6-NEXT: v_and_b32_e32 v5, 0xffff, v51816; GFX6-NEXT: v_mul_lo_u32 v4, v4, 241817; GFX6-NEXT: s_lshl_b32 s2, s2, 161818; GFX6-NEXT: v_or_b32_e32 v5, s2, v51819; GFX6-NEXT: v_mul_hi_u32 v2, v5, v21820; GFX6-NEXT: v_sub_i32_e32 v4, vcc, s1, v41821; GFX6-NEXT: v_add_i32_e32 v6, vcc, v4, v31822; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v41823; GFX6-NEXT: v_mul_lo_u32 v2, v2, 241824; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc1825; GFX6-NEXT: v_add_i32_e32 v6, vcc, v4, v31826; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v41827; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc1828; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v5, v21829; GFX6-NEXT: v_sub_i32_e32 v6, vcc, 23, v41830; GFX6-NEXT: v_add_i32_e32 v5, vcc, v2, v31831; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v21832; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc1833; GFX6-NEXT: v_add_i32_e32 v3, vcc, v2, v31834; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v21835; GFX6-NEXT: v_and_b32_e32 v4, 0xffffff, v41836; GFX6-NEXT: s_lshr_b32 s0, s0, 11837; GFX6-NEXT: v_and_b32_e32 v6, 0xffffff, v61838; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1839; GFX6-NEXT: v_lshl_b32_e32 v4, s6, v41840; GFX6-NEXT: v_lshr_b32_e32 v6, s0, v61841; GFX6-NEXT: v_sub_i32_e32 v3, vcc, 23, v21842; GFX6-NEXT: v_and_b32_e32 v2, 0xffffff, v21843; GFX6-NEXT: v_or_b32_e32 v4, v4, v61844; GFX6-NEXT: v_lshlrev_b32_e32 v0, v2, v01845; GFX6-NEXT: v_lshrrev_b32_e32 v1, 1, v11846; GFX6-NEXT: v_and_b32_e32 v2, 0xffffff, v31847; GFX6-NEXT: v_lshrrev_b32_e32 v1, v2, v11848; GFX6-NEXT: v_bfe_u32 v2, v4, 8, 81849; GFX6-NEXT: v_or_b32_e32 v0, v0, v11850; GFX6-NEXT: v_and_b32_e32 v1, 0xff, v41851; GFX6-NEXT: v_lshlrev_b32_e32 v2, 8, v21852; GFX6-NEXT: v_or_b32_e32 v1, v1, v21853; GFX6-NEXT: v_bfe_u32 v2, v4, 16, 81854; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v21855; GFX6-NEXT: v_or_b32_e32 v1, v1, v21856; GFX6-NEXT: v_and_b32_e32 v2, 0xff, v01857; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v21858; GFX6-NEXT: v_or_b32_e32 v1, v1, v21859; GFX6-NEXT: v_bfe_u32 v2, v0, 8, 81860; GFX6-NEXT: v_bfe_u32 v0, v0, 16, 81861; GFX6-NEXT: v_lshlrev_b32_e32 v0, 8, v01862; GFX6-NEXT: v_or_b32_e32 v0, v2, v01863; GFX6-NEXT: v_readfirstlane_b32 s0, v11864; GFX6-NEXT: v_readfirstlane_b32 s1, v01865; GFX6-NEXT: ; return to shader part epilog1866;1867; GFX8-LABEL: s_fshl_v2i24:1868; GFX8: ; %bb.0:1869; GFX8-NEXT: s_lshr_b32 s6, s0, 81870; GFX8-NEXT: s_and_b32 s6, s6, 0xff1871; GFX8-NEXT: v_cvt_f32_ubyte0_e32 v0, 241872; GFX8-NEXT: s_lshr_b32 s7, s0, 161873; GFX8-NEXT: s_lshr_b32 s8, s0, 241874; GFX8-NEXT: s_and_b32 s0, s0, 0xff1875; GFX8-NEXT: s_lshl_b32 s6, s6, 81876; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v01877; GFX8-NEXT: s_or_b32 s0, s0, s61878; GFX8-NEXT: s_and_b32 s6, s7, 0xff1879; GFX8-NEXT: s_lshr_b32 s9, s1, 81880; GFX8-NEXT: s_lshl_b32 s6, s6, 161881; GFX8-NEXT: s_and_b32 s1, s1, 0xff1882; GFX8-NEXT: s_or_b32 s0, s0, s61883; GFX8-NEXT: s_lshl_b32 s1, s1, 81884; GFX8-NEXT: s_and_b32 s6, s9, 0xff1885; GFX8-NEXT: s_or_b32 s1, s8, s11886; GFX8-NEXT: s_lshl_b32 s6, s6, 161887; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v01888; GFX8-NEXT: s_or_b32 s1, s1, s61889; GFX8-NEXT: s_lshr_b32 s6, s2, 81890; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v01891; GFX8-NEXT: s_and_b32 s6, s6, 0xff1892; GFX8-NEXT: s_lshr_b32 s7, s2, 161893; GFX8-NEXT: s_lshr_b32 s8, s2, 241894; GFX8-NEXT: s_and_b32 s2, s2, 0xff1895; GFX8-NEXT: s_lshl_b32 s6, s6, 81896; GFX8-NEXT: s_or_b32 s2, s2, s61897; GFX8-NEXT: s_and_b32 s6, s7, 0xff1898; GFX8-NEXT: v_not_b32_e32 v1, 231899; GFX8-NEXT: s_lshr_b32 s9, s3, 81900; GFX8-NEXT: s_lshl_b32 s6, s6, 161901; GFX8-NEXT: s_and_b32 s3, s3, 0xff1902; GFX8-NEXT: v_mul_lo_u32 v2, v0, v11903; GFX8-NEXT: s_or_b32 s2, s2, s61904; GFX8-NEXT: s_lshl_b32 s3, s3, 81905; GFX8-NEXT: s_and_b32 s6, s9, 0xff1906; GFX8-NEXT: s_or_b32 s3, s8, s31907; GFX8-NEXT: s_lshl_b32 s6, s6, 161908; GFX8-NEXT: s_or_b32 s3, s3, s61909; GFX8-NEXT: s_lshr_b32 s6, s4, 81910; GFX8-NEXT: s_and_b32 s6, s6, 0xff1911; GFX8-NEXT: v_mul_hi_u32 v2, v0, v21912; GFX8-NEXT: s_lshr_b32 s7, s4, 161913; GFX8-NEXT: s_lshr_b32 s8, s4, 241914; GFX8-NEXT: s_and_b32 s4, s4, 0xff1915; GFX8-NEXT: s_lshl_b32 s6, s6, 81916; GFX8-NEXT: s_or_b32 s4, s4, s61917; GFX8-NEXT: s_and_b32 s6, s7, 0xff1918; GFX8-NEXT: s_lshl_b32 s6, s6, 161919; GFX8-NEXT: s_or_b32 s4, s4, s61920; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v21921; GFX8-NEXT: v_mul_hi_u32 v2, s4, v01922; GFX8-NEXT: s_lshr_b32 s9, s5, 81923; GFX8-NEXT: s_and_b32 s5, s5, 0xff1924; GFX8-NEXT: s_lshl_b32 s5, s5, 81925; GFX8-NEXT: v_mul_lo_u32 v2, v2, 241926; GFX8-NEXT: s_and_b32 s6, s9, 0xff1927; GFX8-NEXT: s_or_b32 s5, s8, s51928; GFX8-NEXT: s_lshl_b32 s6, s6, 161929; GFX8-NEXT: s_or_b32 s5, s5, s61930; GFX8-NEXT: v_sub_u32_e32 v2, vcc, s4, v21931; GFX8-NEXT: v_add_u32_e32 v3, vcc, v2, v11932; GFX8-NEXT: v_mul_hi_u32 v0, s5, v01933; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v21934; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1935; GFX8-NEXT: v_add_u32_e32 v3, vcc, v2, v11936; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v21937; GFX8-NEXT: v_mul_lo_u32 v0, v0, 241938; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1939; GFX8-NEXT: v_sub_u32_e32 v3, vcc, 23, v21940; GFX8-NEXT: v_and_b32_e32 v2, 0xffffff, v21941; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s01942; GFX8-NEXT: s_lshr_b32 s0, s2, 11943; GFX8-NEXT: v_and_b32_e32 v3, 0xffffff, v31944; GFX8-NEXT: v_lshrrev_b32_e64 v3, v3, s01945; GFX8-NEXT: v_sub_u32_e32 v0, vcc, s5, v01946; GFX8-NEXT: v_or_b32_e32 v2, v2, v31947; GFX8-NEXT: v_add_u32_e32 v3, vcc, v0, v11948; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v01949; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc1950; GFX8-NEXT: v_add_u32_e32 v1, vcc, v0, v11951; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v01952; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1953; GFX8-NEXT: v_sub_u32_e32 v1, vcc, 23, v01954; GFX8-NEXT: v_and_b32_e32 v0, 0xffffff, v01955; GFX8-NEXT: s_lshr_b32 s0, s3, 11956; GFX8-NEXT: v_and_b32_e32 v1, 0xffffff, v11957; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s11958; GFX8-NEXT: v_lshrrev_b32_e64 v1, v1, s01959; GFX8-NEXT: v_or_b32_e32 v0, v0, v11960; GFX8-NEXT: v_mov_b32_e32 v1, 81961; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_11962; GFX8-NEXT: v_mov_b32_e32 v4, 161963; GFX8-NEXT: v_or_b32_sdwa v3, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1964; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_21965; GFX8-NEXT: v_or_b32_e32 v2, v3, v21966; GFX8-NEXT: v_and_b32_e32 v3, 0xff, v01967; GFX8-NEXT: v_lshlrev_b32_e32 v3, 24, v31968; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_21969; GFX8-NEXT: v_or_b32_e32 v2, v2, v31970; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD1971; GFX8-NEXT: v_readfirstlane_b32 s0, v21972; GFX8-NEXT: v_readfirstlane_b32 s1, v01973; GFX8-NEXT: ; return to shader part epilog1974;1975; GFX9-LABEL: s_fshl_v2i24:1976; GFX9: ; %bb.0:1977; GFX9-NEXT: s_lshr_b32 s6, s0, 81978; GFX9-NEXT: s_and_b32 s6, s6, 0xff1979; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, 241980; GFX9-NEXT: s_lshr_b32 s7, s0, 161981; GFX9-NEXT: s_lshr_b32 s8, s0, 241982; GFX9-NEXT: s_and_b32 s0, s0, 0xff1983; GFX9-NEXT: s_lshl_b32 s6, s6, 81984; GFX9-NEXT: v_rcp_iflag_f32_e32 v0, v01985; GFX9-NEXT: s_or_b32 s0, s0, s61986; GFX9-NEXT: s_and_b32 s6, s7, 0xff1987; GFX9-NEXT: s_lshr_b32 s9, s1, 81988; GFX9-NEXT: s_lshl_b32 s6, s6, 161989; GFX9-NEXT: s_and_b32 s1, s1, 0xff1990; GFX9-NEXT: s_or_b32 s0, s0, s61991; GFX9-NEXT: s_lshl_b32 s1, s1, 81992; GFX9-NEXT: s_and_b32 s6, s9, 0xff1993; GFX9-NEXT: s_or_b32 s1, s8, s11994; GFX9-NEXT: s_lshl_b32 s6, s6, 161995; GFX9-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v01996; GFX9-NEXT: s_or_b32 s1, s1, s61997; GFX9-NEXT: s_lshr_b32 s6, s2, 81998; GFX9-NEXT: v_cvt_u32_f32_e32 v0, v01999; GFX9-NEXT: s_and_b32 s6, s6, 0xff2000; GFX9-NEXT: s_lshr_b32 s7, s2, 162001; GFX9-NEXT: s_lshr_b32 s8, s2, 242002; GFX9-NEXT: s_and_b32 s2, s2, 0xff2003; GFX9-NEXT: s_lshl_b32 s6, s6, 82004; GFX9-NEXT: s_or_b32 s2, s2, s62005; GFX9-NEXT: s_and_b32 s6, s7, 0xff2006; GFX9-NEXT: v_not_b32_e32 v1, 232007; GFX9-NEXT: s_lshr_b32 s9, s3, 82008; GFX9-NEXT: s_lshl_b32 s6, s6, 162009; GFX9-NEXT: s_and_b32 s3, s3, 0xff2010; GFX9-NEXT: v_mul_lo_u32 v1, v0, v12011; GFX9-NEXT: s_or_b32 s2, s2, s62012; GFX9-NEXT: s_lshl_b32 s3, s3, 82013; GFX9-NEXT: s_and_b32 s6, s9, 0xff2014; GFX9-NEXT: s_or_b32 s3, s8, s32015; GFX9-NEXT: s_lshl_b32 s6, s6, 162016; GFX9-NEXT: s_or_b32 s3, s3, s62017; GFX9-NEXT: s_lshr_b32 s6, s4, 82018; GFX9-NEXT: s_and_b32 s6, s6, 0xff2019; GFX9-NEXT: v_mul_hi_u32 v1, v0, v12020; GFX9-NEXT: s_lshr_b32 s7, s4, 162021; GFX9-NEXT: s_lshr_b32 s8, s4, 242022; GFX9-NEXT: s_and_b32 s4, s4, 0xff2023; GFX9-NEXT: s_lshl_b32 s6, s6, 82024; GFX9-NEXT: s_or_b32 s4, s4, s62025; GFX9-NEXT: s_and_b32 s6, s7, 0xff2026; GFX9-NEXT: s_lshl_b32 s6, s6, 162027; GFX9-NEXT: s_or_b32 s4, s4, s62028; GFX9-NEXT: v_add_u32_e32 v0, v0, v12029; GFX9-NEXT: v_mul_hi_u32 v1, s4, v02030; GFX9-NEXT: s_lshr_b32 s9, s5, 82031; GFX9-NEXT: s_and_b32 s5, s5, 0xff2032; GFX9-NEXT: s_lshl_b32 s5, s5, 82033; GFX9-NEXT: v_mul_lo_u32 v1, v1, 242034; GFX9-NEXT: s_and_b32 s6, s9, 0xff2035; GFX9-NEXT: s_or_b32 s5, s8, s52036; GFX9-NEXT: s_lshl_b32 s6, s6, 162037; GFX9-NEXT: s_or_b32 s5, s5, s62038; GFX9-NEXT: v_mul_hi_u32 v0, s5, v02039; GFX9-NEXT: v_sub_u32_e32 v1, s4, v12040; GFX9-NEXT: v_add_u32_e32 v2, 0xffffffe8, v12041; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v12042; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc2043; GFX9-NEXT: v_add_u32_e32 v2, 0xffffffe8, v12044; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v12045; GFX9-NEXT: v_mul_lo_u32 v0, v0, 242046; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc2047; GFX9-NEXT: v_sub_u32_e32 v2, 23, v12048; GFX9-NEXT: s_lshr_b32 s2, s2, 12049; GFX9-NEXT: v_and_b32_e32 v2, 0xffffff, v22050; GFX9-NEXT: v_and_b32_e32 v1, 0xffffff, v12051; GFX9-NEXT: v_lshrrev_b32_e64 v2, v2, s22052; GFX9-NEXT: v_sub_u32_e32 v0, s5, v02053; GFX9-NEXT: v_lshl_or_b32 v1, s0, v1, v22054; GFX9-NEXT: v_add_u32_e32 v2, 0xffffffe8, v02055; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v02056; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2057; GFX9-NEXT: v_add_u32_e32 v2, 0xffffffe8, v02058; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v02059; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2060; GFX9-NEXT: v_sub_u32_e32 v2, 23, v02061; GFX9-NEXT: s_lshr_b32 s0, s3, 12062; GFX9-NEXT: v_and_b32_e32 v2, 0xffffff, v22063; GFX9-NEXT: v_and_b32_e32 v0, 0xffffff, v02064; GFX9-NEXT: v_lshrrev_b32_e64 v2, v2, s02065; GFX9-NEXT: v_mov_b32_e32 v3, 82066; GFX9-NEXT: v_lshl_or_b32 v0, s1, v0, v22067; GFX9-NEXT: v_mov_b32_e32 v2, 0xff2068; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_12069; GFX9-NEXT: v_and_or_b32 v2, v1, v2, v32070; GFX9-NEXT: v_mov_b32_e32 v3, 162071; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_22072; GFX9-NEXT: v_and_b32_e32 v3, 0xff, v02073; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v32074; GFX9-NEXT: v_or3_b32 v1, v2, v1, v32075; GFX9-NEXT: v_bfe_u32 v2, v0, 8, 82076; GFX9-NEXT: v_bfe_u32 v0, v0, 16, 82077; GFX9-NEXT: v_lshl_or_b32 v0, v0, 8, v22078; GFX9-NEXT: v_readfirstlane_b32 s0, v12079; GFX9-NEXT: v_readfirstlane_b32 s1, v02080; GFX9-NEXT: ; return to shader part epilog2081;2082; GFX10-LABEL: s_fshl_v2i24:2083; GFX10: ; %bb.0:2084; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, 242085; GFX10-NEXT: s_lshr_b32 s10, s4, 82086; GFX10-NEXT: s_lshr_b32 s11, s4, 162087; GFX10-NEXT: s_and_b32 s10, s10, 0xff2088; GFX10-NEXT: s_lshr_b32 s12, s4, 242089; GFX10-NEXT: v_rcp_iflag_f32_e32 v0, v02090; GFX10-NEXT: s_and_b32 s4, s4, 0xff2091; GFX10-NEXT: s_and_b32 s11, s11, 0xff2092; GFX10-NEXT: s_lshl_b32 s10, s10, 82093; GFX10-NEXT: s_lshl_b32 s11, s11, 162094; GFX10-NEXT: s_or_b32 s4, s4, s102095; GFX10-NEXT: s_lshr_b32 s13, s5, 82096; GFX10-NEXT: s_and_b32 s5, s5, 0xff2097; GFX10-NEXT: s_or_b32 s4, s4, s112098; GFX10-NEXT: s_lshl_b32 s5, s5, 82099; GFX10-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v02100; GFX10-NEXT: s_and_b32 s13, s13, 0xff2101; GFX10-NEXT: s_or_b32 s5, s12, s52102; GFX10-NEXT: s_lshl_b32 s10, s13, 162103; GFX10-NEXT: s_lshr_b32 s9, s1, 82104; GFX10-NEXT: v_cvt_u32_f32_e32 v0, v02105; GFX10-NEXT: s_or_b32 s5, s5, s102106; GFX10-NEXT: s_and_b32 s1, s1, 0xff2107; GFX10-NEXT: s_lshr_b32 s10, s2, 82108; GFX10-NEXT: s_lshr_b32 s8, s0, 242109; GFX10-NEXT: v_mul_lo_u32 v2, 0xffffffe8, v02110; GFX10-NEXT: s_lshr_b32 s11, s2, 162111; GFX10-NEXT: s_lshr_b32 s13, s3, 82112; GFX10-NEXT: s_and_b32 s3, s3, 0xff2113; GFX10-NEXT: s_lshl_b32 s1, s1, 82114; GFX10-NEXT: s_and_b32 s10, s10, 0xff2115; GFX10-NEXT: s_lshr_b32 s12, s2, 242116; GFX10-NEXT: s_and_b32 s2, s2, 0xff2117; GFX10-NEXT: v_mul_hi_u32 v2, v0, v22118; GFX10-NEXT: s_lshl_b32 s3, s3, 82119; GFX10-NEXT: s_or_b32 s1, s8, s12120; GFX10-NEXT: s_lshl_b32 s8, s10, 82121; GFX10-NEXT: s_or_b32 s3, s12, s32122; GFX10-NEXT: s_or_b32 s2, s2, s82123; GFX10-NEXT: s_lshr_b32 s6, s0, 82124; GFX10-NEXT: s_lshr_b32 s7, s0, 162125; GFX10-NEXT: v_add_nc_u32_e32 v0, v0, v22126; GFX10-NEXT: s_and_b32 s6, s6, 0xff2127; GFX10-NEXT: s_and_b32 s0, s0, 0xff2128; GFX10-NEXT: s_and_b32 s7, s7, 0xff2129; GFX10-NEXT: s_and_b32 s9, s9, 0xff2130; GFX10-NEXT: v_mul_hi_u32 v2, s4, v02131; GFX10-NEXT: v_mul_hi_u32 v0, s5, v02132; GFX10-NEXT: s_lshl_b32 s6, s6, 82133; GFX10-NEXT: s_lshl_b32 s7, s7, 162134; GFX10-NEXT: s_or_b32 s0, s0, s62135; GFX10-NEXT: v_mov_b32_e32 v1, 82136; GFX10-NEXT: s_or_b32 s0, s0, s72137; GFX10-NEXT: v_mul_lo_u32 v2, v2, 242138; GFX10-NEXT: v_mul_lo_u32 v0, v0, 242139; GFX10-NEXT: v_sub_nc_u32_e32 v2, s4, v22140; GFX10-NEXT: v_sub_nc_u32_e32 v0, s5, v02141; GFX10-NEXT: s_and_b32 s4, s11, 0xff2142; GFX10-NEXT: s_and_b32 s5, s13, 0xff2143; GFX10-NEXT: s_lshl_b32 s4, s4, 162144; GFX10-NEXT: v_add_nc_u32_e32 v3, 0xffffffe8, v22145; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v22146; GFX10-NEXT: v_add_nc_u32_e32 v4, 0xffffffe8, v02147; GFX10-NEXT: s_lshl_b32 s5, s5, 162148; GFX10-NEXT: s_or_b32 s2, s2, s42149; GFX10-NEXT: s_or_b32 s3, s3, s52150; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo2151; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v02152; GFX10-NEXT: s_lshr_b32 s3, s3, 12153; GFX10-NEXT: s_lshr_b32 s2, s2, 12154; GFX10-NEXT: v_add_nc_u32_e32 v3, 0xffffffe8, v22155; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo2156; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v22157; GFX10-NEXT: v_add_nc_u32_e32 v4, 0xffffffe8, v02158; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo2159; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v02160; GFX10-NEXT: v_sub_nc_u32_e32 v3, 23, v22161; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo2162; GFX10-NEXT: v_and_b32_e32 v2, 0xffffff, v22163; GFX10-NEXT: v_and_b32_e32 v3, 0xffffff, v32164; GFX10-NEXT: v_sub_nc_u32_e32 v4, 23, v02165; GFX10-NEXT: v_and_b32_e32 v0, 0xffffff, v02166; GFX10-NEXT: v_lshrrev_b32_e64 v3, v3, s22167; GFX10-NEXT: v_and_b32_e32 v4, 0xffffff, v42168; GFX10-NEXT: s_lshl_b32 s2, s9, 162169; GFX10-NEXT: s_or_b32 s1, s1, s22170; GFX10-NEXT: v_lshl_or_b32 v2, s0, v2, v32171; GFX10-NEXT: v_lshrrev_b32_e64 v4, v4, s32172; GFX10-NEXT: v_mov_b32_e32 v3, 162173; GFX10-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_12174; GFX10-NEXT: v_lshl_or_b32 v0, s1, v0, v42175; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_22176; GFX10-NEXT: v_and_or_b32 v1, 0xff, v2, v12177; GFX10-NEXT: v_and_b32_e32 v4, 0xff, v02178; GFX10-NEXT: v_bfe_u32 v5, v0, 8, 82179; GFX10-NEXT: v_bfe_u32 v0, v0, 16, 82180; GFX10-NEXT: v_lshlrev_b32_e32 v2, 24, v42181; GFX10-NEXT: v_lshl_or_b32 v0, v0, 8, v52182; GFX10-NEXT: v_or3_b32 v1, v1, v3, v22183; GFX10-NEXT: v_readfirstlane_b32 s1, v02184; GFX10-NEXT: v_readfirstlane_b32 s0, v12185; GFX10-NEXT: ; return to shader part epilog2186;2187; GFX11-LABEL: s_fshl_v2i24:2188; GFX11: ; %bb.0:2189; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, 242190; GFX11-NEXT: s_lshr_b32 s10, s4, 82191; GFX11-NEXT: s_lshr_b32 s11, s4, 162192; GFX11-NEXT: s_and_b32 s10, s10, 0xff2193; GFX11-NEXT: s_lshr_b32 s12, s4, 242194; GFX11-NEXT: v_rcp_iflag_f32_e32 v0, v02195; GFX11-NEXT: s_and_b32 s4, s4, 0xff2196; GFX11-NEXT: s_and_b32 s11, s11, 0xff2197; GFX11-NEXT: s_lshl_b32 s10, s10, 82198; GFX11-NEXT: s_lshl_b32 s11, s11, 162199; GFX11-NEXT: s_or_b32 s4, s4, s102200; GFX11-NEXT: s_lshr_b32 s13, s5, 82201; GFX11-NEXT: s_and_b32 s5, s5, 0xff2202; GFX11-NEXT: s_or_b32 s4, s4, s112203; GFX11-NEXT: s_lshl_b32 s5, s5, 82204; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2205; GFX11-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v02206; GFX11-NEXT: s_and_b32 s13, s13, 0xff2207; GFX11-NEXT: s_or_b32 s5, s12, s52208; GFX11-NEXT: s_lshl_b32 s10, s13, 162209; GFX11-NEXT: s_lshr_b32 s9, s1, 82210; GFX11-NEXT: v_cvt_u32_f32_e32 v0, v02211; GFX11-NEXT: s_or_b32 s5, s5, s102212; GFX11-NEXT: s_and_b32 s1, s1, 0xff2213; GFX11-NEXT: s_lshr_b32 s10, s2, 82214; GFX11-NEXT: s_lshr_b32 s8, s0, 242215; GFX11-NEXT: v_mul_lo_u32 v1, 0xffffffe8, v02216; GFX11-NEXT: s_lshr_b32 s11, s2, 162217; GFX11-NEXT: s_lshl_b32 s1, s1, 82218; GFX11-NEXT: s_and_b32 s9, s9, 0xff2219; GFX11-NEXT: s_and_b32 s10, s10, 0xff2220; GFX11-NEXT: s_lshr_b32 s12, s2, 242221; GFX11-NEXT: s_and_b32 s2, s2, 0xff2222; GFX11-NEXT: s_or_b32 s1, s8, s12223; GFX11-NEXT: v_mul_hi_u32 v1, v0, v12224; GFX11-NEXT: s_lshl_b32 s8, s9, 162225; GFX11-NEXT: s_lshl_b32 s9, s10, 82226; GFX11-NEXT: s_lshr_b32 s6, s0, 82227; GFX11-NEXT: s_or_b32 s2, s2, s92228; GFX11-NEXT: s_lshr_b32 s13, s3, 82229; GFX11-NEXT: s_and_b32 s3, s3, 0xff2230; GFX11-NEXT: s_lshr_b32 s7, s0, 162231; GFX11-NEXT: v_add_nc_u32_e32 v0, v0, v12232; GFX11-NEXT: s_and_b32 s6, s6, 0xff2233; GFX11-NEXT: s_lshl_b32 s3, s3, 82234; GFX11-NEXT: s_and_b32 s0, s0, 0xff2235; GFX11-NEXT: s_and_b32 s7, s7, 0xff2236; GFX11-NEXT: v_mul_hi_u32 v1, s4, v02237; GFX11-NEXT: v_mul_hi_u32 v0, s5, v02238; GFX11-NEXT: s_lshl_b32 s6, s6, 82239; GFX11-NEXT: s_or_b32 s3, s12, s32240; GFX11-NEXT: s_lshl_b32 s7, s7, 162241; GFX11-NEXT: s_or_b32 s0, s0, s62242; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)2243; GFX11-NEXT: s_or_b32 s0, s0, s72244; GFX11-NEXT: v_mul_lo_u32 v1, v1, 242245; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2246; GFX11-NEXT: v_mul_lo_u32 v0, v0, 242247; GFX11-NEXT: v_sub_nc_u32_e32 v1, s4, v12248; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)2249; GFX11-NEXT: v_sub_nc_u32_e32 v0, s5, v02250; GFX11-NEXT: s_and_b32 s4, s11, 0xff2251; GFX11-NEXT: s_and_b32 s5, s13, 0xff2252; GFX11-NEXT: s_lshl_b32 s4, s4, 162253; GFX11-NEXT: v_add_nc_u32_e32 v2, 0xffffffe8, v12254; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v12255; GFX11-NEXT: v_add_nc_u32_e32 v3, 0xffffffe8, v02256; GFX11-NEXT: s_or_b32 s2, s2, s42257; GFX11-NEXT: s_lshl_b32 s5, s5, 162258; GFX11-NEXT: s_lshr_b32 s2, s2, 12259; GFX11-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc_lo2260; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v02261; GFX11-NEXT: s_or_b32 s3, s3, s52262; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)2263; GFX11-NEXT: v_add_nc_u32_e32 v2, 0xffffffe8, v12264; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo2265; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v12266; GFX11-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc_lo2267; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)2268; GFX11-NEXT: v_sub_nc_u32_e32 v2, 23, v12269; GFX11-NEXT: v_and_b32_e32 v1, 0xffffff, v12270; GFX11-NEXT: v_add_nc_u32_e32 v3, 0xffffffe8, v02271; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v02272; GFX11-NEXT: v_and_b32_e32 v2, 0xffffff, v22273; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2274; GFX11-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo2275; GFX11-NEXT: v_lshrrev_b32_e64 v2, v2, s22276; GFX11-NEXT: s_lshr_b32 s2, s3, 12277; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)2278; GFX11-NEXT: v_sub_nc_u32_e32 v3, 23, v02279; GFX11-NEXT: v_and_b32_e32 v0, 0xffffff, v02280; GFX11-NEXT: v_lshl_or_b32 v1, s0, v1, v22281; GFX11-NEXT: s_or_b32 s0, s1, s82282; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2283; GFX11-NEXT: v_and_b32_e32 v3, 0xffffff, v32284; GFX11-NEXT: v_bfe_u32 v2, v1, 8, 82285; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2286; GFX11-NEXT: v_lshrrev_b32_e64 v3, v3, s22287; GFX11-NEXT: v_lshlrev_b32_e32 v2, 8, v22288; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)2289; GFX11-NEXT: v_lshl_or_b32 v0, s0, v0, v32290; GFX11-NEXT: v_bfe_u32 v3, v1, 16, 82291; GFX11-NEXT: v_and_or_b32 v1, 0xff, v1, v22292; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2293; GFX11-NEXT: v_and_b32_e32 v4, 0xff, v02294; GFX11-NEXT: v_bfe_u32 v5, v0, 8, 82295; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v32296; GFX11-NEXT: v_bfe_u32 v0, v0, 16, 82297; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)2298; GFX11-NEXT: v_lshlrev_b32_e32 v4, 24, v42299; GFX11-NEXT: v_lshl_or_b32 v0, v0, 8, v52300; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2301; GFX11-NEXT: v_or3_b32 v1, v1, v3, v42302; GFX11-NEXT: v_readfirstlane_b32 s1, v02303; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)2304; GFX11-NEXT: v_readfirstlane_b32 s0, v12305; GFX11-NEXT: ; return to shader part epilog2306 %lhs = bitcast i48 %lhs.arg to <2 x i24>2307 %rhs = bitcast i48 %rhs.arg to <2 x i24>2308 %amt = bitcast i48 %amt.arg to <2 x i24>2309 %result = call <2 x i24> @llvm.fshl.v2i24(<2 x i24> %lhs, <2 x i24> %rhs, <2 x i24> %amt)2310 %cast.result = bitcast <2 x i24> %result to i482311 ret i48 %cast.result2312}2313 2314define <2 x i24> @v_fshl_v2i24(<2 x i24> %lhs, <2 x i24> %rhs, <2 x i24> %amt) {2315; GFX6-LABEL: v_fshl_v2i24:2316; GFX6: ; %bb.0:2317; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2318; GFX6-NEXT: v_cvt_f32_ubyte0_e32 v6, 242319; GFX6-NEXT: v_rcp_iflag_f32_e32 v6, v62320; GFX6-NEXT: v_not_b32_e32 v7, 232321; GFX6-NEXT: v_and_b32_e32 v4, 0xffffff, v42322; GFX6-NEXT: v_and_b32_e32 v5, 0xffffff, v52323; GFX6-NEXT: v_mul_f32_e32 v6, 0x4f7ffffe, v62324; GFX6-NEXT: v_cvt_u32_f32_e32 v6, v62325; GFX6-NEXT: v_bfe_u32 v2, v2, 1, 232326; GFX6-NEXT: v_mul_lo_u32 v8, v6, v72327; GFX6-NEXT: v_mul_hi_u32 v8, v6, v82328; GFX6-NEXT: v_add_i32_e32 v6, vcc, v6, v82329; GFX6-NEXT: v_mul_hi_u32 v8, v4, v62330; GFX6-NEXT: v_mul_hi_u32 v6, v5, v62331; GFX6-NEXT: v_mul_lo_u32 v8, v8, 242332; GFX6-NEXT: v_mul_lo_u32 v6, v6, 242333; GFX6-NEXT: v_sub_i32_e32 v4, vcc, v4, v82334; GFX6-NEXT: v_add_i32_e32 v8, vcc, v4, v72335; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v42336; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc2337; GFX6-NEXT: v_add_i32_e32 v8, vcc, v4, v72338; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v42339; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc2340; GFX6-NEXT: v_sub_i32_e32 v8, vcc, 23, v42341; GFX6-NEXT: v_and_b32_e32 v4, 0xffffff, v42342; GFX6-NEXT: v_lshlrev_b32_e32 v0, v4, v02343; GFX6-NEXT: v_and_b32_e32 v4, 0xffffff, v82344; GFX6-NEXT: v_lshrrev_b32_e32 v2, v4, v22345; GFX6-NEXT: v_or_b32_e32 v0, v0, v22346; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v5, v62347; GFX6-NEXT: v_add_i32_e32 v4, vcc, v2, v72348; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v22349; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2350; GFX6-NEXT: v_add_i32_e32 v4, vcc, 0xffffffe8, v22351; GFX6-NEXT: v_cmp_le_u32_e32 vcc, 24, v22352; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2353; GFX6-NEXT: v_sub_i32_e32 v4, vcc, 23, v22354; GFX6-NEXT: v_and_b32_e32 v2, 0xffffff, v22355; GFX6-NEXT: v_lshlrev_b32_e32 v1, v2, v12356; GFX6-NEXT: v_bfe_u32 v2, v3, 1, 232357; GFX6-NEXT: v_and_b32_e32 v3, 0xffffff, v42358; GFX6-NEXT: v_lshrrev_b32_e32 v2, v3, v22359; GFX6-NEXT: v_or_b32_e32 v1, v1, v22360; GFX6-NEXT: s_setpc_b64 s[30:31]2361;2362; GFX8-LABEL: v_fshl_v2i24:2363; GFX8: ; %bb.0:2364; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2365; GFX8-NEXT: v_cvt_f32_ubyte0_e32 v6, 242366; GFX8-NEXT: v_rcp_iflag_f32_e32 v6, v62367; GFX8-NEXT: v_not_b32_e32 v7, 232368; GFX8-NEXT: v_and_b32_e32 v4, 0xffffff, v42369; GFX8-NEXT: v_and_b32_e32 v5, 0xffffff, v52370; GFX8-NEXT: v_mul_f32_e32 v6, 0x4f7ffffe, v62371; GFX8-NEXT: v_cvt_u32_f32_e32 v6, v62372; GFX8-NEXT: v_bfe_u32 v2, v2, 1, 232373; GFX8-NEXT: v_mul_lo_u32 v8, v6, v72374; GFX8-NEXT: v_mul_hi_u32 v8, v6, v82375; GFX8-NEXT: v_add_u32_e32 v6, vcc, v6, v82376; GFX8-NEXT: v_mul_hi_u32 v8, v4, v62377; GFX8-NEXT: v_mul_hi_u32 v6, v5, v62378; GFX8-NEXT: v_mul_lo_u32 v8, v8, 242379; GFX8-NEXT: v_mul_lo_u32 v6, v6, 242380; GFX8-NEXT: v_sub_u32_e32 v4, vcc, v4, v82381; GFX8-NEXT: v_add_u32_e32 v8, vcc, v4, v72382; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v42383; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc2384; GFX8-NEXT: v_add_u32_e32 v8, vcc, v4, v72385; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v42386; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v8, vcc2387; GFX8-NEXT: v_sub_u32_e32 v8, vcc, 23, v42388; GFX8-NEXT: v_and_b32_e32 v4, 0xffffff, v42389; GFX8-NEXT: v_lshlrev_b32_e32 v0, v4, v02390; GFX8-NEXT: v_and_b32_e32 v4, 0xffffff, v82391; GFX8-NEXT: v_lshrrev_b32_e32 v2, v4, v22392; GFX8-NEXT: v_or_b32_e32 v0, v0, v22393; GFX8-NEXT: v_sub_u32_e32 v2, vcc, v5, v62394; GFX8-NEXT: v_add_u32_e32 v4, vcc, v2, v72395; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v22396; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2397; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0xffffffe8, v22398; GFX8-NEXT: v_cmp_le_u32_e32 vcc, 24, v22399; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2400; GFX8-NEXT: v_sub_u32_e32 v4, vcc, 23, v22401; GFX8-NEXT: v_and_b32_e32 v2, 0xffffff, v22402; GFX8-NEXT: v_lshlrev_b32_e32 v1, v2, v12403; GFX8-NEXT: v_bfe_u32 v2, v3, 1, 232404; GFX8-NEXT: v_and_b32_e32 v3, 0xffffff, v42405; GFX8-NEXT: v_lshrrev_b32_e32 v2, v3, v22406; GFX8-NEXT: v_or_b32_e32 v1, v1, v22407; GFX8-NEXT: s_setpc_b64 s[30:31]2408;2409; GFX9-LABEL: v_fshl_v2i24:2410; GFX9: ; %bb.0:2411; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2412; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v6, 242413; GFX9-NEXT: v_rcp_iflag_f32_e32 v6, v62414; GFX9-NEXT: v_not_b32_e32 v7, 232415; GFX9-NEXT: v_and_b32_e32 v4, 0xffffff, v42416; GFX9-NEXT: v_and_b32_e32 v5, 0xffffff, v52417; GFX9-NEXT: v_mul_f32_e32 v6, 0x4f7ffffe, v62418; GFX9-NEXT: v_cvt_u32_f32_e32 v6, v62419; GFX9-NEXT: v_bfe_u32 v2, v2, 1, 232420; GFX9-NEXT: v_bfe_u32 v3, v3, 1, 232421; GFX9-NEXT: v_mul_lo_u32 v7, v6, v72422; GFX9-NEXT: v_mul_hi_u32 v7, v6, v72423; GFX9-NEXT: v_add_u32_e32 v6, v6, v72424; GFX9-NEXT: v_mul_hi_u32 v7, v4, v62425; GFX9-NEXT: v_mul_hi_u32 v6, v5, v62426; GFX9-NEXT: v_mul_lo_u32 v7, v7, 242427; GFX9-NEXT: v_mul_lo_u32 v6, v6, 242428; GFX9-NEXT: v_sub_u32_e32 v4, v4, v72429; GFX9-NEXT: v_sub_u32_e32 v5, v5, v62430; GFX9-NEXT: v_add_u32_e32 v6, 0xffffffe8, v42431; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v42432; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc2433; GFX9-NEXT: v_add_u32_e32 v6, 0xffffffe8, v42434; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v42435; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc2436; GFX9-NEXT: v_sub_u32_e32 v6, 23, v42437; GFX9-NEXT: v_and_b32_e32 v6, 0xffffff, v62438; GFX9-NEXT: v_add_u32_e32 v7, 0xffffffe8, v52439; GFX9-NEXT: v_and_b32_e32 v4, 0xffffff, v42440; GFX9-NEXT: v_lshrrev_b32_e32 v2, v6, v22441; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v52442; GFX9-NEXT: v_lshl_or_b32 v0, v0, v4, v22443; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v7, vcc2444; GFX9-NEXT: v_add_u32_e32 v4, 0xffffffe8, v22445; GFX9-NEXT: v_cmp_le_u32_e32 vcc, 24, v22446; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2447; GFX9-NEXT: v_sub_u32_e32 v4, 23, v22448; GFX9-NEXT: v_and_b32_e32 v4, 0xffffff, v42449; GFX9-NEXT: v_and_b32_e32 v2, 0xffffff, v22450; GFX9-NEXT: v_lshrrev_b32_e32 v3, v4, v32451; GFX9-NEXT: v_lshl_or_b32 v1, v1, v2, v32452; GFX9-NEXT: s_setpc_b64 s[30:31]2453;2454; GFX10-LABEL: v_fshl_v2i24:2455; GFX10: ; %bb.0:2456; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2457; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v6, 242458; GFX10-NEXT: v_and_b32_e32 v4, 0xffffff, v42459; GFX10-NEXT: v_and_b32_e32 v5, 0xffffff, v52460; GFX10-NEXT: v_bfe_u32 v2, v2, 1, 232461; GFX10-NEXT: v_bfe_u32 v3, v3, 1, 232462; GFX10-NEXT: v_rcp_iflag_f32_e32 v6, v62463; GFX10-NEXT: v_mul_f32_e32 v6, 0x4f7ffffe, v62464; GFX10-NEXT: v_cvt_u32_f32_e32 v6, v62465; GFX10-NEXT: v_mul_lo_u32 v7, 0xffffffe8, v62466; GFX10-NEXT: v_mul_hi_u32 v7, v6, v72467; GFX10-NEXT: v_add_nc_u32_e32 v6, v6, v72468; GFX10-NEXT: v_mul_hi_u32 v7, v4, v62469; GFX10-NEXT: v_mul_hi_u32 v6, v5, v62470; GFX10-NEXT: v_mul_lo_u32 v7, v7, 242471; GFX10-NEXT: v_mul_lo_u32 v6, v6, 242472; GFX10-NEXT: v_sub_nc_u32_e32 v4, v4, v72473; GFX10-NEXT: v_sub_nc_u32_e32 v5, v5, v62474; GFX10-NEXT: v_add_nc_u32_e32 v6, 0xffffffe8, v42475; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v42476; GFX10-NEXT: v_add_nc_u32_e32 v7, 0xffffffe8, v52477; GFX10-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo2478; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v52479; GFX10-NEXT: v_add_nc_u32_e32 v6, 0xffffffe8, v42480; GFX10-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo2481; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v42482; GFX10-NEXT: v_add_nc_u32_e32 v7, 0xffffffe8, v52483; GFX10-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo2484; GFX10-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v52485; GFX10-NEXT: v_sub_nc_u32_e32 v6, 23, v42486; GFX10-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo2487; GFX10-NEXT: v_and_b32_e32 v4, 0xffffff, v42488; GFX10-NEXT: v_and_b32_e32 v6, 0xffffff, v62489; GFX10-NEXT: v_sub_nc_u32_e32 v7, 23, v52490; GFX10-NEXT: v_and_b32_e32 v5, 0xffffff, v52491; GFX10-NEXT: v_lshrrev_b32_e32 v2, v6, v22492; GFX10-NEXT: v_and_b32_e32 v7, 0xffffff, v72493; GFX10-NEXT: v_lshl_or_b32 v0, v0, v4, v22494; GFX10-NEXT: v_lshrrev_b32_e32 v3, v7, v32495; GFX10-NEXT: v_lshl_or_b32 v1, v1, v5, v32496; GFX10-NEXT: s_setpc_b64 s[30:31]2497;2498; GFX11-LABEL: v_fshl_v2i24:2499; GFX11: ; %bb.0:2500; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2501; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v6, 242502; GFX11-NEXT: v_and_b32_e32 v4, 0xffffff, v42503; GFX11-NEXT: v_bfe_u32 v2, v2, 1, 232504; GFX11-NEXT: v_bfe_u32 v3, v3, 1, 232505; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)2506; GFX11-NEXT: v_rcp_iflag_f32_e32 v6, v62507; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2508; GFX11-NEXT: v_mul_f32_e32 v6, 0x4f7ffffe, v62509; GFX11-NEXT: v_cvt_u32_f32_e32 v6, v62510; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2511; GFX11-NEXT: v_mul_lo_u32 v7, 0xffffffe8, v62512; GFX11-NEXT: v_mul_hi_u32 v7, v6, v72513; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2514; GFX11-NEXT: v_add_nc_u32_e32 v6, v6, v72515; GFX11-NEXT: v_mul_hi_u32 v7, v4, v62516; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2517; GFX11-NEXT: v_mul_lo_u32 v7, v7, 242518; GFX11-NEXT: v_sub_nc_u32_e32 v4, v4, v72519; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2520; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v42521; GFX11-NEXT: v_and_b32_e32 v5, 0xffffff, v52522; GFX11-NEXT: v_mul_hi_u32 v6, v5, v62523; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2524; GFX11-NEXT: v_mul_lo_u32 v6, v6, 242525; GFX11-NEXT: v_sub_nc_u32_e32 v5, v5, v62526; GFX11-NEXT: v_add_nc_u32_e32 v6, 0xffffffe8, v42527; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)2528; GFX11-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc_lo2529; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v52530; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)2531; GFX11-NEXT: v_add_nc_u32_e32 v6, 0xffffffe8, v42532; GFX11-NEXT: v_add_nc_u32_e32 v7, 0xffffffe8, v52533; GFX11-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo2534; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v42535; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2536; GFX11-NEXT: v_dual_cndmask_b32 v4, v4, v6 :: v_dual_add_nc_u32 v7, 0xffffffe8, v52537; GFX11-NEXT: v_cmp_le_u32_e32 vcc_lo, 24, v52538; GFX11-NEXT: v_sub_nc_u32_e32 v6, 23, v42539; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2540; GFX11-NEXT: v_dual_cndmask_b32 v5, v5, v7 :: v_dual_and_b32 v4, 0xffffff, v42541; GFX11-NEXT: v_and_b32_e32 v6, 0xffffff, v62542; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)2543; GFX11-NEXT: v_sub_nc_u32_e32 v7, 23, v52544; GFX11-NEXT: v_and_b32_e32 v5, 0xffffff, v52545; GFX11-NEXT: v_lshrrev_b32_e32 v2, v6, v22546; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2547; GFX11-NEXT: v_and_b32_e32 v7, 0xffffff, v72548; GFX11-NEXT: v_lshl_or_b32 v0, v0, v4, v22549; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2550; GFX11-NEXT: v_lshrrev_b32_e32 v3, v7, v32551; GFX11-NEXT: v_lshl_or_b32 v1, v1, v5, v32552; GFX11-NEXT: s_setpc_b64 s[30:31]2553 %result = call <2 x i24> @llvm.fshl.v2i24(<2 x i24> %lhs, <2 x i24> %rhs, <2 x i24> %amt)2554 ret <2 x i24> %result2555}2556 2557define amdgpu_ps i32 @s_fshl_i32(i32 inreg %lhs, i32 inreg %rhs, i32 inreg %amt) {2558; GFX6-LABEL: s_fshl_i32:2559; GFX6: ; %bb.0:2560; GFX6-NEXT: v_mov_b32_e32 v0, s12561; GFX6-NEXT: s_not_b32 s1, s22562; GFX6-NEXT: v_alignbit_b32 v0, s0, v0, 12563; GFX6-NEXT: s_lshr_b32 s0, s0, 12564; GFX6-NEXT: v_mov_b32_e32 v1, s12565; GFX6-NEXT: v_alignbit_b32 v0, s0, v0, v12566; GFX6-NEXT: v_readfirstlane_b32 s0, v02567; GFX6-NEXT: ; return to shader part epilog2568;2569; GFX8-LABEL: s_fshl_i32:2570; GFX8: ; %bb.0:2571; GFX8-NEXT: v_mov_b32_e32 v0, s12572; GFX8-NEXT: s_not_b32 s1, s22573; GFX8-NEXT: v_alignbit_b32 v0, s0, v0, 12574; GFX8-NEXT: s_lshr_b32 s0, s0, 12575; GFX8-NEXT: v_mov_b32_e32 v1, s12576; GFX8-NEXT: v_alignbit_b32 v0, s0, v0, v12577; GFX8-NEXT: v_readfirstlane_b32 s0, v02578; GFX8-NEXT: ; return to shader part epilog2579;2580; GFX9-LABEL: s_fshl_i32:2581; GFX9: ; %bb.0:2582; GFX9-NEXT: v_mov_b32_e32 v0, s12583; GFX9-NEXT: s_not_b32 s1, s22584; GFX9-NEXT: v_alignbit_b32 v0, s0, v0, 12585; GFX9-NEXT: s_lshr_b32 s0, s0, 12586; GFX9-NEXT: v_mov_b32_e32 v1, s12587; GFX9-NEXT: v_alignbit_b32 v0, s0, v0, v12588; GFX9-NEXT: v_readfirstlane_b32 s0, v02589; GFX9-NEXT: ; return to shader part epilog2590;2591; GFX10-LABEL: s_fshl_i32:2592; GFX10: ; %bb.0:2593; GFX10-NEXT: v_alignbit_b32 v0, s0, s1, 12594; GFX10-NEXT: s_lshr_b32 s0, s0, 12595; GFX10-NEXT: s_not_b32 s1, s22596; GFX10-NEXT: v_alignbit_b32 v0, s0, v0, s12597; GFX10-NEXT: v_readfirstlane_b32 s0, v02598; GFX10-NEXT: ; return to shader part epilog2599;2600; GFX11-LABEL: s_fshl_i32:2601; GFX11: ; %bb.0:2602; GFX11-NEXT: v_alignbit_b32 v0, s0, s1, 12603; GFX11-NEXT: s_lshr_b32 s0, s0, 12604; GFX11-NEXT: s_not_b32 s1, s22605; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)2606; GFX11-NEXT: v_alignbit_b32 v0, s0, v0, s12607; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2608; GFX11-NEXT: v_readfirstlane_b32 s0, v02609; GFX11-NEXT: ; return to shader part epilog2610 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 %amt)2611 ret i32 %result2612}2613 2614define amdgpu_ps i32 @s_fshl_i32_5(i32 inreg %lhs, i32 inreg %rhs) {2615; GFX6-LABEL: s_fshl_i32_5:2616; GFX6: ; %bb.0:2617; GFX6-NEXT: v_mov_b32_e32 v0, s12618; GFX6-NEXT: v_alignbit_b32 v0, s0, v0, 272619; GFX6-NEXT: v_readfirstlane_b32 s0, v02620; GFX6-NEXT: ; return to shader part epilog2621;2622; GFX8-LABEL: s_fshl_i32_5:2623; GFX8: ; %bb.0:2624; GFX8-NEXT: v_mov_b32_e32 v0, s12625; GFX8-NEXT: v_alignbit_b32 v0, s0, v0, 272626; GFX8-NEXT: v_readfirstlane_b32 s0, v02627; GFX8-NEXT: ; return to shader part epilog2628;2629; GFX9-LABEL: s_fshl_i32_5:2630; GFX9: ; %bb.0:2631; GFX9-NEXT: v_mov_b32_e32 v0, s12632; GFX9-NEXT: v_alignbit_b32 v0, s0, v0, 272633; GFX9-NEXT: v_readfirstlane_b32 s0, v02634; GFX9-NEXT: ; return to shader part epilog2635;2636; GFX10-LABEL: s_fshl_i32_5:2637; GFX10: ; %bb.0:2638; GFX10-NEXT: v_alignbit_b32 v0, s0, s1, 272639; GFX10-NEXT: v_readfirstlane_b32 s0, v02640; GFX10-NEXT: ; return to shader part epilog2641;2642; GFX11-LABEL: s_fshl_i32_5:2643; GFX11: ; %bb.0:2644; GFX11-NEXT: v_alignbit_b32 v0, s0, s1, 272645; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2646; GFX11-NEXT: v_readfirstlane_b32 s0, v02647; GFX11-NEXT: ; return to shader part epilog2648 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 5)2649 ret i32 %result2650}2651 2652define amdgpu_ps i32 @s_fshl_i32_8(i32 inreg %lhs, i32 inreg %rhs) {2653; GFX6-LABEL: s_fshl_i32_8:2654; GFX6: ; %bb.0:2655; GFX6-NEXT: v_mov_b32_e32 v0, s12656; GFX6-NEXT: v_alignbit_b32 v0, s0, v0, 242657; GFX6-NEXT: v_readfirstlane_b32 s0, v02658; GFX6-NEXT: ; return to shader part epilog2659;2660; GFX8-LABEL: s_fshl_i32_8:2661; GFX8: ; %bb.0:2662; GFX8-NEXT: v_mov_b32_e32 v0, s12663; GFX8-NEXT: v_alignbit_b32 v0, s0, v0, 242664; GFX8-NEXT: v_readfirstlane_b32 s0, v02665; GFX8-NEXT: ; return to shader part epilog2666;2667; GFX9-LABEL: s_fshl_i32_8:2668; GFX9: ; %bb.0:2669; GFX9-NEXT: v_mov_b32_e32 v0, s12670; GFX9-NEXT: v_alignbit_b32 v0, s0, v0, 242671; GFX9-NEXT: v_readfirstlane_b32 s0, v02672; GFX9-NEXT: ; return to shader part epilog2673;2674; GFX10-LABEL: s_fshl_i32_8:2675; GFX10: ; %bb.0:2676; GFX10-NEXT: v_alignbit_b32 v0, s0, s1, 242677; GFX10-NEXT: v_readfirstlane_b32 s0, v02678; GFX10-NEXT: ; return to shader part epilog2679;2680; GFX11-LABEL: s_fshl_i32_8:2681; GFX11: ; %bb.0:2682; GFX11-NEXT: v_alignbit_b32 v0, s0, s1, 242683; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2684; GFX11-NEXT: v_readfirstlane_b32 s0, v02685; GFX11-NEXT: ; return to shader part epilog2686 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 8)2687 ret i32 %result2688}2689 2690define i32 @v_fshl_i32(i32 %lhs, i32 %rhs, i32 %amt) {2691; GCN-LABEL: v_fshl_i32:2692; GCN: ; %bb.0:2693; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2694; GCN-NEXT: v_alignbit_b32 v1, v0, v1, 12695; GCN-NEXT: v_lshrrev_b32_e32 v0, 1, v02696; GCN-NEXT: v_not_b32_e32 v2, v22697; GCN-NEXT: v_alignbit_b32 v0, v0, v1, v22698; GCN-NEXT: s_setpc_b64 s[30:31]2699;2700; GFX11-LABEL: v_fshl_i32:2701; GFX11: ; %bb.0:2702; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2703; GFX11-NEXT: v_alignbit_b32 v1, v0, v1, 12704; GFX11-NEXT: v_lshrrev_b32_e32 v0, 1, v02705; GFX11-NEXT: v_not_b32_e32 v2, v22706; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2707; GFX11-NEXT: v_alignbit_b32 v0, v0, v1, v22708; GFX11-NEXT: s_setpc_b64 s[30:31]2709 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 %amt)2710 ret i32 %result2711}2712 2713define i32 @v_fshl_i32_5(i32 %lhs, i32 %rhs) {2714; GCN-LABEL: v_fshl_i32_5:2715; GCN: ; %bb.0:2716; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2717; GCN-NEXT: v_alignbit_b32 v0, v0, v1, 272718; GCN-NEXT: s_setpc_b64 s[30:31]2719;2720; GFX11-LABEL: v_fshl_i32_5:2721; GFX11: ; %bb.0:2722; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2723; GFX11-NEXT: v_alignbit_b32 v0, v0, v1, 272724; GFX11-NEXT: s_setpc_b64 s[30:31]2725 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 5)2726 ret i32 %result2727}2728 2729define i32 @v_fshl_i32_8(i32 %lhs, i32 %rhs) {2730; GCN-LABEL: v_fshl_i32_8:2731; GCN: ; %bb.0:2732; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2733; GCN-NEXT: v_alignbit_b32 v0, v0, v1, 242734; GCN-NEXT: s_setpc_b64 s[30:31]2735;2736; GFX11-LABEL: v_fshl_i32_8:2737; GFX11: ; %bb.0:2738; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2739; GFX11-NEXT: v_alignbit_b32 v0, v0, v1, 242740; GFX11-NEXT: s_setpc_b64 s[30:31]2741 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 8)2742 ret i32 %result2743}2744 2745define amdgpu_ps float @v_fshl_i32_ssv(i32 inreg %lhs, i32 inreg %rhs, i32 %amt) {2746; GFX6-LABEL: v_fshl_i32_ssv:2747; GFX6: ; %bb.0:2748; GFX6-NEXT: v_mov_b32_e32 v1, s12749; GFX6-NEXT: v_alignbit_b32 v1, s0, v1, 12750; GFX6-NEXT: s_lshr_b32 s0, s0, 12751; GFX6-NEXT: v_not_b32_e32 v0, v02752; GFX6-NEXT: v_alignbit_b32 v0, s0, v1, v02753; GFX6-NEXT: ; return to shader part epilog2754;2755; GFX8-LABEL: v_fshl_i32_ssv:2756; GFX8: ; %bb.0:2757; GFX8-NEXT: v_mov_b32_e32 v1, s12758; GFX8-NEXT: v_alignbit_b32 v1, s0, v1, 12759; GFX8-NEXT: s_lshr_b32 s0, s0, 12760; GFX8-NEXT: v_not_b32_e32 v0, v02761; GFX8-NEXT: v_alignbit_b32 v0, s0, v1, v02762; GFX8-NEXT: ; return to shader part epilog2763;2764; GFX9-LABEL: v_fshl_i32_ssv:2765; GFX9: ; %bb.0:2766; GFX9-NEXT: v_mov_b32_e32 v1, s12767; GFX9-NEXT: v_alignbit_b32 v1, s0, v1, 12768; GFX9-NEXT: s_lshr_b32 s0, s0, 12769; GFX9-NEXT: v_not_b32_e32 v0, v02770; GFX9-NEXT: v_alignbit_b32 v0, s0, v1, v02771; GFX9-NEXT: ; return to shader part epilog2772;2773; GFX10-LABEL: v_fshl_i32_ssv:2774; GFX10: ; %bb.0:2775; GFX10-NEXT: v_alignbit_b32 v1, s0, s1, 12776; GFX10-NEXT: v_not_b32_e32 v0, v02777; GFX10-NEXT: s_lshr_b32 s0, s0, 12778; GFX10-NEXT: v_alignbit_b32 v0, s0, v1, v02779; GFX10-NEXT: ; return to shader part epilog2780;2781; GFX11-LABEL: v_fshl_i32_ssv:2782; GFX11: ; %bb.0:2783; GFX11-NEXT: v_alignbit_b32 v1, s0, s1, 12784; GFX11-NEXT: v_not_b32_e32 v0, v02785; GFX11-NEXT: s_lshr_b32 s0, s0, 12786; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)2787; GFX11-NEXT: v_alignbit_b32 v0, s0, v1, v02788; GFX11-NEXT: ; return to shader part epilog2789 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 %amt)2790 %cast.result = bitcast i32 %result to float2791 ret float %cast.result2792}2793 2794define amdgpu_ps float @v_fshl_i32_svs(i32 inreg %lhs, i32 %rhs, i32 inreg %amt) {2795; GFX6-LABEL: v_fshl_i32_svs:2796; GFX6: ; %bb.0:2797; GFX6-NEXT: s_not_b32 s1, s12798; GFX6-NEXT: v_alignbit_b32 v0, s0, v0, 12799; GFX6-NEXT: s_lshr_b32 s0, s0, 12800; GFX6-NEXT: v_mov_b32_e32 v1, s12801; GFX6-NEXT: v_alignbit_b32 v0, s0, v0, v12802; GFX6-NEXT: ; return to shader part epilog2803;2804; GFX8-LABEL: v_fshl_i32_svs:2805; GFX8: ; %bb.0:2806; GFX8-NEXT: s_not_b32 s1, s12807; GFX8-NEXT: v_alignbit_b32 v0, s0, v0, 12808; GFX8-NEXT: s_lshr_b32 s0, s0, 12809; GFX8-NEXT: v_mov_b32_e32 v1, s12810; GFX8-NEXT: v_alignbit_b32 v0, s0, v0, v12811; GFX8-NEXT: ; return to shader part epilog2812;2813; GFX9-LABEL: v_fshl_i32_svs:2814; GFX9: ; %bb.0:2815; GFX9-NEXT: s_not_b32 s1, s12816; GFX9-NEXT: v_alignbit_b32 v0, s0, v0, 12817; GFX9-NEXT: s_lshr_b32 s0, s0, 12818; GFX9-NEXT: v_mov_b32_e32 v1, s12819; GFX9-NEXT: v_alignbit_b32 v0, s0, v0, v12820; GFX9-NEXT: ; return to shader part epilog2821;2822; GFX10-LABEL: v_fshl_i32_svs:2823; GFX10: ; %bb.0:2824; GFX10-NEXT: v_alignbit_b32 v0, s0, v0, 12825; GFX10-NEXT: s_lshr_b32 s0, s0, 12826; GFX10-NEXT: s_not_b32 s1, s12827; GFX10-NEXT: v_alignbit_b32 v0, s0, v0, s12828; GFX10-NEXT: ; return to shader part epilog2829;2830; GFX11-LABEL: v_fshl_i32_svs:2831; GFX11: ; %bb.0:2832; GFX11-NEXT: v_alignbit_b32 v0, s0, v0, 12833; GFX11-NEXT: s_lshr_b32 s0, s0, 12834; GFX11-NEXT: s_not_b32 s1, s12835; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)2836; GFX11-NEXT: v_alignbit_b32 v0, s0, v0, s12837; GFX11-NEXT: ; return to shader part epilog2838 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 %amt)2839 %cast.result = bitcast i32 %result to float2840 ret float %cast.result2841}2842 2843define amdgpu_ps float @v_fshl_i32_vss(i32 inreg %lhs, i32 inreg %rhs, i32 inreg %amt) {2844; GFX6-LABEL: v_fshl_i32_vss:2845; GFX6: ; %bb.0:2846; GFX6-NEXT: v_mov_b32_e32 v0, s12847; GFX6-NEXT: s_not_b32 s1, s22848; GFX6-NEXT: v_alignbit_b32 v0, s0, v0, 12849; GFX6-NEXT: s_lshr_b32 s0, s0, 12850; GFX6-NEXT: v_mov_b32_e32 v1, s12851; GFX6-NEXT: v_alignbit_b32 v0, s0, v0, v12852; GFX6-NEXT: ; return to shader part epilog2853;2854; GFX8-LABEL: v_fshl_i32_vss:2855; GFX8: ; %bb.0:2856; GFX8-NEXT: v_mov_b32_e32 v0, s12857; GFX8-NEXT: s_not_b32 s1, s22858; GFX8-NEXT: v_alignbit_b32 v0, s0, v0, 12859; GFX8-NEXT: s_lshr_b32 s0, s0, 12860; GFX8-NEXT: v_mov_b32_e32 v1, s12861; GFX8-NEXT: v_alignbit_b32 v0, s0, v0, v12862; GFX8-NEXT: ; return to shader part epilog2863;2864; GFX9-LABEL: v_fshl_i32_vss:2865; GFX9: ; %bb.0:2866; GFX9-NEXT: v_mov_b32_e32 v0, s12867; GFX9-NEXT: s_not_b32 s1, s22868; GFX9-NEXT: v_alignbit_b32 v0, s0, v0, 12869; GFX9-NEXT: s_lshr_b32 s0, s0, 12870; GFX9-NEXT: v_mov_b32_e32 v1, s12871; GFX9-NEXT: v_alignbit_b32 v0, s0, v0, v12872; GFX9-NEXT: ; return to shader part epilog2873;2874; GFX10-LABEL: v_fshl_i32_vss:2875; GFX10: ; %bb.0:2876; GFX10-NEXT: v_alignbit_b32 v0, s0, s1, 12877; GFX10-NEXT: s_lshr_b32 s0, s0, 12878; GFX10-NEXT: s_not_b32 s1, s22879; GFX10-NEXT: v_alignbit_b32 v0, s0, v0, s12880; GFX10-NEXT: ; return to shader part epilog2881;2882; GFX11-LABEL: v_fshl_i32_vss:2883; GFX11: ; %bb.0:2884; GFX11-NEXT: v_alignbit_b32 v0, s0, s1, 12885; GFX11-NEXT: s_lshr_b32 s0, s0, 12886; GFX11-NEXT: s_not_b32 s1, s22887; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)2888; GFX11-NEXT: v_alignbit_b32 v0, s0, v0, s12889; GFX11-NEXT: ; return to shader part epilog2890 %result = call i32 @llvm.fshl.i32(i32 %lhs, i32 %rhs, i32 %amt)2891 %cast.result = bitcast i32 %result to float2892 ret float %cast.result2893}2894 2895define <2 x i32> @v_fshl_v2i32(<2 x i32> %lhs, <2 x i32> %rhs, <2 x i32> %amt) {2896; GFX6-LABEL: v_fshl_v2i32:2897; GFX6: ; %bb.0:2898; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2899; GFX6-NEXT: v_alignbit_b32 v2, v0, v2, 12900; GFX6-NEXT: v_lshrrev_b32_e32 v0, 1, v02901; GFX6-NEXT: v_not_b32_e32 v4, v42902; GFX6-NEXT: v_alignbit_b32 v0, v0, v2, v42903; GFX6-NEXT: v_alignbit_b32 v2, v1, v3, 12904; GFX6-NEXT: v_lshrrev_b32_e32 v1, 1, v12905; GFX6-NEXT: v_not_b32_e32 v3, v52906; GFX6-NEXT: v_alignbit_b32 v1, v1, v2, v32907; GFX6-NEXT: s_setpc_b64 s[30:31]2908;2909; GFX8-LABEL: v_fshl_v2i32:2910; GFX8: ; %bb.0:2911; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2912; GFX8-NEXT: v_alignbit_b32 v2, v0, v2, 12913; GFX8-NEXT: v_lshrrev_b32_e32 v0, 1, v02914; GFX8-NEXT: v_not_b32_e32 v4, v42915; GFX8-NEXT: v_alignbit_b32 v0, v0, v2, v42916; GFX8-NEXT: v_alignbit_b32 v2, v1, v3, 12917; GFX8-NEXT: v_lshrrev_b32_e32 v1, 1, v12918; GFX8-NEXT: v_not_b32_e32 v3, v52919; GFX8-NEXT: v_alignbit_b32 v1, v1, v2, v32920; GFX8-NEXT: s_setpc_b64 s[30:31]2921;2922; GFX9-LABEL: v_fshl_v2i32:2923; GFX9: ; %bb.0:2924; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2925; GFX9-NEXT: v_alignbit_b32 v2, v0, v2, 12926; GFX9-NEXT: v_lshrrev_b32_e32 v0, 1, v02927; GFX9-NEXT: v_not_b32_e32 v4, v42928; GFX9-NEXT: v_alignbit_b32 v0, v0, v2, v42929; GFX9-NEXT: v_alignbit_b32 v2, v1, v3, 12930; GFX9-NEXT: v_lshrrev_b32_e32 v1, 1, v12931; GFX9-NEXT: v_not_b32_e32 v3, v52932; GFX9-NEXT: v_alignbit_b32 v1, v1, v2, v32933; GFX9-NEXT: s_setpc_b64 s[30:31]2934;2935; GFX10-LABEL: v_fshl_v2i32:2936; GFX10: ; %bb.0:2937; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2938; GFX10-NEXT: v_alignbit_b32 v2, v0, v2, 12939; GFX10-NEXT: v_lshrrev_b32_e32 v0, 1, v02940; GFX10-NEXT: v_not_b32_e32 v4, v42941; GFX10-NEXT: v_alignbit_b32 v3, v1, v3, 12942; GFX10-NEXT: v_lshrrev_b32_e32 v1, 1, v12943; GFX10-NEXT: v_not_b32_e32 v5, v52944; GFX10-NEXT: v_alignbit_b32 v0, v0, v2, v42945; GFX10-NEXT: v_alignbit_b32 v1, v1, v3, v52946; GFX10-NEXT: s_setpc_b64 s[30:31]2947;2948; GFX11-LABEL: v_fshl_v2i32:2949; GFX11: ; %bb.0:2950; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2951; GFX11-NEXT: v_alignbit_b32 v2, v0, v2, 12952; GFX11-NEXT: v_lshrrev_b32_e32 v0, 1, v02953; GFX11-NEXT: v_not_b32_e32 v4, v42954; GFX11-NEXT: v_alignbit_b32 v3, v1, v3, 12955; GFX11-NEXT: v_lshrrev_b32_e32 v1, 1, v12956; GFX11-NEXT: v_not_b32_e32 v5, v52957; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)2958; GFX11-NEXT: v_alignbit_b32 v0, v0, v2, v42959; GFX11-NEXT: v_alignbit_b32 v1, v1, v3, v52960; GFX11-NEXT: s_setpc_b64 s[30:31]2961 %result = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %lhs, <2 x i32> %rhs, <2 x i32> %amt)2962 ret <2 x i32> %result2963}2964 2965define <3 x i32> @v_fshl_v3i32(<3 x i32> %lhs, <3 x i32> %rhs, <3 x i32> %amt) {2966; GFX6-LABEL: v_fshl_v3i32:2967; GFX6: ; %bb.0:2968; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2969; GFX6-NEXT: v_alignbit_b32 v3, v0, v3, 12970; GFX6-NEXT: v_lshrrev_b32_e32 v0, 1, v02971; GFX6-NEXT: v_not_b32_e32 v6, v62972; GFX6-NEXT: v_alignbit_b32 v0, v0, v3, v62973; GFX6-NEXT: v_alignbit_b32 v3, v1, v4, 12974; GFX6-NEXT: v_lshrrev_b32_e32 v1, 1, v12975; GFX6-NEXT: v_not_b32_e32 v4, v72976; GFX6-NEXT: v_alignbit_b32 v1, v1, v3, v42977; GFX6-NEXT: v_alignbit_b32 v3, v2, v5, 12978; GFX6-NEXT: v_lshrrev_b32_e32 v2, 1, v22979; GFX6-NEXT: v_not_b32_e32 v4, v82980; GFX6-NEXT: v_alignbit_b32 v2, v2, v3, v42981; GFX6-NEXT: s_setpc_b64 s[30:31]2982;2983; GFX8-LABEL: v_fshl_v3i32:2984; GFX8: ; %bb.0:2985; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2986; GFX8-NEXT: v_alignbit_b32 v3, v0, v3, 12987; GFX8-NEXT: v_lshrrev_b32_e32 v0, 1, v02988; GFX8-NEXT: v_not_b32_e32 v6, v62989; GFX8-NEXT: v_alignbit_b32 v0, v0, v3, v62990; GFX8-NEXT: v_alignbit_b32 v3, v1, v4, 12991; GFX8-NEXT: v_lshrrev_b32_e32 v1, 1, v12992; GFX8-NEXT: v_not_b32_e32 v4, v72993; GFX8-NEXT: v_alignbit_b32 v1, v1, v3, v42994; GFX8-NEXT: v_alignbit_b32 v3, v2, v5, 12995; GFX8-NEXT: v_lshrrev_b32_e32 v2, 1, v22996; GFX8-NEXT: v_not_b32_e32 v4, v82997; GFX8-NEXT: v_alignbit_b32 v2, v2, v3, v42998; GFX8-NEXT: s_setpc_b64 s[30:31]2999;3000; GFX9-LABEL: v_fshl_v3i32:3001; GFX9: ; %bb.0:3002; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3003; GFX9-NEXT: v_alignbit_b32 v3, v0, v3, 13004; GFX9-NEXT: v_lshrrev_b32_e32 v0, 1, v03005; GFX9-NEXT: v_not_b32_e32 v6, v63006; GFX9-NEXT: v_alignbit_b32 v0, v0, v3, v63007; GFX9-NEXT: v_alignbit_b32 v3, v1, v4, 13008; GFX9-NEXT: v_lshrrev_b32_e32 v1, 1, v13009; GFX9-NEXT: v_not_b32_e32 v4, v73010; GFX9-NEXT: v_alignbit_b32 v1, v1, v3, v43011; GFX9-NEXT: v_alignbit_b32 v3, v2, v5, 13012; GFX9-NEXT: v_lshrrev_b32_e32 v2, 1, v23013; GFX9-NEXT: v_not_b32_e32 v4, v83014; GFX9-NEXT: v_alignbit_b32 v2, v2, v3, v43015; GFX9-NEXT: s_setpc_b64 s[30:31]3016;3017; GFX10-LABEL: v_fshl_v3i32:3018; GFX10: ; %bb.0:3019; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3020; GFX10-NEXT: v_alignbit_b32 v3, v0, v3, 13021; GFX10-NEXT: v_lshrrev_b32_e32 v0, 1, v03022; GFX10-NEXT: v_not_b32_e32 v6, v63023; GFX10-NEXT: v_alignbit_b32 v4, v1, v4, 13024; GFX10-NEXT: v_lshrrev_b32_e32 v1, 1, v13025; GFX10-NEXT: v_not_b32_e32 v7, v73026; GFX10-NEXT: v_alignbit_b32 v5, v2, v5, 13027; GFX10-NEXT: v_lshrrev_b32_e32 v2, 1, v23028; GFX10-NEXT: v_not_b32_e32 v8, v83029; GFX10-NEXT: v_alignbit_b32 v0, v0, v3, v63030; GFX10-NEXT: v_alignbit_b32 v1, v1, v4, v73031; GFX10-NEXT: v_alignbit_b32 v2, v2, v5, v83032; GFX10-NEXT: s_setpc_b64 s[30:31]3033;3034; GFX11-LABEL: v_fshl_v3i32:3035; GFX11: ; %bb.0:3036; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3037; GFX11-NEXT: v_alignbit_b32 v3, v0, v3, 13038; GFX11-NEXT: v_lshrrev_b32_e32 v0, 1, v03039; GFX11-NEXT: v_not_b32_e32 v6, v63040; GFX11-NEXT: v_alignbit_b32 v4, v1, v4, 13041; GFX11-NEXT: v_lshrrev_b32_e32 v1, 1, v13042; GFX11-NEXT: v_not_b32_e32 v7, v73043; GFX11-NEXT: v_alignbit_b32 v5, v2, v5, 13044; GFX11-NEXT: v_lshrrev_b32_e32 v2, 1, v23045; GFX11-NEXT: v_not_b32_e32 v8, v83046; GFX11-NEXT: v_alignbit_b32 v0, v0, v3, v63047; GFX11-NEXT: v_alignbit_b32 v1, v1, v4, v73048; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)3049; GFX11-NEXT: v_alignbit_b32 v2, v2, v5, v83050; GFX11-NEXT: s_setpc_b64 s[30:31]3051 %result = call <3 x i32> @llvm.fshl.v3i32(<3 x i32> %lhs, <3 x i32> %rhs, <3 x i32> %amt)3052 ret <3 x i32> %result3053}3054 3055define <4 x i32> @v_fshl_v4i32(<4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> %amt) {3056; GFX6-LABEL: v_fshl_v4i32:3057; GFX6: ; %bb.0:3058; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3059; GFX6-NEXT: v_alignbit_b32 v4, v0, v4, 13060; GFX6-NEXT: v_lshrrev_b32_e32 v0, 1, v03061; GFX6-NEXT: v_not_b32_e32 v8, v83062; GFX6-NEXT: v_alignbit_b32 v0, v0, v4, v83063; GFX6-NEXT: v_alignbit_b32 v4, v1, v5, 13064; GFX6-NEXT: v_lshrrev_b32_e32 v1, 1, v13065; GFX6-NEXT: v_not_b32_e32 v5, v93066; GFX6-NEXT: v_alignbit_b32 v1, v1, v4, v53067; GFX6-NEXT: v_alignbit_b32 v4, v2, v6, 13068; GFX6-NEXT: v_lshrrev_b32_e32 v2, 1, v23069; GFX6-NEXT: v_not_b32_e32 v5, v103070; GFX6-NEXT: v_alignbit_b32 v2, v2, v4, v53071; GFX6-NEXT: v_alignbit_b32 v4, v3, v7, 13072; GFX6-NEXT: v_lshrrev_b32_e32 v3, 1, v33073; GFX6-NEXT: v_not_b32_e32 v5, v113074; GFX6-NEXT: v_alignbit_b32 v3, v3, v4, v53075; GFX6-NEXT: s_setpc_b64 s[30:31]3076;3077; GFX8-LABEL: v_fshl_v4i32:3078; GFX8: ; %bb.0:3079; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3080; GFX8-NEXT: v_alignbit_b32 v4, v0, v4, 13081; GFX8-NEXT: v_lshrrev_b32_e32 v0, 1, v03082; GFX8-NEXT: v_not_b32_e32 v8, v83083; GFX8-NEXT: v_alignbit_b32 v0, v0, v4, v83084; GFX8-NEXT: v_alignbit_b32 v4, v1, v5, 13085; GFX8-NEXT: v_lshrrev_b32_e32 v1, 1, v13086; GFX8-NEXT: v_not_b32_e32 v5, v93087; GFX8-NEXT: v_alignbit_b32 v1, v1, v4, v53088; GFX8-NEXT: v_alignbit_b32 v4, v2, v6, 13089; GFX8-NEXT: v_lshrrev_b32_e32 v2, 1, v23090; GFX8-NEXT: v_not_b32_e32 v5, v103091; GFX8-NEXT: v_alignbit_b32 v2, v2, v4, v53092; GFX8-NEXT: v_alignbit_b32 v4, v3, v7, 13093; GFX8-NEXT: v_lshrrev_b32_e32 v3, 1, v33094; GFX8-NEXT: v_not_b32_e32 v5, v113095; GFX8-NEXT: v_alignbit_b32 v3, v3, v4, v53096; GFX8-NEXT: s_setpc_b64 s[30:31]3097;3098; GFX9-LABEL: v_fshl_v4i32:3099; GFX9: ; %bb.0:3100; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3101; GFX9-NEXT: v_alignbit_b32 v4, v0, v4, 13102; GFX9-NEXT: v_lshrrev_b32_e32 v0, 1, v03103; GFX9-NEXT: v_not_b32_e32 v8, v83104; GFX9-NEXT: v_alignbit_b32 v0, v0, v4, v83105; GFX9-NEXT: v_alignbit_b32 v4, v1, v5, 13106; GFX9-NEXT: v_lshrrev_b32_e32 v1, 1, v13107; GFX9-NEXT: v_not_b32_e32 v5, v93108; GFX9-NEXT: v_alignbit_b32 v1, v1, v4, v53109; GFX9-NEXT: v_alignbit_b32 v4, v2, v6, 13110; GFX9-NEXT: v_lshrrev_b32_e32 v2, 1, v23111; GFX9-NEXT: v_not_b32_e32 v5, v103112; GFX9-NEXT: v_alignbit_b32 v2, v2, v4, v53113; GFX9-NEXT: v_alignbit_b32 v4, v3, v7, 13114; GFX9-NEXT: v_lshrrev_b32_e32 v3, 1, v33115; GFX9-NEXT: v_not_b32_e32 v5, v113116; GFX9-NEXT: v_alignbit_b32 v3, v3, v4, v53117; GFX9-NEXT: s_setpc_b64 s[30:31]3118;3119; GFX10-LABEL: v_fshl_v4i32:3120; GFX10: ; %bb.0:3121; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3122; GFX10-NEXT: v_alignbit_b32 v4, v0, v4, 13123; GFX10-NEXT: v_lshrrev_b32_e32 v0, 1, v03124; GFX10-NEXT: v_not_b32_e32 v8, v83125; GFX10-NEXT: v_alignbit_b32 v5, v1, v5, 13126; GFX10-NEXT: v_lshrrev_b32_e32 v1, 1, v13127; GFX10-NEXT: v_not_b32_e32 v9, v93128; GFX10-NEXT: v_alignbit_b32 v6, v2, v6, 13129; GFX10-NEXT: v_lshrrev_b32_e32 v2, 1, v23130; GFX10-NEXT: v_not_b32_e32 v10, v103131; GFX10-NEXT: v_alignbit_b32 v7, v3, v7, 13132; GFX10-NEXT: v_lshrrev_b32_e32 v3, 1, v33133; GFX10-NEXT: v_not_b32_e32 v11, v113134; GFX10-NEXT: v_alignbit_b32 v0, v0, v4, v83135; GFX10-NEXT: v_alignbit_b32 v1, v1, v5, v93136; GFX10-NEXT: v_alignbit_b32 v2, v2, v6, v103137; GFX10-NEXT: v_alignbit_b32 v3, v3, v7, v113138; GFX10-NEXT: s_setpc_b64 s[30:31]3139;3140; GFX11-LABEL: v_fshl_v4i32:3141; GFX11: ; %bb.0:3142; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3143; GFX11-NEXT: v_alignbit_b32 v4, v0, v4, 13144; GFX11-NEXT: v_lshrrev_b32_e32 v0, 1, v03145; GFX11-NEXT: v_not_b32_e32 v8, v83146; GFX11-NEXT: v_alignbit_b32 v5, v1, v5, 13147; GFX11-NEXT: v_lshrrev_b32_e32 v1, 1, v13148; GFX11-NEXT: v_not_b32_e32 v9, v93149; GFX11-NEXT: v_alignbit_b32 v6, v2, v6, 13150; GFX11-NEXT: v_lshrrev_b32_e32 v2, 1, v23151; GFX11-NEXT: v_not_b32_e32 v10, v103152; GFX11-NEXT: v_alignbit_b32 v7, v3, v7, 13153; GFX11-NEXT: v_lshrrev_b32_e32 v3, 1, v33154; GFX11-NEXT: v_not_b32_e32 v11, v113155; GFX11-NEXT: v_alignbit_b32 v0, v0, v4, v83156; GFX11-NEXT: v_alignbit_b32 v1, v1, v5, v93157; GFX11-NEXT: v_alignbit_b32 v2, v2, v6, v103158; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)3159; GFX11-NEXT: v_alignbit_b32 v3, v3, v7, v113160; GFX11-NEXT: s_setpc_b64 s[30:31]3161 %result = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> %amt)3162 ret <4 x i32> %result3163}3164 3165define amdgpu_ps i16 @s_fshl_i16(i16 inreg %lhs, i16 inreg %rhs, i16 inreg %amt) {3166; GFX6-LABEL: s_fshl_i16:3167; GFX6: ; %bb.0:3168; GFX6-NEXT: s_and_b32 s3, s2, 153169; GFX6-NEXT: s_andn2_b32 s2, 15, s23170; GFX6-NEXT: s_bfe_u32 s1, s1, 0xf00013171; GFX6-NEXT: s_lshl_b32 s0, s0, s33172; GFX6-NEXT: s_lshr_b32 s1, s1, s23173; GFX6-NEXT: s_or_b32 s0, s0, s13174; GFX6-NEXT: ; return to shader part epilog3175;3176; GFX8-LABEL: s_fshl_i16:3177; GFX8: ; %bb.0:3178; GFX8-NEXT: s_and_b32 s1, 0xffff, s13179; GFX8-NEXT: s_and_b32 s3, s2, 153180; GFX8-NEXT: s_andn2_b32 s2, 15, s23181; GFX8-NEXT: s_lshr_b32 s1, s1, 13182; GFX8-NEXT: s_lshl_b32 s0, s0, s33183; GFX8-NEXT: s_lshr_b32 s1, s1, s23184; GFX8-NEXT: s_or_b32 s0, s0, s13185; GFX8-NEXT: ; return to shader part epilog3186;3187; GFX9-LABEL: s_fshl_i16:3188; GFX9: ; %bb.0:3189; GFX9-NEXT: s_and_b32 s1, 0xffff, s13190; GFX9-NEXT: s_and_b32 s3, s2, 153191; GFX9-NEXT: s_andn2_b32 s2, 15, s23192; GFX9-NEXT: s_lshr_b32 s1, s1, 13193; GFX9-NEXT: s_lshl_b32 s0, s0, s33194; GFX9-NEXT: s_lshr_b32 s1, s1, s23195; GFX9-NEXT: s_or_b32 s0, s0, s13196; GFX9-NEXT: ; return to shader part epilog3197;3198; GFX10-LABEL: s_fshl_i16:3199; GFX10: ; %bb.0:3200; GFX10-NEXT: s_and_b32 s1, 0xffff, s13201; GFX10-NEXT: s_and_b32 s3, s2, 153202; GFX10-NEXT: s_andn2_b32 s2, 15, s23203; GFX10-NEXT: s_lshr_b32 s1, s1, 13204; GFX10-NEXT: s_lshl_b32 s0, s0, s33205; GFX10-NEXT: s_lshr_b32 s1, s1, s23206; GFX10-NEXT: s_or_b32 s0, s0, s13207; GFX10-NEXT: ; return to shader part epilog3208;3209; GFX11-LABEL: s_fshl_i16:3210; GFX11: ; %bb.0:3211; GFX11-NEXT: s_and_b32 s1, 0xffff, s13212; GFX11-NEXT: s_and_b32 s3, s2, 153213; GFX11-NEXT: s_and_not1_b32 s2, 15, s23214; GFX11-NEXT: s_lshr_b32 s1, s1, 13215; GFX11-NEXT: s_lshl_b32 s0, s0, s33216; GFX11-NEXT: s_lshr_b32 s1, s1, s23217; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3218; GFX11-NEXT: s_or_b32 s0, s0, s13219; GFX11-NEXT: ; return to shader part epilog3220 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 %amt)3221 ret i16 %result3222}3223 3224define amdgpu_ps i16 @s_fshl_i16_4(i16 inreg %lhs, i16 inreg %rhs) {3225; GFX6-LABEL: s_fshl_i16_4:3226; GFX6: ; %bb.0:3227; GFX6-NEXT: s_lshl_b32 s0, s0, 43228; GFX6-NEXT: s_bfe_u32 s1, s1, 0x4000c3229; GFX6-NEXT: s_or_b32 s0, s0, s13230; GFX6-NEXT: ; return to shader part epilog3231;3232; GFX8-LABEL: s_fshl_i16_4:3233; GFX8: ; %bb.0:3234; GFX8-NEXT: s_and_b32 s1, 0xffff, s13235; GFX8-NEXT: s_lshl_b32 s0, s0, 43236; GFX8-NEXT: s_lshr_b32 s1, s1, 123237; GFX8-NEXT: s_or_b32 s0, s0, s13238; GFX8-NEXT: ; return to shader part epilog3239;3240; GFX9-LABEL: s_fshl_i16_4:3241; GFX9: ; %bb.0:3242; GFX9-NEXT: s_and_b32 s1, 0xffff, s13243; GFX9-NEXT: s_lshl_b32 s0, s0, 43244; GFX9-NEXT: s_lshr_b32 s1, s1, 123245; GFX9-NEXT: s_or_b32 s0, s0, s13246; GFX9-NEXT: ; return to shader part epilog3247;3248; GFX10-LABEL: s_fshl_i16_4:3249; GFX10: ; %bb.0:3250; GFX10-NEXT: s_and_b32 s1, 0xffff, s13251; GFX10-NEXT: s_lshl_b32 s0, s0, 43252; GFX10-NEXT: s_lshr_b32 s1, s1, 123253; GFX10-NEXT: s_or_b32 s0, s0, s13254; GFX10-NEXT: ; return to shader part epilog3255;3256; GFX11-LABEL: s_fshl_i16_4:3257; GFX11: ; %bb.0:3258; GFX11-NEXT: s_and_b32 s1, 0xffff, s13259; GFX11-NEXT: s_lshl_b32 s0, s0, 43260; GFX11-NEXT: s_lshr_b32 s1, s1, 123261; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3262; GFX11-NEXT: s_or_b32 s0, s0, s13263; GFX11-NEXT: ; return to shader part epilog3264 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 4)3265 ret i16 %result3266}3267 3268define amdgpu_ps i16 @s_fshl_i16_5(i16 inreg %lhs, i16 inreg %rhs) {3269; GFX6-LABEL: s_fshl_i16_5:3270; GFX6: ; %bb.0:3271; GFX6-NEXT: s_lshl_b32 s0, s0, 53272; GFX6-NEXT: s_bfe_u32 s1, s1, 0x5000b3273; GFX6-NEXT: s_or_b32 s0, s0, s13274; GFX6-NEXT: ; return to shader part epilog3275;3276; GFX8-LABEL: s_fshl_i16_5:3277; GFX8: ; %bb.0:3278; GFX8-NEXT: s_and_b32 s1, 0xffff, s13279; GFX8-NEXT: s_lshl_b32 s0, s0, 53280; GFX8-NEXT: s_lshr_b32 s1, s1, 113281; GFX8-NEXT: s_or_b32 s0, s0, s13282; GFX8-NEXT: ; return to shader part epilog3283;3284; GFX9-LABEL: s_fshl_i16_5:3285; GFX9: ; %bb.0:3286; GFX9-NEXT: s_and_b32 s1, 0xffff, s13287; GFX9-NEXT: s_lshl_b32 s0, s0, 53288; GFX9-NEXT: s_lshr_b32 s1, s1, 113289; GFX9-NEXT: s_or_b32 s0, s0, s13290; GFX9-NEXT: ; return to shader part epilog3291;3292; GFX10-LABEL: s_fshl_i16_5:3293; GFX10: ; %bb.0:3294; GFX10-NEXT: s_and_b32 s1, 0xffff, s13295; GFX10-NEXT: s_lshl_b32 s0, s0, 53296; GFX10-NEXT: s_lshr_b32 s1, s1, 113297; GFX10-NEXT: s_or_b32 s0, s0, s13298; GFX10-NEXT: ; return to shader part epilog3299;3300; GFX11-LABEL: s_fshl_i16_5:3301; GFX11: ; %bb.0:3302; GFX11-NEXT: s_and_b32 s1, 0xffff, s13303; GFX11-NEXT: s_lshl_b32 s0, s0, 53304; GFX11-NEXT: s_lshr_b32 s1, s1, 113305; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3306; GFX11-NEXT: s_or_b32 s0, s0, s13307; GFX11-NEXT: ; return to shader part epilog3308 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 5)3309 ret i16 %result3310}3311 3312define i16 @v_fshl_i16(i16 %lhs, i16 %rhs, i16 %amt) {3313; GFX6-LABEL: v_fshl_i16:3314; GFX6: ; %bb.0:3315; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3316; GFX6-NEXT: v_and_b32_e32 v3, 15, v23317; GFX6-NEXT: v_xor_b32_e32 v2, -1, v23318; GFX6-NEXT: v_and_b32_e32 v2, 15, v23319; GFX6-NEXT: v_bfe_u32 v1, v1, 1, 153320; GFX6-NEXT: v_lshlrev_b32_e32 v0, v3, v03321; GFX6-NEXT: v_lshrrev_b32_e32 v1, v2, v13322; GFX6-NEXT: v_or_b32_e32 v0, v0, v13323; GFX6-NEXT: s_setpc_b64 s[30:31]3324;3325; GFX8-LABEL: v_fshl_i16:3326; GFX8: ; %bb.0:3327; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3328; GFX8-NEXT: v_and_b32_e32 v3, 15, v23329; GFX8-NEXT: v_xor_b32_e32 v2, -1, v23330; GFX8-NEXT: v_and_b32_e32 v2, 15, v23331; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v13332; GFX8-NEXT: v_lshlrev_b16_e32 v0, v3, v03333; GFX8-NEXT: v_lshrrev_b16_e32 v1, v2, v13334; GFX8-NEXT: v_or_b32_e32 v0, v0, v13335; GFX8-NEXT: s_setpc_b64 s[30:31]3336;3337; GFX9-LABEL: v_fshl_i16:3338; GFX9: ; %bb.0:3339; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3340; GFX9-NEXT: v_and_b32_e32 v3, 15, v23341; GFX9-NEXT: v_xor_b32_e32 v2, -1, v23342; GFX9-NEXT: v_and_b32_e32 v2, 15, v23343; GFX9-NEXT: v_lshrrev_b16_e32 v1, 1, v13344; GFX9-NEXT: v_lshlrev_b16_e32 v0, v3, v03345; GFX9-NEXT: v_lshrrev_b16_e32 v1, v2, v13346; GFX9-NEXT: v_or_b32_e32 v0, v0, v13347; GFX9-NEXT: s_setpc_b64 s[30:31]3348;3349; GFX10-LABEL: v_fshl_i16:3350; GFX10: ; %bb.0:3351; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3352; GFX10-NEXT: v_xor_b32_e32 v3, -1, v23353; GFX10-NEXT: v_and_b32_e32 v2, 15, v23354; GFX10-NEXT: v_lshrrev_b16 v1, 1, v13355; GFX10-NEXT: v_and_b32_e32 v3, 15, v33356; GFX10-NEXT: v_lshlrev_b16 v0, v2, v03357; GFX10-NEXT: v_lshrrev_b16 v1, v3, v13358; GFX10-NEXT: v_or_b32_e32 v0, v0, v13359; GFX10-NEXT: s_setpc_b64 s[30:31]3360;3361; GFX11-LABEL: v_fshl_i16:3362; GFX11: ; %bb.0:3363; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3364; GFX11-NEXT: v_xor_b32_e32 v3, -1, v23365; GFX11-NEXT: v_and_b32_e32 v2, 15, v23366; GFX11-NEXT: v_lshrrev_b16 v1, 1, v13367; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3368; GFX11-NEXT: v_and_b32_e32 v3, 15, v33369; GFX11-NEXT: v_lshlrev_b16 v0, v2, v03370; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3371; GFX11-NEXT: v_lshrrev_b16 v1, v3, v13372; GFX11-NEXT: v_or_b32_e32 v0, v0, v13373; GFX11-NEXT: s_setpc_b64 s[30:31]3374 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 %amt)3375 ret i16 %result3376}3377 3378define i16 @v_fshl_i16_4(i16 %lhs, i16 %rhs) {3379; GFX6-LABEL: v_fshl_i16_4:3380; GFX6: ; %bb.0:3381; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3382; GFX6-NEXT: v_lshlrev_b32_e32 v0, 4, v03383; GFX6-NEXT: v_bfe_u32 v1, v1, 12, 43384; GFX6-NEXT: v_or_b32_e32 v0, v0, v13385; GFX6-NEXT: s_setpc_b64 s[30:31]3386;3387; GFX8-LABEL: v_fshl_i16_4:3388; GFX8: ; %bb.0:3389; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3390; GFX8-NEXT: v_lshlrev_b16_e32 v0, 4, v03391; GFX8-NEXT: v_lshrrev_b16_e32 v1, 12, v13392; GFX8-NEXT: v_or_b32_e32 v0, v0, v13393; GFX8-NEXT: s_setpc_b64 s[30:31]3394;3395; GFX9-LABEL: v_fshl_i16_4:3396; GFX9: ; %bb.0:3397; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3398; GFX9-NEXT: v_lshlrev_b16_e32 v0, 4, v03399; GFX9-NEXT: v_lshrrev_b16_e32 v1, 12, v13400; GFX9-NEXT: v_or_b32_e32 v0, v0, v13401; GFX9-NEXT: s_setpc_b64 s[30:31]3402;3403; GFX10-LABEL: v_fshl_i16_4:3404; GFX10: ; %bb.0:3405; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3406; GFX10-NEXT: v_lshlrev_b16 v0, 4, v03407; GFX10-NEXT: v_lshrrev_b16 v1, 12, v13408; GFX10-NEXT: v_or_b32_e32 v0, v0, v13409; GFX10-NEXT: s_setpc_b64 s[30:31]3410;3411; GFX11-LABEL: v_fshl_i16_4:3412; GFX11: ; %bb.0:3413; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3414; GFX11-NEXT: v_lshlrev_b16 v0, 4, v03415; GFX11-NEXT: v_lshrrev_b16 v1, 12, v13416; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3417; GFX11-NEXT: v_or_b32_e32 v0, v0, v13418; GFX11-NEXT: s_setpc_b64 s[30:31]3419 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 4)3420 ret i16 %result3421}3422 3423define i16 @v_fshl_i16_5(i16 %lhs, i16 %rhs) {3424; GFX6-LABEL: v_fshl_i16_5:3425; GFX6: ; %bb.0:3426; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3427; GFX6-NEXT: v_lshlrev_b32_e32 v0, 5, v03428; GFX6-NEXT: v_bfe_u32 v1, v1, 11, 53429; GFX6-NEXT: v_or_b32_e32 v0, v0, v13430; GFX6-NEXT: s_setpc_b64 s[30:31]3431;3432; GFX8-LABEL: v_fshl_i16_5:3433; GFX8: ; %bb.0:3434; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3435; GFX8-NEXT: v_lshlrev_b16_e32 v0, 5, v03436; GFX8-NEXT: v_lshrrev_b16_e32 v1, 11, v13437; GFX8-NEXT: v_or_b32_e32 v0, v0, v13438; GFX8-NEXT: s_setpc_b64 s[30:31]3439;3440; GFX9-LABEL: v_fshl_i16_5:3441; GFX9: ; %bb.0:3442; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3443; GFX9-NEXT: v_lshlrev_b16_e32 v0, 5, v03444; GFX9-NEXT: v_lshrrev_b16_e32 v1, 11, v13445; GFX9-NEXT: v_or_b32_e32 v0, v0, v13446; GFX9-NEXT: s_setpc_b64 s[30:31]3447;3448; GFX10-LABEL: v_fshl_i16_5:3449; GFX10: ; %bb.0:3450; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3451; GFX10-NEXT: v_lshlrev_b16 v0, 5, v03452; GFX10-NEXT: v_lshrrev_b16 v1, 11, v13453; GFX10-NEXT: v_or_b32_e32 v0, v0, v13454; GFX10-NEXT: s_setpc_b64 s[30:31]3455;3456; GFX11-LABEL: v_fshl_i16_5:3457; GFX11: ; %bb.0:3458; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3459; GFX11-NEXT: v_lshlrev_b16 v0, 5, v03460; GFX11-NEXT: v_lshrrev_b16 v1, 11, v13461; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3462; GFX11-NEXT: v_or_b32_e32 v0, v0, v13463; GFX11-NEXT: s_setpc_b64 s[30:31]3464 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 5)3465 ret i16 %result3466}3467 3468define amdgpu_ps half @v_fshl_i16_ssv(i16 inreg %lhs, i16 inreg %rhs, i16 %amt) {3469; GFX6-LABEL: v_fshl_i16_ssv:3470; GFX6: ; %bb.0:3471; GFX6-NEXT: v_and_b32_e32 v1, 15, v03472; GFX6-NEXT: v_xor_b32_e32 v0, -1, v03473; GFX6-NEXT: v_and_b32_e32 v0, 15, v03474; GFX6-NEXT: v_lshl_b32_e32 v1, s0, v13475; GFX6-NEXT: s_bfe_u32 s0, s1, 0xf00013476; GFX6-NEXT: v_lshr_b32_e32 v0, s0, v03477; GFX6-NEXT: v_or_b32_e32 v0, v1, v03478; GFX6-NEXT: ; return to shader part epilog3479;3480; GFX8-LABEL: v_fshl_i16_ssv:3481; GFX8: ; %bb.0:3482; GFX8-NEXT: v_and_b32_e32 v1, 15, v03483; GFX8-NEXT: v_xor_b32_e32 v0, -1, v03484; GFX8-NEXT: v_lshlrev_b16_e64 v1, v1, s03485; GFX8-NEXT: s_and_b32 s0, 0xffff, s13486; GFX8-NEXT: v_and_b32_e32 v0, 15, v03487; GFX8-NEXT: s_lshr_b32 s0, s0, 13488; GFX8-NEXT: v_lshrrev_b16_e64 v0, v0, s03489; GFX8-NEXT: v_or_b32_e32 v0, v1, v03490; GFX8-NEXT: ; return to shader part epilog3491;3492; GFX9-LABEL: v_fshl_i16_ssv:3493; GFX9: ; %bb.0:3494; GFX9-NEXT: v_and_b32_e32 v1, 15, v03495; GFX9-NEXT: v_xor_b32_e32 v0, -1, v03496; GFX9-NEXT: v_lshlrev_b16_e64 v1, v1, s03497; GFX9-NEXT: s_and_b32 s0, 0xffff, s13498; GFX9-NEXT: v_and_b32_e32 v0, 15, v03499; GFX9-NEXT: s_lshr_b32 s0, s0, 13500; GFX9-NEXT: v_lshrrev_b16_e64 v0, v0, s03501; GFX9-NEXT: v_or_b32_e32 v0, v1, v03502; GFX9-NEXT: ; return to shader part epilog3503;3504; GFX10-LABEL: v_fshl_i16_ssv:3505; GFX10: ; %bb.0:3506; GFX10-NEXT: v_xor_b32_e32 v1, -1, v03507; GFX10-NEXT: v_and_b32_e32 v0, 15, v03508; GFX10-NEXT: s_and_b32 s1, 0xffff, s13509; GFX10-NEXT: s_lshr_b32 s1, s1, 13510; GFX10-NEXT: v_and_b32_e32 v1, 15, v13511; GFX10-NEXT: v_lshlrev_b16 v0, v0, s03512; GFX10-NEXT: v_lshrrev_b16 v1, v1, s13513; GFX10-NEXT: v_or_b32_e32 v0, v0, v13514; GFX10-NEXT: ; return to shader part epilog3515;3516; GFX11-LABEL: v_fshl_i16_ssv:3517; GFX11: ; %bb.0:3518; GFX11-NEXT: v_xor_b32_e32 v1, -1, v03519; GFX11-NEXT: v_and_b32_e32 v0, 15, v03520; GFX11-NEXT: s_and_b32 s1, 0xffff, s13521; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)3522; GFX11-NEXT: s_lshr_b32 s1, s1, 13523; GFX11-NEXT: v_and_b32_e32 v1, 15, v13524; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3525; GFX11-NEXT: v_lshlrev_b16 v0, v0, s03526; GFX11-NEXT: v_lshrrev_b16 v1, v1, s13527; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3528; GFX11-NEXT: v_or_b32_e32 v0, v0, v13529; GFX11-NEXT: ; return to shader part epilog3530 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 %amt)3531 %cast.result = bitcast i16 %result to half3532 ret half %cast.result3533}3534 3535define amdgpu_ps half @v_fshl_i16_svs(i16 inreg %lhs, i16 %rhs, i16 inreg %amt) {3536; GFX6-LABEL: v_fshl_i16_svs:3537; GFX6: ; %bb.0:3538; GFX6-NEXT: s_and_b32 s2, s1, 153539; GFX6-NEXT: s_andn2_b32 s1, 15, s13540; GFX6-NEXT: v_bfe_u32 v0, v0, 1, 153541; GFX6-NEXT: s_lshl_b32 s0, s0, s23542; GFX6-NEXT: v_lshrrev_b32_e32 v0, s1, v03543; GFX6-NEXT: v_or_b32_e32 v0, s0, v03544; GFX6-NEXT: ; return to shader part epilog3545;3546; GFX8-LABEL: v_fshl_i16_svs:3547; GFX8: ; %bb.0:3548; GFX8-NEXT: s_and_b32 s2, s1, 153549; GFX8-NEXT: s_andn2_b32 s1, 15, s13550; GFX8-NEXT: v_lshrrev_b16_e32 v0, 1, v03551; GFX8-NEXT: s_lshl_b32 s0, s0, s23552; GFX8-NEXT: v_lshrrev_b16_e32 v0, s1, v03553; GFX8-NEXT: v_or_b32_e32 v0, s0, v03554; GFX8-NEXT: ; return to shader part epilog3555;3556; GFX9-LABEL: v_fshl_i16_svs:3557; GFX9: ; %bb.0:3558; GFX9-NEXT: s_and_b32 s2, s1, 153559; GFX9-NEXT: s_andn2_b32 s1, 15, s13560; GFX9-NEXT: v_lshrrev_b16_e32 v0, 1, v03561; GFX9-NEXT: s_lshl_b32 s0, s0, s23562; GFX9-NEXT: v_lshrrev_b16_e32 v0, s1, v03563; GFX9-NEXT: v_or_b32_e32 v0, s0, v03564; GFX9-NEXT: ; return to shader part epilog3565;3566; GFX10-LABEL: v_fshl_i16_svs:3567; GFX10: ; %bb.0:3568; GFX10-NEXT: v_lshrrev_b16 v0, 1, v03569; GFX10-NEXT: s_andn2_b32 s2, 15, s13570; GFX10-NEXT: s_and_b32 s1, s1, 153571; GFX10-NEXT: s_lshl_b32 s0, s0, s13572; GFX10-NEXT: v_lshrrev_b16 v0, s2, v03573; GFX10-NEXT: v_or_b32_e32 v0, s0, v03574; GFX10-NEXT: ; return to shader part epilog3575;3576; GFX11-LABEL: v_fshl_i16_svs:3577; GFX11: ; %bb.0:3578; GFX11-NEXT: v_lshrrev_b16 v0, 1, v03579; GFX11-NEXT: s_and_not1_b32 s2, 15, s13580; GFX11-NEXT: s_and_b32 s1, s1, 153581; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)3582; GFX11-NEXT: s_lshl_b32 s0, s0, s13583; GFX11-NEXT: v_lshrrev_b16 v0, s2, v03584; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3585; GFX11-NEXT: v_or_b32_e32 v0, s0, v03586; GFX11-NEXT: ; return to shader part epilog3587 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 %amt)3588 %cast.result = bitcast i16 %result to half3589 ret half %cast.result3590}3591 3592define amdgpu_ps half @v_fshl_i16_vss(i16 %lhs, i16 inreg %rhs, i16 inreg %amt) {3593; GFX6-LABEL: v_fshl_i16_vss:3594; GFX6: ; %bb.0:3595; GFX6-NEXT: s_and_b32 s2, s1, 153596; GFX6-NEXT: s_andn2_b32 s1, 15, s13597; GFX6-NEXT: s_bfe_u32 s0, s0, 0xf00013598; GFX6-NEXT: v_lshlrev_b32_e32 v0, s2, v03599; GFX6-NEXT: s_lshr_b32 s0, s0, s13600; GFX6-NEXT: v_or_b32_e32 v0, s0, v03601; GFX6-NEXT: ; return to shader part epilog3602;3603; GFX8-LABEL: v_fshl_i16_vss:3604; GFX8: ; %bb.0:3605; GFX8-NEXT: s_and_b32 s0, 0xffff, s03606; GFX8-NEXT: s_and_b32 s2, s1, 153607; GFX8-NEXT: s_andn2_b32 s1, 15, s13608; GFX8-NEXT: s_lshr_b32 s0, s0, 13609; GFX8-NEXT: v_lshlrev_b16_e32 v0, s2, v03610; GFX8-NEXT: s_lshr_b32 s0, s0, s13611; GFX8-NEXT: v_or_b32_e32 v0, s0, v03612; GFX8-NEXT: ; return to shader part epilog3613;3614; GFX9-LABEL: v_fshl_i16_vss:3615; GFX9: ; %bb.0:3616; GFX9-NEXT: s_and_b32 s0, 0xffff, s03617; GFX9-NEXT: s_and_b32 s2, s1, 153618; GFX9-NEXT: s_andn2_b32 s1, 15, s13619; GFX9-NEXT: s_lshr_b32 s0, s0, 13620; GFX9-NEXT: v_lshlrev_b16_e32 v0, s2, v03621; GFX9-NEXT: s_lshr_b32 s0, s0, s13622; GFX9-NEXT: v_or_b32_e32 v0, s0, v03623; GFX9-NEXT: ; return to shader part epilog3624;3625; GFX10-LABEL: v_fshl_i16_vss:3626; GFX10: ; %bb.0:3627; GFX10-NEXT: s_and_b32 s2, s1, 153628; GFX10-NEXT: s_and_b32 s0, 0xffff, s03629; GFX10-NEXT: v_lshlrev_b16 v0, s2, v03630; GFX10-NEXT: s_andn2_b32 s1, 15, s13631; GFX10-NEXT: s_lshr_b32 s0, s0, 13632; GFX10-NEXT: s_lshr_b32 s0, s0, s13633; GFX10-NEXT: v_or_b32_e32 v0, s0, v03634; GFX10-NEXT: ; return to shader part epilog3635;3636; GFX11-LABEL: v_fshl_i16_vss:3637; GFX11: ; %bb.0:3638; GFX11-NEXT: s_and_b32 s2, s1, 153639; GFX11-NEXT: s_and_b32 s0, 0xffff, s03640; GFX11-NEXT: v_lshlrev_b16 v0, s2, v03641; GFX11-NEXT: s_and_not1_b32 s1, 15, s13642; GFX11-NEXT: s_lshr_b32 s0, s0, 13643; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3644; GFX11-NEXT: s_lshr_b32 s0, s0, s13645; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)3646; GFX11-NEXT: v_or_b32_e32 v0, s0, v03647; GFX11-NEXT: ; return to shader part epilog3648 %result = call i16 @llvm.fshl.i16(i16 %lhs, i16 %rhs, i16 %amt)3649 %cast.result = bitcast i16 %result to half3650 ret half %cast.result3651}3652 3653define amdgpu_ps i32 @s_fshl_v2i16(<2 x i16> inreg %lhs, <2 x i16> inreg %rhs, <2 x i16> inreg %amt) {3654; GFX6-LABEL: s_fshl_v2i16:3655; GFX6: ; %bb.0:3656; GFX6-NEXT: s_and_b32 s6, s4, 153657; GFX6-NEXT: s_andn2_b32 s4, 15, s43658; GFX6-NEXT: s_bfe_u32 s2, s2, 0xf00013659; GFX6-NEXT: s_lshl_b32 s0, s0, s63660; GFX6-NEXT: s_lshr_b32 s2, s2, s43661; GFX6-NEXT: s_or_b32 s0, s0, s23662; GFX6-NEXT: s_and_b32 s2, s5, 153663; GFX6-NEXT: s_andn2_b32 s4, 15, s53664; GFX6-NEXT: s_lshl_b32 s1, s1, s23665; GFX6-NEXT: s_bfe_u32 s2, s3, 0xf00013666; GFX6-NEXT: s_lshr_b32 s2, s2, s43667; GFX6-NEXT: s_or_b32 s1, s1, s23668; GFX6-NEXT: s_and_b32 s1, 0xffff, s13669; GFX6-NEXT: s_and_b32 s0, 0xffff, s03670; GFX6-NEXT: s_lshl_b32 s1, s1, 163671; GFX6-NEXT: s_or_b32 s0, s0, s13672; GFX6-NEXT: ; return to shader part epilog3673;3674; GFX8-LABEL: s_fshl_v2i16:3675; GFX8: ; %bb.0:3676; GFX8-NEXT: s_and_b32 s5, s2, 153677; GFX8-NEXT: s_lshr_b32 s3, s0, 163678; GFX8-NEXT: s_lshl_b32 s0, s0, s53679; GFX8-NEXT: s_and_b32 s5, 0xffff, s13680; GFX8-NEXT: s_lshr_b32 s4, s2, 163681; GFX8-NEXT: s_andn2_b32 s2, 15, s23682; GFX8-NEXT: s_lshr_b32 s5, s5, 13683; GFX8-NEXT: s_lshr_b32 s2, s5, s23684; GFX8-NEXT: s_or_b32 s0, s0, s23685; GFX8-NEXT: s_and_b32 s2, s4, 153686; GFX8-NEXT: s_andn2_b32 s4, 15, s43687; GFX8-NEXT: s_lshr_b32 s1, s1, 173688; GFX8-NEXT: s_lshl_b32 s2, s3, s23689; GFX8-NEXT: s_lshr_b32 s1, s1, s43690; GFX8-NEXT: s_or_b32 s1, s2, s13691; GFX8-NEXT: s_and_b32 s1, 0xffff, s13692; GFX8-NEXT: s_and_b32 s0, 0xffff, s03693; GFX8-NEXT: s_lshl_b32 s1, s1, 163694; GFX8-NEXT: s_or_b32 s0, s0, s13695; GFX8-NEXT: ; return to shader part epilog3696;3697; GFX9-LABEL: s_fshl_v2i16:3698; GFX9: ; %bb.0:3699; GFX9-NEXT: s_and_b32 s3, s2, 0xf000f3700; GFX9-NEXT: s_lshr_b32 s4, s0, 163701; GFX9-NEXT: s_lshr_b32 s5, s3, 163702; GFX9-NEXT: s_lshl_b32 s0, s0, s33703; GFX9-NEXT: s_lshl_b32 s3, s4, s53704; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s33705; GFX9-NEXT: s_lshr_b32 s3, s1, 163706; GFX9-NEXT: s_and_b32 s1, s1, 0xffff3707; GFX9-NEXT: s_lshr_b32 s1, s1, 0x100013708; GFX9-NEXT: s_lshr_b32 s3, s3, 13709; GFX9-NEXT: s_andn2_b32 s2, 0xf000f, s23710; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s33711; GFX9-NEXT: s_lshr_b32 s3, s1, 163712; GFX9-NEXT: s_and_b32 s1, s1, 0xffff3713; GFX9-NEXT: s_lshr_b32 s4, s2, 163714; GFX9-NEXT: s_lshr_b32 s1, s1, s23715; GFX9-NEXT: s_lshr_b32 s2, s3, s43716; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s23717; GFX9-NEXT: s_or_b32 s0, s0, s13718; GFX9-NEXT: ; return to shader part epilog3719;3720; GFX10-LABEL: s_fshl_v2i16:3721; GFX10: ; %bb.0:3722; GFX10-NEXT: s_and_b32 s6, s1, 0xffff3723; GFX10-NEXT: s_lshr_b32 s1, s1, 163724; GFX10-NEXT: s_and_b32 s3, s2, 0xf000f3725; GFX10-NEXT: s_lshr_b32 s6, s6, 0x100013726; GFX10-NEXT: s_lshr_b32 s1, s1, 13727; GFX10-NEXT: s_andn2_b32 s2, 0xf000f, s23728; GFX10-NEXT: s_lshr_b32 s4, s0, 163729; GFX10-NEXT: s_lshr_b32 s5, s3, 163730; GFX10-NEXT: s_pack_ll_b32_b16 s1, s6, s13731; GFX10-NEXT: s_lshl_b32 s0, s0, s33732; GFX10-NEXT: s_lshl_b32 s3, s4, s53733; GFX10-NEXT: s_lshr_b32 s4, s1, 163734; GFX10-NEXT: s_and_b32 s1, s1, 0xffff3735; GFX10-NEXT: s_lshr_b32 s5, s2, 163736; GFX10-NEXT: s_lshr_b32 s1, s1, s23737; GFX10-NEXT: s_lshr_b32 s2, s4, s53738; GFX10-NEXT: s_pack_ll_b32_b16 s0, s0, s33739; GFX10-NEXT: s_pack_ll_b32_b16 s1, s1, s23740; GFX10-NEXT: s_or_b32 s0, s0, s13741; GFX10-NEXT: ; return to shader part epilog3742;3743; GFX11-LABEL: s_fshl_v2i16:3744; GFX11: ; %bb.0:3745; GFX11-NEXT: s_and_b32 s6, s1, 0xffff3746; GFX11-NEXT: s_lshr_b32 s1, s1, 163747; GFX11-NEXT: s_and_b32 s3, s2, 0xf000f3748; GFX11-NEXT: s_lshr_b32 s6, s6, 0x100013749; GFX11-NEXT: s_lshr_b32 s1, s1, 13750; GFX11-NEXT: s_and_not1_b32 s2, 0xf000f, s23751; GFX11-NEXT: s_lshr_b32 s4, s0, 163752; GFX11-NEXT: s_lshr_b32 s5, s3, 163753; GFX11-NEXT: s_pack_ll_b32_b16 s1, s6, s13754; GFX11-NEXT: s_lshl_b32 s0, s0, s33755; GFX11-NEXT: s_lshl_b32 s3, s4, s53756; GFX11-NEXT: s_lshr_b32 s4, s1, 163757; GFX11-NEXT: s_and_b32 s1, s1, 0xffff3758; GFX11-NEXT: s_lshr_b32 s5, s2, 163759; GFX11-NEXT: s_lshr_b32 s1, s1, s23760; GFX11-NEXT: s_lshr_b32 s2, s4, s53761; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s33762; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s23763; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3764; GFX11-NEXT: s_or_b32 s0, s0, s13765; GFX11-NEXT: ; return to shader part epilog3766 %result = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)3767 %cast = bitcast <2 x i16> %result to i323768 ret i32 %cast3769}3770 3771define <2 x i16> @v_fshl_v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt) {3772; GFX6-LABEL: v_fshl_v2i16:3773; GFX6: ; %bb.0:3774; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3775; GFX6-NEXT: v_and_b32_e32 v6, 15, v43776; GFX6-NEXT: v_xor_b32_e32 v4, -1, v43777; GFX6-NEXT: v_and_b32_e32 v4, 15, v43778; GFX6-NEXT: v_bfe_u32 v2, v2, 1, 153779; GFX6-NEXT: v_lshlrev_b32_e32 v0, v6, v03780; GFX6-NEXT: v_lshrrev_b32_e32 v2, v4, v23781; GFX6-NEXT: v_or_b32_e32 v0, v0, v23782; GFX6-NEXT: v_and_b32_e32 v2, 15, v53783; GFX6-NEXT: v_xor_b32_e32 v4, -1, v53784; GFX6-NEXT: v_and_b32_e32 v4, 15, v43785; GFX6-NEXT: v_lshlrev_b32_e32 v1, v2, v13786; GFX6-NEXT: v_bfe_u32 v2, v3, 1, 153787; GFX6-NEXT: v_lshrrev_b32_e32 v2, v4, v23788; GFX6-NEXT: v_or_b32_e32 v1, v1, v23789; GFX6-NEXT: s_setpc_b64 s[30:31]3790;3791; GFX8-LABEL: v_fshl_v2i16:3792; GFX8: ; %bb.0:3793; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3794; GFX8-NEXT: v_xor_b32_e32 v4, -1, v23795; GFX8-NEXT: v_and_b32_e32 v3, 15, v23796; GFX8-NEXT: v_and_b32_e32 v4, 15, v43797; GFX8-NEXT: v_lshrrev_b16_e32 v5, 1, v13798; GFX8-NEXT: v_lshlrev_b16_e32 v3, v3, v03799; GFX8-NEXT: v_lshrrev_b16_e32 v4, v4, v53800; GFX8-NEXT: v_or_b32_e32 v3, v3, v43801; GFX8-NEXT: v_mov_b32_e32 v4, 153802; GFX8-NEXT: v_mov_b32_e32 v5, -13803; GFX8-NEXT: v_and_b32_sdwa v4, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3804; GFX8-NEXT: v_xor_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3805; GFX8-NEXT: v_and_b32_e32 v2, 15, v23806; GFX8-NEXT: v_lshrrev_b32_e32 v1, 17, v13807; GFX8-NEXT: v_lshlrev_b16_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13808; GFX8-NEXT: v_lshrrev_b16_e32 v1, v2, v13809; GFX8-NEXT: v_or_b32_e32 v0, v0, v13810; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v03811; GFX8-NEXT: v_lshlrev_b32_e32 v0, 16, v03812; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3813; GFX8-NEXT: s_setpc_b64 s[30:31]3814;3815; GFX9-LABEL: v_fshl_v2i16:3816; GFX9: ; %bb.0:3817; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3818; GFX9-NEXT: v_and_b32_e32 v3, 0xf000f, v23819; GFX9-NEXT: v_xor_b32_e32 v2, -1, v23820; GFX9-NEXT: v_and_b32_e32 v2, 0xf000f, v23821; GFX9-NEXT: v_pk_lshrrev_b16 v1, 1, v1 op_sel_hi:[0,1]3822; GFX9-NEXT: v_pk_lshlrev_b16 v0, v3, v03823; GFX9-NEXT: v_pk_lshrrev_b16 v1, v2, v13824; GFX9-NEXT: v_or_b32_e32 v0, v0, v13825; GFX9-NEXT: s_setpc_b64 s[30:31]3826;3827; GFX10-LABEL: v_fshl_v2i16:3828; GFX10: ; %bb.0:3829; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3830; GFX10-NEXT: v_xor_b32_e32 v3, -1, v23831; GFX10-NEXT: v_and_b32_e32 v2, 0xf000f, v23832; GFX10-NEXT: v_pk_lshrrev_b16 v1, 1, v1 op_sel_hi:[0,1]3833; GFX10-NEXT: v_and_b32_e32 v3, 0xf000f, v33834; GFX10-NEXT: v_pk_lshlrev_b16 v0, v2, v03835; GFX10-NEXT: v_pk_lshrrev_b16 v1, v3, v13836; GFX10-NEXT: v_or_b32_e32 v0, v0, v13837; GFX10-NEXT: s_setpc_b64 s[30:31]3838;3839; GFX11-LABEL: v_fshl_v2i16:3840; GFX11: ; %bb.0:3841; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3842; GFX11-NEXT: v_xor_b32_e32 v3, -1, v23843; GFX11-NEXT: v_and_b32_e32 v2, 0xf000f, v23844; GFX11-NEXT: v_pk_lshrrev_b16 v1, 1, v1 op_sel_hi:[0,1]3845; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)3846; GFX11-NEXT: v_and_b32_e32 v3, 0xf000f, v33847; GFX11-NEXT: v_pk_lshlrev_b16 v0, v2, v03848; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3849; GFX11-NEXT: v_pk_lshrrev_b16 v1, v3, v13850; GFX11-NEXT: v_or_b32_e32 v0, v0, v13851; GFX11-NEXT: s_setpc_b64 s[30:31]3852 %result = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)3853 ret <2 x i16> %result3854}3855 3856define <2 x i16> @v_fshl_v2i16_4_8(<2 x i16> %lhs, <2 x i16> %rhs) {3857; GFX6-LABEL: v_fshl_v2i16_4_8:3858; GFX6: ; %bb.0:3859; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3860; GFX6-NEXT: v_bfe_u32 v2, v2, 1, 153861; GFX6-NEXT: v_lshlrev_b32_e32 v0, 4, v03862; GFX6-NEXT: v_lshrrev_b32_e32 v2, 11, v23863; GFX6-NEXT: v_or_b32_e32 v0, v0, v23864; GFX6-NEXT: v_bfe_u32 v2, v3, 1, 153865; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v13866; GFX6-NEXT: v_lshrrev_b32_e32 v2, 7, v23867; GFX6-NEXT: v_or_b32_e32 v1, v1, v23868; GFX6-NEXT: s_setpc_b64 s[30:31]3869;3870; GFX8-LABEL: v_fshl_v2i16_4_8:3871; GFX8: ; %bb.0:3872; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3873; GFX8-NEXT: v_lshrrev_b32_e32 v2, 16, v03874; GFX8-NEXT: v_lshlrev_b16_e32 v2, 8, v23875; GFX8-NEXT: v_lshrrev_b16_e32 v3, 12, v13876; GFX8-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_33877; GFX8-NEXT: v_lshlrev_b16_e32 v0, 4, v03878; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v13879; GFX8-NEXT: v_or_b32_e32 v0, v0, v33880; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v13881; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3882; GFX8-NEXT: s_setpc_b64 s[30:31]3883;3884; GFX9-LABEL: v_fshl_v2i16_4_8:3885; GFX9: ; %bb.0:3886; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3887; GFX9-NEXT: v_mov_b32_e32 v2, 0x800043888; GFX9-NEXT: v_pk_lshlrev_b16 v0, v2, v03889; GFX9-NEXT: v_mov_b32_e32 v2, 0x8000c3890; GFX9-NEXT: v_pk_lshrrev_b16 v1, v2, v13891; GFX9-NEXT: v_or_b32_e32 v0, v0, v13892; GFX9-NEXT: s_setpc_b64 s[30:31]3893;3894; GFX10-LABEL: v_fshl_v2i16_4_8:3895; GFX10: ; %bb.0:3896; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3897; GFX10-NEXT: v_pk_lshlrev_b16 v0, 0x80004, v03898; GFX10-NEXT: v_pk_lshrrev_b16 v1, 0x8000c, v13899; GFX10-NEXT: v_or_b32_e32 v0, v0, v13900; GFX10-NEXT: s_setpc_b64 s[30:31]3901;3902; GFX11-LABEL: v_fshl_v2i16_4_8:3903; GFX11: ; %bb.0:3904; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3905; GFX11-NEXT: v_pk_lshlrev_b16 v0, 0x80004, v03906; GFX11-NEXT: v_pk_lshrrev_b16 v1, 0x8000c, v13907; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3908; GFX11-NEXT: v_or_b32_e32 v0, v0, v13909; GFX11-NEXT: s_setpc_b64 s[30:31]3910 %result = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> <i16 4, i16 8>)3911 ret <2 x i16> %result3912}3913 3914define amdgpu_ps float @v_fshl_v2i16_ssv(<2 x i16> inreg %lhs, <2 x i16> inreg %rhs, <2 x i16> %amt) {3915; GFX6-LABEL: v_fshl_v2i16_ssv:3916; GFX6: ; %bb.0:3917; GFX6-NEXT: v_and_b32_e32 v2, 15, v03918; GFX6-NEXT: v_xor_b32_e32 v0, -1, v03919; GFX6-NEXT: v_and_b32_e32 v0, 15, v03920; GFX6-NEXT: v_lshl_b32_e32 v2, s0, v23921; GFX6-NEXT: s_bfe_u32 s0, s2, 0xf00013922; GFX6-NEXT: v_lshr_b32_e32 v0, s0, v03923; GFX6-NEXT: v_or_b32_e32 v0, v2, v03924; GFX6-NEXT: v_and_b32_e32 v2, 15, v13925; GFX6-NEXT: v_xor_b32_e32 v1, -1, v13926; GFX6-NEXT: v_and_b32_e32 v1, 15, v13927; GFX6-NEXT: s_bfe_u32 s0, s3, 0xf00013928; GFX6-NEXT: v_lshl_b32_e32 v2, s1, v23929; GFX6-NEXT: v_lshr_b32_e32 v1, s0, v13930; GFX6-NEXT: v_or_b32_e32 v1, v2, v13931; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v13932; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v03933; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v13934; GFX6-NEXT: v_or_b32_e32 v0, v0, v13935; GFX6-NEXT: ; return to shader part epilog3936;3937; GFX8-LABEL: v_fshl_v2i16_ssv:3938; GFX8: ; %bb.0:3939; GFX8-NEXT: v_and_b32_e32 v1, 15, v03940; GFX8-NEXT: s_lshr_b32 s2, s0, 163941; GFX8-NEXT: v_xor_b32_e32 v2, -1, v03942; GFX8-NEXT: v_lshlrev_b16_e64 v1, v1, s03943; GFX8-NEXT: s_and_b32 s0, 0xffff, s13944; GFX8-NEXT: v_and_b32_e32 v2, 15, v23945; GFX8-NEXT: s_lshr_b32 s0, s0, 13946; GFX8-NEXT: v_lshrrev_b16_e64 v2, v2, s03947; GFX8-NEXT: v_or_b32_e32 v1, v1, v23948; GFX8-NEXT: v_mov_b32_e32 v2, 153949; GFX8-NEXT: v_mov_b32_e32 v3, -13950; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3951; GFX8-NEXT: v_xor_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3952; GFX8-NEXT: v_and_b32_e32 v0, 15, v03953; GFX8-NEXT: s_lshr_b32 s0, s1, 173954; GFX8-NEXT: v_lshlrev_b16_e64 v2, v2, s23955; GFX8-NEXT: v_lshrrev_b16_e64 v0, v0, s03956; GFX8-NEXT: v_or_b32_e32 v0, v2, v03957; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v03958; GFX8-NEXT: v_lshlrev_b32_e32 v0, 16, v03959; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3960; GFX8-NEXT: ; return to shader part epilog3961;3962; GFX9-LABEL: v_fshl_v2i16_ssv:3963; GFX9: ; %bb.0:3964; GFX9-NEXT: v_and_b32_e32 v1, 0xf000f, v03965; GFX9-NEXT: v_pk_lshlrev_b16 v1, v1, s03966; GFX9-NEXT: s_lshr_b32 s0, s1, 163967; GFX9-NEXT: s_and_b32 s1, s1, 0xffff3968; GFX9-NEXT: v_xor_b32_e32 v0, -1, v03969; GFX9-NEXT: s_lshr_b32 s1, s1, 0x100013970; GFX9-NEXT: s_lshr_b32 s0, s0, 13971; GFX9-NEXT: v_and_b32_e32 v0, 0xf000f, v03972; GFX9-NEXT: s_pack_ll_b32_b16 s0, s1, s03973; GFX9-NEXT: v_pk_lshrrev_b16 v0, v0, s03974; GFX9-NEXT: v_or_b32_e32 v0, v1, v03975; GFX9-NEXT: ; return to shader part epilog3976;3977; GFX10-LABEL: v_fshl_v2i16_ssv:3978; GFX10: ; %bb.0:3979; GFX10-NEXT: v_xor_b32_e32 v1, -1, v03980; GFX10-NEXT: s_lshr_b32 s2, s1, 163981; GFX10-NEXT: s_and_b32 s1, s1, 0xffff3982; GFX10-NEXT: v_and_b32_e32 v0, 0xf000f, v03983; GFX10-NEXT: s_lshr_b32 s1, s1, 0x100013984; GFX10-NEXT: v_and_b32_e32 v1, 0xf000f, v13985; GFX10-NEXT: s_lshr_b32 s2, s2, 13986; GFX10-NEXT: s_pack_ll_b32_b16 s1, s1, s23987; GFX10-NEXT: v_pk_lshlrev_b16 v0, v0, s03988; GFX10-NEXT: v_pk_lshrrev_b16 v1, v1, s13989; GFX10-NEXT: v_or_b32_e32 v0, v0, v13990; GFX10-NEXT: ; return to shader part epilog3991;3992; GFX11-LABEL: v_fshl_v2i16_ssv:3993; GFX11: ; %bb.0:3994; GFX11-NEXT: v_xor_b32_e32 v1, -1, v03995; GFX11-NEXT: s_lshr_b32 s2, s1, 163996; GFX11-NEXT: s_and_b32 s1, s1, 0xffff3997; GFX11-NEXT: v_and_b32_e32 v0, 0xf000f, v03998; GFX11-NEXT: s_lshr_b32 s1, s1, 0x100013999; GFX11-NEXT: v_and_b32_e32 v1, 0xf000f, v14000; GFX11-NEXT: s_lshr_b32 s2, s2, 14001; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)4002; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s24003; GFX11-NEXT: v_pk_lshlrev_b16 v0, v0, s04004; GFX11-NEXT: v_pk_lshrrev_b16 v1, v1, s14005; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)4006; GFX11-NEXT: v_or_b32_e32 v0, v0, v14007; GFX11-NEXT: ; return to shader part epilog4008 %result = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)4009 %cast = bitcast <2 x i16> %result to float4010 ret float %cast4011}4012 4013define amdgpu_ps float @v_fshl_v2i16_svs(<2 x i16> inreg %lhs, <2 x i16> %rhs, <2 x i16> inreg %amt) {4014; GFX6-LABEL: v_fshl_v2i16_svs:4015; GFX6: ; %bb.0:4016; GFX6-NEXT: s_and_b32 s4, s2, 154017; GFX6-NEXT: s_andn2_b32 s2, 15, s24018; GFX6-NEXT: v_bfe_u32 v0, v0, 1, 154019; GFX6-NEXT: s_lshl_b32 s0, s0, s44020; GFX6-NEXT: v_lshrrev_b32_e32 v0, s2, v04021; GFX6-NEXT: v_or_b32_e32 v0, s0, v04022; GFX6-NEXT: s_and_b32 s0, s3, 154023; GFX6-NEXT: s_andn2_b32 s2, 15, s34024; GFX6-NEXT: v_bfe_u32 v1, v1, 1, 154025; GFX6-NEXT: s_lshl_b32 s0, s1, s04026; GFX6-NEXT: v_lshrrev_b32_e32 v1, s2, v14027; GFX6-NEXT: v_or_b32_e32 v1, s0, v14028; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v14029; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v04030; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v14031; GFX6-NEXT: v_or_b32_e32 v0, v0, v14032; GFX6-NEXT: ; return to shader part epilog4033;4034; GFX8-LABEL: v_fshl_v2i16_svs:4035; GFX8: ; %bb.0:4036; GFX8-NEXT: s_lshr_b32 s3, s1, 164037; GFX8-NEXT: s_and_b32 s4, s1, 154038; GFX8-NEXT: s_andn2_b32 s1, 15, s14039; GFX8-NEXT: v_lshrrev_b16_e32 v1, 1, v04040; GFX8-NEXT: s_lshr_b32 s2, s0, 164041; GFX8-NEXT: s_lshl_b32 s0, s0, s44042; GFX8-NEXT: v_lshrrev_b16_e32 v1, s1, v14043; GFX8-NEXT: v_or_b32_e32 v1, s0, v14044; GFX8-NEXT: s_and_b32 s0, s3, 154045; GFX8-NEXT: s_andn2_b32 s1, 15, s34046; GFX8-NEXT: v_lshrrev_b32_e32 v0, 17, v04047; GFX8-NEXT: s_lshl_b32 s0, s2, s04048; GFX8-NEXT: v_lshrrev_b16_e32 v0, s1, v04049; GFX8-NEXT: v_or_b32_e32 v0, s0, v04050; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v04051; GFX8-NEXT: v_lshlrev_b32_e32 v0, 16, v04052; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4053; GFX8-NEXT: ; return to shader part epilog4054;4055; GFX9-LABEL: v_fshl_v2i16_svs:4056; GFX9: ; %bb.0:4057; GFX9-NEXT: s_and_b32 s2, s1, 0xf000f4058; GFX9-NEXT: s_lshr_b32 s3, s0, 164059; GFX9-NEXT: s_lshr_b32 s4, s2, 164060; GFX9-NEXT: s_andn2_b32 s1, 0xf000f, s14061; GFX9-NEXT: s_lshl_b32 s0, s0, s24062; GFX9-NEXT: s_lshl_b32 s2, s3, s44063; GFX9-NEXT: v_pk_lshrrev_b16 v0, 1, v0 op_sel_hi:[0,1]4064; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s24065; GFX9-NEXT: v_pk_lshrrev_b16 v0, s1, v04066; GFX9-NEXT: v_or_b32_e32 v0, s0, v04067; GFX9-NEXT: ; return to shader part epilog4068;4069; GFX10-LABEL: v_fshl_v2i16_svs:4070; GFX10: ; %bb.0:4071; GFX10-NEXT: v_pk_lshrrev_b16 v0, 1, v0 op_sel_hi:[0,1]4072; GFX10-NEXT: s_and_b32 s2, s1, 0xf000f4073; GFX10-NEXT: s_andn2_b32 s1, 0xf000f, s14074; GFX10-NEXT: s_lshr_b32 s3, s0, 164075; GFX10-NEXT: s_lshr_b32 s4, s2, 164076; GFX10-NEXT: v_pk_lshrrev_b16 v0, s1, v04077; GFX10-NEXT: s_lshl_b32 s0, s0, s24078; GFX10-NEXT: s_lshl_b32 s1, s3, s44079; GFX10-NEXT: s_pack_ll_b32_b16 s0, s0, s14080; GFX10-NEXT: v_or_b32_e32 v0, s0, v04081; GFX10-NEXT: ; return to shader part epilog4082;4083; GFX11-LABEL: v_fshl_v2i16_svs:4084; GFX11: ; %bb.0:4085; GFX11-NEXT: v_pk_lshrrev_b16 v0, 1, v0 op_sel_hi:[0,1]4086; GFX11-NEXT: s_and_b32 s2, s1, 0xf000f4087; GFX11-NEXT: s_and_not1_b32 s1, 0xf000f, s14088; GFX11-NEXT: s_lshr_b32 s3, s0, 164089; GFX11-NEXT: s_lshr_b32 s4, s2, 164090; GFX11-NEXT: v_pk_lshrrev_b16 v0, s1, v04091; GFX11-NEXT: s_lshl_b32 s0, s0, s24092; GFX11-NEXT: s_lshl_b32 s1, s3, s44093; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4094; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s14095; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)4096; GFX11-NEXT: v_or_b32_e32 v0, s0, v04097; GFX11-NEXT: ; return to shader part epilog4098 %result = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)4099 %cast = bitcast <2 x i16> %result to float4100 ret float %cast4101}4102 4103define amdgpu_ps float @v_fshl_v2i16_vss(<2 x i16> %lhs, <2 x i16> inreg %rhs, <2 x i16> inreg %amt) {4104; GFX6-LABEL: v_fshl_v2i16_vss:4105; GFX6: ; %bb.0:4106; GFX6-NEXT: s_and_b32 s4, s2, 154107; GFX6-NEXT: s_andn2_b32 s2, 15, s24108; GFX6-NEXT: s_bfe_u32 s0, s0, 0xf00014109; GFX6-NEXT: v_lshlrev_b32_e32 v0, s4, v04110; GFX6-NEXT: s_lshr_b32 s0, s0, s24111; GFX6-NEXT: v_or_b32_e32 v0, s0, v04112; GFX6-NEXT: s_and_b32 s0, s3, 154113; GFX6-NEXT: s_andn2_b32 s2, 15, s34114; GFX6-NEXT: v_lshlrev_b32_e32 v1, s0, v14115; GFX6-NEXT: s_bfe_u32 s0, s1, 0xf00014116; GFX6-NEXT: s_lshr_b32 s0, s0, s24117; GFX6-NEXT: v_or_b32_e32 v1, s0, v14118; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v14119; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v04120; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v14121; GFX6-NEXT: v_or_b32_e32 v0, v0, v14122; GFX6-NEXT: ; return to shader part epilog4123;4124; GFX8-LABEL: v_fshl_v2i16_vss:4125; GFX8: ; %bb.0:4126; GFX8-NEXT: s_and_b32 s3, s1, 154127; GFX8-NEXT: v_lshlrev_b16_e32 v1, s3, v04128; GFX8-NEXT: s_and_b32 s3, 0xffff, s04129; GFX8-NEXT: s_lshr_b32 s2, s1, 164130; GFX8-NEXT: s_andn2_b32 s1, 15, s14131; GFX8-NEXT: s_lshr_b32 s3, s3, 14132; GFX8-NEXT: s_lshr_b32 s1, s3, s14133; GFX8-NEXT: v_or_b32_e32 v1, s1, v14134; GFX8-NEXT: s_and_b32 s1, s2, 154135; GFX8-NEXT: s_andn2_b32 s2, 15, s24136; GFX8-NEXT: v_mov_b32_e32 v2, s14137; GFX8-NEXT: s_lshr_b32 s0, s0, 174138; GFX8-NEXT: v_lshlrev_b16_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14139; GFX8-NEXT: s_lshr_b32 s0, s0, s24140; GFX8-NEXT: v_or_b32_e32 v0, s0, v04141; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v04142; GFX8-NEXT: v_lshlrev_b32_e32 v0, 16, v04143; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4144; GFX8-NEXT: ; return to shader part epilog4145;4146; GFX9-LABEL: v_fshl_v2i16_vss:4147; GFX9: ; %bb.0:4148; GFX9-NEXT: s_and_b32 s2, s1, 0xf000f4149; GFX9-NEXT: v_pk_lshlrev_b16 v0, s2, v04150; GFX9-NEXT: s_lshr_b32 s2, s0, 164151; GFX9-NEXT: s_and_b32 s0, s0, 0xffff4152; GFX9-NEXT: s_lshr_b32 s0, s0, 0x100014153; GFX9-NEXT: s_lshr_b32 s2, s2, 14154; GFX9-NEXT: s_andn2_b32 s1, 0xf000f, s14155; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s24156; GFX9-NEXT: s_lshr_b32 s2, s0, 164157; GFX9-NEXT: s_and_b32 s0, s0, 0xffff4158; GFX9-NEXT: s_lshr_b32 s3, s1, 164159; GFX9-NEXT: s_lshr_b32 s0, s0, s14160; GFX9-NEXT: s_lshr_b32 s1, s2, s34161; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s14162; GFX9-NEXT: v_or_b32_e32 v0, s0, v04163; GFX9-NEXT: ; return to shader part epilog4164;4165; GFX10-LABEL: v_fshl_v2i16_vss:4166; GFX10: ; %bb.0:4167; GFX10-NEXT: s_and_b32 s3, s0, 0xffff4168; GFX10-NEXT: s_lshr_b32 s0, s0, 164169; GFX10-NEXT: s_lshr_b32 s3, s3, 0x100014170; GFX10-NEXT: s_lshr_b32 s0, s0, 14171; GFX10-NEXT: s_and_b32 s2, s1, 0xf000f4172; GFX10-NEXT: s_andn2_b32 s1, 0xf000f, s14173; GFX10-NEXT: s_pack_ll_b32_b16 s0, s3, s04174; GFX10-NEXT: v_pk_lshlrev_b16 v0, s2, v04175; GFX10-NEXT: s_lshr_b32 s2, s0, 164176; GFX10-NEXT: s_and_b32 s0, s0, 0xffff4177; GFX10-NEXT: s_lshr_b32 s3, s1, 164178; GFX10-NEXT: s_lshr_b32 s0, s0, s14179; GFX10-NEXT: s_lshr_b32 s1, s2, s34180; GFX10-NEXT: s_pack_ll_b32_b16 s0, s0, s14181; GFX10-NEXT: v_or_b32_e32 v0, s0, v04182; GFX10-NEXT: ; return to shader part epilog4183;4184; GFX11-LABEL: v_fshl_v2i16_vss:4185; GFX11: ; %bb.0:4186; GFX11-NEXT: s_and_b32 s3, s0, 0xffff4187; GFX11-NEXT: s_lshr_b32 s0, s0, 164188; GFX11-NEXT: s_lshr_b32 s3, s3, 0x100014189; GFX11-NEXT: s_lshr_b32 s0, s0, 14190; GFX11-NEXT: s_and_b32 s2, s1, 0xf000f4191; GFX11-NEXT: s_and_not1_b32 s1, 0xf000f, s14192; GFX11-NEXT: s_pack_ll_b32_b16 s0, s3, s04193; GFX11-NEXT: v_pk_lshlrev_b16 v0, s2, v04194; GFX11-NEXT: s_lshr_b32 s2, s0, 164195; GFX11-NEXT: s_and_b32 s0, s0, 0xffff4196; GFX11-NEXT: s_lshr_b32 s3, s1, 164197; GFX11-NEXT: s_lshr_b32 s0, s0, s14198; GFX11-NEXT: s_lshr_b32 s1, s2, s34199; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)4200; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s14201; GFX11-NEXT: v_or_b32_e32 v0, s0, v04202; GFX11-NEXT: ; return to shader part epilog4203 %result = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)4204 %cast = bitcast <2 x i16> %result to float4205 ret float %cast4206}4207 4208 4209define amdgpu_ps i48 @s_fshl_v3i16(<3 x i16> inreg %lhs, <3 x i16> inreg %rhs, <3 x i16> inreg %amt) {4210; GFX6-LABEL: s_fshl_v3i16:4211; GFX6: ; %bb.0:4212; GFX6-NEXT: s_and_b32 s9, s6, 154213; GFX6-NEXT: s_andn2_b32 s6, 15, s64214; GFX6-NEXT: s_bfe_u32 s3, s3, 0xf00014215; GFX6-NEXT: s_lshl_b32 s0, s0, s94216; GFX6-NEXT: s_lshr_b32 s3, s3, s64217; GFX6-NEXT: s_or_b32 s0, s0, s34218; GFX6-NEXT: s_and_b32 s3, s7, 154219; GFX6-NEXT: s_andn2_b32 s6, 15, s74220; GFX6-NEXT: s_lshl_b32 s1, s1, s34221; GFX6-NEXT: s_bfe_u32 s3, s4, 0xf00014222; GFX6-NEXT: s_lshr_b32 s3, s3, s64223; GFX6-NEXT: s_or_b32 s1, s1, s34224; GFX6-NEXT: s_and_b32 s3, s8, 154225; GFX6-NEXT: s_andn2_b32 s4, 15, s84226; GFX6-NEXT: s_lshl_b32 s2, s2, s34227; GFX6-NEXT: s_bfe_u32 s3, s5, 0xf00014228; GFX6-NEXT: s_lshr_b32 s3, s3, s44229; GFX6-NEXT: s_and_b32 s1, 0xffff, s14230; GFX6-NEXT: s_or_b32 s2, s2, s34231; GFX6-NEXT: s_and_b32 s0, 0xffff, s04232; GFX6-NEXT: s_lshl_b32 s1, s1, 164233; GFX6-NEXT: s_or_b32 s0, s0, s14234; GFX6-NEXT: s_and_b32 s1, 0xffff, s24235; GFX6-NEXT: ; return to shader part epilog4236;4237; GFX8-LABEL: s_fshl_v3i16:4238; GFX8: ; %bb.0:4239; GFX8-NEXT: s_and_b32 s8, s4, 154240; GFX8-NEXT: s_lshr_b32 s6, s0, 164241; GFX8-NEXT: s_lshl_b32 s0, s0, s84242; GFX8-NEXT: s_and_b32 s8, 0xffff, s24243; GFX8-NEXT: s_lshr_b32 s7, s4, 164244; GFX8-NEXT: s_andn2_b32 s4, 15, s44245; GFX8-NEXT: s_lshr_b32 s8, s8, 14246; GFX8-NEXT: s_lshr_b32 s4, s8, s44247; GFX8-NEXT: s_or_b32 s0, s0, s44248; GFX8-NEXT: s_and_b32 s4, s7, 154249; GFX8-NEXT: s_andn2_b32 s7, 15, s74250; GFX8-NEXT: s_lshr_b32 s2, s2, 174251; GFX8-NEXT: s_lshl_b32 s4, s6, s44252; GFX8-NEXT: s_lshr_b32 s2, s2, s74253; GFX8-NEXT: s_and_b32 s3, 0xffff, s34254; GFX8-NEXT: s_or_b32 s2, s4, s24255; GFX8-NEXT: s_and_b32 s4, s5, 154256; GFX8-NEXT: s_andn2_b32 s5, 15, s54257; GFX8-NEXT: s_lshr_b32 s3, s3, 14258; GFX8-NEXT: s_lshl_b32 s1, s1, s44259; GFX8-NEXT: s_lshr_b32 s3, s3, s54260; GFX8-NEXT: s_and_b32 s2, 0xffff, s24261; GFX8-NEXT: s_or_b32 s1, s1, s34262; GFX8-NEXT: s_and_b32 s0, 0xffff, s04263; GFX8-NEXT: s_lshl_b32 s2, s2, 164264; GFX8-NEXT: s_or_b32 s0, s0, s24265; GFX8-NEXT: s_and_b32 s1, 0xffff, s14266; GFX8-NEXT: ; return to shader part epilog4267;4268; GFX9-LABEL: s_fshl_v3i16:4269; GFX9: ; %bb.0:4270; GFX9-NEXT: s_and_b32 s6, s4, 0xf000f4271; GFX9-NEXT: s_lshr_b32 s7, s0, 164272; GFX9-NEXT: s_lshr_b32 s8, s6, 164273; GFX9-NEXT: s_lshl_b32 s0, s0, s64274; GFX9-NEXT: s_lshl_b32 s6, s7, s84275; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s64276; GFX9-NEXT: s_lshr_b32 s6, s2, 164277; GFX9-NEXT: s_and_b32 s2, s2, 0xffff4278; GFX9-NEXT: s_lshr_b32 s2, s2, 0x100014279; GFX9-NEXT: s_lshr_b32 s6, s6, 14280; GFX9-NEXT: s_andn2_b32 s4, 0xf000f, s44281; GFX9-NEXT: s_pack_ll_b32_b16 s2, s2, s64282; GFX9-NEXT: s_lshr_b32 s6, s2, 164283; GFX9-NEXT: s_and_b32 s2, s2, 0xffff4284; GFX9-NEXT: s_lshr_b32 s7, s4, 164285; GFX9-NEXT: s_lshr_b32 s2, s2, s44286; GFX9-NEXT: s_lshr_b32 s4, s6, s74287; GFX9-NEXT: s_pack_ll_b32_b16 s2, s2, s44288; GFX9-NEXT: s_or_b32 s0, s0, s24289; GFX9-NEXT: s_and_b32 s2, s5, 0xf000f4290; GFX9-NEXT: s_andn2_b32 s4, 0xf000f, s54291; GFX9-NEXT: s_lshr_b32 s5, s1, 164292; GFX9-NEXT: s_lshr_b32 s6, s2, 164293; GFX9-NEXT: s_lshl_b32 s1, s1, s24294; GFX9-NEXT: s_lshl_b32 s2, s5, s64295; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s24296; GFX9-NEXT: s_lshr_b32 s2, s3, 164297; GFX9-NEXT: s_and_b32 s3, s3, 0xffff4298; GFX9-NEXT: s_lshr_b32 s3, s3, 0x100014299; GFX9-NEXT: s_lshr_b32 s2, s2, 14300; GFX9-NEXT: s_pack_ll_b32_b16 s2, s3, s24301; GFX9-NEXT: s_lshr_b32 s3, s2, 164302; GFX9-NEXT: s_and_b32 s2, s2, 0xffff4303; GFX9-NEXT: s_lshr_b32 s5, s4, 164304; GFX9-NEXT: s_lshr_b32 s2, s2, s44305; GFX9-NEXT: s_lshr_b32 s3, s3, s54306; GFX9-NEXT: s_pack_ll_b32_b16 s2, s2, s34307; GFX9-NEXT: s_or_b32 s1, s1, s24308; GFX9-NEXT: s_lshr_b32 s2, s0, 164309; GFX9-NEXT: s_and_b32 s0, s0, 0xffff4310; GFX9-NEXT: s_lshl_b32 s2, s2, 164311; GFX9-NEXT: s_or_b32 s0, s0, s24312; GFX9-NEXT: s_and_b32 s1, s1, 0xffff4313; GFX9-NEXT: ; return to shader part epilog4314;4315; GFX10-LABEL: s_fshl_v3i16:4316; GFX10: ; %bb.0:4317; GFX10-NEXT: s_and_b32 s9, s2, 0xffff4318; GFX10-NEXT: s_lshr_b32 s2, s2, 164319; GFX10-NEXT: s_and_b32 s6, s4, 0xf000f4320; GFX10-NEXT: s_lshr_b32 s9, s9, 0x100014321; GFX10-NEXT: s_lshr_b32 s2, s2, 14322; GFX10-NEXT: s_andn2_b32 s4, 0xf000f, s44323; GFX10-NEXT: s_lshr_b32 s7, s0, 164324; GFX10-NEXT: s_lshr_b32 s8, s6, 164325; GFX10-NEXT: s_pack_ll_b32_b16 s2, s9, s24326; GFX10-NEXT: s_lshl_b32 s0, s0, s64327; GFX10-NEXT: s_lshl_b32 s6, s7, s84328; GFX10-NEXT: s_lshr_b32 s7, s2, 164329; GFX10-NEXT: s_and_b32 s2, s2, 0xffff4330; GFX10-NEXT: s_lshr_b32 s8, s4, 164331; GFX10-NEXT: s_lshr_b32 s2, s2, s44332; GFX10-NEXT: s_lshr_b32 s4, s7, s84333; GFX10-NEXT: s_pack_ll_b32_b16 s0, s0, s64334; GFX10-NEXT: s_pack_ll_b32_b16 s2, s2, s44335; GFX10-NEXT: s_and_b32 s7, s3, 0xffff4336; GFX10-NEXT: s_lshr_b32 s3, s3, 164337; GFX10-NEXT: s_or_b32 s0, s0, s24338; GFX10-NEXT: s_and_b32 s2, s5, 0xf000f4339; GFX10-NEXT: s_lshr_b32 s7, s7, 0x100014340; GFX10-NEXT: s_lshr_b32 s3, s3, 14341; GFX10-NEXT: s_andn2_b32 s4, 0xf000f, s54342; GFX10-NEXT: s_lshr_b32 s5, s1, 164343; GFX10-NEXT: s_lshr_b32 s6, s2, 164344; GFX10-NEXT: s_lshl_b32 s1, s1, s24345; GFX10-NEXT: s_pack_ll_b32_b16 s2, s7, s34346; GFX10-NEXT: s_lshl_b32 s3, s5, s64347; GFX10-NEXT: s_lshr_b32 s5, s2, 164348; GFX10-NEXT: s_and_b32 s2, s2, 0xffff4349; GFX10-NEXT: s_lshr_b32 s6, s4, 164350; GFX10-NEXT: s_lshr_b32 s2, s2, s44351; GFX10-NEXT: s_lshr_b32 s4, s5, s64352; GFX10-NEXT: s_pack_ll_b32_b16 s1, s1, s34353; GFX10-NEXT: s_pack_ll_b32_b16 s2, s2, s44354; GFX10-NEXT: s_lshr_b32 s3, s0, 164355; GFX10-NEXT: s_and_b32 s0, s0, 0xffff4356; GFX10-NEXT: s_lshl_b32 s3, s3, 164357; GFX10-NEXT: s_or_b32 s1, s1, s24358; GFX10-NEXT: s_or_b32 s0, s0, s34359; GFX10-NEXT: s_and_b32 s1, s1, 0xffff4360; GFX10-NEXT: ; return to shader part epilog4361;4362; GFX11-LABEL: s_fshl_v3i16:4363; GFX11: ; %bb.0:4364; GFX11-NEXT: s_and_b32 s9, s2, 0xffff4365; GFX11-NEXT: s_lshr_b32 s2, s2, 164366; GFX11-NEXT: s_and_b32 s6, s4, 0xf000f4367; GFX11-NEXT: s_lshr_b32 s9, s9, 0x100014368; GFX11-NEXT: s_lshr_b32 s2, s2, 14369; GFX11-NEXT: s_and_not1_b32 s4, 0xf000f, s44370; GFX11-NEXT: s_lshr_b32 s7, s0, 164371; GFX11-NEXT: s_lshr_b32 s8, s6, 164372; GFX11-NEXT: s_pack_ll_b32_b16 s2, s9, s24373; GFX11-NEXT: s_lshl_b32 s0, s0, s64374; GFX11-NEXT: s_lshl_b32 s6, s7, s84375; GFX11-NEXT: s_lshr_b32 s7, s2, 164376; GFX11-NEXT: s_and_b32 s2, s2, 0xffff4377; GFX11-NEXT: s_lshr_b32 s8, s4, 164378; GFX11-NEXT: s_lshr_b32 s2, s2, s44379; GFX11-NEXT: s_lshr_b32 s4, s7, s84380; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s64381; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44382; GFX11-NEXT: s_and_b32 s7, s3, 0xffff4383; GFX11-NEXT: s_lshr_b32 s3, s3, 164384; GFX11-NEXT: s_or_b32 s0, s0, s24385; GFX11-NEXT: s_and_b32 s2, s5, 0xf000f4386; GFX11-NEXT: s_lshr_b32 s7, s7, 0x100014387; GFX11-NEXT: s_lshr_b32 s3, s3, 14388; GFX11-NEXT: s_and_not1_b32 s4, 0xf000f, s54389; GFX11-NEXT: s_lshr_b32 s5, s1, 164390; GFX11-NEXT: s_lshr_b32 s6, s2, 164391; GFX11-NEXT: s_lshl_b32 s1, s1, s24392; GFX11-NEXT: s_pack_ll_b32_b16 s2, s7, s34393; GFX11-NEXT: s_lshl_b32 s3, s5, s64394; GFX11-NEXT: s_lshr_b32 s5, s2, 164395; GFX11-NEXT: s_and_b32 s2, s2, 0xffff4396; GFX11-NEXT: s_lshr_b32 s6, s4, 164397; GFX11-NEXT: s_lshr_b32 s2, s2, s44398; GFX11-NEXT: s_lshr_b32 s4, s5, s64399; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s34400; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44401; GFX11-NEXT: s_lshr_b32 s3, s0, 164402; GFX11-NEXT: s_and_b32 s0, s0, 0xffff4403; GFX11-NEXT: s_lshl_b32 s3, s3, 164404; GFX11-NEXT: s_or_b32 s1, s1, s24405; GFX11-NEXT: s_or_b32 s0, s0, s34406; GFX11-NEXT: s_and_b32 s1, s1, 0xffff4407; GFX11-NEXT: ; return to shader part epilog4408 %result = call <3 x i16> @llvm.fshl.v3i16(<3 x i16> %lhs, <3 x i16> %rhs, <3 x i16> %amt)4409 %cast = bitcast <3 x i16> %result to i484410 ret i48 %cast4411}4412 4413define <3 x half> @v_fshl_v3i16(<3 x i16> %lhs, <3 x i16> %rhs, <3 x i16> %amt) {4414; GFX6-LABEL: v_fshl_v3i16:4415; GFX6: ; %bb.0:4416; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4417; GFX6-NEXT: v_and_b32_e32 v9, 15, v64418; GFX6-NEXT: v_xor_b32_e32 v6, -1, v64419; GFX6-NEXT: v_and_b32_e32 v6, 15, v64420; GFX6-NEXT: v_bfe_u32 v3, v3, 1, 154421; GFX6-NEXT: v_lshlrev_b32_e32 v0, v9, v04422; GFX6-NEXT: v_lshrrev_b32_e32 v3, v6, v34423; GFX6-NEXT: v_or_b32_e32 v0, v0, v34424; GFX6-NEXT: v_and_b32_e32 v3, 15, v74425; GFX6-NEXT: v_xor_b32_e32 v6, -1, v74426; GFX6-NEXT: v_and_b32_e32 v6, 15, v64427; GFX6-NEXT: v_lshlrev_b32_e32 v1, v3, v14428; GFX6-NEXT: v_bfe_u32 v3, v4, 1, 154429; GFX6-NEXT: v_lshrrev_b32_e32 v3, v6, v34430; GFX6-NEXT: v_or_b32_e32 v1, v1, v34431; GFX6-NEXT: v_and_b32_e32 v3, 15, v84432; GFX6-NEXT: v_xor_b32_e32 v4, -1, v84433; GFX6-NEXT: v_and_b32_e32 v4, 15, v44434; GFX6-NEXT: v_lshlrev_b32_e32 v2, v3, v24435; GFX6-NEXT: v_bfe_u32 v3, v5, 1, 154436; GFX6-NEXT: v_lshrrev_b32_e32 v3, v4, v34437; GFX6-NEXT: v_or_b32_e32 v2, v2, v34438; GFX6-NEXT: s_setpc_b64 s[30:31]4439;4440; GFX8-LABEL: v_fshl_v3i16:4441; GFX8: ; %bb.0:4442; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4443; GFX8-NEXT: v_xor_b32_e32 v7, -1, v44444; GFX8-NEXT: v_and_b32_e32 v6, 15, v44445; GFX8-NEXT: v_and_b32_e32 v7, 15, v74446; GFX8-NEXT: v_lshrrev_b16_e32 v8, 1, v24447; GFX8-NEXT: v_lshlrev_b16_e32 v6, v6, v04448; GFX8-NEXT: v_lshrrev_b16_e32 v7, v7, v84449; GFX8-NEXT: v_or_b32_e32 v6, v6, v74450; GFX8-NEXT: v_mov_b32_e32 v7, 154451; GFX8-NEXT: v_mov_b32_e32 v8, -14452; GFX8-NEXT: v_and_b32_sdwa v7, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4453; GFX8-NEXT: v_xor_b32_sdwa v4, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4454; GFX8-NEXT: v_and_b32_e32 v4, 15, v44455; GFX8-NEXT: v_lshrrev_b32_e32 v2, 17, v24456; GFX8-NEXT: v_lshlrev_b16_sdwa v0, v7, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14457; GFX8-NEXT: v_lshrrev_b16_e32 v2, v4, v24458; GFX8-NEXT: v_or_b32_e32 v0, v0, v24459; GFX8-NEXT: v_and_b32_e32 v2, 15, v54460; GFX8-NEXT: v_xor_b32_e32 v4, -1, v54461; GFX8-NEXT: v_and_b32_e32 v4, 15, v44462; GFX8-NEXT: v_lshlrev_b16_e32 v1, v2, v14463; GFX8-NEXT: v_lshrrev_b16_e32 v2, 1, v34464; GFX8-NEXT: v_lshrrev_b16_e32 v2, v4, v24465; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v04466; GFX8-NEXT: v_or_b32_e32 v1, v1, v24467; GFX8-NEXT: v_lshlrev_b32_e32 v0, 16, v04468; GFX8-NEXT: v_or_b32_sdwa v0, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4469; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v14470; GFX8-NEXT: s_setpc_b64 s[30:31]4471;4472; GFX9-LABEL: v_fshl_v3i16:4473; GFX9: ; %bb.0:4474; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4475; GFX9-NEXT: v_and_b32_e32 v6, 0xf000f, v44476; GFX9-NEXT: v_xor_b32_e32 v4, -1, v44477; GFX9-NEXT: v_and_b32_e32 v4, 0xf000f, v44478; GFX9-NEXT: v_pk_lshrrev_b16 v2, 1, v2 op_sel_hi:[0,1]4479; GFX9-NEXT: v_pk_lshlrev_b16 v0, v6, v04480; GFX9-NEXT: v_pk_lshrrev_b16 v2, v4, v24481; GFX9-NEXT: v_or_b32_e32 v0, v0, v24482; GFX9-NEXT: v_and_b32_e32 v2, 0xf000f, v54483; GFX9-NEXT: v_xor_b32_e32 v4, -1, v54484; GFX9-NEXT: v_and_b32_e32 v4, 0xf000f, v44485; GFX9-NEXT: v_pk_lshlrev_b16 v1, v2, v14486; GFX9-NEXT: v_pk_lshrrev_b16 v2, 1, v3 op_sel_hi:[0,1]4487; GFX9-NEXT: v_pk_lshrrev_b16 v2, v4, v24488; GFX9-NEXT: v_or_b32_e32 v1, v1, v24489; GFX9-NEXT: s_setpc_b64 s[30:31]4490;4491; GFX10-LABEL: v_fshl_v3i16:4492; GFX10: ; %bb.0:4493; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4494; GFX10-NEXT: v_xor_b32_e32 v6, -1, v44495; GFX10-NEXT: v_xor_b32_e32 v7, -1, v54496; GFX10-NEXT: v_and_b32_e32 v4, 0xf000f, v44497; GFX10-NEXT: v_pk_lshrrev_b16 v2, 1, v2 op_sel_hi:[0,1]4498; GFX10-NEXT: v_and_b32_e32 v5, 0xf000f, v54499; GFX10-NEXT: v_and_b32_e32 v6, 0xf000f, v64500; GFX10-NEXT: v_pk_lshrrev_b16 v3, 1, v3 op_sel_hi:[0,1]4501; GFX10-NEXT: v_and_b32_e32 v7, 0xf000f, v74502; GFX10-NEXT: v_pk_lshlrev_b16 v0, v4, v04503; GFX10-NEXT: v_pk_lshlrev_b16 v1, v5, v14504; GFX10-NEXT: v_pk_lshrrev_b16 v2, v6, v24505; GFX10-NEXT: v_pk_lshrrev_b16 v3, v7, v34506; GFX10-NEXT: v_or_b32_e32 v0, v0, v24507; GFX10-NEXT: v_or_b32_e32 v1, v1, v34508; GFX10-NEXT: s_setpc_b64 s[30:31]4509;4510; GFX11-LABEL: v_fshl_v3i16:4511; GFX11: ; %bb.0:4512; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4513; GFX11-NEXT: v_xor_b32_e32 v6, -1, v44514; GFX11-NEXT: v_xor_b32_e32 v7, -1, v54515; GFX11-NEXT: v_and_b32_e32 v4, 0xf000f, v44516; GFX11-NEXT: v_pk_lshrrev_b16 v2, 1, v2 op_sel_hi:[0,1]4517; GFX11-NEXT: v_and_b32_e32 v5, 0xf000f, v54518; GFX11-NEXT: v_and_b32_e32 v6, 0xf000f, v64519; GFX11-NEXT: v_pk_lshrrev_b16 v3, 1, v3 op_sel_hi:[0,1]4520; GFX11-NEXT: v_and_b32_e32 v7, 0xf000f, v74521; GFX11-NEXT: v_pk_lshlrev_b16 v0, v4, v04522; GFX11-NEXT: v_pk_lshlrev_b16 v1, v5, v14523; GFX11-NEXT: v_pk_lshrrev_b16 v2, v6, v24524; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)4525; GFX11-NEXT: v_pk_lshrrev_b16 v3, v7, v34526; GFX11-NEXT: v_or_b32_e32 v0, v0, v24527; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)4528; GFX11-NEXT: v_or_b32_e32 v1, v1, v34529; GFX11-NEXT: s_setpc_b64 s[30:31]4530 %result = call <3 x i16> @llvm.fshl.v3i16(<3 x i16> %lhs, <3 x i16> %rhs, <3 x i16> %amt)4531 %cast.result = bitcast <3 x i16> %result to <3 x half>4532 ret <3 x half> %cast.result4533}4534 4535define amdgpu_ps <2 x i32> @s_fshl_v4i16(<4 x i16> inreg %lhs, <4 x i16> inreg %rhs, <4 x i16> inreg %amt) {4536; GFX6-LABEL: s_fshl_v4i16:4537; GFX6: ; %bb.0:4538; GFX6-NEXT: s_and_b32 s12, s8, 154539; GFX6-NEXT: s_andn2_b32 s8, 15, s84540; GFX6-NEXT: s_bfe_u32 s4, s4, 0xf00014541; GFX6-NEXT: s_lshl_b32 s0, s0, s124542; GFX6-NEXT: s_lshr_b32 s4, s4, s84543; GFX6-NEXT: s_or_b32 s0, s0, s44544; GFX6-NEXT: s_and_b32 s4, s9, 154545; GFX6-NEXT: s_andn2_b32 s8, 15, s94546; GFX6-NEXT: s_lshl_b32 s1, s1, s44547; GFX6-NEXT: s_bfe_u32 s4, s5, 0xf00014548; GFX6-NEXT: s_lshr_b32 s4, s4, s84549; GFX6-NEXT: s_or_b32 s1, s1, s44550; GFX6-NEXT: s_and_b32 s4, s10, 154551; GFX6-NEXT: s_andn2_b32 s5, 15, s104552; GFX6-NEXT: s_lshl_b32 s2, s2, s44553; GFX6-NEXT: s_bfe_u32 s4, s6, 0xf00014554; GFX6-NEXT: s_lshr_b32 s4, s4, s54555; GFX6-NEXT: s_or_b32 s2, s2, s44556; GFX6-NEXT: s_and_b32 s4, s11, 154557; GFX6-NEXT: s_andn2_b32 s5, 15, s114558; GFX6-NEXT: s_lshl_b32 s3, s3, s44559; GFX6-NEXT: s_bfe_u32 s4, s7, 0xf00014560; GFX6-NEXT: s_lshr_b32 s4, s4, s54561; GFX6-NEXT: s_and_b32 s1, 0xffff, s14562; GFX6-NEXT: s_or_b32 s3, s3, s44563; GFX6-NEXT: s_and_b32 s0, 0xffff, s04564; GFX6-NEXT: s_lshl_b32 s1, s1, 164565; GFX6-NEXT: s_or_b32 s0, s0, s14566; GFX6-NEXT: s_and_b32 s1, 0xffff, s24567; GFX6-NEXT: s_and_b32 s2, 0xffff, s34568; GFX6-NEXT: s_lshl_b32 s2, s2, 164569; GFX6-NEXT: s_or_b32 s1, s1, s24570; GFX6-NEXT: ; return to shader part epilog4571;4572; GFX8-LABEL: s_fshl_v4i16:4573; GFX8: ; %bb.0:4574; GFX8-NEXT: s_and_b32 s10, s4, 154575; GFX8-NEXT: s_lshr_b32 s6, s0, 164576; GFX8-NEXT: s_lshl_b32 s0, s0, s104577; GFX8-NEXT: s_and_b32 s10, 0xffff, s24578; GFX8-NEXT: s_lshr_b32 s8, s4, 164579; GFX8-NEXT: s_andn2_b32 s4, 15, s44580; GFX8-NEXT: s_lshr_b32 s10, s10, 14581; GFX8-NEXT: s_lshr_b32 s4, s10, s44582; GFX8-NEXT: s_or_b32 s0, s0, s44583; GFX8-NEXT: s_and_b32 s4, s8, 154584; GFX8-NEXT: s_andn2_b32 s8, 15, s84585; GFX8-NEXT: s_lshr_b32 s2, s2, 174586; GFX8-NEXT: s_lshl_b32 s4, s6, s44587; GFX8-NEXT: s_lshr_b32 s2, s2, s84588; GFX8-NEXT: s_or_b32 s2, s4, s24589; GFX8-NEXT: s_and_b32 s4, s5, 154590; GFX8-NEXT: s_lshr_b32 s7, s1, 164591; GFX8-NEXT: s_lshl_b32 s1, s1, s44592; GFX8-NEXT: s_and_b32 s4, 0xffff, s34593; GFX8-NEXT: s_lshr_b32 s9, s5, 164594; GFX8-NEXT: s_andn2_b32 s5, 15, s54595; GFX8-NEXT: s_lshr_b32 s4, s4, 14596; GFX8-NEXT: s_lshr_b32 s4, s4, s54597; GFX8-NEXT: s_or_b32 s1, s1, s44598; GFX8-NEXT: s_and_b32 s4, s9, 154599; GFX8-NEXT: s_andn2_b32 s5, 15, s94600; GFX8-NEXT: s_lshr_b32 s3, s3, 174601; GFX8-NEXT: s_lshl_b32 s4, s7, s44602; GFX8-NEXT: s_lshr_b32 s3, s3, s54603; GFX8-NEXT: s_and_b32 s2, 0xffff, s24604; GFX8-NEXT: s_or_b32 s3, s4, s34605; GFX8-NEXT: s_and_b32 s0, 0xffff, s04606; GFX8-NEXT: s_lshl_b32 s2, s2, 164607; GFX8-NEXT: s_or_b32 s0, s0, s24608; GFX8-NEXT: s_and_b32 s2, 0xffff, s34609; GFX8-NEXT: s_and_b32 s1, 0xffff, s14610; GFX8-NEXT: s_lshl_b32 s2, s2, 164611; GFX8-NEXT: s_or_b32 s1, s1, s24612; GFX8-NEXT: ; return to shader part epilog4613;4614; GFX9-LABEL: s_fshl_v4i16:4615; GFX9: ; %bb.0:4616; GFX9-NEXT: s_and_b32 s6, s4, 0xf000f4617; GFX9-NEXT: s_lshr_b32 s7, s0, 164618; GFX9-NEXT: s_lshr_b32 s8, s6, 164619; GFX9-NEXT: s_lshl_b32 s0, s0, s64620; GFX9-NEXT: s_lshl_b32 s6, s7, s84621; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s64622; GFX9-NEXT: s_lshr_b32 s6, s2, 164623; GFX9-NEXT: s_and_b32 s2, s2, 0xffff4624; GFX9-NEXT: s_lshr_b32 s2, s2, 0x100014625; GFX9-NEXT: s_lshr_b32 s6, s6, 14626; GFX9-NEXT: s_andn2_b32 s4, 0xf000f, s44627; GFX9-NEXT: s_pack_ll_b32_b16 s2, s2, s64628; GFX9-NEXT: s_lshr_b32 s6, s2, 164629; GFX9-NEXT: s_and_b32 s2, s2, 0xffff4630; GFX9-NEXT: s_lshr_b32 s7, s4, 164631; GFX9-NEXT: s_lshr_b32 s2, s2, s44632; GFX9-NEXT: s_lshr_b32 s4, s6, s74633; GFX9-NEXT: s_pack_ll_b32_b16 s2, s2, s44634; GFX9-NEXT: s_or_b32 s0, s0, s24635; GFX9-NEXT: s_and_b32 s2, s5, 0xf000f4636; GFX9-NEXT: s_andn2_b32 s4, 0xf000f, s54637; GFX9-NEXT: s_lshr_b32 s5, s1, 164638; GFX9-NEXT: s_lshr_b32 s6, s2, 164639; GFX9-NEXT: s_lshl_b32 s1, s1, s24640; GFX9-NEXT: s_lshl_b32 s2, s5, s64641; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s24642; GFX9-NEXT: s_lshr_b32 s2, s3, 164643; GFX9-NEXT: s_and_b32 s3, s3, 0xffff4644; GFX9-NEXT: s_lshr_b32 s3, s3, 0x100014645; GFX9-NEXT: s_lshr_b32 s2, s2, 14646; GFX9-NEXT: s_pack_ll_b32_b16 s2, s3, s24647; GFX9-NEXT: s_lshr_b32 s3, s2, 164648; GFX9-NEXT: s_and_b32 s2, s2, 0xffff4649; GFX9-NEXT: s_lshr_b32 s5, s4, 164650; GFX9-NEXT: s_lshr_b32 s2, s2, s44651; GFX9-NEXT: s_lshr_b32 s3, s3, s54652; GFX9-NEXT: s_pack_ll_b32_b16 s2, s2, s34653; GFX9-NEXT: s_or_b32 s1, s1, s24654; GFX9-NEXT: ; return to shader part epilog4655;4656; GFX10-LABEL: s_fshl_v4i16:4657; GFX10: ; %bb.0:4658; GFX10-NEXT: s_and_b32 s9, s2, 0xffff4659; GFX10-NEXT: s_lshr_b32 s2, s2, 164660; GFX10-NEXT: s_and_b32 s6, s4, 0xf000f4661; GFX10-NEXT: s_lshr_b32 s9, s9, 0x100014662; GFX10-NEXT: s_lshr_b32 s2, s2, 14663; GFX10-NEXT: s_andn2_b32 s4, 0xf000f, s44664; GFX10-NEXT: s_lshr_b32 s7, s0, 164665; GFX10-NEXT: s_lshr_b32 s8, s6, 164666; GFX10-NEXT: s_pack_ll_b32_b16 s2, s9, s24667; GFX10-NEXT: s_lshl_b32 s0, s0, s64668; GFX10-NEXT: s_lshl_b32 s6, s7, s84669; GFX10-NEXT: s_lshr_b32 s7, s2, 164670; GFX10-NEXT: s_and_b32 s2, s2, 0xffff4671; GFX10-NEXT: s_lshr_b32 s8, s4, 164672; GFX10-NEXT: s_lshr_b32 s2, s2, s44673; GFX10-NEXT: s_lshr_b32 s4, s7, s84674; GFX10-NEXT: s_and_b32 s8, s3, 0xffff4675; GFX10-NEXT: s_lshr_b32 s3, s3, 164676; GFX10-NEXT: s_pack_ll_b32_b16 s2, s2, s44677; GFX10-NEXT: s_and_b32 s4, s5, 0xf000f4678; GFX10-NEXT: s_lshr_b32 s8, s8, 0x100014679; GFX10-NEXT: s_lshr_b32 s3, s3, 14680; GFX10-NEXT: s_pack_ll_b32_b16 s0, s0, s64681; GFX10-NEXT: s_andn2_b32 s5, 0xf000f, s54682; GFX10-NEXT: s_lshr_b32 s6, s1, 164683; GFX10-NEXT: s_lshr_b32 s7, s4, 164684; GFX10-NEXT: s_pack_ll_b32_b16 s3, s8, s34685; GFX10-NEXT: s_lshl_b32 s1, s1, s44686; GFX10-NEXT: s_lshl_b32 s4, s6, s74687; GFX10-NEXT: s_lshr_b32 s6, s3, 164688; GFX10-NEXT: s_and_b32 s3, s3, 0xffff4689; GFX10-NEXT: s_lshr_b32 s7, s5, 164690; GFX10-NEXT: s_lshr_b32 s3, s3, s54691; GFX10-NEXT: s_lshr_b32 s5, s6, s74692; GFX10-NEXT: s_pack_ll_b32_b16 s1, s1, s44693; GFX10-NEXT: s_pack_ll_b32_b16 s3, s3, s54694; GFX10-NEXT: s_or_b32 s0, s0, s24695; GFX10-NEXT: s_or_b32 s1, s1, s34696; GFX10-NEXT: ; return to shader part epilog4697;4698; GFX11-LABEL: s_fshl_v4i16:4699; GFX11: ; %bb.0:4700; GFX11-NEXT: s_and_b32 s9, s2, 0xffff4701; GFX11-NEXT: s_lshr_b32 s2, s2, 164702; GFX11-NEXT: s_and_b32 s6, s4, 0xf000f4703; GFX11-NEXT: s_lshr_b32 s9, s9, 0x100014704; GFX11-NEXT: s_lshr_b32 s2, s2, 14705; GFX11-NEXT: s_and_not1_b32 s4, 0xf000f, s44706; GFX11-NEXT: s_lshr_b32 s7, s0, 164707; GFX11-NEXT: s_lshr_b32 s8, s6, 164708; GFX11-NEXT: s_pack_ll_b32_b16 s2, s9, s24709; GFX11-NEXT: s_lshl_b32 s0, s0, s64710; GFX11-NEXT: s_lshl_b32 s6, s7, s84711; GFX11-NEXT: s_lshr_b32 s7, s2, 164712; GFX11-NEXT: s_and_b32 s2, s2, 0xffff4713; GFX11-NEXT: s_lshr_b32 s8, s4, 164714; GFX11-NEXT: s_lshr_b32 s2, s2, s44715; GFX11-NEXT: s_lshr_b32 s4, s7, s84716; GFX11-NEXT: s_and_b32 s8, s3, 0xffff4717; GFX11-NEXT: s_lshr_b32 s3, s3, 164718; GFX11-NEXT: s_pack_ll_b32_b16 s2, s2, s44719; GFX11-NEXT: s_and_b32 s4, s5, 0xf000f4720; GFX11-NEXT: s_lshr_b32 s8, s8, 0x100014721; GFX11-NEXT: s_lshr_b32 s3, s3, 14722; GFX11-NEXT: s_pack_ll_b32_b16 s0, s0, s64723; GFX11-NEXT: s_and_not1_b32 s5, 0xf000f, s54724; GFX11-NEXT: s_lshr_b32 s6, s1, 164725; GFX11-NEXT: s_lshr_b32 s7, s4, 164726; GFX11-NEXT: s_pack_ll_b32_b16 s3, s8, s34727; GFX11-NEXT: s_lshl_b32 s1, s1, s44728; GFX11-NEXT: s_lshl_b32 s4, s6, s74729; GFX11-NEXT: s_lshr_b32 s6, s3, 164730; GFX11-NEXT: s_and_b32 s3, s3, 0xffff4731; GFX11-NEXT: s_lshr_b32 s7, s5, 164732; GFX11-NEXT: s_lshr_b32 s3, s3, s54733; GFX11-NEXT: s_lshr_b32 s5, s6, s74734; GFX11-NEXT: s_pack_ll_b32_b16 s1, s1, s44735; GFX11-NEXT: s_pack_ll_b32_b16 s3, s3, s54736; GFX11-NEXT: s_or_b32 s0, s0, s24737; GFX11-NEXT: s_or_b32 s1, s1, s34738; GFX11-NEXT: ; return to shader part epilog4739 %result = call <4 x i16> @llvm.fshl.v4i16(<4 x i16> %lhs, <4 x i16> %rhs, <4 x i16> %amt)4740 %cast.result = bitcast <4 x i16> %result to <2 x i32>4741 ret <2 x i32> %cast.result4742}4743 4744define <4 x half> @v_fshl_v4i16(<4 x i16> %lhs, <4 x i16> %rhs, <4 x i16> %amt) {4745; GFX6-LABEL: v_fshl_v4i16:4746; GFX6: ; %bb.0:4747; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4748; GFX6-NEXT: v_and_b32_e32 v12, 15, v84749; GFX6-NEXT: v_xor_b32_e32 v8, -1, v84750; GFX6-NEXT: v_and_b32_e32 v8, 15, v84751; GFX6-NEXT: v_bfe_u32 v4, v4, 1, 154752; GFX6-NEXT: v_lshlrev_b32_e32 v0, v12, v04753; GFX6-NEXT: v_lshrrev_b32_e32 v4, v8, v44754; GFX6-NEXT: v_or_b32_e32 v0, v0, v44755; GFX6-NEXT: v_and_b32_e32 v4, 15, v94756; GFX6-NEXT: v_xor_b32_e32 v8, -1, v94757; GFX6-NEXT: v_and_b32_e32 v8, 15, v84758; GFX6-NEXT: v_lshlrev_b32_e32 v1, v4, v14759; GFX6-NEXT: v_bfe_u32 v4, v5, 1, 154760; GFX6-NEXT: v_lshrrev_b32_e32 v4, v8, v44761; GFX6-NEXT: v_or_b32_e32 v1, v1, v44762; GFX6-NEXT: v_and_b32_e32 v4, 15, v104763; GFX6-NEXT: v_xor_b32_e32 v5, -1, v104764; GFX6-NEXT: v_and_b32_e32 v5, 15, v54765; GFX6-NEXT: v_lshlrev_b32_e32 v2, v4, v24766; GFX6-NEXT: v_bfe_u32 v4, v6, 1, 154767; GFX6-NEXT: v_lshrrev_b32_e32 v4, v5, v44768; GFX6-NEXT: v_or_b32_e32 v2, v2, v44769; GFX6-NEXT: v_and_b32_e32 v4, 15, v114770; GFX6-NEXT: v_xor_b32_e32 v5, -1, v114771; GFX6-NEXT: v_and_b32_e32 v5, 15, v54772; GFX6-NEXT: v_lshlrev_b32_e32 v3, v4, v34773; GFX6-NEXT: v_bfe_u32 v4, v7, 1, 154774; GFX6-NEXT: v_lshrrev_b32_e32 v4, v5, v44775; GFX6-NEXT: v_or_b32_e32 v3, v3, v44776; GFX6-NEXT: s_setpc_b64 s[30:31]4777;4778; GFX8-LABEL: v_fshl_v4i16:4779; GFX8: ; %bb.0:4780; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4781; GFX8-NEXT: v_xor_b32_e32 v7, -1, v44782; GFX8-NEXT: v_and_b32_e32 v6, 15, v44783; GFX8-NEXT: v_and_b32_e32 v7, 15, v74784; GFX8-NEXT: v_lshrrev_b16_e32 v8, 1, v24785; GFX8-NEXT: v_lshlrev_b16_e32 v6, v6, v04786; GFX8-NEXT: v_lshrrev_b16_e32 v7, v7, v84787; GFX8-NEXT: v_or_b32_e32 v6, v6, v74788; GFX8-NEXT: v_mov_b32_e32 v7, 154789; GFX8-NEXT: v_mov_b32_e32 v9, -14790; GFX8-NEXT: v_and_b32_sdwa v8, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4791; GFX8-NEXT: v_xor_b32_sdwa v4, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4792; GFX8-NEXT: v_and_b32_e32 v4, 15, v44793; GFX8-NEXT: v_lshrrev_b32_e32 v2, 17, v24794; GFX8-NEXT: v_lshlrev_b16_sdwa v0, v8, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14795; GFX8-NEXT: v_lshrrev_b16_e32 v2, v4, v24796; GFX8-NEXT: v_xor_b32_e32 v4, -1, v54797; GFX8-NEXT: v_or_b32_e32 v0, v0, v24798; GFX8-NEXT: v_and_b32_e32 v2, 15, v54799; GFX8-NEXT: v_and_b32_e32 v4, 15, v44800; GFX8-NEXT: v_lshrrev_b16_e32 v8, 1, v34801; GFX8-NEXT: v_lshlrev_b16_e32 v2, v2, v14802; GFX8-NEXT: v_lshrrev_b16_e32 v4, v4, v84803; GFX8-NEXT: v_or_b32_e32 v2, v2, v44804; GFX8-NEXT: v_and_b32_sdwa v4, v5, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4805; GFX8-NEXT: v_xor_b32_sdwa v5, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4806; GFX8-NEXT: v_and_b32_e32 v5, 15, v54807; GFX8-NEXT: v_lshrrev_b32_e32 v3, 17, v34808; GFX8-NEXT: v_lshlrev_b16_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14809; GFX8-NEXT: v_lshrrev_b16_e32 v3, v5, v34810; GFX8-NEXT: v_or_b32_e32 v1, v1, v34811; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v04812; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v14813; GFX8-NEXT: v_lshlrev_b32_e32 v0, 16, v04814; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v14815; GFX8-NEXT: v_or_b32_sdwa v0, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4816; GFX8-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4817; GFX8-NEXT: s_setpc_b64 s[30:31]4818;4819; GFX9-LABEL: v_fshl_v4i16:4820; GFX9: ; %bb.0:4821; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4822; GFX9-NEXT: v_and_b32_e32 v6, 0xf000f, v44823; GFX9-NEXT: v_xor_b32_e32 v4, -1, v44824; GFX9-NEXT: v_and_b32_e32 v4, 0xf000f, v44825; GFX9-NEXT: v_pk_lshrrev_b16 v2, 1, v2 op_sel_hi:[0,1]4826; GFX9-NEXT: v_pk_lshlrev_b16 v0, v6, v04827; GFX9-NEXT: v_pk_lshrrev_b16 v2, v4, v24828; GFX9-NEXT: v_or_b32_e32 v0, v0, v24829; GFX9-NEXT: v_and_b32_e32 v2, 0xf000f, v54830; GFX9-NEXT: v_xor_b32_e32 v4, -1, v54831; GFX9-NEXT: v_and_b32_e32 v4, 0xf000f, v44832; GFX9-NEXT: v_pk_lshlrev_b16 v1, v2, v14833; GFX9-NEXT: v_pk_lshrrev_b16 v2, 1, v3 op_sel_hi:[0,1]4834; GFX9-NEXT: v_pk_lshrrev_b16 v2, v4, v24835; GFX9-NEXT: v_or_b32_e32 v1, v1, v24836; GFX9-NEXT: s_setpc_b64 s[30:31]4837;4838; GFX10-LABEL: v_fshl_v4i16:4839; GFX10: ; %bb.0:4840; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4841; GFX10-NEXT: v_xor_b32_e32 v6, -1, v44842; GFX10-NEXT: v_xor_b32_e32 v7, -1, v54843; GFX10-NEXT: v_and_b32_e32 v4, 0xf000f, v44844; GFX10-NEXT: v_pk_lshrrev_b16 v2, 1, v2 op_sel_hi:[0,1]4845; GFX10-NEXT: v_and_b32_e32 v5, 0xf000f, v54846; GFX10-NEXT: v_and_b32_e32 v6, 0xf000f, v64847; GFX10-NEXT: v_pk_lshrrev_b16 v3, 1, v3 op_sel_hi:[0,1]4848; GFX10-NEXT: v_and_b32_e32 v7, 0xf000f, v74849; GFX10-NEXT: v_pk_lshlrev_b16 v0, v4, v04850; GFX10-NEXT: v_pk_lshlrev_b16 v1, v5, v14851; GFX10-NEXT: v_pk_lshrrev_b16 v2, v6, v24852; GFX10-NEXT: v_pk_lshrrev_b16 v3, v7, v34853; GFX10-NEXT: v_or_b32_e32 v0, v0, v24854; GFX10-NEXT: v_or_b32_e32 v1, v1, v34855; GFX10-NEXT: s_setpc_b64 s[30:31]4856;4857; GFX11-LABEL: v_fshl_v4i16:4858; GFX11: ; %bb.0:4859; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4860; GFX11-NEXT: v_xor_b32_e32 v6, -1, v44861; GFX11-NEXT: v_xor_b32_e32 v7, -1, v54862; GFX11-NEXT: v_and_b32_e32 v4, 0xf000f, v44863; GFX11-NEXT: v_pk_lshrrev_b16 v2, 1, v2 op_sel_hi:[0,1]4864; GFX11-NEXT: v_and_b32_e32 v5, 0xf000f, v54865; GFX11-NEXT: v_and_b32_e32 v6, 0xf000f, v64866; GFX11-NEXT: v_pk_lshrrev_b16 v3, 1, v3 op_sel_hi:[0,1]4867; GFX11-NEXT: v_and_b32_e32 v7, 0xf000f, v74868; GFX11-NEXT: v_pk_lshlrev_b16 v0, v4, v04869; GFX11-NEXT: v_pk_lshlrev_b16 v1, v5, v14870; GFX11-NEXT: v_pk_lshrrev_b16 v2, v6, v24871; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)4872; GFX11-NEXT: v_pk_lshrrev_b16 v3, v7, v34873; GFX11-NEXT: v_or_b32_e32 v0, v0, v24874; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)4875; GFX11-NEXT: v_or_b32_e32 v1, v1, v34876; GFX11-NEXT: s_setpc_b64 s[30:31]4877 %result = call <4 x i16> @llvm.fshl.v4i16(<4 x i16> %lhs, <4 x i16> %rhs, <4 x i16> %amt)4878 %cast.result = bitcast <4 x i16> %result to <4 x half>4879 ret <4 x half> %cast.result4880}4881 4882define amdgpu_ps i64 @s_fshl_i64(i64 inreg %lhs, i64 inreg %rhs, i64 inreg %amt) {4883; GFX6-LABEL: s_fshl_i64:4884; GFX6: ; %bb.0:4885; GFX6-NEXT: s_lshl_b64 s[0:1], s[0:1], s44886; GFX6-NEXT: s_lshr_b64 s[2:3], s[2:3], 14887; GFX6-NEXT: s_not_b32 s4, s44888; GFX6-NEXT: s_lshr_b64 s[2:3], s[2:3], s44889; GFX6-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]4890; GFX6-NEXT: ; return to shader part epilog4891;4892; GFX8-LABEL: s_fshl_i64:4893; GFX8: ; %bb.0:4894; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s44895; GFX8-NEXT: s_lshr_b64 s[2:3], s[2:3], 14896; GFX8-NEXT: s_not_b32 s4, s44897; GFX8-NEXT: s_lshr_b64 s[2:3], s[2:3], s44898; GFX8-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]4899; GFX8-NEXT: ; return to shader part epilog4900;4901; GFX9-LABEL: s_fshl_i64:4902; GFX9: ; %bb.0:4903; GFX9-NEXT: s_lshl_b64 s[0:1], s[0:1], s44904; GFX9-NEXT: s_lshr_b64 s[2:3], s[2:3], 14905; GFX9-NEXT: s_not_b32 s4, s44906; GFX9-NEXT: s_lshr_b64 s[2:3], s[2:3], s44907; GFX9-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]4908; GFX9-NEXT: ; return to shader part epilog4909;4910; GFX10-LABEL: s_fshl_i64:4911; GFX10: ; %bb.0:4912; GFX10-NEXT: s_lshr_b64 s[2:3], s[2:3], 14913; GFX10-NEXT: s_not_b32 s5, s44914; GFX10-NEXT: s_lshl_b64 s[0:1], s[0:1], s44915; GFX10-NEXT: s_lshr_b64 s[2:3], s[2:3], s54916; GFX10-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]4917; GFX10-NEXT: ; return to shader part epilog4918;4919; GFX11-LABEL: s_fshl_i64:4920; GFX11: ; %bb.0:4921; GFX11-NEXT: s_lshr_b64 s[2:3], s[2:3], 14922; GFX11-NEXT: s_not_b32 s5, s44923; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], s44924; GFX11-NEXT: s_lshr_b64 s[2:3], s[2:3], s54925; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4926; GFX11-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]4927; GFX11-NEXT: ; return to shader part epilog4928 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 %amt)4929 ret i64 %result4930}4931 4932define amdgpu_ps i64 @s_fshl_i64_5(i64 inreg %lhs, i64 inreg %rhs) {4933; GCN-LABEL: s_fshl_i64_5:4934; GCN: ; %bb.0:4935; GCN-NEXT: s_lshl_b64 s[0:1], s[0:1], 54936; GCN-NEXT: s_lshr_b32 s2, s3, 274937; GCN-NEXT: s_or_b32 s0, s0, s24938; GCN-NEXT: ; return to shader part epilog4939;4940; GFX11-LABEL: s_fshl_i64_5:4941; GFX11: ; %bb.0:4942; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], 54943; GFX11-NEXT: s_lshr_b32 s2, s3, 274944; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4945; GFX11-NEXT: s_or_b32 s0, s0, s24946; GFX11-NEXT: ; return to shader part epilog4947 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 5)4948 ret i64 %result4949}4950 4951define amdgpu_ps i64 @s_fshl_i64_32(i64 inreg %lhs, i64 inreg %rhs) {4952; GCN-LABEL: s_fshl_i64_32:4953; GCN: ; %bb.0:4954; GCN-NEXT: s_mov_b32 s1, s04955; GCN-NEXT: s_mov_b32 s0, s34956; GCN-NEXT: ; return to shader part epilog4957;4958; GFX11-LABEL: s_fshl_i64_32:4959; GFX11: ; %bb.0:4960; GFX11-NEXT: s_mov_b32 s1, s04961; GFX11-NEXT: s_mov_b32 s0, s34962; GFX11-NEXT: ; return to shader part epilog4963 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 32)4964 ret i64 %result4965}4966 4967define amdgpu_ps i64 @s_fshl_i64_48(i64 inreg %lhs, i64 inreg %rhs) {4968; GCN-LABEL: s_fshl_i64_48:4969; GCN: ; %bb.0:4970; GCN-NEXT: s_lshl_b32 s1, s0, 164971; GCN-NEXT: s_mov_b32 s0, 04972; GCN-NEXT: s_lshr_b64 s[2:3], s[2:3], 164973; GCN-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]4974; GCN-NEXT: ; return to shader part epilog4975;4976; GFX11-LABEL: s_fshl_i64_48:4977; GFX11: ; %bb.0:4978; GFX11-NEXT: s_lshl_b32 s1, s0, 164979; GFX11-NEXT: s_mov_b32 s0, 04980; GFX11-NEXT: s_lshr_b64 s[2:3], s[2:3], 164981; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)4982; GFX11-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]4983; GFX11-NEXT: ; return to shader part epilog4984 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 48)4985 ret i64 %result4986}4987 4988define i64 @v_fshl_i64(i64 %lhs, i64 %rhs, i64 %amt) {4989; GFX6-LABEL: v_fshl_i64:4990; GFX6: ; %bb.0:4991; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4992; GFX6-NEXT: v_lshr_b64 v[2:3], v[2:3], 14993; GFX6-NEXT: v_and_b32_e32 v5, 63, v44994; GFX6-NEXT: v_bfi_b32 v4, v4, 0, 634995; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], v54996; GFX6-NEXT: v_lshr_b64 v[2:3], v[2:3], v44997; GFX6-NEXT: v_or_b32_e32 v0, v0, v24998; GFX6-NEXT: v_or_b32_e32 v1, v1, v34999; GFX6-NEXT: s_setpc_b64 s[30:31]5000;5001; GFX8-LABEL: v_fshl_i64:5002; GFX8: ; %bb.0:5003; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5004; GFX8-NEXT: v_lshrrev_b64 v[2:3], 1, v[2:3]5005; GFX8-NEXT: v_and_b32_e32 v5, 63, v45006; GFX8-NEXT: v_bfi_b32 v4, v4, 0, 635007; GFX8-NEXT: v_lshlrev_b64 v[0:1], v5, v[0:1]5008; GFX8-NEXT: v_lshrrev_b64 v[2:3], v4, v[2:3]5009; GFX8-NEXT: v_or_b32_e32 v0, v0, v25010; GFX8-NEXT: v_or_b32_e32 v1, v1, v35011; GFX8-NEXT: s_setpc_b64 s[30:31]5012;5013; GFX9-LABEL: v_fshl_i64:5014; GFX9: ; %bb.0:5015; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5016; GFX9-NEXT: v_lshrrev_b64 v[2:3], 1, v[2:3]5017; GFX9-NEXT: v_and_b32_e32 v5, 63, v45018; GFX9-NEXT: v_bfi_b32 v4, v4, 0, 635019; GFX9-NEXT: v_lshlrev_b64 v[0:1], v5, v[0:1]5020; GFX9-NEXT: v_lshrrev_b64 v[2:3], v4, v[2:3]5021; GFX9-NEXT: v_or_b32_e32 v0, v0, v25022; GFX9-NEXT: v_or_b32_e32 v1, v1, v35023; GFX9-NEXT: s_setpc_b64 s[30:31]5024;5025; GFX10-LABEL: v_fshl_i64:5026; GFX10: ; %bb.0:5027; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5028; GFX10-NEXT: v_lshrrev_b64 v[2:3], 1, v[2:3]5029; GFX10-NEXT: v_and_b32_e32 v5, 63, v45030; GFX10-NEXT: v_bfi_b32 v4, v4, 0, 635031; GFX10-NEXT: v_lshlrev_b64 v[0:1], v5, v[0:1]5032; GFX10-NEXT: v_lshrrev_b64 v[2:3], v4, v[2:3]5033; GFX10-NEXT: v_or_b32_e32 v0, v0, v25034; GFX10-NEXT: v_or_b32_e32 v1, v1, v35035; GFX10-NEXT: s_setpc_b64 s[30:31]5036;5037; GFX11-LABEL: v_fshl_i64:5038; GFX11: ; %bb.0:5039; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5040; GFX11-NEXT: v_lshrrev_b64 v[2:3], 1, v[2:3]5041; GFX11-NEXT: v_and_b32_e32 v5, 63, v45042; GFX11-NEXT: v_bfi_b32 v4, v4, 0, 635043; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5044; GFX11-NEXT: v_lshlrev_b64 v[0:1], v5, v[0:1]5045; GFX11-NEXT: v_lshrrev_b64 v[2:3], v4, v[2:3]5046; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)5047; GFX11-NEXT: v_or_b32_e32 v0, v0, v25048; GFX11-NEXT: v_or_b32_e32 v1, v1, v35049; GFX11-NEXT: s_setpc_b64 s[30:31]5050 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 %amt)5051 ret i64 %result5052}5053 5054define i64 @v_fshl_i64_5(i64 %lhs, i64 %rhs) {5055; GFX6-LABEL: v_fshl_i64_5:5056; GFX6: ; %bb.0:5057; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5058; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], 55059; GFX6-NEXT: v_lshrrev_b32_e32 v2, 27, v35060; GFX6-NEXT: v_or_b32_e32 v0, v0, v25061; GFX6-NEXT: s_setpc_b64 s[30:31]5062;5063; GFX8-LABEL: v_fshl_i64_5:5064; GFX8: ; %bb.0:5065; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5066; GFX8-NEXT: v_lshlrev_b64 v[0:1], 5, v[0:1]5067; GFX8-NEXT: v_lshrrev_b32_e32 v2, 27, v35068; GFX8-NEXT: v_or_b32_e32 v0, v0, v25069; GFX8-NEXT: s_setpc_b64 s[30:31]5070;5071; GFX9-LABEL: v_fshl_i64_5:5072; GFX9: ; %bb.0:5073; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5074; GFX9-NEXT: v_lshlrev_b64 v[0:1], 5, v[0:1]5075; GFX9-NEXT: v_lshrrev_b32_e32 v2, 27, v35076; GFX9-NEXT: v_or_b32_e32 v0, v0, v25077; GFX9-NEXT: s_setpc_b64 s[30:31]5078;5079; GFX10-LABEL: v_fshl_i64_5:5080; GFX10: ; %bb.0:5081; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5082; GFX10-NEXT: v_lshlrev_b64 v[0:1], 5, v[0:1]5083; GFX10-NEXT: v_lshrrev_b32_e32 v2, 27, v35084; GFX10-NEXT: v_or_b32_e32 v0, v0, v25085; GFX10-NEXT: s_setpc_b64 s[30:31]5086;5087; GFX11-LABEL: v_fshl_i64_5:5088; GFX11: ; %bb.0:5089; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5090; GFX11-NEXT: v_lshlrev_b64 v[0:1], 5, v[0:1]5091; GFX11-NEXT: v_lshrrev_b32_e32 v2, 27, v35092; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)5093; GFX11-NEXT: v_or_b32_e32 v0, v0, v25094; GFX11-NEXT: s_setpc_b64 s[30:31]5095 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 5)5096 ret i64 %result5097}5098 5099define i64 @v_fshl_i64_32(i64 %lhs, i64 %rhs) {5100; GCN-LABEL: v_fshl_i64_32:5101; GCN: ; %bb.0:5102; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5103; GCN-NEXT: v_mov_b32_e32 v1, v05104; GCN-NEXT: v_mov_b32_e32 v0, v35105; GCN-NEXT: s_setpc_b64 s[30:31]5106;5107; GFX11-LABEL: v_fshl_i64_32:5108; GFX11: ; %bb.0:5109; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5110; GFX11-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v0, v35111; GFX11-NEXT: s_setpc_b64 s[30:31]5112 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 32)5113 ret i64 %result5114}5115 5116define i64 @v_fshl_i64_48(i64 %lhs, i64 %rhs) {5117; GFX6-LABEL: v_fshl_i64_48:5118; GFX6: ; %bb.0:5119; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5120; GFX6-NEXT: v_mov_b32_e32 v4, v05121; GFX6-NEXT: v_lshr_b64 v[0:1], v[2:3], 165122; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v45123; GFX6-NEXT: v_or_b32_e32 v1, v2, v15124; GFX6-NEXT: s_setpc_b64 s[30:31]5125;5126; GFX8-LABEL: v_fshl_i64_48:5127; GFX8: ; %bb.0:5128; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5129; GFX8-NEXT: v_mov_b32_e32 v4, v05130; GFX8-NEXT: v_lshrrev_b64 v[0:1], 16, v[2:3]5131; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v45132; GFX8-NEXT: v_or_b32_e32 v1, v2, v15133; GFX8-NEXT: s_setpc_b64 s[30:31]5134;5135; GFX9-LABEL: v_fshl_i64_48:5136; GFX9: ; %bb.0:5137; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5138; GFX9-NEXT: v_mov_b32_e32 v4, v05139; GFX9-NEXT: v_lshrrev_b64 v[0:1], 16, v[2:3]5140; GFX9-NEXT: v_lshl_or_b32 v1, v4, 16, v15141; GFX9-NEXT: s_setpc_b64 s[30:31]5142;5143; GFX10-LABEL: v_fshl_i64_48:5144; GFX10: ; %bb.0:5145; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5146; GFX10-NEXT: v_mov_b32_e32 v4, v05147; GFX10-NEXT: v_lshrrev_b64 v[0:1], 16, v[2:3]5148; GFX10-NEXT: v_lshl_or_b32 v1, v4, 16, v15149; GFX10-NEXT: s_setpc_b64 s[30:31]5150;5151; GFX11-LABEL: v_fshl_i64_48:5152; GFX11: ; %bb.0:5153; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5154; GFX11-NEXT: v_mov_b32_e32 v4, v05155; GFX11-NEXT: v_lshrrev_b64 v[0:1], 16, v[2:3]5156; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)5157; GFX11-NEXT: v_lshl_or_b32 v1, v4, 16, v15158; GFX11-NEXT: s_setpc_b64 s[30:31]5159 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 48)5160 ret i64 %result5161}5162 5163define amdgpu_ps <2 x float> @v_fshl_i64_ssv(i64 inreg %lhs, i64 inreg %rhs, i64 %amt) {5164; GFX6-LABEL: v_fshl_i64_ssv:5165; GFX6: ; %bb.0:5166; GFX6-NEXT: v_and_b32_e32 v1, 63, v05167; GFX6-NEXT: v_lshl_b64 v[1:2], s[0:1], v15168; GFX6-NEXT: s_lshr_b64 s[0:1], s[2:3], 15169; GFX6-NEXT: v_bfi_b32 v0, v0, 0, 635170; GFX6-NEXT: v_lshr_b64 v[3:4], s[0:1], v05171; GFX6-NEXT: v_or_b32_e32 v0, v1, v35172; GFX6-NEXT: v_or_b32_e32 v1, v2, v45173; GFX6-NEXT: ; return to shader part epilog5174;5175; GFX8-LABEL: v_fshl_i64_ssv:5176; GFX8: ; %bb.0:5177; GFX8-NEXT: v_and_b32_e32 v1, 63, v05178; GFX8-NEXT: v_lshlrev_b64 v[1:2], v1, s[0:1]5179; GFX8-NEXT: s_lshr_b64 s[0:1], s[2:3], 15180; GFX8-NEXT: v_bfi_b32 v0, v0, 0, 635181; GFX8-NEXT: v_lshrrev_b64 v[3:4], v0, s[0:1]5182; GFX8-NEXT: v_or_b32_e32 v0, v1, v35183; GFX8-NEXT: v_or_b32_e32 v1, v2, v45184; GFX8-NEXT: ; return to shader part epilog5185;5186; GFX9-LABEL: v_fshl_i64_ssv:5187; GFX9: ; %bb.0:5188; GFX9-NEXT: v_and_b32_e32 v1, 63, v05189; GFX9-NEXT: v_lshlrev_b64 v[1:2], v1, s[0:1]5190; GFX9-NEXT: s_lshr_b64 s[0:1], s[2:3], 15191; GFX9-NEXT: v_bfi_b32 v0, v0, 0, 635192; GFX9-NEXT: v_lshrrev_b64 v[3:4], v0, s[0:1]5193; GFX9-NEXT: v_or_b32_e32 v0, v1, v35194; GFX9-NEXT: v_or_b32_e32 v1, v2, v45195; GFX9-NEXT: ; return to shader part epilog5196;5197; GFX10-LABEL: v_fshl_i64_ssv:5198; GFX10: ; %bb.0:5199; GFX10-NEXT: v_and_b32_e32 v1, 63, v05200; GFX10-NEXT: v_bfi_b32 v2, v0, 0, 635201; GFX10-NEXT: s_lshr_b64 s[2:3], s[2:3], 15202; GFX10-NEXT: v_lshlrev_b64 v[0:1], v1, s[0:1]5203; GFX10-NEXT: v_lshrrev_b64 v[2:3], v2, s[2:3]5204; GFX10-NEXT: v_or_b32_e32 v0, v0, v25205; GFX10-NEXT: v_or_b32_e32 v1, v1, v35206; GFX10-NEXT: ; return to shader part epilog5207;5208; GFX11-LABEL: v_fshl_i64_ssv:5209; GFX11: ; %bb.0:5210; GFX11-NEXT: v_and_b32_e32 v1, 63, v05211; GFX11-NEXT: v_bfi_b32 v2, v0, 0, 635212; GFX11-NEXT: s_lshr_b64 s[2:3], s[2:3], 15213; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)5214; GFX11-NEXT: v_lshlrev_b64 v[0:1], v1, s[0:1]5215; GFX11-NEXT: v_lshrrev_b64 v[2:3], v2, s[2:3]5216; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)5217; GFX11-NEXT: v_or_b32_e32 v0, v0, v25218; GFX11-NEXT: v_or_b32_e32 v1, v1, v35219; GFX11-NEXT: ; return to shader part epilog5220 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 %amt)5221 %cast = bitcast i64 %result to <2 x float>5222 ret <2 x float> %cast5223}5224 5225define amdgpu_ps <2 x float> @v_fshl_i64_svs(i64 inreg %lhs, i64 %rhs, i64 inreg %amt) {5226; GFX6-LABEL: v_fshl_i64_svs:5227; GFX6: ; %bb.0:5228; GFX6-NEXT: v_lshr_b64 v[0:1], v[0:1], 15229; GFX6-NEXT: s_andn2_b32 s3, 63, s25230; GFX6-NEXT: v_lshr_b64 v[0:1], v[0:1], s35231; GFX6-NEXT: s_lshl_b64 s[0:1], s[0:1], s25232; GFX6-NEXT: v_or_b32_e32 v0, s0, v05233; GFX6-NEXT: v_or_b32_e32 v1, s1, v15234; GFX6-NEXT: ; return to shader part epilog5235;5236; GFX8-LABEL: v_fshl_i64_svs:5237; GFX8: ; %bb.0:5238; GFX8-NEXT: v_lshrrev_b64 v[0:1], 1, v[0:1]5239; GFX8-NEXT: s_andn2_b32 s3, 63, s25240; GFX8-NEXT: v_lshrrev_b64 v[0:1], s3, v[0:1]5241; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s25242; GFX8-NEXT: v_or_b32_e32 v0, s0, v05243; GFX8-NEXT: v_or_b32_e32 v1, s1, v15244; GFX8-NEXT: ; return to shader part epilog5245;5246; GFX9-LABEL: v_fshl_i64_svs:5247; GFX9: ; %bb.0:5248; GFX9-NEXT: v_lshrrev_b64 v[0:1], 1, v[0:1]5249; GFX9-NEXT: s_andn2_b32 s3, 63, s25250; GFX9-NEXT: v_lshrrev_b64 v[0:1], s3, v[0:1]5251; GFX9-NEXT: s_lshl_b64 s[0:1], s[0:1], s25252; GFX9-NEXT: v_or_b32_e32 v0, s0, v05253; GFX9-NEXT: v_or_b32_e32 v1, s1, v15254; GFX9-NEXT: ; return to shader part epilog5255;5256; GFX10-LABEL: v_fshl_i64_svs:5257; GFX10: ; %bb.0:5258; GFX10-NEXT: v_lshrrev_b64 v[0:1], 1, v[0:1]5259; GFX10-NEXT: s_andn2_b32 s3, 63, s25260; GFX10-NEXT: s_lshl_b64 s[0:1], s[0:1], s25261; GFX10-NEXT: v_lshrrev_b64 v[0:1], s3, v[0:1]5262; GFX10-NEXT: v_or_b32_e32 v0, s0, v05263; GFX10-NEXT: v_or_b32_e32 v1, s1, v15264; GFX10-NEXT: ; return to shader part epilog5265;5266; GFX11-LABEL: v_fshl_i64_svs:5267; GFX11: ; %bb.0:5268; GFX11-NEXT: v_lshrrev_b64 v[0:1], 1, v[0:1]5269; GFX11-NEXT: s_and_not1_b32 s3, 63, s25270; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], s25271; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5272; GFX11-NEXT: v_lshrrev_b64 v[0:1], s3, v[0:1]5273; GFX11-NEXT: v_or_b32_e32 v0, s0, v05274; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)5275; GFX11-NEXT: v_or_b32_e32 v1, s1, v15276; GFX11-NEXT: ; return to shader part epilog5277 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 %amt)5278 %cast = bitcast i64 %result to <2 x float>5279 ret <2 x float> %cast5280}5281 5282define amdgpu_ps <2 x float> @v_fshl_i64_vss(i64 %lhs, i64 inreg %rhs, i64 inreg %amt) {5283; GFX6-LABEL: v_fshl_i64_vss:5284; GFX6: ; %bb.0:5285; GFX6-NEXT: s_and_b32 s3, s2, 635286; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], s35287; GFX6-NEXT: s_lshr_b64 s[0:1], s[0:1], 15288; GFX6-NEXT: s_not_b32 s2, s25289; GFX6-NEXT: s_lshr_b64 s[0:1], s[0:1], s25290; GFX6-NEXT: v_or_b32_e32 v0, s0, v05291; GFX6-NEXT: v_or_b32_e32 v1, s1, v15292; GFX6-NEXT: ; return to shader part epilog5293;5294; GFX8-LABEL: v_fshl_i64_vss:5295; GFX8: ; %bb.0:5296; GFX8-NEXT: s_and_b32 s3, s2, 635297; GFX8-NEXT: v_lshlrev_b64 v[0:1], s3, v[0:1]5298; GFX8-NEXT: s_lshr_b64 s[0:1], s[0:1], 15299; GFX8-NEXT: s_not_b32 s2, s25300; GFX8-NEXT: s_lshr_b64 s[0:1], s[0:1], s25301; GFX8-NEXT: v_or_b32_e32 v0, s0, v05302; GFX8-NEXT: v_or_b32_e32 v1, s1, v15303; GFX8-NEXT: ; return to shader part epilog5304;5305; GFX9-LABEL: v_fshl_i64_vss:5306; GFX9: ; %bb.0:5307; GFX9-NEXT: s_and_b32 s3, s2, 635308; GFX9-NEXT: v_lshlrev_b64 v[0:1], s3, v[0:1]5309; GFX9-NEXT: s_lshr_b64 s[0:1], s[0:1], 15310; GFX9-NEXT: s_not_b32 s2, s25311; GFX9-NEXT: s_lshr_b64 s[0:1], s[0:1], s25312; GFX9-NEXT: v_or_b32_e32 v0, s0, v05313; GFX9-NEXT: v_or_b32_e32 v1, s1, v15314; GFX9-NEXT: ; return to shader part epilog5315;5316; GFX10-LABEL: v_fshl_i64_vss:5317; GFX10: ; %bb.0:5318; GFX10-NEXT: s_and_b32 s3, s2, 635319; GFX10-NEXT: s_lshr_b64 s[0:1], s[0:1], 15320; GFX10-NEXT: v_lshlrev_b64 v[0:1], s3, v[0:1]5321; GFX10-NEXT: s_not_b32 s2, s25322; GFX10-NEXT: s_lshr_b64 s[0:1], s[0:1], s25323; GFX10-NEXT: v_or_b32_e32 v0, s0, v05324; GFX10-NEXT: v_or_b32_e32 v1, s1, v15325; GFX10-NEXT: ; return to shader part epilog5326;5327; GFX11-LABEL: v_fshl_i64_vss:5328; GFX11: ; %bb.0:5329; GFX11-NEXT: s_and_b32 s3, s2, 635330; GFX11-NEXT: s_lshr_b64 s[0:1], s[0:1], 15331; GFX11-NEXT: v_lshlrev_b64 v[0:1], s3, v[0:1]5332; GFX11-NEXT: s_not_b32 s2, s25333; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)5334; GFX11-NEXT: s_lshr_b64 s[0:1], s[0:1], s25335; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)5336; GFX11-NEXT: v_or_b32_e32 v0, s0, v05337; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)5338; GFX11-NEXT: v_or_b32_e32 v1, s1, v15339; GFX11-NEXT: ; return to shader part epilog5340 %result = call i64 @llvm.fshl.i64(i64 %lhs, i64 %rhs, i64 %amt)5341 %cast = bitcast i64 %result to <2 x float>5342 ret <2 x float> %cast5343}5344 5345define amdgpu_ps <2 x i64> @s_fshl_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs, <2 x i64> inreg %amt) {5346; GFX6-LABEL: s_fshl_v2i64:5347; GFX6: ; %bb.0:5348; GFX6-NEXT: s_lshl_b64 s[0:1], s[0:1], s85349; GFX6-NEXT: s_lshr_b64 s[4:5], s[4:5], 15350; GFX6-NEXT: s_not_b32 s8, s85351; GFX6-NEXT: s_lshr_b64 s[4:5], s[4:5], s85352; GFX6-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]5353; GFX6-NEXT: s_lshr_b64 s[4:5], s[6:7], 15354; GFX6-NEXT: s_not_b32 s6, s105355; GFX6-NEXT: s_lshl_b64 s[2:3], s[2:3], s105356; GFX6-NEXT: s_lshr_b64 s[4:5], s[4:5], s65357; GFX6-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]5358; GFX6-NEXT: ; return to shader part epilog5359;5360; GFX8-LABEL: s_fshl_v2i64:5361; GFX8: ; %bb.0:5362; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s85363; GFX8-NEXT: s_lshr_b64 s[4:5], s[4:5], 15364; GFX8-NEXT: s_not_b32 s8, s85365; GFX8-NEXT: s_lshr_b64 s[4:5], s[4:5], s85366; GFX8-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]5367; GFX8-NEXT: s_lshr_b64 s[4:5], s[6:7], 15368; GFX8-NEXT: s_not_b32 s6, s105369; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s105370; GFX8-NEXT: s_lshr_b64 s[4:5], s[4:5], s65371; GFX8-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]5372; GFX8-NEXT: ; return to shader part epilog5373;5374; GFX9-LABEL: s_fshl_v2i64:5375; GFX9: ; %bb.0:5376; GFX9-NEXT: s_lshl_b64 s[0:1], s[0:1], s85377; GFX9-NEXT: s_lshr_b64 s[4:5], s[4:5], 15378; GFX9-NEXT: s_not_b32 s8, s85379; GFX9-NEXT: s_lshr_b64 s[4:5], s[4:5], s85380; GFX9-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]5381; GFX9-NEXT: s_lshr_b64 s[4:5], s[6:7], 15382; GFX9-NEXT: s_not_b32 s6, s105383; GFX9-NEXT: s_lshl_b64 s[2:3], s[2:3], s105384; GFX9-NEXT: s_lshr_b64 s[4:5], s[4:5], s65385; GFX9-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]5386; GFX9-NEXT: ; return to shader part epilog5387;5388; GFX10-LABEL: s_fshl_v2i64:5389; GFX10: ; %bb.0:5390; GFX10-NEXT: s_lshr_b64 s[4:5], s[4:5], 15391; GFX10-NEXT: s_not_b32 s9, s85392; GFX10-NEXT: s_lshl_b64 s[0:1], s[0:1], s85393; GFX10-NEXT: s_lshr_b64 s[6:7], s[6:7], 15394; GFX10-NEXT: s_not_b32 s8, s105395; GFX10-NEXT: s_lshr_b64 s[4:5], s[4:5], s95396; GFX10-NEXT: s_lshl_b64 s[2:3], s[2:3], s105397; GFX10-NEXT: s_lshr_b64 s[6:7], s[6:7], s85398; GFX10-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]5399; GFX10-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7]5400; GFX10-NEXT: ; return to shader part epilog5401;5402; GFX11-LABEL: s_fshl_v2i64:5403; GFX11: ; %bb.0:5404; GFX11-NEXT: s_lshr_b64 s[4:5], s[4:5], 15405; GFX11-NEXT: s_not_b32 s9, s85406; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], s85407; GFX11-NEXT: s_lshr_b64 s[6:7], s[6:7], 15408; GFX11-NEXT: s_not_b32 s8, s105409; GFX11-NEXT: s_lshr_b64 s[4:5], s[4:5], s95410; GFX11-NEXT: s_lshl_b64 s[2:3], s[2:3], s105411; GFX11-NEXT: s_lshr_b64 s[6:7], s[6:7], s85412; GFX11-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]5413; GFX11-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7]5414; GFX11-NEXT: ; return to shader part epilog5415 %result = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %lhs, <2 x i64> %rhs, <2 x i64> %amt)5416 ret <2 x i64> %result5417}5418 5419define <2 x i64> @v_fshl_v2i64(<2 x i64> %lhs, <2 x i64> %rhs, <2 x i64> %amt) {5420; GFX6-LABEL: v_fshl_v2i64:5421; GFX6: ; %bb.0:5422; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5423; GFX6-NEXT: v_lshr_b64 v[4:5], v[4:5], 15424; GFX6-NEXT: v_and_b32_e32 v9, 63, v85425; GFX6-NEXT: v_bfi_b32 v8, v8, 0, 635426; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], v95427; GFX6-NEXT: v_lshr_b64 v[4:5], v[4:5], v85428; GFX6-NEXT: v_lshr_b64 v[6:7], v[6:7], 15429; GFX6-NEXT: v_or_b32_e32 v0, v0, v45430; GFX6-NEXT: v_and_b32_e32 v4, 63, v105431; GFX6-NEXT: v_lshl_b64 v[2:3], v[2:3], v45432; GFX6-NEXT: v_bfi_b32 v4, v10, 0, 635433; GFX6-NEXT: v_lshr_b64 v[6:7], v[6:7], v45434; GFX6-NEXT: v_or_b32_e32 v1, v1, v55435; GFX6-NEXT: v_or_b32_e32 v2, v2, v65436; GFX6-NEXT: v_or_b32_e32 v3, v3, v75437; GFX6-NEXT: s_setpc_b64 s[30:31]5438;5439; GFX8-LABEL: v_fshl_v2i64:5440; GFX8: ; %bb.0:5441; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5442; GFX8-NEXT: v_lshrrev_b64 v[4:5], 1, v[4:5]5443; GFX8-NEXT: v_and_b32_e32 v9, 63, v85444; GFX8-NEXT: v_bfi_b32 v8, v8, 0, 635445; GFX8-NEXT: v_lshlrev_b64 v[0:1], v9, v[0:1]5446; GFX8-NEXT: v_lshrrev_b64 v[4:5], v8, v[4:5]5447; GFX8-NEXT: v_lshrrev_b64 v[6:7], 1, v[6:7]5448; GFX8-NEXT: v_or_b32_e32 v0, v0, v45449; GFX8-NEXT: v_and_b32_e32 v4, 63, v105450; GFX8-NEXT: v_lshlrev_b64 v[2:3], v4, v[2:3]5451; GFX8-NEXT: v_bfi_b32 v4, v10, 0, 635452; GFX8-NEXT: v_lshrrev_b64 v[6:7], v4, v[6:7]5453; GFX8-NEXT: v_or_b32_e32 v1, v1, v55454; GFX8-NEXT: v_or_b32_e32 v2, v2, v65455; GFX8-NEXT: v_or_b32_e32 v3, v3, v75456; GFX8-NEXT: s_setpc_b64 s[30:31]5457;5458; GFX9-LABEL: v_fshl_v2i64:5459; GFX9: ; %bb.0:5460; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5461; GFX9-NEXT: v_lshrrev_b64 v[4:5], 1, v[4:5]5462; GFX9-NEXT: v_and_b32_e32 v9, 63, v85463; GFX9-NEXT: v_bfi_b32 v8, v8, 0, 635464; GFX9-NEXT: v_lshlrev_b64 v[0:1], v9, v[0:1]5465; GFX9-NEXT: v_lshrrev_b64 v[4:5], v8, v[4:5]5466; GFX9-NEXT: v_lshrrev_b64 v[6:7], 1, v[6:7]5467; GFX9-NEXT: v_or_b32_e32 v0, v0, v45468; GFX9-NEXT: v_and_b32_e32 v4, 63, v105469; GFX9-NEXT: v_lshlrev_b64 v[2:3], v4, v[2:3]5470; GFX9-NEXT: v_bfi_b32 v4, v10, 0, 635471; GFX9-NEXT: v_lshrrev_b64 v[6:7], v4, v[6:7]5472; GFX9-NEXT: v_or_b32_e32 v1, v1, v55473; GFX9-NEXT: v_or_b32_e32 v2, v2, v65474; GFX9-NEXT: v_or_b32_e32 v3, v3, v75475; GFX9-NEXT: s_setpc_b64 s[30:31]5476;5477; GFX10-LABEL: v_fshl_v2i64:5478; GFX10: ; %bb.0:5479; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5480; GFX10-NEXT: v_lshrrev_b64 v[4:5], 1, v[4:5]5481; GFX10-NEXT: v_lshrrev_b64 v[6:7], 1, v[6:7]5482; GFX10-NEXT: v_and_b32_e32 v9, 63, v85483; GFX10-NEXT: v_bfi_b32 v8, v8, 0, 635484; GFX10-NEXT: v_and_b32_e32 v11, 63, v105485; GFX10-NEXT: v_bfi_b32 v10, v10, 0, 635486; GFX10-NEXT: v_lshlrev_b64 v[0:1], v9, v[0:1]5487; GFX10-NEXT: v_lshrrev_b64 v[4:5], v8, v[4:5]5488; GFX10-NEXT: v_lshlrev_b64 v[2:3], v11, v[2:3]5489; GFX10-NEXT: v_lshrrev_b64 v[6:7], v10, v[6:7]5490; GFX10-NEXT: v_or_b32_e32 v0, v0, v45491; GFX10-NEXT: v_or_b32_e32 v1, v1, v55492; GFX10-NEXT: v_or_b32_e32 v2, v2, v65493; GFX10-NEXT: v_or_b32_e32 v3, v3, v75494; GFX10-NEXT: s_setpc_b64 s[30:31]5495;5496; GFX11-LABEL: v_fshl_v2i64:5497; GFX11: ; %bb.0:5498; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5499; GFX11-NEXT: v_lshrrev_b64 v[4:5], 1, v[4:5]5500; GFX11-NEXT: v_lshrrev_b64 v[6:7], 1, v[6:7]5501; GFX11-NEXT: v_and_b32_e32 v9, 63, v85502; GFX11-NEXT: v_bfi_b32 v8, v8, 0, 635503; GFX11-NEXT: v_and_b32_e32 v11, 63, v105504; GFX11-NEXT: v_bfi_b32 v10, v10, 0, 635505; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5506; GFX11-NEXT: v_lshlrev_b64 v[0:1], v9, v[0:1]5507; GFX11-NEXT: v_lshrrev_b64 v[4:5], v8, v[4:5]5508; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5509; GFX11-NEXT: v_lshlrev_b64 v[2:3], v11, v[2:3]5510; GFX11-NEXT: v_lshrrev_b64 v[6:7], v10, v[6:7]5511; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)5512; GFX11-NEXT: v_or_b32_e32 v0, v0, v45513; GFX11-NEXT: v_or_b32_e32 v1, v1, v55514; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)5515; GFX11-NEXT: v_or_b32_e32 v2, v2, v65516; GFX11-NEXT: v_or_b32_e32 v3, v3, v75517; GFX11-NEXT: s_setpc_b64 s[30:31]5518 %result = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %lhs, <2 x i64> %rhs, <2 x i64> %amt)5519 ret <2 x i64> %result5520}5521 5522define amdgpu_ps i128 @s_fshl_i128(i128 inreg %lhs, i128 inreg %rhs, i128 inreg %amt) {5523; GFX6-LABEL: s_fshl_i128:5524; GFX6: ; %bb.0:5525; GFX6-NEXT: s_and_b32 s9, s8, 0x7f5526; GFX6-NEXT: s_sub_i32 s11, s9, 645527; GFX6-NEXT: s_sub_i32 s14, 64, s95528; GFX6-NEXT: s_cmp_lt_u32 s9, 645529; GFX6-NEXT: s_cselect_b32 s18, 1, 05530; GFX6-NEXT: s_cmp_eq_u32 s9, 05531; GFX6-NEXT: s_cselect_b32 s9, 1, 05532; GFX6-NEXT: s_lshr_b64 s[14:15], s[0:1], s145533; GFX6-NEXT: s_lshl_b64 s[16:17], s[2:3], s85534; GFX6-NEXT: s_lshl_b64 s[12:13], s[0:1], s85535; GFX6-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]5536; GFX6-NEXT: s_lshl_b64 s[0:1], s[0:1], s115537; GFX6-NEXT: s_cmp_lg_u32 s18, 05538; GFX6-NEXT: s_cselect_b64 s[12:13], s[12:13], 05539; GFX6-NEXT: s_cselect_b64 s[0:1], s[14:15], s[0:1]5540; GFX6-NEXT: s_cmp_lg_u32 s9, 05541; GFX6-NEXT: s_mov_b32 s10, 05542; GFX6-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]5543; GFX6-NEXT: s_lshr_b64 s[0:1], s[4:5], 15544; GFX6-NEXT: s_lshl_b32 s11, s6, 315545; GFX6-NEXT: s_lshr_b64 s[4:5], s[6:7], 15546; GFX6-NEXT: s_andn2_b32 s6, 0x7f, s85547; GFX6-NEXT: s_or_b64 s[0:1], s[0:1], s[10:11]5548; GFX6-NEXT: s_not_b32 s9, s85549; GFX6-NEXT: s_sub_i32 s14, s6, 645550; GFX6-NEXT: s_sub_i32 s10, 64, s65551; GFX6-NEXT: s_cmp_lt_u32 s6, 645552; GFX6-NEXT: s_cselect_b32 s15, 1, 05553; GFX6-NEXT: s_cmp_eq_u32 s6, 05554; GFX6-NEXT: s_cselect_b32 s16, 1, 05555; GFX6-NEXT: s_lshr_b64 s[6:7], s[4:5], s95556; GFX6-NEXT: s_lshr_b64 s[8:9], s[0:1], s95557; GFX6-NEXT: s_lshl_b64 s[10:11], s[4:5], s105558; GFX6-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]5559; GFX6-NEXT: s_lshr_b64 s[4:5], s[4:5], s145560; GFX6-NEXT: s_cmp_lg_u32 s15, 05561; GFX6-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5]5562; GFX6-NEXT: s_cmp_lg_u32 s16, 05563; GFX6-NEXT: s_cselect_b64 s[0:1], s[0:1], s[4:5]5564; GFX6-NEXT: s_cmp_lg_u32 s15, 05565; GFX6-NEXT: s_cselect_b64 s[4:5], s[6:7], 05566; GFX6-NEXT: s_or_b64 s[0:1], s[12:13], s[0:1]5567; GFX6-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]5568; GFX6-NEXT: ; return to shader part epilog5569;5570; GFX8-LABEL: s_fshl_i128:5571; GFX8: ; %bb.0:5572; GFX8-NEXT: s_and_b32 s9, s8, 0x7f5573; GFX8-NEXT: s_sub_i32 s11, s9, 645574; GFX8-NEXT: s_sub_i32 s14, 64, s95575; GFX8-NEXT: s_cmp_lt_u32 s9, 645576; GFX8-NEXT: s_cselect_b32 s18, 1, 05577; GFX8-NEXT: s_cmp_eq_u32 s9, 05578; GFX8-NEXT: s_cselect_b32 s9, 1, 05579; GFX8-NEXT: s_lshr_b64 s[14:15], s[0:1], s145580; GFX8-NEXT: s_lshl_b64 s[16:17], s[2:3], s85581; GFX8-NEXT: s_lshl_b64 s[12:13], s[0:1], s85582; GFX8-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]5583; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s115584; GFX8-NEXT: s_cmp_lg_u32 s18, 05585; GFX8-NEXT: s_cselect_b64 s[12:13], s[12:13], 05586; GFX8-NEXT: s_cselect_b64 s[0:1], s[14:15], s[0:1]5587; GFX8-NEXT: s_cmp_lg_u32 s9, 05588; GFX8-NEXT: s_mov_b32 s10, 05589; GFX8-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]5590; GFX8-NEXT: s_lshr_b64 s[0:1], s[4:5], 15591; GFX8-NEXT: s_lshl_b32 s11, s6, 315592; GFX8-NEXT: s_lshr_b64 s[4:5], s[6:7], 15593; GFX8-NEXT: s_andn2_b32 s6, 0x7f, s85594; GFX8-NEXT: s_or_b64 s[0:1], s[0:1], s[10:11]5595; GFX8-NEXT: s_not_b32 s9, s85596; GFX8-NEXT: s_sub_i32 s14, s6, 645597; GFX8-NEXT: s_sub_i32 s10, 64, s65598; GFX8-NEXT: s_cmp_lt_u32 s6, 645599; GFX8-NEXT: s_cselect_b32 s15, 1, 05600; GFX8-NEXT: s_cmp_eq_u32 s6, 05601; GFX8-NEXT: s_cselect_b32 s16, 1, 05602; GFX8-NEXT: s_lshr_b64 s[6:7], s[4:5], s95603; GFX8-NEXT: s_lshr_b64 s[8:9], s[0:1], s95604; GFX8-NEXT: s_lshl_b64 s[10:11], s[4:5], s105605; GFX8-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]5606; GFX8-NEXT: s_lshr_b64 s[4:5], s[4:5], s145607; GFX8-NEXT: s_cmp_lg_u32 s15, 05608; GFX8-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5]5609; GFX8-NEXT: s_cmp_lg_u32 s16, 05610; GFX8-NEXT: s_cselect_b64 s[0:1], s[0:1], s[4:5]5611; GFX8-NEXT: s_cmp_lg_u32 s15, 05612; GFX8-NEXT: s_cselect_b64 s[4:5], s[6:7], 05613; GFX8-NEXT: s_or_b64 s[0:1], s[12:13], s[0:1]5614; GFX8-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]5615; GFX8-NEXT: ; return to shader part epilog5616;5617; GFX9-LABEL: s_fshl_i128:5618; GFX9: ; %bb.0:5619; GFX9-NEXT: s_and_b32 s9, s8, 0x7f5620; GFX9-NEXT: s_sub_i32 s11, s9, 645621; GFX9-NEXT: s_sub_i32 s14, 64, s95622; GFX9-NEXT: s_cmp_lt_u32 s9, 645623; GFX9-NEXT: s_cselect_b32 s18, 1, 05624; GFX9-NEXT: s_cmp_eq_u32 s9, 05625; GFX9-NEXT: s_cselect_b32 s9, 1, 05626; GFX9-NEXT: s_lshr_b64 s[14:15], s[0:1], s145627; GFX9-NEXT: s_lshl_b64 s[16:17], s[2:3], s85628; GFX9-NEXT: s_lshl_b64 s[12:13], s[0:1], s85629; GFX9-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]5630; GFX9-NEXT: s_lshl_b64 s[0:1], s[0:1], s115631; GFX9-NEXT: s_cmp_lg_u32 s18, 05632; GFX9-NEXT: s_cselect_b64 s[12:13], s[12:13], 05633; GFX9-NEXT: s_cselect_b64 s[0:1], s[14:15], s[0:1]5634; GFX9-NEXT: s_cmp_lg_u32 s9, 05635; GFX9-NEXT: s_mov_b32 s10, 05636; GFX9-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]5637; GFX9-NEXT: s_lshr_b64 s[0:1], s[4:5], 15638; GFX9-NEXT: s_lshl_b32 s11, s6, 315639; GFX9-NEXT: s_lshr_b64 s[4:5], s[6:7], 15640; GFX9-NEXT: s_andn2_b32 s6, 0x7f, s85641; GFX9-NEXT: s_or_b64 s[0:1], s[0:1], s[10:11]5642; GFX9-NEXT: s_not_b32 s9, s85643; GFX9-NEXT: s_sub_i32 s14, s6, 645644; GFX9-NEXT: s_sub_i32 s10, 64, s65645; GFX9-NEXT: s_cmp_lt_u32 s6, 645646; GFX9-NEXT: s_cselect_b32 s15, 1, 05647; GFX9-NEXT: s_cmp_eq_u32 s6, 05648; GFX9-NEXT: s_cselect_b32 s16, 1, 05649; GFX9-NEXT: s_lshr_b64 s[6:7], s[4:5], s95650; GFX9-NEXT: s_lshr_b64 s[8:9], s[0:1], s95651; GFX9-NEXT: s_lshl_b64 s[10:11], s[4:5], s105652; GFX9-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]5653; GFX9-NEXT: s_lshr_b64 s[4:5], s[4:5], s145654; GFX9-NEXT: s_cmp_lg_u32 s15, 05655; GFX9-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5]5656; GFX9-NEXT: s_cmp_lg_u32 s16, 05657; GFX9-NEXT: s_cselect_b64 s[0:1], s[0:1], s[4:5]5658; GFX9-NEXT: s_cmp_lg_u32 s15, 05659; GFX9-NEXT: s_cselect_b64 s[4:5], s[6:7], 05660; GFX9-NEXT: s_or_b64 s[0:1], s[12:13], s[0:1]5661; GFX9-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]5662; GFX9-NEXT: ; return to shader part epilog5663;5664; GFX10-LABEL: s_fshl_i128:5665; GFX10: ; %bb.0:5666; GFX10-NEXT: s_and_b32 s9, s8, 0x7f5667; GFX10-NEXT: s_mov_b32 s10, 05668; GFX10-NEXT: s_sub_i32 s11, s9, 645669; GFX10-NEXT: s_sub_i32 s12, 64, s95670; GFX10-NEXT: s_cmp_lt_u32 s9, 645671; GFX10-NEXT: s_cselect_b32 s18, 1, 05672; GFX10-NEXT: s_cmp_eq_u32 s9, 05673; GFX10-NEXT: s_cselect_b32 s9, 1, 05674; GFX10-NEXT: s_lshr_b64 s[12:13], s[0:1], s125675; GFX10-NEXT: s_lshl_b64 s[14:15], s[2:3], s85676; GFX10-NEXT: s_lshl_b64 s[16:17], s[0:1], s85677; GFX10-NEXT: s_or_b64 s[12:13], s[12:13], s[14:15]5678; GFX10-NEXT: s_lshl_b64 s[0:1], s[0:1], s115679; GFX10-NEXT: s_cmp_lg_u32 s18, 05680; GFX10-NEXT: s_cselect_b64 s[14:15], s[16:17], 05681; GFX10-NEXT: s_cselect_b64 s[0:1], s[12:13], s[0:1]5682; GFX10-NEXT: s_cmp_lg_u32 s9, 05683; GFX10-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]5684; GFX10-NEXT: s_lshr_b64 s[0:1], s[4:5], 15685; GFX10-NEXT: s_lshl_b32 s11, s6, 315686; GFX10-NEXT: s_lshr_b64 s[4:5], s[6:7], 15687; GFX10-NEXT: s_andn2_b32 s6, 0x7f, s85688; GFX10-NEXT: s_or_b64 s[0:1], s[0:1], s[10:11]5689; GFX10-NEXT: s_not_b32 s10, s85690; GFX10-NEXT: s_sub_i32 s12, s6, 645691; GFX10-NEXT: s_sub_i32 s8, 64, s65692; GFX10-NEXT: s_cmp_lt_u32 s6, 645693; GFX10-NEXT: s_cselect_b32 s13, 1, 05694; GFX10-NEXT: s_cmp_eq_u32 s6, 05695; GFX10-NEXT: s_cselect_b32 s16, 1, 05696; GFX10-NEXT: s_lshr_b64 s[6:7], s[0:1], s105697; GFX10-NEXT: s_lshl_b64 s[8:9], s[4:5], s85698; GFX10-NEXT: s_lshr_b64 s[10:11], s[4:5], s105699; GFX10-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]5700; GFX10-NEXT: s_lshr_b64 s[4:5], s[4:5], s125701; GFX10-NEXT: s_cmp_lg_u32 s13, 05702; GFX10-NEXT: s_cselect_b64 s[4:5], s[6:7], s[4:5]5703; GFX10-NEXT: s_cmp_lg_u32 s16, 05704; GFX10-NEXT: s_cselect_b64 s[0:1], s[0:1], s[4:5]5705; GFX10-NEXT: s_cmp_lg_u32 s13, 05706; GFX10-NEXT: s_cselect_b64 s[4:5], s[10:11], 05707; GFX10-NEXT: s_or_b64 s[0:1], s[14:15], s[0:1]5708; GFX10-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]5709; GFX10-NEXT: ; return to shader part epilog5710;5711; GFX11-LABEL: s_fshl_i128:5712; GFX11: ; %bb.0:5713; GFX11-NEXT: s_and_b32 s9, s8, 0x7f5714; GFX11-NEXT: s_mov_b32 s10, 05715; GFX11-NEXT: s_sub_i32 s11, s9, 645716; GFX11-NEXT: s_sub_i32 s12, 64, s95717; GFX11-NEXT: s_cmp_lt_u32 s9, 645718; GFX11-NEXT: s_cselect_b32 s18, 1, 05719; GFX11-NEXT: s_cmp_eq_u32 s9, 05720; GFX11-NEXT: s_cselect_b32 s9, 1, 05721; GFX11-NEXT: s_lshr_b64 s[12:13], s[0:1], s125722; GFX11-NEXT: s_lshl_b64 s[14:15], s[2:3], s85723; GFX11-NEXT: s_lshl_b64 s[16:17], s[0:1], s85724; GFX11-NEXT: s_or_b64 s[12:13], s[12:13], s[14:15]5725; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], s115726; GFX11-NEXT: s_cmp_lg_u32 s18, 05727; GFX11-NEXT: s_cselect_b64 s[14:15], s[16:17], 05728; GFX11-NEXT: s_cselect_b64 s[0:1], s[12:13], s[0:1]5729; GFX11-NEXT: s_cmp_lg_u32 s9, 05730; GFX11-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]5731; GFX11-NEXT: s_lshr_b64 s[0:1], s[4:5], 15732; GFX11-NEXT: s_lshl_b32 s11, s6, 315733; GFX11-NEXT: s_lshr_b64 s[4:5], s[6:7], 15734; GFX11-NEXT: s_and_not1_b32 s6, 0x7f, s85735; GFX11-NEXT: s_or_b64 s[0:1], s[0:1], s[10:11]5736; GFX11-NEXT: s_not_b32 s10, s85737; GFX11-NEXT: s_sub_i32 s12, s6, 645738; GFX11-NEXT: s_sub_i32 s8, 64, s65739; GFX11-NEXT: s_cmp_lt_u32 s6, 645740; GFX11-NEXT: s_cselect_b32 s13, 1, 05741; GFX11-NEXT: s_cmp_eq_u32 s6, 05742; GFX11-NEXT: s_cselect_b32 s16, 1, 05743; GFX11-NEXT: s_lshr_b64 s[6:7], s[0:1], s105744; GFX11-NEXT: s_lshl_b64 s[8:9], s[4:5], s85745; GFX11-NEXT: s_lshr_b64 s[10:11], s[4:5], s105746; GFX11-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]5747; GFX11-NEXT: s_lshr_b64 s[4:5], s[4:5], s125748; GFX11-NEXT: s_cmp_lg_u32 s13, 05749; GFX11-NEXT: s_cselect_b64 s[4:5], s[6:7], s[4:5]5750; GFX11-NEXT: s_cmp_lg_u32 s16, 05751; GFX11-NEXT: s_cselect_b64 s[0:1], s[0:1], s[4:5]5752; GFX11-NEXT: s_cmp_lg_u32 s13, 05753; GFX11-NEXT: s_cselect_b64 s[4:5], s[10:11], 05754; GFX11-NEXT: s_or_b64 s[0:1], s[14:15], s[0:1]5755; GFX11-NEXT: s_or_b64 s[2:3], s[2:3], s[4:5]5756; GFX11-NEXT: ; return to shader part epilog5757 %result = call i128 @llvm.fshl.i128(i128 %lhs, i128 %rhs, i128 %amt)5758 ret i128 %result5759}5760 5761define i128 @v_fshl_i128(i128 %lhs, i128 %rhs, i128 %amt) {5762; GFX6-LABEL: v_fshl_i128:5763; GFX6: ; %bb.0:5764; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5765; GFX6-NEXT: v_and_b32_e32 v16, 0x7f, v85766; GFX6-NEXT: v_sub_i32_e32 v9, vcc, 64, v165767; GFX6-NEXT: v_add_i32_e32 v18, vcc, 0xffffffc0, v165768; GFX6-NEXT: v_lshr_b64 v[9:10], v[0:1], v95769; GFX6-NEXT: v_lshl_b64 v[11:12], v[2:3], v165770; GFX6-NEXT: v_lshl_b64 v[13:14], v[0:1], v165771; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], v185772; GFX6-NEXT: v_or_b32_e32 v9, v9, v115773; GFX6-NEXT: v_or_b32_e32 v10, v10, v125774; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v165775; GFX6-NEXT: v_cndmask_b32_e32 v11, 0, v13, vcc5776; GFX6-NEXT: v_cndmask_b32_e32 v12, 0, v14, vcc5777; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc5778; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc5779; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, 0, v165780; GFX6-NEXT: v_cndmask_b32_e32 v10, v0, v2, vcc5781; GFX6-NEXT: v_cndmask_b32_e32 v13, v1, v3, vcc5782; GFX6-NEXT: v_lshr_b64 v[0:1], v[4:5], 15783; GFX6-NEXT: v_mov_b32_e32 v15, 0x7f5784; GFX6-NEXT: v_lshlrev_b32_e32 v2, 31, v65785; GFX6-NEXT: v_or_b32_e32 v1, v1, v25786; GFX6-NEXT: v_lshr_b64 v[2:3], v[6:7], 15787; GFX6-NEXT: v_bfi_b32 v14, v8, 0, v155788; GFX6-NEXT: v_not_b32_e32 v17, 635789; GFX6-NEXT: v_sub_i32_e32 v6, vcc, 64, v145790; GFX6-NEXT: v_add_i32_e32 v15, vcc, v14, v175791; GFX6-NEXT: v_lshr_b64 v[4:5], v[0:1], v145792; GFX6-NEXT: v_lshl_b64 v[6:7], v[2:3], v65793; GFX6-NEXT: v_lshr_b64 v[8:9], v[2:3], v145794; GFX6-NEXT: v_lshr_b64 v[2:3], v[2:3], v155795; GFX6-NEXT: v_or_b32_e32 v4, v4, v65796; GFX6-NEXT: v_or_b32_e32 v5, v5, v75797; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v145798; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc5799; GFX6-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc5800; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v145801; GFX6-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]5802; GFX6-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5]5803; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc5804; GFX6-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc5805; GFX6-NEXT: v_or_b32_e32 v0, v11, v05806; GFX6-NEXT: v_or_b32_e32 v1, v12, v15807; GFX6-NEXT: v_or_b32_e32 v2, v10, v25808; GFX6-NEXT: v_or_b32_e32 v3, v13, v35809; GFX6-NEXT: s_setpc_b64 s[30:31]5810;5811; GFX8-LABEL: v_fshl_i128:5812; GFX8: ; %bb.0:5813; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5814; GFX8-NEXT: v_and_b32_e32 v16, 0x7f, v85815; GFX8-NEXT: v_sub_u32_e32 v9, vcc, 64, v165816; GFX8-NEXT: v_add_u32_e32 v18, vcc, 0xffffffc0, v165817; GFX8-NEXT: v_lshrrev_b64 v[9:10], v9, v[0:1]5818; GFX8-NEXT: v_lshlrev_b64 v[11:12], v16, v[2:3]5819; GFX8-NEXT: v_lshlrev_b64 v[13:14], v16, v[0:1]5820; GFX8-NEXT: v_lshlrev_b64 v[0:1], v18, v[0:1]5821; GFX8-NEXT: v_or_b32_e32 v9, v9, v115822; GFX8-NEXT: v_or_b32_e32 v10, v10, v125823; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v165824; GFX8-NEXT: v_cndmask_b32_e32 v11, 0, v13, vcc5825; GFX8-NEXT: v_cndmask_b32_e32 v12, 0, v14, vcc5826; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc5827; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc5828; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v165829; GFX8-NEXT: v_cndmask_b32_e32 v10, v0, v2, vcc5830; GFX8-NEXT: v_cndmask_b32_e32 v13, v1, v3, vcc5831; GFX8-NEXT: v_lshrrev_b64 v[0:1], 1, v[4:5]5832; GFX8-NEXT: v_mov_b32_e32 v15, 0x7f5833; GFX8-NEXT: v_lshlrev_b32_e32 v2, 31, v65834; GFX8-NEXT: v_or_b32_e32 v1, v1, v25835; GFX8-NEXT: v_lshrrev_b64 v[2:3], 1, v[6:7]5836; GFX8-NEXT: v_bfi_b32 v14, v8, 0, v155837; GFX8-NEXT: v_not_b32_e32 v17, 635838; GFX8-NEXT: v_sub_u32_e32 v6, vcc, 64, v145839; GFX8-NEXT: v_add_u32_e32 v15, vcc, v14, v175840; GFX8-NEXT: v_lshrrev_b64 v[4:5], v14, v[0:1]5841; GFX8-NEXT: v_lshlrev_b64 v[6:7], v6, v[2:3]5842; GFX8-NEXT: v_lshrrev_b64 v[8:9], v14, v[2:3]5843; GFX8-NEXT: v_lshrrev_b64 v[2:3], v15, v[2:3]5844; GFX8-NEXT: v_or_b32_e32 v4, v4, v65845; GFX8-NEXT: v_or_b32_e32 v5, v5, v75846; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v145847; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc5848; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc5849; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v145850; GFX8-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]5851; GFX8-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5]5852; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc5853; GFX8-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc5854; GFX8-NEXT: v_or_b32_e32 v0, v11, v05855; GFX8-NEXT: v_or_b32_e32 v1, v12, v15856; GFX8-NEXT: v_or_b32_e32 v2, v10, v25857; GFX8-NEXT: v_or_b32_e32 v3, v13, v35858; GFX8-NEXT: s_setpc_b64 s[30:31]5859;5860; GFX9-LABEL: v_fshl_i128:5861; GFX9: ; %bb.0:5862; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5863; GFX9-NEXT: v_and_b32_e32 v16, 0x7f, v85864; GFX9-NEXT: v_sub_u32_e32 v9, 64, v165865; GFX9-NEXT: v_add_u32_e32 v17, 0xffffffc0, v165866; GFX9-NEXT: v_lshrrev_b64 v[9:10], v9, v[0:1]5867; GFX9-NEXT: v_lshlrev_b64 v[11:12], v16, v[2:3]5868; GFX9-NEXT: v_lshlrev_b64 v[13:14], v16, v[0:1]5869; GFX9-NEXT: v_lshlrev_b64 v[0:1], v17, v[0:1]5870; GFX9-NEXT: v_or_b32_e32 v9, v9, v115871; GFX9-NEXT: v_or_b32_e32 v10, v10, v125872; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v165873; GFX9-NEXT: v_cndmask_b32_e32 v11, 0, v13, vcc5874; GFX9-NEXT: v_cndmask_b32_e32 v12, 0, v14, vcc5875; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc5876; GFX9-NEXT: v_cndmask_b32_e32 v9, v1, v10, vcc5877; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v165878; GFX9-NEXT: v_mov_b32_e32 v15, 0x7f5879; GFX9-NEXT: v_cndmask_b32_e32 v10, v0, v2, vcc5880; GFX9-NEXT: v_lshrrev_b64 v[0:1], 1, v[4:5]5881; GFX9-NEXT: v_cndmask_b32_e32 v13, v9, v3, vcc5882; GFX9-NEXT: v_lshrrev_b64 v[2:3], 1, v[6:7]5883; GFX9-NEXT: v_bfi_b32 v14, v8, 0, v155884; GFX9-NEXT: v_lshl_or_b32 v1, v6, 31, v15885; GFX9-NEXT: v_sub_u32_e32 v6, 64, v145886; GFX9-NEXT: v_add_u32_e32 v15, 0xffffffc0, v145887; GFX9-NEXT: v_lshrrev_b64 v[4:5], v14, v[0:1]5888; GFX9-NEXT: v_lshlrev_b64 v[6:7], v6, v[2:3]5889; GFX9-NEXT: v_lshrrev_b64 v[8:9], v14, v[2:3]5890; GFX9-NEXT: v_lshrrev_b64 v[2:3], v15, v[2:3]5891; GFX9-NEXT: v_or_b32_e32 v4, v4, v65892; GFX9-NEXT: v_or_b32_e32 v5, v5, v75893; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v145894; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc5895; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc5896; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v145897; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]5898; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5]5899; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc5900; GFX9-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc5901; GFX9-NEXT: v_or_b32_e32 v0, v11, v05902; GFX9-NEXT: v_or_b32_e32 v1, v12, v15903; GFX9-NEXT: v_or_b32_e32 v2, v10, v25904; GFX9-NEXT: v_or_b32_e32 v3, v13, v35905; GFX9-NEXT: s_setpc_b64 s[30:31]5906;5907; GFX10-LABEL: v_fshl_i128:5908; GFX10: ; %bb.0:5909; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5910; GFX10-NEXT: v_and_b32_e32 v17, 0x7f, v85911; GFX10-NEXT: v_lshrrev_b64 v[4:5], 1, v[4:5]5912; GFX10-NEXT: v_bfi_b32 v18, v8, 0, 0x7f5913; GFX10-NEXT: v_lshrrev_b64 v[9:10], 1, v[6:7]5914; GFX10-NEXT: v_sub_nc_u32_e32 v11, 64, v175915; GFX10-NEXT: v_lshlrev_b64 v[7:8], v17, v[2:3]5916; GFX10-NEXT: v_add_nc_u32_e32 v15, 0xffffffc0, v175917; GFX10-NEXT: v_lshl_or_b32 v5, v6, 31, v55918; GFX10-NEXT: v_sub_nc_u32_e32 v16, 64, v185919; GFX10-NEXT: v_lshrrev_b64 v[11:12], v11, v[0:1]5920; GFX10-NEXT: v_lshlrev_b64 v[13:14], v17, v[0:1]5921; GFX10-NEXT: v_lshlrev_b64 v[0:1], v15, v[0:1]5922; GFX10-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v175923; GFX10-NEXT: v_add_nc_u32_e32 v19, 0xffffffc0, v185924; GFX10-NEXT: v_lshlrev_b64 v[15:16], v16, v[9:10]5925; GFX10-NEXT: v_or_b32_e32 v11, v11, v75926; GFX10-NEXT: v_lshrrev_b64 v[6:7], v18, v[4:5]5927; GFX10-NEXT: v_or_b32_e32 v8, v12, v85928; GFX10-NEXT: v_cmp_gt_u32_e64 s5, 64, v185929; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 0, v175930; GFX10-NEXT: v_cndmask_b32_e32 v20, v0, v11, vcc_lo5931; GFX10-NEXT: v_lshrrev_b64 v[11:12], v19, v[9:10]5932; GFX10-NEXT: v_or_b32_e32 v0, v6, v155933; GFX10-NEXT: v_or_b32_e32 v6, v7, v165934; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v8, vcc_lo5935; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v185936; GFX10-NEXT: v_cndmask_b32_e32 v13, 0, v13, vcc_lo5937; GFX10-NEXT: v_cndmask_b32_e64 v8, v11, v0, s55938; GFX10-NEXT: v_lshrrev_b64 v[0:1], v18, v[9:10]5939; GFX10-NEXT: v_cndmask_b32_e64 v6, v12, v6, s55940; GFX10-NEXT: v_cndmask_b32_e32 v9, 0, v14, vcc_lo5941; GFX10-NEXT: v_cndmask_b32_e64 v2, v20, v2, s45942; GFX10-NEXT: v_cndmask_b32_e64 v3, v7, v3, s45943; GFX10-NEXT: v_cndmask_b32_e64 v4, v8, v4, s65944; GFX10-NEXT: v_cndmask_b32_e64 v5, v6, v5, s65945; GFX10-NEXT: v_cndmask_b32_e64 v6, 0, v0, s55946; GFX10-NEXT: v_cndmask_b32_e64 v7, 0, v1, s55947; GFX10-NEXT: v_or_b32_e32 v0, v13, v45948; GFX10-NEXT: v_or_b32_e32 v1, v9, v55949; GFX10-NEXT: v_or_b32_e32 v2, v2, v65950; GFX10-NEXT: v_or_b32_e32 v3, v3, v75951; GFX10-NEXT: s_setpc_b64 s[30:31]5952;5953; GFX11-LABEL: v_fshl_i128:5954; GFX11: ; %bb.0:5955; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5956; GFX11-NEXT: v_and_b32_e32 v17, 0x7f, v85957; GFX11-NEXT: v_lshrrev_b64 v[4:5], 1, v[4:5]5958; GFX11-NEXT: v_bfi_b32 v18, v8, 0, 0x7f5959; GFX11-NEXT: v_lshrrev_b64 v[9:10], 1, v[6:7]5960; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)5961; GFX11-NEXT: v_sub_nc_u32_e32 v11, 64, v175962; GFX11-NEXT: v_lshlrev_b64 v[7:8], v17, v[2:3]5963; GFX11-NEXT: v_add_nc_u32_e32 v15, 0xffffffc0, v175964; GFX11-NEXT: v_lshl_or_b32 v5, v6, 31, v55965; GFX11-NEXT: v_sub_nc_u32_e32 v16, 64, v185966; GFX11-NEXT: v_lshrrev_b64 v[11:12], v11, v[0:1]5967; GFX11-NEXT: v_lshlrev_b64 v[13:14], v17, v[0:1]5968; GFX11-NEXT: v_lshlrev_b64 v[0:1], v15, v[0:1]5969; GFX11-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v175970; GFX11-NEXT: v_add_nc_u32_e32 v19, 0xffffffc0, v185971; GFX11-NEXT: v_lshlrev_b64 v[15:16], v16, v[9:10]5972; GFX11-NEXT: v_or_b32_e32 v11, v11, v75973; GFX11-NEXT: v_lshrrev_b64 v[6:7], v18, v[4:5]5974; GFX11-NEXT: v_or_b32_e32 v8, v12, v85975; GFX11-NEXT: v_cmp_gt_u32_e64 s1, 64, v185976; GFX11-NEXT: v_cmp_eq_u32_e64 s2, 0, v185977; GFX11-NEXT: v_cndmask_b32_e32 v20, v0, v11, vcc_lo5978; GFX11-NEXT: v_lshrrev_b64 v[11:12], v19, v[9:10]5979; GFX11-NEXT: v_or_b32_e32 v0, v6, v155980; GFX11-NEXT: v_or_b32_e32 v6, v7, v165981; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v8, vcc_lo5982; GFX11-NEXT: v_cmp_eq_u32_e64 s0, 0, v175983; GFX11-NEXT: v_cndmask_b32_e32 v13, 0, v13, vcc_lo5984; GFX11-NEXT: v_cndmask_b32_e64 v8, v11, v0, s15985; GFX11-NEXT: v_lshrrev_b64 v[0:1], v18, v[9:10]5986; GFX11-NEXT: v_cndmask_b32_e64 v6, v12, v6, s15987; GFX11-NEXT: v_cndmask_b32_e32 v9, 0, v14, vcc_lo5988; GFX11-NEXT: v_cndmask_b32_e64 v2, v20, v2, s05989; GFX11-NEXT: v_cndmask_b32_e64 v3, v7, v3, s05990; GFX11-NEXT: v_cndmask_b32_e64 v4, v8, v4, s25991; GFX11-NEXT: v_cndmask_b32_e64 v5, v6, v5, s25992; GFX11-NEXT: v_cndmask_b32_e64 v6, 0, v0, s15993; GFX11-NEXT: v_cndmask_b32_e64 v7, 0, v1, s15994; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5995; GFX11-NEXT: v_or_b32_e32 v0, v13, v45996; GFX11-NEXT: v_or_b32_e32 v1, v9, v55997; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5998; GFX11-NEXT: v_or_b32_e32 v2, v2, v65999; GFX11-NEXT: v_or_b32_e32 v3, v3, v76000; GFX11-NEXT: s_setpc_b64 s[30:31]6001 %result = call i128 @llvm.fshl.i128(i128 %lhs, i128 %rhs, i128 %amt)6002 ret i128 %result6003}6004 6005define amdgpu_ps <4 x float> @v_fshl_i128_ssv(i128 inreg %lhs, i128 inreg %rhs, i128 %amt) {6006; GFX6-LABEL: v_fshl_i128_ssv:6007; GFX6: ; %bb.0:6008; GFX6-NEXT: v_and_b32_e32 v8, 0x7f, v06009; GFX6-NEXT: v_sub_i32_e32 v1, vcc, 64, v86010; GFX6-NEXT: v_lshr_b64 v[1:2], s[0:1], v16011; GFX6-NEXT: v_lshl_b64 v[3:4], s[2:3], v86012; GFX6-NEXT: v_add_i32_e32 v10, vcc, 0xffffffc0, v86013; GFX6-NEXT: v_lshl_b64 v[5:6], s[0:1], v86014; GFX6-NEXT: v_or_b32_e32 v3, v1, v36015; GFX6-NEXT: v_or_b32_e32 v4, v2, v46016; GFX6-NEXT: v_lshl_b64 v[1:2], s[0:1], v106017; GFX6-NEXT: v_mov_b32_e32 v7, 0x7f6018; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v86019; GFX6-NEXT: s_mov_b32 s8, 06020; GFX6-NEXT: v_cndmask_b32_e32 v10, 0, v5, vcc6021; GFX6-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc6022; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc6023; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc6024; GFX6-NEXT: v_mov_b32_e32 v3, s26025; GFX6-NEXT: v_mov_b32_e32 v4, s36026; GFX6-NEXT: v_cmp_eq_u32_e32 vcc, 0, v86027; GFX6-NEXT: s_lshr_b64 s[0:1], s[4:5], 16028; GFX6-NEXT: s_lshl_b32 s9, s6, 316029; GFX6-NEXT: v_bfi_b32 v7, v0, 0, v76030; GFX6-NEXT: v_cndmask_b32_e32 v8, v1, v3, vcc6031; GFX6-NEXT: v_cndmask_b32_e32 v11, v2, v4, vcc6032; GFX6-NEXT: s_or_b64 s[0:1], s[0:1], s[8:9]6033; GFX6-NEXT: s_lshr_b64 s[2:3], s[6:7], 16034; GFX6-NEXT: v_sub_i32_e32 v2, vcc, 64, v76035; GFX6-NEXT: v_not_b32_e32 v9, 636036; GFX6-NEXT: v_lshr_b64 v[0:1], s[0:1], v76037; GFX6-NEXT: v_lshl_b64 v[2:3], s[2:3], v26038; GFX6-NEXT: v_add_i32_e32 v9, vcc, v7, v96039; GFX6-NEXT: v_or_b32_e32 v2, v0, v26040; GFX6-NEXT: v_or_b32_e32 v3, v1, v36041; GFX6-NEXT: v_lshr_b64 v[0:1], s[2:3], v96042; GFX6-NEXT: v_lshr_b64 v[4:5], s[2:3], v76043; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v76044; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc6045; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc6046; GFX6-NEXT: v_mov_b32_e32 v2, s06047; GFX6-NEXT: v_mov_b32_e32 v3, s16048; GFX6-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v76049; GFX6-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]6050; GFX6-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]6051; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc6052; GFX6-NEXT: v_cndmask_b32_e32 v3, 0, v5, vcc6053; GFX6-NEXT: v_or_b32_e32 v0, v10, v06054; GFX6-NEXT: v_or_b32_e32 v1, v6, v16055; GFX6-NEXT: v_or_b32_e32 v2, v8, v26056; GFX6-NEXT: v_or_b32_e32 v3, v11, v36057; GFX6-NEXT: ; return to shader part epilog6058;6059; GFX8-LABEL: v_fshl_i128_ssv:6060; GFX8: ; %bb.0:6061; GFX8-NEXT: v_and_b32_e32 v8, 0x7f, v06062; GFX8-NEXT: v_sub_u32_e32 v1, vcc, 64, v86063; GFX8-NEXT: v_lshrrev_b64 v[1:2], v1, s[0:1]6064; GFX8-NEXT: v_lshlrev_b64 v[3:4], v8, s[2:3]6065; GFX8-NEXT: v_add_u32_e32 v10, vcc, 0xffffffc0, v86066; GFX8-NEXT: v_lshlrev_b64 v[5:6], v8, s[0:1]6067; GFX8-NEXT: v_or_b32_e32 v3, v1, v36068; GFX8-NEXT: v_or_b32_e32 v4, v2, v46069; GFX8-NEXT: v_lshlrev_b64 v[1:2], v10, s[0:1]6070; GFX8-NEXT: v_mov_b32_e32 v7, 0x7f6071; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v86072; GFX8-NEXT: s_mov_b32 s8, 06073; GFX8-NEXT: v_cndmask_b32_e32 v10, 0, v5, vcc6074; GFX8-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc6075; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc6076; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc6077; GFX8-NEXT: v_mov_b32_e32 v3, s26078; GFX8-NEXT: v_mov_b32_e32 v4, s36079; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v86080; GFX8-NEXT: s_lshr_b64 s[0:1], s[4:5], 16081; GFX8-NEXT: s_lshl_b32 s9, s6, 316082; GFX8-NEXT: v_bfi_b32 v7, v0, 0, v76083; GFX8-NEXT: v_cndmask_b32_e32 v8, v1, v3, vcc6084; GFX8-NEXT: v_cndmask_b32_e32 v11, v2, v4, vcc6085; GFX8-NEXT: s_or_b64 s[0:1], s[0:1], s[8:9]6086; GFX8-NEXT: s_lshr_b64 s[2:3], s[6:7], 16087; GFX8-NEXT: v_sub_u32_e32 v2, vcc, 64, v76088; GFX8-NEXT: v_not_b32_e32 v9, 636089; GFX8-NEXT: v_lshrrev_b64 v[0:1], v7, s[0:1]6090; GFX8-NEXT: v_lshlrev_b64 v[2:3], v2, s[2:3]6091; GFX8-NEXT: v_add_u32_e32 v9, vcc, v7, v96092; GFX8-NEXT: v_or_b32_e32 v2, v0, v26093; GFX8-NEXT: v_or_b32_e32 v3, v1, v36094; GFX8-NEXT: v_lshrrev_b64 v[0:1], v9, s[2:3]6095; GFX8-NEXT: v_lshrrev_b64 v[4:5], v7, s[2:3]6096; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v76097; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc6098; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc6099; GFX8-NEXT: v_mov_b32_e32 v2, s06100; GFX8-NEXT: v_mov_b32_e32 v3, s16101; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v76102; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]6103; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]6104; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc6105; GFX8-NEXT: v_cndmask_b32_e32 v3, 0, v5, vcc6106; GFX8-NEXT: v_or_b32_e32 v0, v10, v06107; GFX8-NEXT: v_or_b32_e32 v1, v6, v16108; GFX8-NEXT: v_or_b32_e32 v2, v8, v26109; GFX8-NEXT: v_or_b32_e32 v3, v11, v36110; GFX8-NEXT: ; return to shader part epilog6111;6112; GFX9-LABEL: v_fshl_i128_ssv:6113; GFX9: ; %bb.0:6114; GFX9-NEXT: v_and_b32_e32 v8, 0x7f, v06115; GFX9-NEXT: v_sub_u32_e32 v1, 64, v86116; GFX9-NEXT: v_lshrrev_b64 v[1:2], v1, s[0:1]6117; GFX9-NEXT: v_lshlrev_b64 v[3:4], v8, s[2:3]6118; GFX9-NEXT: v_add_u32_e32 v9, 0xffffffc0, v86119; GFX9-NEXT: v_lshlrev_b64 v[5:6], v8, s[0:1]6120; GFX9-NEXT: v_or_b32_e32 v3, v1, v36121; GFX9-NEXT: v_or_b32_e32 v4, v2, v46122; GFX9-NEXT: v_lshlrev_b64 v[1:2], v9, s[0:1]6123; GFX9-NEXT: v_mov_b32_e32 v7, 0x7f6124; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v86125; GFX9-NEXT: s_mov_b32 s8, 06126; GFX9-NEXT: v_cndmask_b32_e32 v9, 0, v5, vcc6127; GFX9-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc6128; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc6129; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc6130; GFX9-NEXT: v_mov_b32_e32 v4, s36131; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v86132; GFX9-NEXT: s_lshr_b64 s[0:1], s[4:5], 16133; GFX9-NEXT: s_lshl_b32 s9, s6, 316134; GFX9-NEXT: v_bfi_b32 v7, v0, 0, v76135; GFX9-NEXT: v_mov_b32_e32 v3, s26136; GFX9-NEXT: v_cndmask_b32_e32 v10, v2, v4, vcc6137; GFX9-NEXT: s_or_b64 s[0:1], s[0:1], s[8:9]6138; GFX9-NEXT: s_lshr_b64 s[2:3], s[6:7], 16139; GFX9-NEXT: v_sub_u32_e32 v2, 64, v76140; GFX9-NEXT: v_cndmask_b32_e32 v8, v1, v3, vcc6141; GFX9-NEXT: v_lshrrev_b64 v[0:1], v7, s[0:1]6142; GFX9-NEXT: v_lshlrev_b64 v[2:3], v2, s[2:3]6143; GFX9-NEXT: v_add_u32_e32 v11, 0xffffffc0, v76144; GFX9-NEXT: v_or_b32_e32 v2, v0, v26145; GFX9-NEXT: v_or_b32_e32 v3, v1, v36146; GFX9-NEXT: v_lshrrev_b64 v[0:1], v11, s[2:3]6147; GFX9-NEXT: v_lshrrev_b64 v[4:5], v7, s[2:3]6148; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v76149; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc6150; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc6151; GFX9-NEXT: v_mov_b32_e32 v2, s06152; GFX9-NEXT: v_mov_b32_e32 v3, s16153; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v76154; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]6155; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]6156; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc6157; GFX9-NEXT: v_cndmask_b32_e32 v3, 0, v5, vcc6158; GFX9-NEXT: v_or_b32_e32 v0, v9, v06159; GFX9-NEXT: v_or_b32_e32 v1, v6, v16160; GFX9-NEXT: v_or_b32_e32 v2, v8, v26161; GFX9-NEXT: v_or_b32_e32 v3, v10, v36162; GFX9-NEXT: ; return to shader part epilog6163;6164; GFX10-LABEL: v_fshl_i128_ssv:6165; GFX10: ; %bb.0:6166; GFX10-NEXT: v_and_b32_e32 v11, 0x7f, v06167; GFX10-NEXT: v_bfi_b32 v12, v0, 0, 0x7f6168; GFX10-NEXT: s_mov_b32 s8, 06169; GFX10-NEXT: s_lshr_b64 s[4:5], s[4:5], 16170; GFX10-NEXT: s_lshl_b32 s9, s6, 316171; GFX10-NEXT: v_sub_nc_u32_e32 v3, 64, v116172; GFX10-NEXT: v_add_nc_u32_e32 v7, 0xffffffc0, v116173; GFX10-NEXT: v_lshlrev_b64 v[1:2], v11, s[2:3]6174; GFX10-NEXT: v_sub_nc_u32_e32 v9, 64, v126175; GFX10-NEXT: s_or_b64 s[8:9], s[4:5], s[8:9]6176; GFX10-NEXT: v_lshrrev_b64 v[3:4], v3, s[0:1]6177; GFX10-NEXT: s_lshr_b64 s[6:7], s[6:7], 16178; GFX10-NEXT: v_lshlrev_b64 v[7:8], v7, s[0:1]6179; GFX10-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v116180; GFX10-NEXT: v_add_nc_u32_e32 v13, 0xffffffc0, v126181; GFX10-NEXT: v_lshlrev_b64 v[9:10], v9, s[6:7]6182; GFX10-NEXT: v_or_b32_e32 v3, v3, v16183; GFX10-NEXT: v_lshrrev_b64 v[0:1], v12, s[8:9]6184; GFX10-NEXT: v_or_b32_e32 v4, v4, v26185; GFX10-NEXT: v_lshlrev_b64 v[5:6], v11, s[0:1]6186; GFX10-NEXT: v_cmp_gt_u32_e64 s1, 64, v126187; GFX10-NEXT: v_cndmask_b32_e32 v7, v7, v3, vcc_lo6188; GFX10-NEXT: v_lshrrev_b64 v[2:3], v13, s[6:7]6189; GFX10-NEXT: v_or_b32_e32 v0, v0, v96190; GFX10-NEXT: v_or_b32_e32 v9, v1, v106191; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 0, v116192; GFX10-NEXT: v_cndmask_b32_e32 v4, v8, v4, vcc_lo6193; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 0, v126194; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v0, s16195; GFX10-NEXT: v_lshrrev_b64 v[0:1], v12, s[6:7]6196; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v9, s16197; GFX10-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc_lo6198; GFX10-NEXT: v_cndmask_b32_e32 v6, 0, v6, vcc_lo6199; GFX10-NEXT: v_cndmask_b32_e64 v7, v7, s2, s06200; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, s3, s06201; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s8, s46202; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, s9, s46203; GFX10-NEXT: v_cndmask_b32_e64 v8, 0, v0, s16204; GFX10-NEXT: v_cndmask_b32_e64 v9, 0, v1, s16205; GFX10-NEXT: v_or_b32_e32 v0, v5, v26206; GFX10-NEXT: v_or_b32_e32 v1, v6, v36207; GFX10-NEXT: v_or_b32_e32 v2, v7, v86208; GFX10-NEXT: v_or_b32_e32 v3, v4, v96209; GFX10-NEXT: ; return to shader part epilog6210;6211; GFX11-LABEL: v_fshl_i128_ssv:6212; GFX11: ; %bb.0:6213; GFX11-NEXT: v_and_b32_e32 v11, 0x7f, v06214; GFX11-NEXT: v_bfi_b32 v12, v0, 0, 0x7f6215; GFX11-NEXT: s_mov_b32 s8, 06216; GFX11-NEXT: s_lshr_b64 s[4:5], s[4:5], 16217; GFX11-NEXT: s_lshl_b32 s9, s6, 316218; GFX11-NEXT: v_lshlrev_b64 v[5:6], v11, s[0:1]6219; GFX11-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v116220; GFX11-NEXT: v_sub_nc_u32_e32 v9, 64, v126221; GFX11-NEXT: s_or_b64 s[8:9], s[4:5], s[8:9]6222; GFX11-NEXT: s_lshr_b64 s[6:7], s[6:7], 16223; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)6224; GFX11-NEXT: v_dual_cndmask_b32 v6, 0, v6 :: v_dual_add_nc_u32 v13, 0xffffffc0, v126225; GFX11-NEXT: v_sub_nc_u32_e32 v3, 64, v116226; GFX11-NEXT: v_lshlrev_b64 v[1:2], v11, s[2:3]6227; GFX11-NEXT: v_lshlrev_b64 v[9:10], v9, s[6:7]6228; GFX11-NEXT: v_cmp_eq_u32_e64 s4, 0, v126229; GFX11-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc_lo6230; GFX11-NEXT: v_lshrrev_b64 v[3:4], v3, s[0:1]6231; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)6232; GFX11-NEXT: v_or_b32_e32 v4, v4, v26233; GFX11-NEXT: v_add_nc_u32_e32 v7, 0xffffffc0, v116234; GFX11-NEXT: v_or_b32_e32 v3, v3, v16235; GFX11-NEXT: v_lshrrev_b64 v[0:1], v12, s[8:9]6236; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)6237; GFX11-NEXT: v_lshlrev_b64 v[7:8], v7, s[0:1]6238; GFX11-NEXT: v_cmp_gt_u32_e64 s1, 64, v126239; GFX11-NEXT: v_cmp_eq_u32_e64 s0, 0, v116240; GFX11-NEXT: v_or_b32_e32 v0, v0, v96241; GFX11-NEXT: v_or_b32_e32 v9, v1, v106242; GFX11-NEXT: v_cndmask_b32_e32 v7, v7, v3, vcc_lo6243; GFX11-NEXT: v_lshrrev_b64 v[2:3], v13, s[6:7]6244; GFX11-NEXT: v_cndmask_b32_e32 v4, v8, v4, vcc_lo6245; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)6246; GFX11-NEXT: v_cndmask_b32_e64 v7, v7, s2, s06247; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, v0, s16248; GFX11-NEXT: v_lshrrev_b64 v[0:1], v12, s[6:7]6249; GFX11-NEXT: v_cndmask_b32_e64 v3, v3, v9, s16250; GFX11-NEXT: v_cndmask_b32_e64 v4, v4, s3, s06251; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)6252; GFX11-NEXT: v_cndmask_b32_e64 v2, v2, s8, s46253; GFX11-NEXT: v_cndmask_b32_e64 v3, v3, s9, s46254; GFX11-NEXT: v_cndmask_b32_e64 v8, 0, v0, s16255; GFX11-NEXT: v_cndmask_b32_e64 v9, 0, v1, s16256; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)6257; GFX11-NEXT: v_or_b32_e32 v0, v5, v26258; GFX11-NEXT: v_or_b32_e32 v1, v6, v36259; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)6260; GFX11-NEXT: v_or_b32_e32 v2, v7, v86261; GFX11-NEXT: v_or_b32_e32 v3, v4, v96262; GFX11-NEXT: ; return to shader part epilog6263 %result = call i128 @llvm.fshl.i128(i128 %lhs, i128 %rhs, i128 %amt)6264 %cast.result = bitcast i128 %result to <4 x float>6265 ret <4 x float> %cast.result6266}6267 6268define amdgpu_ps <4 x float> @v_fshl_i128_svs(i128 inreg %lhs, i128 %rhs, i128 inreg %amt) {6269; GFX6-LABEL: v_fshl_i128_svs:6270; GFX6: ; %bb.0:6271; GFX6-NEXT: s_and_b32 s5, s4, 0x7f6272; GFX6-NEXT: s_sub_i32 s12, s5, 646273; GFX6-NEXT: s_sub_i32 s8, 64, s56274; GFX6-NEXT: s_cmp_lt_u32 s5, 646275; GFX6-NEXT: s_cselect_b32 s13, 1, 06276; GFX6-NEXT: s_cmp_eq_u32 s5, 06277; GFX6-NEXT: s_cselect_b32 s5, 1, 06278; GFX6-NEXT: s_lshr_b64 s[8:9], s[0:1], s86279; GFX6-NEXT: s_lshl_b64 s[10:11], s[2:3], s46280; GFX6-NEXT: s_lshl_b64 s[6:7], s[0:1], s46281; GFX6-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]6282; GFX6-NEXT: s_lshl_b64 s[0:1], s[0:1], s126283; GFX6-NEXT: s_cmp_lg_u32 s13, 06284; GFX6-NEXT: s_cselect_b64 s[6:7], s[6:7], 06285; GFX6-NEXT: s_cselect_b64 s[0:1], s[8:9], s[0:1]6286; GFX6-NEXT: s_cmp_lg_u32 s5, 06287; GFX6-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]6288; GFX6-NEXT: v_lshr_b64 v[0:1], v[0:1], 16289; GFX6-NEXT: s_andn2_b32 s0, 0x7f, s46290; GFX6-NEXT: v_lshlrev_b32_e32 v4, 31, v26291; GFX6-NEXT: v_lshr_b64 v[2:3], v[2:3], 16292; GFX6-NEXT: s_sub_i32 s1, s0, 646293; GFX6-NEXT: s_sub_i32 s4, 64, s06294; GFX6-NEXT: v_or_b32_e32 v1, v1, v46295; GFX6-NEXT: s_cmp_lt_u32 s0, 646296; GFX6-NEXT: s_cselect_b32 s5, 1, 06297; GFX6-NEXT: s_cmp_eq_u32 s0, 06298; GFX6-NEXT: v_lshr_b64 v[4:5], v[0:1], s06299; GFX6-NEXT: v_lshl_b64 v[6:7], v[2:3], s46300; GFX6-NEXT: s_cselect_b32 s8, 1, 06301; GFX6-NEXT: v_lshr_b64 v[8:9], v[2:3], s06302; GFX6-NEXT: v_lshr_b64 v[2:3], v[2:3], s16303; GFX6-NEXT: s_and_b32 s0, 1, s56304; GFX6-NEXT: v_or_b32_e32 v4, v4, v66305; GFX6-NEXT: v_or_b32_e32 v5, v5, v76306; GFX6-NEXT: v_cmp_ne_u32_e64 vcc, 0, s06307; GFX6-NEXT: s_and_b32 s0, 1, s86308; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc6309; GFX6-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc6310; GFX6-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, s06311; GFX6-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]6312; GFX6-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[0:1]6313; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc6314; GFX6-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc6315; GFX6-NEXT: v_or_b32_e32 v0, s6, v06316; GFX6-NEXT: v_or_b32_e32 v1, s7, v16317; GFX6-NEXT: v_or_b32_e32 v2, s2, v26318; GFX6-NEXT: v_or_b32_e32 v3, s3, v36319; GFX6-NEXT: ; return to shader part epilog6320;6321; GFX8-LABEL: v_fshl_i128_svs:6322; GFX8: ; %bb.0:6323; GFX8-NEXT: s_and_b32 s5, s4, 0x7f6324; GFX8-NEXT: s_sub_i32 s12, s5, 646325; GFX8-NEXT: s_sub_i32 s8, 64, s56326; GFX8-NEXT: s_cmp_lt_u32 s5, 646327; GFX8-NEXT: s_cselect_b32 s13, 1, 06328; GFX8-NEXT: s_cmp_eq_u32 s5, 06329; GFX8-NEXT: s_cselect_b32 s5, 1, 06330; GFX8-NEXT: s_lshr_b64 s[8:9], s[0:1], s86331; GFX8-NEXT: s_lshl_b64 s[10:11], s[2:3], s46332; GFX8-NEXT: s_lshl_b64 s[6:7], s[0:1], s46333; GFX8-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]6334; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s126335; GFX8-NEXT: s_cmp_lg_u32 s13, 06336; GFX8-NEXT: s_cselect_b64 s[6:7], s[6:7], 06337; GFX8-NEXT: s_cselect_b64 s[0:1], s[8:9], s[0:1]6338; GFX8-NEXT: s_cmp_lg_u32 s5, 06339; GFX8-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]6340; GFX8-NEXT: v_lshrrev_b64 v[0:1], 1, v[0:1]6341; GFX8-NEXT: s_andn2_b32 s0, 0x7f, s46342; GFX8-NEXT: v_lshlrev_b32_e32 v4, 31, v26343; GFX8-NEXT: v_lshrrev_b64 v[2:3], 1, v[2:3]6344; GFX8-NEXT: s_sub_i32 s1, s0, 646345; GFX8-NEXT: s_sub_i32 s4, 64, s06346; GFX8-NEXT: v_or_b32_e32 v1, v1, v46347; GFX8-NEXT: s_cmp_lt_u32 s0, 646348; GFX8-NEXT: s_cselect_b32 s5, 1, 06349; GFX8-NEXT: s_cmp_eq_u32 s0, 06350; GFX8-NEXT: v_lshrrev_b64 v[4:5], s0, v[0:1]6351; GFX8-NEXT: v_lshlrev_b64 v[6:7], s4, v[2:3]6352; GFX8-NEXT: s_cselect_b32 s8, 1, 06353; GFX8-NEXT: v_lshrrev_b64 v[8:9], s0, v[2:3]6354; GFX8-NEXT: v_lshrrev_b64 v[2:3], s1, v[2:3]6355; GFX8-NEXT: s_and_b32 s0, 1, s56356; GFX8-NEXT: v_or_b32_e32 v4, v4, v66357; GFX8-NEXT: v_or_b32_e32 v5, v5, v76358; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s06359; GFX8-NEXT: s_and_b32 s0, 1, s86360; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc6361; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc6362; GFX8-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, s06363; GFX8-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]6364; GFX8-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[0:1]6365; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc6366; GFX8-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc6367; GFX8-NEXT: v_or_b32_e32 v0, s6, v06368; GFX8-NEXT: v_or_b32_e32 v1, s7, v16369; GFX8-NEXT: v_or_b32_e32 v2, s2, v26370; GFX8-NEXT: v_or_b32_e32 v3, s3, v36371; GFX8-NEXT: ; return to shader part epilog6372;6373; GFX9-LABEL: v_fshl_i128_svs:6374; GFX9: ; %bb.0:6375; GFX9-NEXT: s_and_b32 s5, s4, 0x7f6376; GFX9-NEXT: s_sub_i32 s12, s5, 646377; GFX9-NEXT: s_sub_i32 s8, 64, s56378; GFX9-NEXT: s_cmp_lt_u32 s5, 646379; GFX9-NEXT: s_cselect_b32 s13, 1, 06380; GFX9-NEXT: s_cmp_eq_u32 s5, 06381; GFX9-NEXT: s_cselect_b32 s5, 1, 06382; GFX9-NEXT: s_lshr_b64 s[8:9], s[0:1], s86383; GFX9-NEXT: s_lshl_b64 s[10:11], s[2:3], s46384; GFX9-NEXT: s_lshl_b64 s[6:7], s[0:1], s46385; GFX9-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]6386; GFX9-NEXT: s_lshl_b64 s[0:1], s[0:1], s126387; GFX9-NEXT: s_cmp_lg_u32 s13, 06388; GFX9-NEXT: s_cselect_b64 s[6:7], s[6:7], 06389; GFX9-NEXT: s_cselect_b64 s[0:1], s[8:9], s[0:1]6390; GFX9-NEXT: v_lshrrev_b64 v[0:1], 1, v[0:1]6391; GFX9-NEXT: s_cmp_lg_u32 s5, 06392; GFX9-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]6393; GFX9-NEXT: s_andn2_b32 s0, 0x7f, s46394; GFX9-NEXT: v_lshl_or_b32 v1, v2, 31, v16395; GFX9-NEXT: v_lshrrev_b64 v[2:3], 1, v[2:3]6396; GFX9-NEXT: s_sub_i32 s1, s0, 646397; GFX9-NEXT: s_sub_i32 s4, 64, s06398; GFX9-NEXT: s_cmp_lt_u32 s0, 646399; GFX9-NEXT: s_cselect_b32 s5, 1, 06400; GFX9-NEXT: s_cmp_eq_u32 s0, 06401; GFX9-NEXT: v_lshrrev_b64 v[4:5], s0, v[0:1]6402; GFX9-NEXT: v_lshlrev_b64 v[6:7], s4, v[2:3]6403; GFX9-NEXT: s_cselect_b32 s8, 1, 06404; GFX9-NEXT: v_lshrrev_b64 v[8:9], s0, v[2:3]6405; GFX9-NEXT: v_lshrrev_b64 v[2:3], s1, v[2:3]6406; GFX9-NEXT: s_and_b32 s0, 1, s56407; GFX9-NEXT: v_or_b32_e32 v4, v4, v66408; GFX9-NEXT: v_or_b32_e32 v5, v5, v76409; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s06410; GFX9-NEXT: s_and_b32 s0, 1, s86411; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc6412; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc6413; GFX9-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, s06414; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[0:1]6415; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[0:1]6416; GFX9-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc6417; GFX9-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc6418; GFX9-NEXT: v_or_b32_e32 v0, s6, v06419; GFX9-NEXT: v_or_b32_e32 v1, s7, v16420; GFX9-NEXT: v_or_b32_e32 v2, s2, v26421; GFX9-NEXT: v_or_b32_e32 v3, s3, v36422; GFX9-NEXT: ; return to shader part epilog6423;6424; GFX10-LABEL: v_fshl_i128_svs:6425; GFX10: ; %bb.0:6426; GFX10-NEXT: s_and_b32 s5, s4, 0x7f6427; GFX10-NEXT: v_lshrrev_b64 v[0:1], 1, v[0:1]6428; GFX10-NEXT: s_sub_i32 s12, s5, 646429; GFX10-NEXT: s_sub_i32 s6, 64, s56430; GFX10-NEXT: s_cmp_lt_u32 s5, 646431; GFX10-NEXT: s_cselect_b32 s13, 1, 06432; GFX10-NEXT: s_cmp_eq_u32 s5, 06433; GFX10-NEXT: v_lshl_or_b32 v1, v2, 31, v16434; GFX10-NEXT: s_cselect_b32 s5, 1, 06435; GFX10-NEXT: s_lshr_b64 s[6:7], s[0:1], s66436; GFX10-NEXT: s_lshl_b64 s[8:9], s[2:3], s46437; GFX10-NEXT: s_lshl_b64 s[10:11], s[0:1], s46438; GFX10-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]6439; GFX10-NEXT: s_lshl_b64 s[0:1], s[0:1], s126440; GFX10-NEXT: s_cmp_lg_u32 s13, 06441; GFX10-NEXT: v_lshrrev_b64 v[2:3], 1, v[2:3]6442; GFX10-NEXT: s_cselect_b64 s[8:9], s[10:11], 06443; GFX10-NEXT: s_cselect_b64 s[0:1], s[6:7], s[0:1]6444; GFX10-NEXT: s_cmp_lg_u32 s5, 06445; GFX10-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]6446; GFX10-NEXT: s_andn2_b32 s0, 0x7f, s46447; GFX10-NEXT: s_sub_i32 s1, 64, s06448; GFX10-NEXT: v_lshrrev_b64 v[4:5], s0, v[0:1]6449; GFX10-NEXT: v_lshlrev_b64 v[6:7], s1, v[2:3]6450; GFX10-NEXT: s_sub_i32 s1, s0, 646451; GFX10-NEXT: s_cmp_lt_u32 s0, 646452; GFX10-NEXT: v_lshrrev_b64 v[8:9], s1, v[2:3]6453; GFX10-NEXT: s_cselect_b32 s4, 1, 06454; GFX10-NEXT: s_cmp_eq_u32 s0, 06455; GFX10-NEXT: v_or_b32_e32 v4, v4, v66456; GFX10-NEXT: s_cselect_b32 s5, 1, 06457; GFX10-NEXT: s_and_b32 s1, 1, s46458; GFX10-NEXT: v_or_b32_e32 v5, v5, v76459; GFX10-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s16460; GFX10-NEXT: v_lshrrev_b64 v[2:3], s0, v[2:3]6461; GFX10-NEXT: s_and_b32 s0, 1, s56462; GFX10-NEXT: v_cmp_ne_u32_e64 s0, 0, s06463; GFX10-NEXT: v_cndmask_b32_e32 v4, v8, v4, vcc_lo6464; GFX10-NEXT: v_cndmask_b32_e32 v5, v9, v5, vcc_lo6465; GFX10-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc_lo6466; GFX10-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc_lo6467; GFX10-NEXT: v_cndmask_b32_e64 v0, v4, v0, s06468; GFX10-NEXT: v_cndmask_b32_e64 v1, v5, v1, s06469; GFX10-NEXT: v_or_b32_e32 v2, s2, v26470; GFX10-NEXT: v_or_b32_e32 v3, s3, v36471; GFX10-NEXT: v_or_b32_e32 v0, s8, v06472; GFX10-NEXT: v_or_b32_e32 v1, s9, v16473; GFX10-NEXT: ; return to shader part epilog6474;6475; GFX11-LABEL: v_fshl_i128_svs:6476; GFX11: ; %bb.0:6477; GFX11-NEXT: s_and_b32 s5, s4, 0x7f6478; GFX11-NEXT: v_lshrrev_b64 v[0:1], 1, v[0:1]6479; GFX11-NEXT: s_sub_i32 s12, s5, 646480; GFX11-NEXT: s_sub_i32 s6, 64, s56481; GFX11-NEXT: s_cmp_lt_u32 s5, 646482; GFX11-NEXT: s_cselect_b32 s13, 1, 06483; GFX11-NEXT: s_cmp_eq_u32 s5, 06484; GFX11-NEXT: v_lshl_or_b32 v1, v2, 31, v16485; GFX11-NEXT: s_cselect_b32 s5, 1, 06486; GFX11-NEXT: s_lshr_b64 s[6:7], s[0:1], s66487; GFX11-NEXT: s_lshl_b64 s[8:9], s[2:3], s46488; GFX11-NEXT: s_lshl_b64 s[10:11], s[0:1], s46489; GFX11-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]6490; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], s126491; GFX11-NEXT: s_cmp_lg_u32 s13, 06492; GFX11-NEXT: v_lshrrev_b64 v[2:3], 1, v[2:3]6493; GFX11-NEXT: s_cselect_b64 s[8:9], s[10:11], 06494; GFX11-NEXT: s_cselect_b64 s[0:1], s[6:7], s[0:1]6495; GFX11-NEXT: s_cmp_lg_u32 s5, 06496; GFX11-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]6497; GFX11-NEXT: s_and_not1_b32 s0, 0x7f, s46498; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)6499; GFX11-NEXT: s_sub_i32 s1, 64, s06500; GFX11-NEXT: v_lshrrev_b64 v[4:5], s0, v[0:1]6501; GFX11-NEXT: v_lshlrev_b64 v[6:7], s1, v[2:3]6502; GFX11-NEXT: s_sub_i32 s1, s0, 646503; GFX11-NEXT: s_cmp_lt_u32 s0, 646504; GFX11-NEXT: v_lshrrev_b64 v[8:9], s1, v[2:3]6505; GFX11-NEXT: s_cselect_b32 s4, 1, 06506; GFX11-NEXT: s_cmp_eq_u32 s0, 06507; GFX11-NEXT: v_or_b32_e32 v4, v4, v66508; GFX11-NEXT: s_cselect_b32 s5, 1, 06509; GFX11-NEXT: s_and_b32 s1, 1, s46510; GFX11-NEXT: v_or_b32_e32 v5, v5, v76511; GFX11-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s16512; GFX11-NEXT: v_lshrrev_b64 v[2:3], s0, v[2:3]6513; GFX11-NEXT: s_and_b32 s0, 1, s56514; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)6515; GFX11-NEXT: v_cmp_ne_u32_e64 s0, 0, s06516; GFX11-NEXT: v_dual_cndmask_b32 v4, v8, v4 :: v_dual_cndmask_b32 v5, v9, v56517; GFX11-NEXT: v_dual_cndmask_b32 v2, 0, v2 :: v_dual_cndmask_b32 v3, 0, v36518; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)6519; GFX11-NEXT: v_cndmask_b32_e64 v0, v4, v0, s06520; GFX11-NEXT: v_cndmask_b32_e64 v1, v5, v1, s06521; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)6522; GFX11-NEXT: v_or_b32_e32 v2, s2, v26523; GFX11-NEXT: v_or_b32_e32 v3, s3, v36524; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)6525; GFX11-NEXT: v_or_b32_e32 v0, s8, v06526; GFX11-NEXT: v_or_b32_e32 v1, s9, v16527; GFX11-NEXT: ; return to shader part epilog6528 %result = call i128 @llvm.fshl.i128(i128 %lhs, i128 %rhs, i128 %amt)6529 %cast.result = bitcast i128 %result to <4 x float>6530 ret <4 x float> %cast.result6531}6532 6533define amdgpu_ps <4 x float> @v_fshl_i128_vss(i128 %lhs, i128 inreg %rhs, i128 inreg %amt) {6534; GFX6-LABEL: v_fshl_i128_vss:6535; GFX6: ; %bb.0:6536; GFX6-NEXT: s_and_b32 s5, s4, 0x7f6537; GFX6-NEXT: s_sub_i32 s7, s5, 646538; GFX6-NEXT: s_sub_i32 s8, 64, s56539; GFX6-NEXT: s_cmp_lt_u32 s5, 646540; GFX6-NEXT: s_cselect_b32 s9, 1, 06541; GFX6-NEXT: s_cmp_eq_u32 s5, 06542; GFX6-NEXT: s_mov_b32 s6, 06543; GFX6-NEXT: s_cselect_b32 s10, 1, 06544; GFX6-NEXT: v_lshr_b64 v[4:5], v[0:1], s86545; GFX6-NEXT: v_lshl_b64 v[8:9], v[0:1], s56546; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], s76547; GFX6-NEXT: s_lshr_b64 s[0:1], s[0:1], 16548; GFX6-NEXT: s_lshl_b32 s7, s2, 316549; GFX6-NEXT: v_lshl_b64 v[6:7], v[2:3], s56550; GFX6-NEXT: s_and_b32 s5, 1, s96551; GFX6-NEXT: s_or_b64 s[0:1], s[0:1], s[6:7]6552; GFX6-NEXT: s_not_b32 s6, s46553; GFX6-NEXT: s_andn2_b32 s4, 0x7f, s46554; GFX6-NEXT: v_cmp_ne_u32_e64 vcc, 0, s56555; GFX6-NEXT: s_and_b32 s5, 1, s106556; GFX6-NEXT: s_lshr_b64 s[2:3], s[2:3], 16557; GFX6-NEXT: s_sub_i32 s10, s4, 646558; GFX6-NEXT: s_sub_i32 s8, 64, s46559; GFX6-NEXT: s_cmp_lt_u32 s4, 646560; GFX6-NEXT: v_or_b32_e32 v4, v4, v66561; GFX6-NEXT: v_or_b32_e32 v5, v5, v76562; GFX6-NEXT: s_cselect_b32 s11, 1, 06563; GFX6-NEXT: s_cmp_eq_u32 s4, 06564; GFX6-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc6565; GFX6-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc6566; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc6567; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc6568; GFX6-NEXT: v_cmp_ne_u32_e64 vcc, 0, s56569; GFX6-NEXT: s_cselect_b32 s12, 1, 06570; GFX6-NEXT: s_lshr_b64 s[4:5], s[2:3], s66571; GFX6-NEXT: s_lshr_b64 s[6:7], s[0:1], s66572; GFX6-NEXT: s_lshl_b64 s[8:9], s[2:3], s86573; GFX6-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]6574; GFX6-NEXT: s_lshr_b64 s[2:3], s[2:3], s106575; GFX6-NEXT: s_cmp_lg_u32 s11, 06576; GFX6-NEXT: s_cselect_b64 s[2:3], s[6:7], s[2:3]6577; GFX6-NEXT: s_cmp_lg_u32 s12, 06578; GFX6-NEXT: s_cselect_b64 s[0:1], s[0:1], s[2:3]6579; GFX6-NEXT: s_cmp_lg_u32 s11, 06580; GFX6-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc6581; GFX6-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc6582; GFX6-NEXT: s_cselect_b64 s[2:3], s[4:5], 06583; GFX6-NEXT: v_or_b32_e32 v0, s0, v66584; GFX6-NEXT: v_or_b32_e32 v1, s1, v76585; GFX6-NEXT: v_or_b32_e32 v2, s2, v26586; GFX6-NEXT: v_or_b32_e32 v3, s3, v36587; GFX6-NEXT: ; return to shader part epilog6588;6589; GFX8-LABEL: v_fshl_i128_vss:6590; GFX8: ; %bb.0:6591; GFX8-NEXT: s_and_b32 s5, s4, 0x7f6592; GFX8-NEXT: s_sub_i32 s7, s5, 646593; GFX8-NEXT: s_sub_i32 s8, 64, s56594; GFX8-NEXT: s_cmp_lt_u32 s5, 646595; GFX8-NEXT: s_cselect_b32 s9, 1, 06596; GFX8-NEXT: s_cmp_eq_u32 s5, 06597; GFX8-NEXT: s_mov_b32 s6, 06598; GFX8-NEXT: s_cselect_b32 s10, 1, 06599; GFX8-NEXT: v_lshrrev_b64 v[4:5], s8, v[0:1]6600; GFX8-NEXT: v_lshlrev_b64 v[8:9], s5, v[0:1]6601; GFX8-NEXT: v_lshlrev_b64 v[0:1], s7, v[0:1]6602; GFX8-NEXT: s_lshr_b64 s[0:1], s[0:1], 16603; GFX8-NEXT: s_lshl_b32 s7, s2, 316604; GFX8-NEXT: v_lshlrev_b64 v[6:7], s5, v[2:3]6605; GFX8-NEXT: s_and_b32 s5, 1, s96606; GFX8-NEXT: s_or_b64 s[0:1], s[0:1], s[6:7]6607; GFX8-NEXT: s_not_b32 s6, s46608; GFX8-NEXT: s_andn2_b32 s4, 0x7f, s46609; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s56610; GFX8-NEXT: s_and_b32 s5, 1, s106611; GFX8-NEXT: s_lshr_b64 s[2:3], s[2:3], 16612; GFX8-NEXT: s_sub_i32 s10, s4, 646613; GFX8-NEXT: s_sub_i32 s8, 64, s46614; GFX8-NEXT: s_cmp_lt_u32 s4, 646615; GFX8-NEXT: v_or_b32_e32 v4, v4, v66616; GFX8-NEXT: v_or_b32_e32 v5, v5, v76617; GFX8-NEXT: s_cselect_b32 s11, 1, 06618; GFX8-NEXT: s_cmp_eq_u32 s4, 06619; GFX8-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc6620; GFX8-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc6621; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc6622; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc6623; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s56624; GFX8-NEXT: s_cselect_b32 s12, 1, 06625; GFX8-NEXT: s_lshr_b64 s[4:5], s[2:3], s66626; GFX8-NEXT: s_lshr_b64 s[6:7], s[0:1], s66627; GFX8-NEXT: s_lshl_b64 s[8:9], s[2:3], s86628; GFX8-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]6629; GFX8-NEXT: s_lshr_b64 s[2:3], s[2:3], s106630; GFX8-NEXT: s_cmp_lg_u32 s11, 06631; GFX8-NEXT: s_cselect_b64 s[2:3], s[6:7], s[2:3]6632; GFX8-NEXT: s_cmp_lg_u32 s12, 06633; GFX8-NEXT: s_cselect_b64 s[0:1], s[0:1], s[2:3]6634; GFX8-NEXT: s_cmp_lg_u32 s11, 06635; GFX8-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc6636; GFX8-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc6637; GFX8-NEXT: s_cselect_b64 s[2:3], s[4:5], 06638; GFX8-NEXT: v_or_b32_e32 v0, s0, v66639; GFX8-NEXT: v_or_b32_e32 v1, s1, v76640; GFX8-NEXT: v_or_b32_e32 v2, s2, v26641; GFX8-NEXT: v_or_b32_e32 v3, s3, v36642; GFX8-NEXT: ; return to shader part epilog6643;6644; GFX9-LABEL: v_fshl_i128_vss:6645; GFX9: ; %bb.0:6646; GFX9-NEXT: s_and_b32 s5, s4, 0x7f6647; GFX9-NEXT: s_sub_i32 s7, s5, 646648; GFX9-NEXT: s_sub_i32 s8, 64, s56649; GFX9-NEXT: s_cmp_lt_u32 s5, 646650; GFX9-NEXT: s_cselect_b32 s9, 1, 06651; GFX9-NEXT: s_cmp_eq_u32 s5, 06652; GFX9-NEXT: s_mov_b32 s6, 06653; GFX9-NEXT: s_cselect_b32 s10, 1, 06654; GFX9-NEXT: v_lshrrev_b64 v[4:5], s8, v[0:1]6655; GFX9-NEXT: v_lshlrev_b64 v[8:9], s5, v[0:1]6656; GFX9-NEXT: v_lshlrev_b64 v[0:1], s7, v[0:1]6657; GFX9-NEXT: s_lshr_b64 s[0:1], s[0:1], 16658; GFX9-NEXT: s_lshl_b32 s7, s2, 316659; GFX9-NEXT: v_lshlrev_b64 v[6:7], s5, v[2:3]6660; GFX9-NEXT: s_and_b32 s5, 1, s96661; GFX9-NEXT: s_or_b64 s[0:1], s[0:1], s[6:7]6662; GFX9-NEXT: s_not_b32 s6, s46663; GFX9-NEXT: s_andn2_b32 s4, 0x7f, s46664; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s56665; GFX9-NEXT: s_and_b32 s5, 1, s106666; GFX9-NEXT: s_lshr_b64 s[2:3], s[2:3], 16667; GFX9-NEXT: s_sub_i32 s10, s4, 646668; GFX9-NEXT: s_sub_i32 s8, 64, s46669; GFX9-NEXT: s_cmp_lt_u32 s4, 646670; GFX9-NEXT: v_or_b32_e32 v4, v4, v66671; GFX9-NEXT: v_or_b32_e32 v5, v5, v76672; GFX9-NEXT: s_cselect_b32 s11, 1, 06673; GFX9-NEXT: s_cmp_eq_u32 s4, 06674; GFX9-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc6675; GFX9-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc6676; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc6677; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc6678; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s56679; GFX9-NEXT: s_cselect_b32 s12, 1, 06680; GFX9-NEXT: s_lshr_b64 s[4:5], s[2:3], s66681; GFX9-NEXT: s_lshr_b64 s[6:7], s[0:1], s66682; GFX9-NEXT: s_lshl_b64 s[8:9], s[2:3], s86683; GFX9-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]6684; GFX9-NEXT: s_lshr_b64 s[2:3], s[2:3], s106685; GFX9-NEXT: s_cmp_lg_u32 s11, 06686; GFX9-NEXT: s_cselect_b64 s[2:3], s[6:7], s[2:3]6687; GFX9-NEXT: s_cmp_lg_u32 s12, 06688; GFX9-NEXT: s_cselect_b64 s[0:1], s[0:1], s[2:3]6689; GFX9-NEXT: s_cmp_lg_u32 s11, 06690; GFX9-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc6691; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc6692; GFX9-NEXT: s_cselect_b64 s[2:3], s[4:5], 06693; GFX9-NEXT: v_or_b32_e32 v0, s0, v66694; GFX9-NEXT: v_or_b32_e32 v1, s1, v76695; GFX9-NEXT: v_or_b32_e32 v2, s2, v26696; GFX9-NEXT: v_or_b32_e32 v3, s3, v36697; GFX9-NEXT: ; return to shader part epilog6698;6699; GFX10-LABEL: v_fshl_i128_vss:6700; GFX10: ; %bb.0:6701; GFX10-NEXT: s_and_b32 s5, s4, 0x7f6702; GFX10-NEXT: s_sub_i32 s7, 64, s56703; GFX10-NEXT: s_sub_i32 s6, s5, 646704; GFX10-NEXT: s_cmp_lt_u32 s5, 646705; GFX10-NEXT: v_lshrrev_b64 v[4:5], s7, v[0:1]6706; GFX10-NEXT: v_lshlrev_b64 v[6:7], s5, v[2:3]6707; GFX10-NEXT: s_cselect_b32 s8, 1, 06708; GFX10-NEXT: s_cmp_eq_u32 s5, 06709; GFX10-NEXT: v_lshlrev_b64 v[8:9], s5, v[0:1]6710; GFX10-NEXT: s_cselect_b32 s9, 1, 06711; GFX10-NEXT: s_and_b32 s5, 1, s86712; GFX10-NEXT: v_lshlrev_b64 v[0:1], s6, v[0:1]6713; GFX10-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s56714; GFX10-NEXT: v_or_b32_e32 v4, v4, v66715; GFX10-NEXT: v_or_b32_e32 v5, v5, v76716; GFX10-NEXT: s_and_b32 s5, 1, s96717; GFX10-NEXT: s_mov_b32 s6, 06718; GFX10-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc_lo6719; GFX10-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc_lo6720; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo6721; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo6722; GFX10-NEXT: s_lshr_b64 s[0:1], s[0:1], 16723; GFX10-NEXT: s_lshl_b32 s7, s2, 316724; GFX10-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s56725; GFX10-NEXT: s_andn2_b32 s5, 0x7f, s46726; GFX10-NEXT: s_or_b64 s[0:1], s[0:1], s[6:7]6727; GFX10-NEXT: s_lshr_b64 s[2:3], s[2:3], 16728; GFX10-NEXT: s_not_b32 s8, s46729; GFX10-NEXT: s_sub_i32 s10, s5, 646730; GFX10-NEXT: s_sub_i32 s6, 64, s56731; GFX10-NEXT: s_cmp_lt_u32 s5, 646732; GFX10-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc_lo6733; GFX10-NEXT: s_cselect_b32 s11, 1, 06734; GFX10-NEXT: s_cmp_eq_u32 s5, 06735; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc_lo6736; GFX10-NEXT: s_cselect_b32 s12, 1, 06737; GFX10-NEXT: s_lshr_b64 s[4:5], s[0:1], s86738; GFX10-NEXT: s_lshl_b64 s[6:7], s[2:3], s66739; GFX10-NEXT: s_lshr_b64 s[8:9], s[2:3], s86740; GFX10-NEXT: s_or_b64 s[4:5], s[4:5], s[6:7]6741; GFX10-NEXT: s_lshr_b64 s[2:3], s[2:3], s106742; GFX10-NEXT: s_cmp_lg_u32 s11, 06743; GFX10-NEXT: s_cselect_b64 s[2:3], s[4:5], s[2:3]6744; GFX10-NEXT: s_cmp_lg_u32 s12, 06745; GFX10-NEXT: s_cselect_b64 s[0:1], s[0:1], s[2:3]6746; GFX10-NEXT: s_cmp_lg_u32 s11, 06747; GFX10-NEXT: v_or_b32_e32 v0, s0, v66748; GFX10-NEXT: s_cselect_b64 s[2:3], s[8:9], 06749; GFX10-NEXT: v_or_b32_e32 v1, s1, v76750; GFX10-NEXT: v_or_b32_e32 v2, s2, v26751; GFX10-NEXT: v_or_b32_e32 v3, s3, v36752; GFX10-NEXT: ; return to shader part epilog6753;6754; GFX11-LABEL: v_fshl_i128_vss:6755; GFX11: ; %bb.0:6756; GFX11-NEXT: s_and_b32 s5, s4, 0x7f6757; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)6758; GFX11-NEXT: s_sub_i32 s7, 64, s56759; GFX11-NEXT: s_sub_i32 s6, s5, 646760; GFX11-NEXT: s_cmp_lt_u32 s5, 646761; GFX11-NEXT: v_lshrrev_b64 v[4:5], s7, v[0:1]6762; GFX11-NEXT: v_lshlrev_b64 v[6:7], s5, v[2:3]6763; GFX11-NEXT: s_cselect_b32 s8, 1, 06764; GFX11-NEXT: s_cmp_eq_u32 s5, 06765; GFX11-NEXT: v_lshlrev_b64 v[8:9], s5, v[0:1]6766; GFX11-NEXT: s_cselect_b32 s9, 1, 06767; GFX11-NEXT: s_and_b32 s5, 1, s86768; GFX11-NEXT: v_lshlrev_b64 v[0:1], s6, v[0:1]6769; GFX11-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s56770; GFX11-NEXT: v_or_b32_e32 v4, v4, v66771; GFX11-NEXT: v_or_b32_e32 v5, v5, v76772; GFX11-NEXT: s_and_b32 s5, 1, s96773; GFX11-NEXT: s_mov_b32 s6, 06774; GFX11-NEXT: v_dual_cndmask_b32 v6, 0, v8 :: v_dual_cndmask_b32 v7, 0, v96775; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)6776; GFX11-NEXT: v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v1, v1, v56777; GFX11-NEXT: s_lshr_b64 s[0:1], s[0:1], 16778; GFX11-NEXT: s_lshl_b32 s7, s2, 316779; GFX11-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s56780; GFX11-NEXT: s_and_not1_b32 s5, 0x7f, s46781; GFX11-NEXT: s_or_b64 s[0:1], s[0:1], s[6:7]6782; GFX11-NEXT: s_lshr_b64 s[2:3], s[2:3], 16783; GFX11-NEXT: s_not_b32 s8, s46784; GFX11-NEXT: s_sub_i32 s10, s5, 646785; GFX11-NEXT: s_sub_i32 s6, 64, s56786; GFX11-NEXT: s_cmp_lt_u32 s5, 646787; GFX11-NEXT: v_dual_cndmask_b32 v2, v0, v2 :: v_dual_cndmask_b32 v3, v1, v36788; GFX11-NEXT: s_cselect_b32 s11, 1, 06789; GFX11-NEXT: s_cmp_eq_u32 s5, 06790; GFX11-NEXT: s_cselect_b32 s12, 1, 06791; GFX11-NEXT: s_lshr_b64 s[4:5], s[0:1], s86792; GFX11-NEXT: s_lshl_b64 s[6:7], s[2:3], s66793; GFX11-NEXT: s_lshr_b64 s[8:9], s[2:3], s86794; GFX11-NEXT: s_or_b64 s[4:5], s[4:5], s[6:7]6795; GFX11-NEXT: s_lshr_b64 s[2:3], s[2:3], s106796; GFX11-NEXT: s_cmp_lg_u32 s11, 06797; GFX11-NEXT: s_cselect_b64 s[2:3], s[4:5], s[2:3]6798; GFX11-NEXT: s_cmp_lg_u32 s12, 06799; GFX11-NEXT: s_cselect_b64 s[0:1], s[0:1], s[2:3]6800; GFX11-NEXT: s_cmp_lg_u32 s11, 06801; GFX11-NEXT: v_or_b32_e32 v0, s0, v66802; GFX11-NEXT: s_cselect_b64 s[2:3], s[8:9], 06803; GFX11-NEXT: v_or_b32_e32 v1, s1, v76804; GFX11-NEXT: v_or_b32_e32 v2, s2, v26805; GFX11-NEXT: v_or_b32_e32 v3, s3, v36806; GFX11-NEXT: ; return to shader part epilog6807 %result = call i128 @llvm.fshl.i128(i128 %lhs, i128 %rhs, i128 %amt)6808 %cast.result = bitcast i128 %result to <4 x float>6809 ret <4 x float> %cast.result6810}6811 6812define amdgpu_ps i128 @s_fshl_i128_65(i128 inreg %lhs, i128 inreg %rhs) {6813; GFX6-LABEL: s_fshl_i128_65:6814; GFX6: ; %bb.0:6815; GFX6-NEXT: s_lshl_b64 s[2:3], s[0:1], 16816; GFX6-NEXT: s_lshr_b32 s4, s5, 316817; GFX6-NEXT: s_lshl_b64 s[0:1], s[6:7], 16818; GFX6-NEXT: s_or_b32 s0, s0, s46819; GFX6-NEXT: s_lshr_b32 s4, s7, 316820; GFX6-NEXT: s_or_b32 s2, s2, s46821; GFX6-NEXT: ; return to shader part epilog6822;6823; GFX8-LABEL: s_fshl_i128_65:6824; GFX8: ; %bb.0:6825; GFX8-NEXT: s_lshl_b64 s[2:3], s[0:1], 16826; GFX8-NEXT: s_lshr_b32 s4, s5, 316827; GFX8-NEXT: s_lshl_b64 s[0:1], s[6:7], 16828; GFX8-NEXT: s_or_b32 s0, s0, s46829; GFX8-NEXT: s_lshr_b32 s4, s7, 316830; GFX8-NEXT: s_or_b32 s2, s2, s46831; GFX8-NEXT: ; return to shader part epilog6832;6833; GFX9-LABEL: s_fshl_i128_65:6834; GFX9: ; %bb.0:6835; GFX9-NEXT: s_lshl_b64 s[2:3], s[0:1], 16836; GFX9-NEXT: s_lshr_b32 s4, s5, 316837; GFX9-NEXT: s_lshl_b64 s[0:1], s[6:7], 16838; GFX9-NEXT: s_or_b32 s0, s0, s46839; GFX9-NEXT: s_lshr_b32 s4, s7, 316840; GFX9-NEXT: s_or_b32 s2, s2, s46841; GFX9-NEXT: ; return to shader part epilog6842;6843; GFX10-LABEL: s_fshl_i128_65:6844; GFX10: ; %bb.0:6845; GFX10-NEXT: s_lshl_b64 s[2:3], s[0:1], 16846; GFX10-NEXT: s_lshr_b32 s4, s5, 316847; GFX10-NEXT: s_lshl_b64 s[0:1], s[6:7], 16848; GFX10-NEXT: s_lshr_b32 s5, s7, 316849; GFX10-NEXT: s_or_b32 s0, s0, s46850; GFX10-NEXT: s_or_b32 s2, s2, s56851; GFX10-NEXT: ; return to shader part epilog6852;6853; GFX11-LABEL: s_fshl_i128_65:6854; GFX11: ; %bb.0:6855; GFX11-NEXT: s_lshl_b64 s[2:3], s[0:1], 16856; GFX11-NEXT: s_lshr_b32 s4, s5, 316857; GFX11-NEXT: s_lshl_b64 s[0:1], s[6:7], 16858; GFX11-NEXT: s_lshr_b32 s5, s7, 316859; GFX11-NEXT: s_or_b32 s0, s0, s46860; GFX11-NEXT: s_or_b32 s2, s2, s56861; GFX11-NEXT: ; return to shader part epilog6862 %result = call i128 @llvm.fshl.i128(i128 %lhs, i128 %rhs, i128 65)6863 ret i128 %result6864}6865 6866define i128 @v_fshl_i128_65(i128 %lhs, i128 %rhs) {6867; GFX6-LABEL: v_fshl_i128_65:6868; GFX6: ; %bb.0:6869; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6870; GFX6-NEXT: v_lshl_b64 v[2:3], v[0:1], 16871; GFX6-NEXT: v_lshl_b64 v[0:1], v[6:7], 16872; GFX6-NEXT: v_lshrrev_b32_e32 v4, 31, v56873; GFX6-NEXT: v_or_b32_e32 v0, v0, v46874; GFX6-NEXT: v_lshrrev_b32_e32 v4, 31, v76875; GFX6-NEXT: v_or_b32_e32 v2, v2, v46876; GFX6-NEXT: s_setpc_b64 s[30:31]6877;6878; GFX8-LABEL: v_fshl_i128_65:6879; GFX8: ; %bb.0:6880; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6881; GFX8-NEXT: v_lshlrev_b64 v[2:3], 1, v[0:1]6882; GFX8-NEXT: v_lshlrev_b64 v[0:1], 1, v[6:7]6883; GFX8-NEXT: v_lshrrev_b32_e32 v4, 31, v56884; GFX8-NEXT: v_or_b32_e32 v0, v0, v46885; GFX8-NEXT: v_lshrrev_b32_e32 v4, 31, v76886; GFX8-NEXT: v_or_b32_e32 v2, v2, v46887; GFX8-NEXT: s_setpc_b64 s[30:31]6888;6889; GFX9-LABEL: v_fshl_i128_65:6890; GFX9: ; %bb.0:6891; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6892; GFX9-NEXT: v_lshlrev_b64 v[2:3], 1, v[0:1]6893; GFX9-NEXT: v_lshlrev_b64 v[0:1], 1, v[6:7]6894; GFX9-NEXT: v_lshrrev_b32_e32 v4, 31, v56895; GFX9-NEXT: v_or_b32_e32 v0, v0, v46896; GFX9-NEXT: v_lshrrev_b32_e32 v4, 31, v76897; GFX9-NEXT: v_or_b32_e32 v2, v2, v46898; GFX9-NEXT: s_setpc_b64 s[30:31]6899;6900; GFX10-LABEL: v_fshl_i128_65:6901; GFX10: ; %bb.0:6902; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6903; GFX10-NEXT: v_lshlrev_b64 v[2:3], 1, v[0:1]6904; GFX10-NEXT: v_lshlrev_b64 v[0:1], 1, v[6:7]6905; GFX10-NEXT: v_lshrrev_b32_e32 v4, 31, v56906; GFX10-NEXT: v_lshrrev_b32_e32 v5, 31, v76907; GFX10-NEXT: v_or_b32_e32 v0, v0, v46908; GFX10-NEXT: v_or_b32_e32 v2, v2, v56909; GFX10-NEXT: s_setpc_b64 s[30:31]6910;6911; GFX11-LABEL: v_fshl_i128_65:6912; GFX11: ; %bb.0:6913; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6914; GFX11-NEXT: v_lshlrev_b64 v[2:3], 1, v[0:1]6915; GFX11-NEXT: v_lshlrev_b64 v[0:1], 1, v[6:7]6916; GFX11-NEXT: v_lshrrev_b32_e32 v4, 31, v56917; GFX11-NEXT: v_lshrrev_b32_e32 v5, 31, v76918; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6919; GFX11-NEXT: v_or_b32_e32 v0, v0, v46920; GFX11-NEXT: v_or_b32_e32 v2, v2, v56921; GFX11-NEXT: s_setpc_b64 s[30:31]6922 %result = call i128 @llvm.fshl.i128(i128 %lhs, i128 %rhs, i128 65)6923 ret i128 %result6924}6925 6926define amdgpu_ps <2 x i128> @s_fshl_v2i128(<2 x i128> inreg %lhs, <2 x i128> inreg %rhs, <2 x i128> inreg %amt) {6927; GFX6-LABEL: s_fshl_v2i128:6928; GFX6: ; %bb.0:6929; GFX6-NEXT: s_and_b32 s17, s16, 0x7f6930; GFX6-NEXT: s_sub_i32 s19, s17, 646931; GFX6-NEXT: s_sub_i32 s21, 64, s176932; GFX6-NEXT: s_cmp_lt_u32 s17, 646933; GFX6-NEXT: s_cselect_b32 s28, 1, 06934; GFX6-NEXT: s_cmp_eq_u32 s17, 06935; GFX6-NEXT: s_cselect_b32 s17, 1, 06936; GFX6-NEXT: s_lshr_b64 s[24:25], s[0:1], s216937; GFX6-NEXT: s_lshl_b64 s[26:27], s[2:3], s166938; GFX6-NEXT: s_lshl_b64 s[22:23], s[0:1], s166939; GFX6-NEXT: s_or_b64 s[24:25], s[24:25], s[26:27]6940; GFX6-NEXT: s_lshl_b64 s[0:1], s[0:1], s196941; GFX6-NEXT: s_cmp_lg_u32 s28, 06942; GFX6-NEXT: s_cselect_b64 s[22:23], s[22:23], 06943; GFX6-NEXT: s_cselect_b64 s[0:1], s[24:25], s[0:1]6944; GFX6-NEXT: s_cmp_lg_u32 s17, 06945; GFX6-NEXT: s_mov_b32 s18, 06946; GFX6-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]6947; GFX6-NEXT: s_lshr_b64 s[0:1], s[8:9], 16948; GFX6-NEXT: s_lshl_b32 s19, s10, 316949; GFX6-NEXT: s_lshr_b64 s[8:9], s[10:11], 16950; GFX6-NEXT: s_andn2_b32 s10, 0x7f, s166951; GFX6-NEXT: s_or_b64 s[0:1], s[0:1], s[18:19]6952; GFX6-NEXT: s_not_b32 s17, s166953; GFX6-NEXT: s_sub_i32 s19, s10, 646954; GFX6-NEXT: s_sub_i32 s21, 64, s106955; GFX6-NEXT: s_cmp_lt_u32 s10, 646956; GFX6-NEXT: s_cselect_b32 s26, 1, 06957; GFX6-NEXT: s_cmp_eq_u32 s10, 06958; GFX6-NEXT: s_cselect_b32 s27, 1, 06959; GFX6-NEXT: s_lshr_b64 s[10:11], s[8:9], s176960; GFX6-NEXT: s_lshr_b64 s[16:17], s[0:1], s176961; GFX6-NEXT: s_lshl_b64 s[24:25], s[8:9], s216962; GFX6-NEXT: s_or_b64 s[16:17], s[16:17], s[24:25]6963; GFX6-NEXT: s_lshr_b64 s[8:9], s[8:9], s196964; GFX6-NEXT: s_cmp_lg_u32 s26, 06965; GFX6-NEXT: s_cselect_b64 s[8:9], s[16:17], s[8:9]6966; GFX6-NEXT: s_cmp_lg_u32 s27, 06967; GFX6-NEXT: s_cselect_b64 s[0:1], s[0:1], s[8:9]6968; GFX6-NEXT: s_cmp_lg_u32 s26, 06969; GFX6-NEXT: s_cselect_b64 s[8:9], s[10:11], 06970; GFX6-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9]6971; GFX6-NEXT: s_and_b32 s8, s20, 0x7f6972; GFX6-NEXT: s_or_b64 s[0:1], s[22:23], s[0:1]6973; GFX6-NEXT: s_sub_i32 s19, s8, 646974; GFX6-NEXT: s_sub_i32 s10, 64, s86975; GFX6-NEXT: s_cmp_lt_u32 s8, 646976; GFX6-NEXT: s_cselect_b32 s21, 1, 06977; GFX6-NEXT: s_cmp_eq_u32 s8, 06978; GFX6-NEXT: s_cselect_b32 s22, 1, 06979; GFX6-NEXT: s_lshr_b64 s[10:11], s[4:5], s106980; GFX6-NEXT: s_lshl_b64 s[16:17], s[6:7], s206981; GFX6-NEXT: s_lshl_b64 s[8:9], s[4:5], s206982; GFX6-NEXT: s_or_b64 s[10:11], s[10:11], s[16:17]6983; GFX6-NEXT: s_lshl_b64 s[4:5], s[4:5], s196984; GFX6-NEXT: s_cmp_lg_u32 s21, 06985; GFX6-NEXT: s_cselect_b64 s[8:9], s[8:9], 06986; GFX6-NEXT: s_cselect_b64 s[4:5], s[10:11], s[4:5]6987; GFX6-NEXT: s_cmp_lg_u32 s22, 06988; GFX6-NEXT: s_cselect_b64 s[6:7], s[6:7], s[4:5]6989; GFX6-NEXT: s_lshr_b64 s[4:5], s[12:13], 16990; GFX6-NEXT: s_lshl_b32 s19, s14, 316991; GFX6-NEXT: s_andn2_b32 s12, 0x7f, s206992; GFX6-NEXT: s_or_b64 s[4:5], s[4:5], s[18:19]6993; GFX6-NEXT: s_lshr_b64 s[10:11], s[14:15], 16994; GFX6-NEXT: s_not_b32 s14, s206995; GFX6-NEXT: s_sub_i32 s18, s12, 646996; GFX6-NEXT: s_sub_i32 s16, 64, s126997; GFX6-NEXT: s_cmp_lt_u32 s12, 646998; GFX6-NEXT: s_cselect_b32 s19, 1, 06999; GFX6-NEXT: s_cmp_eq_u32 s12, 07000; GFX6-NEXT: s_cselect_b32 s20, 1, 07001; GFX6-NEXT: s_lshr_b64 s[12:13], s[10:11], s147002; GFX6-NEXT: s_lshr_b64 s[14:15], s[4:5], s147003; GFX6-NEXT: s_lshl_b64 s[16:17], s[10:11], s167004; GFX6-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]7005; GFX6-NEXT: s_lshr_b64 s[10:11], s[10:11], s187006; GFX6-NEXT: s_cmp_lg_u32 s19, 07007; GFX6-NEXT: s_cselect_b64 s[10:11], s[14:15], s[10:11]7008; GFX6-NEXT: s_cmp_lg_u32 s20, 07009; GFX6-NEXT: s_cselect_b64 s[4:5], s[4:5], s[10:11]7010; GFX6-NEXT: s_cmp_lg_u32 s19, 07011; GFX6-NEXT: s_cselect_b64 s[10:11], s[12:13], 07012; GFX6-NEXT: s_or_b64 s[4:5], s[8:9], s[4:5]7013; GFX6-NEXT: s_or_b64 s[6:7], s[6:7], s[10:11]7014; GFX6-NEXT: ; return to shader part epilog7015;7016; GFX8-LABEL: s_fshl_v2i128:7017; GFX8: ; %bb.0:7018; GFX8-NEXT: s_and_b32 s17, s16, 0x7f7019; GFX8-NEXT: s_sub_i32 s19, s17, 647020; GFX8-NEXT: s_sub_i32 s21, 64, s177021; GFX8-NEXT: s_cmp_lt_u32 s17, 647022; GFX8-NEXT: s_cselect_b32 s28, 1, 07023; GFX8-NEXT: s_cmp_eq_u32 s17, 07024; GFX8-NEXT: s_cselect_b32 s17, 1, 07025; GFX8-NEXT: s_lshr_b64 s[24:25], s[0:1], s217026; GFX8-NEXT: s_lshl_b64 s[26:27], s[2:3], s167027; GFX8-NEXT: s_lshl_b64 s[22:23], s[0:1], s167028; GFX8-NEXT: s_or_b64 s[24:25], s[24:25], s[26:27]7029; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s197030; GFX8-NEXT: s_cmp_lg_u32 s28, 07031; GFX8-NEXT: s_cselect_b64 s[22:23], s[22:23], 07032; GFX8-NEXT: s_cselect_b64 s[0:1], s[24:25], s[0:1]7033; GFX8-NEXT: s_cmp_lg_u32 s17, 07034; GFX8-NEXT: s_mov_b32 s18, 07035; GFX8-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]7036; GFX8-NEXT: s_lshr_b64 s[0:1], s[8:9], 17037; GFX8-NEXT: s_lshl_b32 s19, s10, 317038; GFX8-NEXT: s_lshr_b64 s[8:9], s[10:11], 17039; GFX8-NEXT: s_andn2_b32 s10, 0x7f, s167040; GFX8-NEXT: s_or_b64 s[0:1], s[0:1], s[18:19]7041; GFX8-NEXT: s_not_b32 s17, s167042; GFX8-NEXT: s_sub_i32 s19, s10, 647043; GFX8-NEXT: s_sub_i32 s21, 64, s107044; GFX8-NEXT: s_cmp_lt_u32 s10, 647045; GFX8-NEXT: s_cselect_b32 s26, 1, 07046; GFX8-NEXT: s_cmp_eq_u32 s10, 07047; GFX8-NEXT: s_cselect_b32 s27, 1, 07048; GFX8-NEXT: s_lshr_b64 s[10:11], s[8:9], s177049; GFX8-NEXT: s_lshr_b64 s[16:17], s[0:1], s177050; GFX8-NEXT: s_lshl_b64 s[24:25], s[8:9], s217051; GFX8-NEXT: s_or_b64 s[16:17], s[16:17], s[24:25]7052; GFX8-NEXT: s_lshr_b64 s[8:9], s[8:9], s197053; GFX8-NEXT: s_cmp_lg_u32 s26, 07054; GFX8-NEXT: s_cselect_b64 s[8:9], s[16:17], s[8:9]7055; GFX8-NEXT: s_cmp_lg_u32 s27, 07056; GFX8-NEXT: s_cselect_b64 s[0:1], s[0:1], s[8:9]7057; GFX8-NEXT: s_cmp_lg_u32 s26, 07058; GFX8-NEXT: s_cselect_b64 s[8:9], s[10:11], 07059; GFX8-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9]7060; GFX8-NEXT: s_and_b32 s8, s20, 0x7f7061; GFX8-NEXT: s_or_b64 s[0:1], s[22:23], s[0:1]7062; GFX8-NEXT: s_sub_i32 s19, s8, 647063; GFX8-NEXT: s_sub_i32 s10, 64, s87064; GFX8-NEXT: s_cmp_lt_u32 s8, 647065; GFX8-NEXT: s_cselect_b32 s21, 1, 07066; GFX8-NEXT: s_cmp_eq_u32 s8, 07067; GFX8-NEXT: s_cselect_b32 s22, 1, 07068; GFX8-NEXT: s_lshr_b64 s[10:11], s[4:5], s107069; GFX8-NEXT: s_lshl_b64 s[16:17], s[6:7], s207070; GFX8-NEXT: s_lshl_b64 s[8:9], s[4:5], s207071; GFX8-NEXT: s_or_b64 s[10:11], s[10:11], s[16:17]7072; GFX8-NEXT: s_lshl_b64 s[4:5], s[4:5], s197073; GFX8-NEXT: s_cmp_lg_u32 s21, 07074; GFX8-NEXT: s_cselect_b64 s[8:9], s[8:9], 07075; GFX8-NEXT: s_cselect_b64 s[4:5], s[10:11], s[4:5]7076; GFX8-NEXT: s_cmp_lg_u32 s22, 07077; GFX8-NEXT: s_cselect_b64 s[6:7], s[6:7], s[4:5]7078; GFX8-NEXT: s_lshr_b64 s[4:5], s[12:13], 17079; GFX8-NEXT: s_lshl_b32 s19, s14, 317080; GFX8-NEXT: s_andn2_b32 s12, 0x7f, s207081; GFX8-NEXT: s_or_b64 s[4:5], s[4:5], s[18:19]7082; GFX8-NEXT: s_lshr_b64 s[10:11], s[14:15], 17083; GFX8-NEXT: s_not_b32 s14, s207084; GFX8-NEXT: s_sub_i32 s18, s12, 647085; GFX8-NEXT: s_sub_i32 s16, 64, s127086; GFX8-NEXT: s_cmp_lt_u32 s12, 647087; GFX8-NEXT: s_cselect_b32 s19, 1, 07088; GFX8-NEXT: s_cmp_eq_u32 s12, 07089; GFX8-NEXT: s_cselect_b32 s20, 1, 07090; GFX8-NEXT: s_lshr_b64 s[12:13], s[10:11], s147091; GFX8-NEXT: s_lshr_b64 s[14:15], s[4:5], s147092; GFX8-NEXT: s_lshl_b64 s[16:17], s[10:11], s167093; GFX8-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]7094; GFX8-NEXT: s_lshr_b64 s[10:11], s[10:11], s187095; GFX8-NEXT: s_cmp_lg_u32 s19, 07096; GFX8-NEXT: s_cselect_b64 s[10:11], s[14:15], s[10:11]7097; GFX8-NEXT: s_cmp_lg_u32 s20, 07098; GFX8-NEXT: s_cselect_b64 s[4:5], s[4:5], s[10:11]7099; GFX8-NEXT: s_cmp_lg_u32 s19, 07100; GFX8-NEXT: s_cselect_b64 s[10:11], s[12:13], 07101; GFX8-NEXT: s_or_b64 s[4:5], s[8:9], s[4:5]7102; GFX8-NEXT: s_or_b64 s[6:7], s[6:7], s[10:11]7103; GFX8-NEXT: ; return to shader part epilog7104;7105; GFX9-LABEL: s_fshl_v2i128:7106; GFX9: ; %bb.0:7107; GFX9-NEXT: s_and_b32 s17, s16, 0x7f7108; GFX9-NEXT: s_sub_i32 s19, s17, 647109; GFX9-NEXT: s_sub_i32 s21, 64, s177110; GFX9-NEXT: s_cmp_lt_u32 s17, 647111; GFX9-NEXT: s_cselect_b32 s28, 1, 07112; GFX9-NEXT: s_cmp_eq_u32 s17, 07113; GFX9-NEXT: s_cselect_b32 s17, 1, 07114; GFX9-NEXT: s_lshr_b64 s[24:25], s[0:1], s217115; GFX9-NEXT: s_lshl_b64 s[26:27], s[2:3], s167116; GFX9-NEXT: s_lshl_b64 s[22:23], s[0:1], s167117; GFX9-NEXT: s_or_b64 s[24:25], s[24:25], s[26:27]7118; GFX9-NEXT: s_lshl_b64 s[0:1], s[0:1], s197119; GFX9-NEXT: s_cmp_lg_u32 s28, 07120; GFX9-NEXT: s_cselect_b64 s[22:23], s[22:23], 07121; GFX9-NEXT: s_cselect_b64 s[0:1], s[24:25], s[0:1]7122; GFX9-NEXT: s_cmp_lg_u32 s17, 07123; GFX9-NEXT: s_mov_b32 s18, 07124; GFX9-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]7125; GFX9-NEXT: s_lshr_b64 s[0:1], s[8:9], 17126; GFX9-NEXT: s_lshl_b32 s19, s10, 317127; GFX9-NEXT: s_lshr_b64 s[8:9], s[10:11], 17128; GFX9-NEXT: s_andn2_b32 s10, 0x7f, s167129; GFX9-NEXT: s_or_b64 s[0:1], s[0:1], s[18:19]7130; GFX9-NEXT: s_not_b32 s17, s167131; GFX9-NEXT: s_sub_i32 s19, s10, 647132; GFX9-NEXT: s_sub_i32 s21, 64, s107133; GFX9-NEXT: s_cmp_lt_u32 s10, 647134; GFX9-NEXT: s_cselect_b32 s26, 1, 07135; GFX9-NEXT: s_cmp_eq_u32 s10, 07136; GFX9-NEXT: s_cselect_b32 s27, 1, 07137; GFX9-NEXT: s_lshr_b64 s[10:11], s[8:9], s177138; GFX9-NEXT: s_lshr_b64 s[16:17], s[0:1], s177139; GFX9-NEXT: s_lshl_b64 s[24:25], s[8:9], s217140; GFX9-NEXT: s_or_b64 s[16:17], s[16:17], s[24:25]7141; GFX9-NEXT: s_lshr_b64 s[8:9], s[8:9], s197142; GFX9-NEXT: s_cmp_lg_u32 s26, 07143; GFX9-NEXT: s_cselect_b64 s[8:9], s[16:17], s[8:9]7144; GFX9-NEXT: s_cmp_lg_u32 s27, 07145; GFX9-NEXT: s_cselect_b64 s[0:1], s[0:1], s[8:9]7146; GFX9-NEXT: s_cmp_lg_u32 s26, 07147; GFX9-NEXT: s_cselect_b64 s[8:9], s[10:11], 07148; GFX9-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9]7149; GFX9-NEXT: s_and_b32 s8, s20, 0x7f7150; GFX9-NEXT: s_or_b64 s[0:1], s[22:23], s[0:1]7151; GFX9-NEXT: s_sub_i32 s19, s8, 647152; GFX9-NEXT: s_sub_i32 s10, 64, s87153; GFX9-NEXT: s_cmp_lt_u32 s8, 647154; GFX9-NEXT: s_cselect_b32 s21, 1, 07155; GFX9-NEXT: s_cmp_eq_u32 s8, 07156; GFX9-NEXT: s_cselect_b32 s22, 1, 07157; GFX9-NEXT: s_lshr_b64 s[10:11], s[4:5], s107158; GFX9-NEXT: s_lshl_b64 s[16:17], s[6:7], s207159; GFX9-NEXT: s_lshl_b64 s[8:9], s[4:5], s207160; GFX9-NEXT: s_or_b64 s[10:11], s[10:11], s[16:17]7161; GFX9-NEXT: s_lshl_b64 s[4:5], s[4:5], s197162; GFX9-NEXT: s_cmp_lg_u32 s21, 07163; GFX9-NEXT: s_cselect_b64 s[8:9], s[8:9], 07164; GFX9-NEXT: s_cselect_b64 s[4:5], s[10:11], s[4:5]7165; GFX9-NEXT: s_cmp_lg_u32 s22, 07166; GFX9-NEXT: s_cselect_b64 s[6:7], s[6:7], s[4:5]7167; GFX9-NEXT: s_lshr_b64 s[4:5], s[12:13], 17168; GFX9-NEXT: s_lshl_b32 s19, s14, 317169; GFX9-NEXT: s_andn2_b32 s12, 0x7f, s207170; GFX9-NEXT: s_or_b64 s[4:5], s[4:5], s[18:19]7171; GFX9-NEXT: s_lshr_b64 s[10:11], s[14:15], 17172; GFX9-NEXT: s_not_b32 s14, s207173; GFX9-NEXT: s_sub_i32 s18, s12, 647174; GFX9-NEXT: s_sub_i32 s16, 64, s127175; GFX9-NEXT: s_cmp_lt_u32 s12, 647176; GFX9-NEXT: s_cselect_b32 s19, 1, 07177; GFX9-NEXT: s_cmp_eq_u32 s12, 07178; GFX9-NEXT: s_cselect_b32 s20, 1, 07179; GFX9-NEXT: s_lshr_b64 s[12:13], s[10:11], s147180; GFX9-NEXT: s_lshr_b64 s[14:15], s[4:5], s147181; GFX9-NEXT: s_lshl_b64 s[16:17], s[10:11], s167182; GFX9-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]7183; GFX9-NEXT: s_lshr_b64 s[10:11], s[10:11], s187184; GFX9-NEXT: s_cmp_lg_u32 s19, 07185; GFX9-NEXT: s_cselect_b64 s[10:11], s[14:15], s[10:11]7186; GFX9-NEXT: s_cmp_lg_u32 s20, 07187; GFX9-NEXT: s_cselect_b64 s[4:5], s[4:5], s[10:11]7188; GFX9-NEXT: s_cmp_lg_u32 s19, 07189; GFX9-NEXT: s_cselect_b64 s[10:11], s[12:13], 07190; GFX9-NEXT: s_or_b64 s[4:5], s[8:9], s[4:5]7191; GFX9-NEXT: s_or_b64 s[6:7], s[6:7], s[10:11]7192; GFX9-NEXT: ; return to shader part epilog7193;7194; GFX10-LABEL: s_fshl_v2i128:7195; GFX10: ; %bb.0:7196; GFX10-NEXT: s_and_b32 s17, s16, 0x7f7197; GFX10-NEXT: s_mov_b32 s18, 07198; GFX10-NEXT: s_sub_i32 s19, s17, 647199; GFX10-NEXT: s_sub_i32 s21, 64, s177200; GFX10-NEXT: s_cmp_lt_u32 s17, 647201; GFX10-NEXT: s_cselect_b32 s28, 1, 07202; GFX10-NEXT: s_cmp_eq_u32 s17, 07203; GFX10-NEXT: s_cselect_b32 s17, 1, 07204; GFX10-NEXT: s_lshr_b64 s[22:23], s[0:1], s217205; GFX10-NEXT: s_lshl_b64 s[24:25], s[2:3], s167206; GFX10-NEXT: s_lshl_b64 s[26:27], s[0:1], s167207; GFX10-NEXT: s_or_b64 s[22:23], s[22:23], s[24:25]7208; GFX10-NEXT: s_lshl_b64 s[0:1], s[0:1], s197209; GFX10-NEXT: s_cmp_lg_u32 s28, 07210; GFX10-NEXT: s_cselect_b64 s[24:25], s[26:27], 07211; GFX10-NEXT: s_cselect_b64 s[0:1], s[22:23], s[0:1]7212; GFX10-NEXT: s_cmp_lg_u32 s17, 07213; GFX10-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]7214; GFX10-NEXT: s_lshr_b64 s[0:1], s[8:9], 17215; GFX10-NEXT: s_lshl_b32 s19, s10, 317216; GFX10-NEXT: s_lshr_b64 s[8:9], s[10:11], 17217; GFX10-NEXT: s_andn2_b32 s10, 0x7f, s167218; GFX10-NEXT: s_or_b64 s[0:1], s[0:1], s[18:19]7219; GFX10-NEXT: s_not_b32 s19, s167220; GFX10-NEXT: s_sub_i32 s21, s10, 647221; GFX10-NEXT: s_sub_i32 s16, 64, s107222; GFX10-NEXT: s_cmp_lt_u32 s10, 647223; GFX10-NEXT: s_cselect_b32 s26, 1, 07224; GFX10-NEXT: s_cmp_eq_u32 s10, 07225; GFX10-NEXT: s_cselect_b32 s27, 1, 07226; GFX10-NEXT: s_lshr_b64 s[10:11], s[0:1], s197227; GFX10-NEXT: s_lshl_b64 s[16:17], s[8:9], s167228; GFX10-NEXT: s_lshr_b64 s[22:23], s[8:9], s197229; GFX10-NEXT: s_or_b64 s[10:11], s[10:11], s[16:17]7230; GFX10-NEXT: s_lshr_b64 s[8:9], s[8:9], s217231; GFX10-NEXT: s_cmp_lg_u32 s26, 07232; GFX10-NEXT: s_cselect_b64 s[8:9], s[10:11], s[8:9]7233; GFX10-NEXT: s_cmp_lg_u32 s27, 07234; GFX10-NEXT: s_cselect_b64 s[0:1], s[0:1], s[8:9]7235; GFX10-NEXT: s_cmp_lg_u32 s26, 07236; GFX10-NEXT: s_cselect_b64 s[8:9], s[22:23], 07237; GFX10-NEXT: s_and_b32 s10, s20, 0x7f7238; GFX10-NEXT: s_or_b64 s[0:1], s[24:25], s[0:1]7239; GFX10-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9]7240; GFX10-NEXT: s_sub_i32 s19, s10, 647241; GFX10-NEXT: s_sub_i32 s8, 64, s107242; GFX10-NEXT: s_cmp_lt_u32 s10, 647243; GFX10-NEXT: s_cselect_b32 s21, 1, 07244; GFX10-NEXT: s_cmp_eq_u32 s10, 07245; GFX10-NEXT: s_cselect_b32 s22, 1, 07246; GFX10-NEXT: s_lshr_b64 s[8:9], s[4:5], s87247; GFX10-NEXT: s_lshl_b64 s[10:11], s[6:7], s207248; GFX10-NEXT: s_lshl_b64 s[16:17], s[4:5], s207249; GFX10-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]7250; GFX10-NEXT: s_lshl_b64 s[4:5], s[4:5], s197251; GFX10-NEXT: s_cmp_lg_u32 s21, 07252; GFX10-NEXT: s_cselect_b64 s[10:11], s[16:17], 07253; GFX10-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5]7254; GFX10-NEXT: s_cmp_lg_u32 s22, 07255; GFX10-NEXT: s_cselect_b64 s[6:7], s[6:7], s[4:5]7256; GFX10-NEXT: s_lshr_b64 s[4:5], s[12:13], 17257; GFX10-NEXT: s_lshl_b32 s19, s14, 317258; GFX10-NEXT: s_andn2_b32 s12, 0x7f, s207259; GFX10-NEXT: s_or_b64 s[4:5], s[4:5], s[18:19]7260; GFX10-NEXT: s_lshr_b64 s[8:9], s[14:15], 17261; GFX10-NEXT: s_not_b32 s16, s207262; GFX10-NEXT: s_sub_i32 s18, s12, 647263; GFX10-NEXT: s_sub_i32 s14, 64, s127264; GFX10-NEXT: s_cmp_lt_u32 s12, 647265; GFX10-NEXT: s_cselect_b32 s19, 1, 07266; GFX10-NEXT: s_cmp_eq_u32 s12, 07267; GFX10-NEXT: s_cselect_b32 s20, 1, 07268; GFX10-NEXT: s_lshr_b64 s[12:13], s[4:5], s167269; GFX10-NEXT: s_lshl_b64 s[14:15], s[8:9], s147270; GFX10-NEXT: s_lshr_b64 s[16:17], s[8:9], s167271; GFX10-NEXT: s_or_b64 s[12:13], s[12:13], s[14:15]7272; GFX10-NEXT: s_lshr_b64 s[8:9], s[8:9], s187273; GFX10-NEXT: s_cmp_lg_u32 s19, 07274; GFX10-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]7275; GFX10-NEXT: s_cmp_lg_u32 s20, 07276; GFX10-NEXT: s_cselect_b64 s[4:5], s[4:5], s[8:9]7277; GFX10-NEXT: s_cmp_lg_u32 s19, 07278; GFX10-NEXT: s_cselect_b64 s[8:9], s[16:17], 07279; GFX10-NEXT: s_or_b64 s[4:5], s[10:11], s[4:5]7280; GFX10-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]7281; GFX10-NEXT: ; return to shader part epilog7282;7283; GFX11-LABEL: s_fshl_v2i128:7284; GFX11: ; %bb.0:7285; GFX11-NEXT: s_and_b32 s17, s16, 0x7f7286; GFX11-NEXT: s_mov_b32 s18, 07287; GFX11-NEXT: s_sub_i32 s19, s17, 647288; GFX11-NEXT: s_sub_i32 s21, 64, s177289; GFX11-NEXT: s_cmp_lt_u32 s17, 647290; GFX11-NEXT: s_cselect_b32 s28, 1, 07291; GFX11-NEXT: s_cmp_eq_u32 s17, 07292; GFX11-NEXT: s_cselect_b32 s17, 1, 07293; GFX11-NEXT: s_lshr_b64 s[22:23], s[0:1], s217294; GFX11-NEXT: s_lshl_b64 s[24:25], s[2:3], s167295; GFX11-NEXT: s_lshl_b64 s[26:27], s[0:1], s167296; GFX11-NEXT: s_or_b64 s[22:23], s[22:23], s[24:25]7297; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], s197298; GFX11-NEXT: s_cmp_lg_u32 s28, 07299; GFX11-NEXT: s_cselect_b64 s[24:25], s[26:27], 07300; GFX11-NEXT: s_cselect_b64 s[0:1], s[22:23], s[0:1]7301; GFX11-NEXT: s_cmp_lg_u32 s17, 07302; GFX11-NEXT: s_cselect_b64 s[2:3], s[2:3], s[0:1]7303; GFX11-NEXT: s_lshr_b64 s[0:1], s[8:9], 17304; GFX11-NEXT: s_lshl_b32 s19, s10, 317305; GFX11-NEXT: s_lshr_b64 s[8:9], s[10:11], 17306; GFX11-NEXT: s_and_not1_b32 s10, 0x7f, s167307; GFX11-NEXT: s_or_b64 s[0:1], s[0:1], s[18:19]7308; GFX11-NEXT: s_not_b32 s19, s167309; GFX11-NEXT: s_sub_i32 s21, s10, 647310; GFX11-NEXT: s_sub_i32 s16, 64, s107311; GFX11-NEXT: s_cmp_lt_u32 s10, 647312; GFX11-NEXT: s_cselect_b32 s26, 1, 07313; GFX11-NEXT: s_cmp_eq_u32 s10, 07314; GFX11-NEXT: s_cselect_b32 s27, 1, 07315; GFX11-NEXT: s_lshr_b64 s[10:11], s[0:1], s197316; GFX11-NEXT: s_lshl_b64 s[16:17], s[8:9], s167317; GFX11-NEXT: s_lshr_b64 s[22:23], s[8:9], s197318; GFX11-NEXT: s_or_b64 s[10:11], s[10:11], s[16:17]7319; GFX11-NEXT: s_lshr_b64 s[8:9], s[8:9], s217320; GFX11-NEXT: s_cmp_lg_u32 s26, 07321; GFX11-NEXT: s_cselect_b64 s[8:9], s[10:11], s[8:9]7322; GFX11-NEXT: s_cmp_lg_u32 s27, 07323; GFX11-NEXT: s_cselect_b64 s[0:1], s[0:1], s[8:9]7324; GFX11-NEXT: s_cmp_lg_u32 s26, 07325; GFX11-NEXT: s_cselect_b64 s[8:9], s[22:23], 07326; GFX11-NEXT: s_and_b32 s10, s20, 0x7f7327; GFX11-NEXT: s_or_b64 s[0:1], s[24:25], s[0:1]7328; GFX11-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9]7329; GFX11-NEXT: s_sub_i32 s19, s10, 647330; GFX11-NEXT: s_sub_i32 s8, 64, s107331; GFX11-NEXT: s_cmp_lt_u32 s10, 647332; GFX11-NEXT: s_cselect_b32 s21, 1, 07333; GFX11-NEXT: s_cmp_eq_u32 s10, 07334; GFX11-NEXT: s_cselect_b32 s22, 1, 07335; GFX11-NEXT: s_lshr_b64 s[8:9], s[4:5], s87336; GFX11-NEXT: s_lshl_b64 s[10:11], s[6:7], s207337; GFX11-NEXT: s_lshl_b64 s[16:17], s[4:5], s207338; GFX11-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]7339; GFX11-NEXT: s_lshl_b64 s[4:5], s[4:5], s197340; GFX11-NEXT: s_cmp_lg_u32 s21, 07341; GFX11-NEXT: s_cselect_b64 s[10:11], s[16:17], 07342; GFX11-NEXT: s_cselect_b64 s[4:5], s[8:9], s[4:5]7343; GFX11-NEXT: s_cmp_lg_u32 s22, 07344; GFX11-NEXT: s_cselect_b64 s[6:7], s[6:7], s[4:5]7345; GFX11-NEXT: s_lshr_b64 s[4:5], s[12:13], 17346; GFX11-NEXT: s_lshl_b32 s19, s14, 317347; GFX11-NEXT: s_and_not1_b32 s12, 0x7f, s207348; GFX11-NEXT: s_or_b64 s[4:5], s[4:5], s[18:19]7349; GFX11-NEXT: s_lshr_b64 s[8:9], s[14:15], 17350; GFX11-NEXT: s_not_b32 s16, s207351; GFX11-NEXT: s_sub_i32 s18, s12, 647352; GFX11-NEXT: s_sub_i32 s14, 64, s127353; GFX11-NEXT: s_cmp_lt_u32 s12, 647354; GFX11-NEXT: s_cselect_b32 s19, 1, 07355; GFX11-NEXT: s_cmp_eq_u32 s12, 07356; GFX11-NEXT: s_cselect_b32 s20, 1, 07357; GFX11-NEXT: s_lshr_b64 s[12:13], s[4:5], s167358; GFX11-NEXT: s_lshl_b64 s[14:15], s[8:9], s147359; GFX11-NEXT: s_lshr_b64 s[16:17], s[8:9], s167360; GFX11-NEXT: s_or_b64 s[12:13], s[12:13], s[14:15]7361; GFX11-NEXT: s_lshr_b64 s[8:9], s[8:9], s187362; GFX11-NEXT: s_cmp_lg_u32 s19, 07363; GFX11-NEXT: s_cselect_b64 s[8:9], s[12:13], s[8:9]7364; GFX11-NEXT: s_cmp_lg_u32 s20, 07365; GFX11-NEXT: s_cselect_b64 s[4:5], s[4:5], s[8:9]7366; GFX11-NEXT: s_cmp_lg_u32 s19, 07367; GFX11-NEXT: s_cselect_b64 s[8:9], s[16:17], 07368; GFX11-NEXT: s_or_b64 s[4:5], s[10:11], s[4:5]7369; GFX11-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]7370; GFX11-NEXT: ; return to shader part epilog7371 %result = call <2 x i128> @llvm.fshl.v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %amt)7372 ret <2 x i128> %result7373}7374 7375define <2 x i128> @v_fshl_v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %amt) {7376; GFX6-LABEL: v_fshl_v2i128:7377; GFX6: ; %bb.0:7378; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7379; GFX6-NEXT: v_and_b32_e32 v19, 0x7f, v167380; GFX6-NEXT: v_not_b32_e32 v18, 637381; GFX6-NEXT: v_sub_i32_e32 v23, vcc, 64, v197382; GFX6-NEXT: v_add_i32_e32 v27, vcc, v19, v187383; GFX6-NEXT: v_lshr_b64 v[23:24], v[0:1], v237384; GFX6-NEXT: v_lshl_b64 v[25:26], v[2:3], v197385; GFX6-NEXT: v_lshl_b64 v[21:22], v[0:1], v197386; GFX6-NEXT: v_lshl_b64 v[0:1], v[0:1], v277387; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v197388; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v197389; GFX6-NEXT: v_or_b32_e32 v19, v23, v257390; GFX6-NEXT: v_or_b32_e32 v23, v24, v267391; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v19, vcc7392; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v23, vcc7393; GFX6-NEXT: v_cndmask_b32_e64 v19, v0, v2, s[4:5]7394; GFX6-NEXT: v_cndmask_b32_e64 v23, v1, v3, s[4:5]7395; GFX6-NEXT: v_lshr_b64 v[0:1], v[8:9], 17396; GFX6-NEXT: v_mov_b32_e32 v17, 0x7f7397; GFX6-NEXT: v_lshlrev_b32_e32 v2, 31, v107398; GFX6-NEXT: v_or_b32_e32 v1, v1, v27399; GFX6-NEXT: v_lshr_b64 v[2:3], v[10:11], 17400; GFX6-NEXT: v_bfi_b32 v10, v16, 0, v177401; GFX6-NEXT: v_cndmask_b32_e32 v24, 0, v21, vcc7402; GFX6-NEXT: v_cndmask_b32_e32 v25, 0, v22, vcc7403; GFX6-NEXT: v_add_i32_e32 v16, vcc, v10, v187404; GFX6-NEXT: v_sub_i32_e32 v21, vcc, 64, v107405; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v107406; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v107407; GFX6-NEXT: v_lshr_b64 v[8:9], v[2:3], v107408; GFX6-NEXT: v_lshr_b64 v[10:11], v[0:1], v107409; GFX6-NEXT: v_lshl_b64 v[21:22], v[2:3], v217410; GFX6-NEXT: v_lshr_b64 v[2:3], v[2:3], v167411; GFX6-NEXT: v_or_b32_e32 v10, v10, v217412; GFX6-NEXT: v_or_b32_e32 v11, v11, v227413; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc7414; GFX6-NEXT: v_cndmask_b32_e32 v3, v3, v11, vcc7415; GFX6-NEXT: v_and_b32_e32 v16, 0x7f, v207416; GFX6-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]7417; GFX6-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5]7418; GFX6-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc7419; GFX6-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc7420; GFX6-NEXT: v_sub_i32_e32 v10, vcc, 64, v167421; GFX6-NEXT: v_lshr_b64 v[10:11], v[4:5], v107422; GFX6-NEXT: v_lshl_b64 v[21:22], v[6:7], v167423; GFX6-NEXT: v_or_b32_e32 v2, v19, v27424; GFX6-NEXT: v_add_i32_e32 v19, vcc, v16, v187425; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v167426; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v167427; GFX6-NEXT: v_lshl_b64 v[8:9], v[4:5], v167428; GFX6-NEXT: v_or_b32_e32 v16, v10, v217429; GFX6-NEXT: v_or_b32_e32 v21, v11, v227430; GFX6-NEXT: v_lshl_b64 v[10:11], v[4:5], v197431; GFX6-NEXT: v_cndmask_b32_e32 v4, 0, v8, vcc7432; GFX6-NEXT: v_cndmask_b32_e32 v5, 0, v9, vcc7433; GFX6-NEXT: v_cndmask_b32_e32 v8, v10, v16, vcc7434; GFX6-NEXT: v_cndmask_b32_e32 v9, v11, v21, vcc7435; GFX6-NEXT: v_cndmask_b32_e64 v6, v8, v6, s[4:5]7436; GFX6-NEXT: v_cndmask_b32_e64 v7, v9, v7, s[4:5]7437; GFX6-NEXT: v_lshr_b64 v[8:9], v[12:13], 17438; GFX6-NEXT: v_lshlrev_b32_e32 v10, 31, v147439; GFX6-NEXT: v_or_b32_e32 v9, v9, v107440; GFX6-NEXT: v_lshr_b64 v[10:11], v[14:15], 17441; GFX6-NEXT: v_bfi_b32 v14, v20, 0, v177442; GFX6-NEXT: v_add_i32_e32 v18, vcc, v14, v187443; GFX6-NEXT: v_sub_i32_e32 v16, vcc, 64, v147444; GFX6-NEXT: v_cmp_gt_u32_e32 vcc, 64, v147445; GFX6-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v147446; GFX6-NEXT: v_lshr_b64 v[12:13], v[10:11], v147447; GFX6-NEXT: v_lshr_b64 v[14:15], v[8:9], v147448; GFX6-NEXT: v_lshl_b64 v[16:17], v[10:11], v167449; GFX6-NEXT: v_lshr_b64 v[10:11], v[10:11], v187450; GFX6-NEXT: v_or_b32_e32 v14, v14, v167451; GFX6-NEXT: v_or_b32_e32 v15, v15, v177452; GFX6-NEXT: v_cndmask_b32_e32 v10, v10, v14, vcc7453; GFX6-NEXT: v_cndmask_b32_e32 v11, v11, v15, vcc7454; GFX6-NEXT: v_cndmask_b32_e64 v8, v10, v8, s[4:5]7455; GFX6-NEXT: v_cndmask_b32_e64 v9, v11, v9, s[4:5]7456; GFX6-NEXT: v_cndmask_b32_e32 v10, 0, v12, vcc7457; GFX6-NEXT: v_cndmask_b32_e32 v11, 0, v13, vcc7458; GFX6-NEXT: v_or_b32_e32 v0, v24, v07459; GFX6-NEXT: v_or_b32_e32 v1, v25, v17460; GFX6-NEXT: v_or_b32_e32 v3, v23, v37461; GFX6-NEXT: v_or_b32_e32 v4, v4, v87462; GFX6-NEXT: v_or_b32_e32 v5, v5, v97463; GFX6-NEXT: v_or_b32_e32 v6, v6, v107464; GFX6-NEXT: v_or_b32_e32 v7, v7, v117465; GFX6-NEXT: s_setpc_b64 s[30:31]7466;7467; GFX8-LABEL: v_fshl_v2i128:7468; GFX8: ; %bb.0:7469; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7470; GFX8-NEXT: v_and_b32_e32 v19, 0x7f, v167471; GFX8-NEXT: v_not_b32_e32 v18, 637472; GFX8-NEXT: v_sub_u32_e32 v23, vcc, 64, v197473; GFX8-NEXT: v_add_u32_e32 v27, vcc, v19, v187474; GFX8-NEXT: v_lshrrev_b64 v[23:24], v23, v[0:1]7475; GFX8-NEXT: v_lshlrev_b64 v[25:26], v19, v[2:3]7476; GFX8-NEXT: v_lshlrev_b64 v[21:22], v19, v[0:1]7477; GFX8-NEXT: v_lshlrev_b64 v[0:1], v27, v[0:1]7478; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v197479; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v197480; GFX8-NEXT: v_or_b32_e32 v19, v23, v257481; GFX8-NEXT: v_or_b32_e32 v23, v24, v267482; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v19, vcc7483; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v23, vcc7484; GFX8-NEXT: v_cndmask_b32_e64 v19, v0, v2, s[4:5]7485; GFX8-NEXT: v_cndmask_b32_e64 v23, v1, v3, s[4:5]7486; GFX8-NEXT: v_lshrrev_b64 v[0:1], 1, v[8:9]7487; GFX8-NEXT: v_mov_b32_e32 v17, 0x7f7488; GFX8-NEXT: v_lshlrev_b32_e32 v2, 31, v107489; GFX8-NEXT: v_or_b32_e32 v1, v1, v27490; GFX8-NEXT: v_lshrrev_b64 v[2:3], 1, v[10:11]7491; GFX8-NEXT: v_bfi_b32 v10, v16, 0, v177492; GFX8-NEXT: v_cndmask_b32_e32 v24, 0, v21, vcc7493; GFX8-NEXT: v_cndmask_b32_e32 v25, 0, v22, vcc7494; GFX8-NEXT: v_add_u32_e32 v16, vcc, v10, v187495; GFX8-NEXT: v_sub_u32_e32 v21, vcc, 64, v107496; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v107497; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v107498; GFX8-NEXT: v_lshrrev_b64 v[8:9], v10, v[2:3]7499; GFX8-NEXT: v_lshrrev_b64 v[10:11], v10, v[0:1]7500; GFX8-NEXT: v_lshlrev_b64 v[21:22], v21, v[2:3]7501; GFX8-NEXT: v_lshrrev_b64 v[2:3], v16, v[2:3]7502; GFX8-NEXT: v_or_b32_e32 v10, v10, v217503; GFX8-NEXT: v_or_b32_e32 v11, v11, v227504; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc7505; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v11, vcc7506; GFX8-NEXT: v_and_b32_e32 v16, 0x7f, v207507; GFX8-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]7508; GFX8-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5]7509; GFX8-NEXT: v_cndmask_b32_e32 v2, 0, v8, vcc7510; GFX8-NEXT: v_cndmask_b32_e32 v3, 0, v9, vcc7511; GFX8-NEXT: v_sub_u32_e32 v10, vcc, 64, v167512; GFX8-NEXT: v_lshrrev_b64 v[10:11], v10, v[4:5]7513; GFX8-NEXT: v_lshlrev_b64 v[21:22], v16, v[6:7]7514; GFX8-NEXT: v_or_b32_e32 v2, v19, v27515; GFX8-NEXT: v_add_u32_e32 v19, vcc, v16, v187516; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v167517; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v167518; GFX8-NEXT: v_lshlrev_b64 v[8:9], v16, v[4:5]7519; GFX8-NEXT: v_or_b32_e32 v16, v10, v217520; GFX8-NEXT: v_or_b32_e32 v21, v11, v227521; GFX8-NEXT: v_lshlrev_b64 v[10:11], v19, v[4:5]7522; GFX8-NEXT: v_cndmask_b32_e32 v4, 0, v8, vcc7523; GFX8-NEXT: v_cndmask_b32_e32 v5, 0, v9, vcc7524; GFX8-NEXT: v_cndmask_b32_e32 v8, v10, v16, vcc7525; GFX8-NEXT: v_cndmask_b32_e32 v9, v11, v21, vcc7526; GFX8-NEXT: v_cndmask_b32_e64 v6, v8, v6, s[4:5]7527; GFX8-NEXT: v_cndmask_b32_e64 v7, v9, v7, s[4:5]7528; GFX8-NEXT: v_lshrrev_b64 v[8:9], 1, v[12:13]7529; GFX8-NEXT: v_lshlrev_b32_e32 v10, 31, v147530; GFX8-NEXT: v_or_b32_e32 v9, v9, v107531; GFX8-NEXT: v_lshrrev_b64 v[10:11], 1, v[14:15]7532; GFX8-NEXT: v_bfi_b32 v14, v20, 0, v177533; GFX8-NEXT: v_add_u32_e32 v18, vcc, v14, v187534; GFX8-NEXT: v_sub_u32_e32 v16, vcc, 64, v147535; GFX8-NEXT: v_cmp_gt_u32_e32 vcc, 64, v147536; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v147537; GFX8-NEXT: v_lshrrev_b64 v[12:13], v14, v[10:11]7538; GFX8-NEXT: v_lshrrev_b64 v[14:15], v14, v[8:9]7539; GFX8-NEXT: v_lshlrev_b64 v[16:17], v16, v[10:11]7540; GFX8-NEXT: v_lshrrev_b64 v[10:11], v18, v[10:11]7541; GFX8-NEXT: v_or_b32_e32 v14, v14, v167542; GFX8-NEXT: v_or_b32_e32 v15, v15, v177543; GFX8-NEXT: v_cndmask_b32_e32 v10, v10, v14, vcc7544; GFX8-NEXT: v_cndmask_b32_e32 v11, v11, v15, vcc7545; GFX8-NEXT: v_cndmask_b32_e64 v8, v10, v8, s[4:5]7546; GFX8-NEXT: v_cndmask_b32_e64 v9, v11, v9, s[4:5]7547; GFX8-NEXT: v_cndmask_b32_e32 v10, 0, v12, vcc7548; GFX8-NEXT: v_cndmask_b32_e32 v11, 0, v13, vcc7549; GFX8-NEXT: v_or_b32_e32 v0, v24, v07550; GFX8-NEXT: v_or_b32_e32 v1, v25, v17551; GFX8-NEXT: v_or_b32_e32 v3, v23, v37552; GFX8-NEXT: v_or_b32_e32 v4, v4, v87553; GFX8-NEXT: v_or_b32_e32 v5, v5, v97554; GFX8-NEXT: v_or_b32_e32 v6, v6, v107555; GFX8-NEXT: v_or_b32_e32 v7, v7, v117556; GFX8-NEXT: s_setpc_b64 s[30:31]7557;7558; GFX9-LABEL: v_fshl_v2i128:7559; GFX9: ; %bb.0:7560; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7561; GFX9-NEXT: v_and_b32_e32 v23, 0x7f, v167562; GFX9-NEXT: v_lshrrev_b64 v[8:9], 1, v[8:9]7563; GFX9-NEXT: v_sub_u32_e32 v17, 64, v237564; GFX9-NEXT: v_mov_b32_e32 v24, 0x7f7565; GFX9-NEXT: v_lshrrev_b64 v[17:18], v17, v[0:1]7566; GFX9-NEXT: v_lshlrev_b64 v[21:22], v23, v[2:3]7567; GFX9-NEXT: v_lshl_or_b32 v9, v10, 31, v97568; GFX9-NEXT: v_lshrrev_b64 v[10:11], 1, v[10:11]7569; GFX9-NEXT: v_bfi_b32 v25, v16, 0, v247570; GFX9-NEXT: v_sub_u32_e32 v16, 64, v257571; GFX9-NEXT: v_or_b32_e32 v21, v17, v217572; GFX9-NEXT: v_or_b32_e32 v22, v18, v227573; GFX9-NEXT: v_lshlrev_b64 v[16:17], v16, v[10:11]7574; GFX9-NEXT: v_lshrrev_b64 v[18:19], v25, v[8:9]7575; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v237576; GFX9-NEXT: v_or_b32_e32 v18, v18, v167577; GFX9-NEXT: v_add_u32_e32 v16, 0xffffffc0, v237578; GFX9-NEXT: v_or_b32_e32 v19, v19, v177579; GFX9-NEXT: v_lshlrev_b64 v[16:17], v16, v[0:1]7580; GFX9-NEXT: v_lshlrev_b64 v[0:1], v23, v[0:1]7581; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v237582; GFX9-NEXT: v_cndmask_b32_e32 v26, 0, v0, vcc7583; GFX9-NEXT: v_cndmask_b32_e32 v0, v16, v21, vcc7584; GFX9-NEXT: v_cndmask_b32_e32 v16, v17, v22, vcc7585; GFX9-NEXT: v_cndmask_b32_e64 v17, v0, v2, s[4:5]7586; GFX9-NEXT: v_add_u32_e32 v0, 0xffffffc0, v257587; GFX9-NEXT: v_cndmask_b32_e64 v16, v16, v3, s[4:5]7588; GFX9-NEXT: v_lshrrev_b64 v[2:3], v0, v[10:11]7589; GFX9-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v257590; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v18, s[4:5]7591; GFX9-NEXT: v_cndmask_b32_e32 v18, 0, v1, vcc7592; GFX9-NEXT: v_lshrrev_b64 v[0:1], v25, v[10:11]7593; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v257594; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v19, s[4:5]7595; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc7596; GFX9-NEXT: v_cndmask_b32_e64 v8, 0, v0, s[4:5]7597; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v9, vcc7598; GFX9-NEXT: v_or_b32_e32 v0, v26, v27599; GFX9-NEXT: v_or_b32_e32 v2, v17, v87600; GFX9-NEXT: v_and_b32_e32 v17, 0x7f, v207601; GFX9-NEXT: v_cndmask_b32_e64 v19, 0, v1, s[4:5]7602; GFX9-NEXT: v_or_b32_e32 v1, v18, v37603; GFX9-NEXT: v_sub_u32_e32 v3, 64, v177604; GFX9-NEXT: v_lshrrev_b64 v[8:9], v3, v[4:5]7605; GFX9-NEXT: v_lshlrev_b64 v[10:11], v17, v[6:7]7606; GFX9-NEXT: v_or_b32_e32 v3, v16, v197607; GFX9-NEXT: v_add_u32_e32 v16, 0xffffffc0, v177608; GFX9-NEXT: v_or_b32_e32 v10, v8, v107609; GFX9-NEXT: v_or_b32_e32 v11, v9, v117610; GFX9-NEXT: v_lshlrev_b64 v[8:9], v17, v[4:5]7611; GFX9-NEXT: v_lshlrev_b64 v[4:5], v16, v[4:5]7612; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v177613; GFX9-NEXT: v_cndmask_b32_e32 v16, 0, v8, vcc7614; GFX9-NEXT: v_cndmask_b32_e32 v18, 0, v9, vcc7615; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v10, vcc7616; GFX9-NEXT: v_cndmask_b32_e32 v8, v5, v11, vcc7617; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v177618; GFX9-NEXT: v_cndmask_b32_e32 v17, v4, v6, vcc7619; GFX9-NEXT: v_lshrrev_b64 v[4:5], 1, v[12:13]7620; GFX9-NEXT: v_cndmask_b32_e32 v12, v8, v7, vcc7621; GFX9-NEXT: v_lshrrev_b64 v[6:7], 1, v[14:15]7622; GFX9-NEXT: v_bfi_b32 v13, v20, 0, v247623; GFX9-NEXT: v_lshl_or_b32 v5, v14, 31, v57624; GFX9-NEXT: v_sub_u32_e32 v10, 64, v137625; GFX9-NEXT: v_lshrrev_b64 v[8:9], v13, v[4:5]7626; GFX9-NEXT: v_lshlrev_b64 v[10:11], v10, v[6:7]7627; GFX9-NEXT: v_add_u32_e32 v14, 0xffffffc0, v137628; GFX9-NEXT: v_or_b32_e32 v10, v8, v107629; GFX9-NEXT: v_or_b32_e32 v11, v9, v117630; GFX9-NEXT: v_lshrrev_b64 v[8:9], v13, v[6:7]7631; GFX9-NEXT: v_lshrrev_b64 v[6:7], v14, v[6:7]7632; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v137633; GFX9-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc7634; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc7635; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v137636; GFX9-NEXT: v_cndmask_b32_e64 v4, v6, v4, s[4:5]7637; GFX9-NEXT: v_cndmask_b32_e64 v5, v7, v5, s[4:5]7638; GFX9-NEXT: v_cndmask_b32_e32 v6, 0, v8, vcc7639; GFX9-NEXT: v_cndmask_b32_e32 v7, 0, v9, vcc7640; GFX9-NEXT: v_or_b32_e32 v4, v16, v47641; GFX9-NEXT: v_or_b32_e32 v5, v18, v57642; GFX9-NEXT: v_or_b32_e32 v6, v17, v67643; GFX9-NEXT: v_or_b32_e32 v7, v12, v77644; GFX9-NEXT: s_setpc_b64 s[30:31]7645;7646; GFX10-LABEL: v_fshl_v2i128:7647; GFX10: ; %bb.0:7648; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7649; GFX10-NEXT: v_and_b32_e32 v19, 0x7f, v167650; GFX10-NEXT: v_lshrrev_b64 v[8:9], 1, v[8:9]7651; GFX10-NEXT: v_bfi_b32 v29, v16, 0, 0x7f7652; GFX10-NEXT: v_sub_nc_u32_e32 v21, 64, v197653; GFX10-NEXT: v_add_nc_u32_e32 v25, 0xffffffc0, v197654; GFX10-NEXT: v_lshlrev_b64 v[23:24], v19, v[2:3]7655; GFX10-NEXT: v_lshl_or_b32 v9, v10, 31, v97656; GFX10-NEXT: v_lshrrev_b64 v[10:11], 1, v[10:11]7657; GFX10-NEXT: v_lshrrev_b64 v[21:22], v21, v[0:1]7658; GFX10-NEXT: v_sub_nc_u32_e32 v16, 64, v297659; GFX10-NEXT: v_lshlrev_b64 v[17:18], v19, v[0:1]7660; GFX10-NEXT: v_lshlrev_b64 v[0:1], v25, v[0:1]7661; GFX10-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v197662; GFX10-NEXT: v_lshrrev_b64 v[25:26], v29, v[8:9]7663; GFX10-NEXT: v_or_b32_e32 v21, v21, v237664; GFX10-NEXT: v_add_nc_u32_e32 v23, 0xffffffc0, v297665; GFX10-NEXT: v_lshlrev_b64 v[27:28], v16, v[10:11]7666; GFX10-NEXT: v_cndmask_b32_e32 v30, 0, v17, vcc_lo7667; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 0, v197668; GFX10-NEXT: v_cndmask_b32_e32 v21, v0, v21, vcc_lo7669; GFX10-NEXT: v_or_b32_e32 v0, v22, v247670; GFX10-NEXT: v_lshrrev_b64 v[16:17], v23, v[10:11]7671; GFX10-NEXT: v_or_b32_e32 v19, v25, v277672; GFX10-NEXT: v_cmp_gt_u32_e64 s5, 64, v297673; GFX10-NEXT: v_or_b32_e32 v22, v26, v287674; GFX10-NEXT: v_cndmask_b32_e32 v23, v1, v0, vcc_lo7675; GFX10-NEXT: v_cndmask_b32_e32 v18, 0, v18, vcc_lo7676; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v297677; GFX10-NEXT: v_cndmask_b32_e64 v16, v16, v19, s57678; GFX10-NEXT: v_lshrrev_b64 v[0:1], v29, v[10:11]7679; GFX10-NEXT: v_cndmask_b32_e64 v10, v17, v22, s57680; GFX10-NEXT: v_cndmask_b32_e64 v22, v23, v3, s47681; GFX10-NEXT: v_and_b32_e32 v23, 0x7f, v207682; GFX10-NEXT: v_cndmask_b32_e64 v21, v21, v2, s47683; GFX10-NEXT: v_cndmask_b32_e32 v2, v16, v8, vcc_lo7684; GFX10-NEXT: v_cndmask_b32_e32 v3, v10, v9, vcc_lo7685; GFX10-NEXT: v_lshrrev_b64 v[8:9], 1, v[12:13]7686; GFX10-NEXT: v_sub_nc_u32_e32 v10, 64, v237687; GFX10-NEXT: v_bfi_b32 v20, v20, 0, 0x7f7688; GFX10-NEXT: v_cndmask_b32_e64 v24, 0, v0, s57689; GFX10-NEXT: v_cndmask_b32_e64 v25, 0, v1, s57690; GFX10-NEXT: v_or_b32_e32 v0, v30, v27691; GFX10-NEXT: v_or_b32_e32 v1, v18, v37692; GFX10-NEXT: v_add_nc_u32_e32 v16, 0xffffffc0, v237693; GFX10-NEXT: v_lshrrev_b64 v[2:3], v10, v[4:5]7694; GFX10-NEXT: v_lshlrev_b64 v[10:11], v23, v[6:7]7695; GFX10-NEXT: v_lshl_or_b32 v9, v14, 31, v97696; GFX10-NEXT: v_lshrrev_b64 v[14:15], 1, v[14:15]7697; GFX10-NEXT: v_sub_nc_u32_e32 v18, 64, v207698; GFX10-NEXT: v_lshlrev_b64 v[12:13], v23, v[4:5]7699; GFX10-NEXT: v_lshlrev_b64 v[4:5], v16, v[4:5]7700; GFX10-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v237701; GFX10-NEXT: v_or_b32_e32 v10, v2, v107702; GFX10-NEXT: v_add_nc_u32_e32 v26, 0xffffffc0, v207703; GFX10-NEXT: v_lshrrev_b64 v[16:17], v20, v[8:9]7704; GFX10-NEXT: v_lshlrev_b64 v[18:19], v18, v[14:15]7705; GFX10-NEXT: v_or_b32_e32 v2, v21, v247706; GFX10-NEXT: v_or_b32_e32 v11, v3, v117707; GFX10-NEXT: v_cndmask_b32_e32 v21, v4, v10, vcc_lo7708; GFX10-NEXT: v_lshrrev_b64 v[3:4], v26, v[14:15]7709; GFX10-NEXT: v_cmp_gt_u32_e64 s5, 64, v207710; GFX10-NEXT: v_or_b32_e32 v10, v16, v187711; GFX10-NEXT: v_or_b32_e32 v16, v17, v197712; GFX10-NEXT: v_cndmask_b32_e32 v5, v5, v11, vcc_lo7713; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 0, v237714; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v207715; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v10, s57716; GFX10-NEXT: v_lshrrev_b64 v[10:11], v20, v[14:15]7717; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v16, s57718; GFX10-NEXT: v_cndmask_b32_e32 v12, 0, v12, vcc_lo7719; GFX10-NEXT: v_cndmask_b32_e32 v13, 0, v13, vcc_lo7720; GFX10-NEXT: v_cndmask_b32_e64 v6, v21, v6, s47721; GFX10-NEXT: v_cndmask_b32_e64 v7, v5, v7, s47722; GFX10-NEXT: v_cndmask_b32_e64 v5, v3, v8, s67723; GFX10-NEXT: v_cndmask_b32_e64 v8, v4, v9, s67724; GFX10-NEXT: v_cndmask_b32_e64 v9, 0, v10, s57725; GFX10-NEXT: v_cndmask_b32_e64 v10, 0, v11, s57726; GFX10-NEXT: v_or_b32_e32 v3, v22, v257727; GFX10-NEXT: v_or_b32_e32 v4, v12, v57728; GFX10-NEXT: v_or_b32_e32 v5, v13, v87729; GFX10-NEXT: v_or_b32_e32 v6, v6, v97730; GFX10-NEXT: v_or_b32_e32 v7, v7, v107731; GFX10-NEXT: s_setpc_b64 s[30:31]7732;7733; GFX11-LABEL: v_fshl_v2i128:7734; GFX11: ; %bb.0:7735; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7736; GFX11-NEXT: v_and_b32_e32 v19, 0x7f, v167737; GFX11-NEXT: v_lshrrev_b64 v[8:9], 1, v[8:9]7738; GFX11-NEXT: v_bfi_b32 v29, v16, 0, 0x7f7739; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)7740; GFX11-NEXT: v_lshlrev_b64 v[17:18], v19, v[0:1]7741; GFX11-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v197742; GFX11-NEXT: v_lshl_or_b32 v9, v10, 31, v97743; GFX11-NEXT: v_lshrrev_b64 v[10:11], 1, v[10:11]7744; GFX11-NEXT: v_sub_nc_u32_e32 v16, 64, v297745; GFX11-NEXT: v_cmp_gt_u32_e64 s1, 64, v297746; GFX11-NEXT: v_cndmask_b32_e32 v30, 0, v17, vcc_lo7747; GFX11-NEXT: v_sub_nc_u32_e32 v21, 64, v197748; GFX11-NEXT: v_dual_cndmask_b32 v18, 0, v18 :: v_dual_add_nc_u32 v25, 0xffffffc0, v197749; GFX11-NEXT: v_lshlrev_b64 v[23:24], v19, v[2:3]7750; GFX11-NEXT: v_lshlrev_b64 v[27:28], v16, v[10:11]7751; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)7752; GFX11-NEXT: v_lshrrev_b64 v[21:22], v21, v[0:1]7753; GFX11-NEXT: v_lshlrev_b64 v[0:1], v25, v[0:1]7754; GFX11-NEXT: v_lshrrev_b64 v[25:26], v29, v[8:9]7755; GFX11-NEXT: v_cmp_eq_u32_e64 s0, 0, v197756; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)7757; GFX11-NEXT: v_or_b32_e32 v21, v21, v237758; GFX11-NEXT: v_add_nc_u32_e32 v23, 0xffffffc0, v297759; GFX11-NEXT: v_or_b32_e32 v19, v25, v277760; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)7761; GFX11-NEXT: v_cndmask_b32_e32 v21, v0, v21, vcc_lo7762; GFX11-NEXT: v_or_b32_e32 v0, v22, v247763; GFX11-NEXT: v_lshrrev_b64 v[16:17], v23, v[10:11]7764; GFX11-NEXT: v_or_b32_e32 v22, v26, v287765; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)7766; GFX11-NEXT: v_cndmask_b32_e64 v21, v21, v2, s07767; GFX11-NEXT: v_cndmask_b32_e32 v23, v1, v0, vcc_lo7768; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v297769; GFX11-NEXT: v_cndmask_b32_e64 v16, v16, v19, s17770; GFX11-NEXT: v_lshrrev_b64 v[0:1], v29, v[10:11]7771; GFX11-NEXT: v_cndmask_b32_e64 v10, v17, v22, s17772; GFX11-NEXT: v_cndmask_b32_e64 v22, v23, v3, s07773; GFX11-NEXT: v_and_b32_e32 v23, 0x7f, v207774; GFX11-NEXT: v_cndmask_b32_e32 v2, v16, v8, vcc_lo7775; GFX11-NEXT: v_bfi_b32 v20, v20, 0, 0x7f7776; GFX11-NEXT: v_cndmask_b32_e32 v3, v10, v9, vcc_lo7777; GFX11-NEXT: v_lshrrev_b64 v[8:9], 1, v[12:13]7778; GFX11-NEXT: v_sub_nc_u32_e32 v10, 64, v237779; GFX11-NEXT: v_cndmask_b32_e64 v24, 0, v0, s17780; GFX11-NEXT: v_cndmask_b32_e64 v25, 0, v1, s17781; GFX11-NEXT: v_or_b32_e32 v0, v30, v27782; GFX11-NEXT: v_add_nc_u32_e32 v16, 0xffffffc0, v237783; GFX11-NEXT: v_lshl_or_b32 v9, v14, 31, v97784; GFX11-NEXT: v_lshrrev_b64 v[14:15], 1, v[14:15]7785; GFX11-NEXT: v_add_nc_u32_e32 v26, 0xffffffc0, v207786; GFX11-NEXT: v_or_b32_e32 v1, v18, v37787; GFX11-NEXT: v_lshrrev_b64 v[2:3], v10, v[4:5]7788; GFX11-NEXT: v_lshlrev_b64 v[10:11], v23, v[6:7]7789; GFX11-NEXT: v_sub_nc_u32_e32 v18, 64, v207790; GFX11-NEXT: v_lshlrev_b64 v[12:13], v23, v[4:5]7791; GFX11-NEXT: v_lshlrev_b64 v[4:5], v16, v[4:5]7792; GFX11-NEXT: v_cmp_gt_u32_e32 vcc_lo, 64, v237793; GFX11-NEXT: v_lshrrev_b64 v[16:17], v20, v[8:9]7794; GFX11-NEXT: v_or_b32_e32 v10, v2, v107795; GFX11-NEXT: v_lshlrev_b64 v[18:19], v18, v[14:15]7796; GFX11-NEXT: v_or_b32_e32 v2, v21, v247797; GFX11-NEXT: v_or_b32_e32 v11, v3, v117798; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)7799; GFX11-NEXT: v_dual_cndmask_b32 v12, 0, v12 :: v_dual_cndmask_b32 v21, v4, v107800; GFX11-NEXT: v_lshrrev_b64 v[3:4], v26, v[14:15]7801; GFX11-NEXT: v_or_b32_e32 v10, v16, v187802; GFX11-NEXT: v_cmp_gt_u32_e64 s1, 64, v207803; GFX11-NEXT: v_or_b32_e32 v16, v17, v197804; GFX11-NEXT: v_cndmask_b32_e32 v5, v5, v11, vcc_lo7805; GFX11-NEXT: v_cmp_eq_u32_e64 s0, 0, v237806; GFX11-NEXT: v_cmp_eq_u32_e64 s2, 0, v207807; GFX11-NEXT: v_cndmask_b32_e64 v3, v3, v10, s17808; GFX11-NEXT: v_lshrrev_b64 v[10:11], v20, v[14:15]7809; GFX11-NEXT: v_cndmask_b32_e64 v4, v4, v16, s17810; GFX11-NEXT: v_cndmask_b32_e32 v13, 0, v13, vcc_lo7811; GFX11-NEXT: v_cndmask_b32_e64 v6, v21, v6, s07812; GFX11-NEXT: v_cndmask_b32_e64 v7, v5, v7, s07813; GFX11-NEXT: v_cndmask_b32_e64 v5, v3, v8, s27814; GFX11-NEXT: v_cndmask_b32_e64 v8, v4, v9, s27815; GFX11-NEXT: v_cndmask_b32_e64 v9, 0, v10, s17816; GFX11-NEXT: v_cndmask_b32_e64 v10, 0, v11, s17817; GFX11-NEXT: v_or_b32_e32 v3, v22, v257818; GFX11-NEXT: v_or_b32_e32 v4, v12, v57819; GFX11-NEXT: v_or_b32_e32 v5, v13, v87820; GFX11-NEXT: v_or_b32_e32 v6, v6, v97821; GFX11-NEXT: v_or_b32_e32 v7, v7, v107822; GFX11-NEXT: s_setpc_b64 s[30:31]7823 %result = call <2 x i128> @llvm.fshl.v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %amt)7824 ret <2 x i128> %result7825}7826 7827declare i7 @llvm.fshl.i7(i7, i7, i7) #07828declare i8 @llvm.fshl.i8(i8, i8, i8) #07829declare <2 x i8> @llvm.fshl.v2i8(<2 x i8>, <2 x i8>, <2 x i8>) #07830declare <4 x i8> @llvm.fshl.v4i8(<4 x i8>, <4 x i8>, <4 x i8>) #07831 7832declare i16 @llvm.fshl.i16(i16, i16, i16) #07833declare <2 x i16> @llvm.fshl.v2i16(<2 x i16>, <2 x i16>, <2 x i16>) #07834declare <3 x i16> @llvm.fshl.v3i16(<3 x i16>, <3 x i16>, <3 x i16>) #07835declare <4 x i16> @llvm.fshl.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) #07836declare <5 x i16> @llvm.fshl.v5i16(<5 x i16>, <5 x i16>, <5 x i16>) #07837declare <6 x i16> @llvm.fshl.v6i16(<6 x i16>, <6 x i16>, <6 x i16>) #07838declare <8 x i16> @llvm.fshl.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) #07839 7840declare i24 @llvm.fshl.i24(i24, i24, i24) #07841declare <2 x i24> @llvm.fshl.v2i24(<2 x i24>, <2 x i24>, <2 x i24>) #07842 7843declare i32 @llvm.fshl.i32(i32, i32, i32) #07844declare <2 x i32> @llvm.fshl.v2i32(<2 x i32>, <2 x i32>, <2 x i32>) #07845declare <3 x i32> @llvm.fshl.v3i32(<3 x i32>, <3 x i32>, <3 x i32>) #07846declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) #07847declare <5 x i32> @llvm.fshl.v5i32(<5 x i32>, <5 x i32>, <5 x i32>) #07848declare <16 x i32> @llvm.fshl.v16i32(<16 x i32>, <16 x i32>, <16 x i32>) #07849 7850declare i48 @llvm.fshl.i48(i48, i48, i48) #07851 7852declare i64 @llvm.fshl.i64(i64, i64, i64) #07853declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) #07854 7855declare i128 @llvm.fshl.i128(i128, i128, i128) #07856declare <2 x i128> @llvm.fshl.v2i128(<2 x i128>, <2 x i128>, <2 x i128>) #07857 7858attributes #0 = { nounwind readnone speculatable willreturn }7859