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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=tahiti -o - %s | FileCheck -check-prefixes=GCN,GFX6 %s3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=fiji -o - %s | FileCheck -check-prefixes=GCN,GFX8 %s4; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -o - %s | FileCheck -check-prefixes=GCN,GFX9 %s5; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -o - %s | FileCheck -check-prefixes=GCN,GFX10 %s6; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 -o - %s | FileCheck -check-prefixes=GFX11 %s7 8define amdgpu_ps i7 @s_fshr_i7(i7 inreg %lhs, i7 inreg %rhs, i7 inreg %amt) {9; GFX6-LABEL: s_fshr_i7:10; GFX6:       ; %bb.0:11; GFX6-NEXT:    v_cvt_f32_ubyte0_e32 v0, 712; GFX6-NEXT:    v_rcp_iflag_f32_e32 v0, v013; GFX6-NEXT:    s_and_b32 s2, s2, 0x7f14; GFX6-NEXT:    s_lshl_b32 s0, s0, 115; GFX6-NEXT:    s_and_b32 s1, s1, 0x7f16; GFX6-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v017; GFX6-NEXT:    v_cvt_u32_f32_e32 v0, v018; GFX6-NEXT:    v_mul_lo_u32 v1, v0, -719; GFX6-NEXT:    v_mul_hi_u32 v1, v0, v120; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v121; GFX6-NEXT:    v_mul_hi_u32 v0, s2, v022; GFX6-NEXT:    v_mul_lo_u32 v0, v0, 723; GFX6-NEXT:    v_sub_i32_e32 v0, vcc, s2, v024; GFX6-NEXT:    v_add_i32_e32 v1, vcc, -7, v025; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 7, v026; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc27; GFX6-NEXT:    v_add_i32_e32 v1, vcc, -7, v028; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 7, v029; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc30; GFX6-NEXT:    v_sub_i32_e32 v1, vcc, 6, v031; GFX6-NEXT:    v_and_b32_e32 v0, 0x7f, v032; GFX6-NEXT:    v_and_b32_e32 v1, 0x7f, v133; GFX6-NEXT:    v_lshl_b32_e32 v1, s0, v134; GFX6-NEXT:    v_lshr_b32_e32 v0, s1, v035; GFX6-NEXT:    v_or_b32_e32 v0, v1, v036; GFX6-NEXT:    v_readfirstlane_b32 s0, v037; GFX6-NEXT:    ; return to shader part epilog38;39; GFX8-LABEL: s_fshr_i7:40; GFX8:       ; %bb.0:41; GFX8-NEXT:    v_cvt_f32_ubyte0_e32 v0, 742; GFX8-NEXT:    v_rcp_iflag_f32_e32 v0, v043; GFX8-NEXT:    s_and_b32 s2, s2, 0x7f44; GFX8-NEXT:    s_lshl_b32 s0, s0, 145; GFX8-NEXT:    s_and_b32 s1, s1, 0x7f46; GFX8-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v047; GFX8-NEXT:    v_cvt_u32_f32_e32 v0, v048; GFX8-NEXT:    v_mul_lo_u32 v1, v0, -749; GFX8-NEXT:    v_mul_hi_u32 v1, v0, v150; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v151; GFX8-NEXT:    v_mul_hi_u32 v0, s2, v052; GFX8-NEXT:    v_mul_lo_u32 v0, v0, 753; GFX8-NEXT:    v_sub_u32_e32 v0, vcc, s2, v054; GFX8-NEXT:    v_add_u32_e32 v1, vcc, -7, v055; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 7, v056; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc57; GFX8-NEXT:    v_add_u32_e32 v1, vcc, -7, v058; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 7, v059; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc60; GFX8-NEXT:    v_sub_u16_e32 v1, 6, v061; GFX8-NEXT:    v_and_b32_e32 v0, 0x7f, v062; GFX8-NEXT:    v_and_b32_e32 v1, 0x7f, v163; GFX8-NEXT:    v_lshlrev_b16_e64 v1, v1, s064; GFX8-NEXT:    v_lshrrev_b16_e64 v0, v0, s165; GFX8-NEXT:    v_or_b32_e32 v0, v1, v066; GFX8-NEXT:    v_readfirstlane_b32 s0, v067; GFX8-NEXT:    ; return to shader part epilog68;69; GFX9-LABEL: s_fshr_i7:70; GFX9:       ; %bb.0:71; GFX9-NEXT:    v_cvt_f32_ubyte0_e32 v0, 772; GFX9-NEXT:    v_rcp_iflag_f32_e32 v0, v073; GFX9-NEXT:    s_and_b32 s2, s2, 0x7f74; GFX9-NEXT:    s_lshl_b32 s0, s0, 175; GFX9-NEXT:    s_and_b32 s1, s1, 0x7f76; GFX9-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v077; GFX9-NEXT:    v_cvt_u32_f32_e32 v0, v078; GFX9-NEXT:    v_mul_lo_u32 v1, v0, -779; GFX9-NEXT:    v_mul_hi_u32 v1, v0, v180; GFX9-NEXT:    v_add_u32_e32 v0, v0, v181; GFX9-NEXT:    v_mul_hi_u32 v0, s2, v082; GFX9-NEXT:    v_mul_lo_u32 v0, v0, 783; GFX9-NEXT:    v_sub_u32_e32 v0, s2, v084; GFX9-NEXT:    v_add_u32_e32 v1, -7, v085; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 7, v086; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc87; GFX9-NEXT:    v_add_u32_e32 v1, -7, v088; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 7, v089; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc90; GFX9-NEXT:    v_sub_u16_e32 v1, 6, v091; GFX9-NEXT:    v_and_b32_e32 v0, 0x7f, v092; GFX9-NEXT:    v_and_b32_e32 v1, 0x7f, v193; GFX9-NEXT:    v_lshlrev_b16_e64 v1, v1, s094; GFX9-NEXT:    v_lshrrev_b16_e64 v0, v0, s195; GFX9-NEXT:    v_or_b32_e32 v0, v1, v096; GFX9-NEXT:    v_readfirstlane_b32 s0, v097; GFX9-NEXT:    ; return to shader part epilog98;99; GFX10-LABEL: s_fshr_i7:100; GFX10:       ; %bb.0:101; GFX10-NEXT:    v_cvt_f32_ubyte0_e32 v0, 7102; GFX10-NEXT:    s_and_b32 s2, s2, 0x7f103; GFX10-NEXT:    s_lshl_b32 s0, s0, 1104; GFX10-NEXT:    s_and_b32 s1, s1, 0x7f105; GFX10-NEXT:    v_rcp_iflag_f32_e32 v0, v0106; GFX10-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0107; GFX10-NEXT:    v_cvt_u32_f32_e32 v0, v0108; GFX10-NEXT:    v_mul_lo_u32 v1, v0, -7109; GFX10-NEXT:    v_mul_hi_u32 v1, v0, v1110; GFX10-NEXT:    v_add_nc_u32_e32 v0, v0, v1111; GFX10-NEXT:    v_mul_hi_u32 v0, s2, v0112; GFX10-NEXT:    v_mul_lo_u32 v0, v0, 7113; GFX10-NEXT:    v_sub_nc_u32_e32 v0, s2, v0114; GFX10-NEXT:    v_add_nc_u32_e32 v1, -7, v0115; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 7, v0116; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo117; GFX10-NEXT:    v_add_nc_u32_e32 v1, -7, v0118; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 7, v0119; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo120; GFX10-NEXT:    v_sub_nc_u16 v1, 6, v0121; GFX10-NEXT:    v_and_b32_e32 v0, 0x7f, v0122; GFX10-NEXT:    v_and_b32_e32 v1, 0x7f, v1123; GFX10-NEXT:    v_lshrrev_b16 v0, v0, s1124; GFX10-NEXT:    v_lshlrev_b16 v1, v1, s0125; GFX10-NEXT:    v_or_b32_e32 v0, v1, v0126; GFX10-NEXT:    v_readfirstlane_b32 s0, v0127; GFX10-NEXT:    ; return to shader part epilog128;129; GFX11-LABEL: s_fshr_i7:130; GFX11:       ; %bb.0:131; GFX11-NEXT:    v_cvt_f32_ubyte0_e32 v0, 7132; GFX11-NEXT:    s_and_b32 s2, s2, 0x7f133; GFX11-NEXT:    s_lshl_b32 s0, s0, 1134; GFX11-NEXT:    s_and_b32 s1, s1, 0x7f135; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)136; GFX11-NEXT:    v_rcp_iflag_f32_e32 v0, v0137; GFX11-NEXT:    s_waitcnt_depctr depctr_va_vdst(0)138; GFX11-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0139; GFX11-NEXT:    v_cvt_u32_f32_e32 v0, v0140; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)141; GFX11-NEXT:    v_mul_lo_u32 v1, v0, -7142; GFX11-NEXT:    v_mul_hi_u32 v1, v0, v1143; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)144; GFX11-NEXT:    v_add_nc_u32_e32 v0, v0, v1145; GFX11-NEXT:    v_mul_hi_u32 v0, s2, v0146; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)147; GFX11-NEXT:    v_mul_lo_u32 v0, v0, 7148; GFX11-NEXT:    v_sub_nc_u32_e32 v0, s2, v0149; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)150; GFX11-NEXT:    v_add_nc_u32_e32 v1, -7, v0151; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 7, v0152; GFX11-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo153; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)154; GFX11-NEXT:    v_add_nc_u32_e32 v1, -7, v0155; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 7, v0156; GFX11-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo157; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)158; GFX11-NEXT:    v_sub_nc_u16 v1, 6, v0159; GFX11-NEXT:    v_and_b32_e32 v0, 0x7f, v0160; GFX11-NEXT:    v_and_b32_e32 v1, 0x7f, v1161; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)162; GFX11-NEXT:    v_lshrrev_b16 v0, v0, s1163; GFX11-NEXT:    v_lshlrev_b16 v1, v1, s0164; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)165; GFX11-NEXT:    v_or_b32_e32 v0, v1, v0166; GFX11-NEXT:    v_readfirstlane_b32 s0, v0167; GFX11-NEXT:    ; return to shader part epilog168  %result = call i7 @llvm.fshr.i7(i7 %lhs, i7 %rhs, i7 %amt)169  ret i7 %result170}171 172define i7 @v_fshr_i7(i7 %lhs, i7 %rhs, i7 %amt) {173; GFX6-LABEL: v_fshr_i7:174; GFX6:       ; %bb.0:175; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)176; GFX6-NEXT:    v_cvt_f32_ubyte0_e32 v3, 7177; GFX6-NEXT:    v_rcp_iflag_f32_e32 v3, v3178; GFX6-NEXT:    v_and_b32_e32 v2, 0x7f, v2179; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v0180; GFX6-NEXT:    v_and_b32_e32 v1, 0x7f, v1181; GFX6-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3182; GFX6-NEXT:    v_cvt_u32_f32_e32 v3, v3183; GFX6-NEXT:    v_mul_lo_u32 v4, v3, -7184; GFX6-NEXT:    v_mul_hi_u32 v4, v3, v4185; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v4186; GFX6-NEXT:    v_mul_hi_u32 v3, v2, v3187; GFX6-NEXT:    v_mul_lo_u32 v3, v3, 7188; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, v2, v3189; GFX6-NEXT:    v_add_i32_e32 v3, vcc, -7, v2190; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 7, v2191; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc192; GFX6-NEXT:    v_add_i32_e32 v3, vcc, -7, v2193; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 7, v2194; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc195; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 6, v2196; GFX6-NEXT:    v_and_b32_e32 v2, 0x7f, v2197; GFX6-NEXT:    v_and_b32_e32 v3, 0x7f, v3198; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v3, v0199; GFX6-NEXT:    v_lshrrev_b32_e32 v1, v2, v1200; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1201; GFX6-NEXT:    s_setpc_b64 s[30:31]202;203; GFX8-LABEL: v_fshr_i7:204; GFX8:       ; %bb.0:205; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)206; GFX8-NEXT:    v_cvt_f32_ubyte0_e32 v3, 7207; GFX8-NEXT:    v_rcp_iflag_f32_e32 v3, v3208; GFX8-NEXT:    v_and_b32_e32 v2, 0x7f, v2209; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 1, v0210; GFX8-NEXT:    v_and_b32_e32 v1, 0x7f, v1211; GFX8-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3212; GFX8-NEXT:    v_cvt_u32_f32_e32 v3, v3213; GFX8-NEXT:    v_mul_lo_u32 v4, v3, -7214; GFX8-NEXT:    v_mul_hi_u32 v4, v3, v4215; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v3, v4216; GFX8-NEXT:    v_mul_hi_u32 v3, v2, v3217; GFX8-NEXT:    v_mul_lo_u32 v3, v3, 7218; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, v2, v3219; GFX8-NEXT:    v_add_u32_e32 v3, vcc, -7, v2220; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 7, v2221; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc222; GFX8-NEXT:    v_add_u32_e32 v3, vcc, -7, v2223; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 7, v2224; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc225; GFX8-NEXT:    v_sub_u16_e32 v3, 6, v2226; GFX8-NEXT:    v_and_b32_e32 v2, 0x7f, v2227; GFX8-NEXT:    v_and_b32_e32 v3, 0x7f, v3228; GFX8-NEXT:    v_lshlrev_b16_e32 v0, v3, v0229; GFX8-NEXT:    v_lshrrev_b16_e32 v1, v2, v1230; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1231; GFX8-NEXT:    s_setpc_b64 s[30:31]232;233; GFX9-LABEL: v_fshr_i7:234; GFX9:       ; %bb.0:235; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)236; GFX9-NEXT:    v_cvt_f32_ubyte0_e32 v3, 7237; GFX9-NEXT:    v_rcp_iflag_f32_e32 v3, v3238; GFX9-NEXT:    v_and_b32_e32 v2, 0x7f, v2239; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 1, v0240; GFX9-NEXT:    v_and_b32_e32 v1, 0x7f, v1241; GFX9-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3242; GFX9-NEXT:    v_cvt_u32_f32_e32 v3, v3243; GFX9-NEXT:    v_mul_lo_u32 v4, v3, -7244; GFX9-NEXT:    v_mul_hi_u32 v4, v3, v4245; GFX9-NEXT:    v_add_u32_e32 v3, v3, v4246; GFX9-NEXT:    v_mul_hi_u32 v3, v2, v3247; GFX9-NEXT:    v_mul_lo_u32 v3, v3, 7248; GFX9-NEXT:    v_sub_u32_e32 v2, v2, v3249; GFX9-NEXT:    v_add_u32_e32 v3, -7, v2250; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 7, v2251; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc252; GFX9-NEXT:    v_add_u32_e32 v3, -7, v2253; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 7, v2254; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc255; GFX9-NEXT:    v_sub_u16_e32 v3, 6, v2256; GFX9-NEXT:    v_and_b32_e32 v2, 0x7f, v2257; GFX9-NEXT:    v_and_b32_e32 v3, 0x7f, v3258; GFX9-NEXT:    v_lshlrev_b16_e32 v0, v3, v0259; GFX9-NEXT:    v_lshrrev_b16_e32 v1, v2, v1260; GFX9-NEXT:    v_or_b32_e32 v0, v0, v1261; GFX9-NEXT:    s_setpc_b64 s[30:31]262;263; GFX10-LABEL: v_fshr_i7:264; GFX10:       ; %bb.0:265; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)266; GFX10-NEXT:    v_cvt_f32_ubyte0_e32 v3, 7267; GFX10-NEXT:    v_and_b32_e32 v2, 0x7f, v2268; GFX10-NEXT:    v_lshlrev_b16 v0, 1, v0269; GFX10-NEXT:    v_and_b32_e32 v1, 0x7f, v1270; GFX10-NEXT:    v_rcp_iflag_f32_e32 v3, v3271; GFX10-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3272; GFX10-NEXT:    v_cvt_u32_f32_e32 v3, v3273; GFX10-NEXT:    v_mul_lo_u32 v4, v3, -7274; GFX10-NEXT:    v_mul_hi_u32 v4, v3, v4275; GFX10-NEXT:    v_add_nc_u32_e32 v3, v3, v4276; GFX10-NEXT:    v_mul_hi_u32 v3, v2, v3277; GFX10-NEXT:    v_mul_lo_u32 v3, v3, 7278; GFX10-NEXT:    v_sub_nc_u32_e32 v2, v2, v3279; GFX10-NEXT:    v_add_nc_u32_e32 v3, -7, v2280; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 7, v2281; GFX10-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo282; GFX10-NEXT:    v_add_nc_u32_e32 v3, -7, v2283; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 7, v2284; GFX10-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo285; GFX10-NEXT:    v_sub_nc_u16 v3, 6, v2286; GFX10-NEXT:    v_and_b32_e32 v2, 0x7f, v2287; GFX10-NEXT:    v_and_b32_e32 v3, 0x7f, v3288; GFX10-NEXT:    v_lshrrev_b16 v1, v2, v1289; GFX10-NEXT:    v_lshlrev_b16 v0, v3, v0290; GFX10-NEXT:    v_or_b32_e32 v0, v0, v1291; GFX10-NEXT:    s_setpc_b64 s[30:31]292;293; GFX11-LABEL: v_fshr_i7:294; GFX11:       ; %bb.0:295; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)296; GFX11-NEXT:    v_cvt_f32_ubyte0_e32 v3, 7297; GFX11-NEXT:    v_and_b32_e32 v2, 0x7f, v2298; GFX11-NEXT:    v_lshlrev_b16 v0, 1, v0299; GFX11-NEXT:    v_and_b32_e32 v1, 0x7f, v1300; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)301; GFX11-NEXT:    v_rcp_iflag_f32_e32 v3, v3302; GFX11-NEXT:    s_waitcnt_depctr depctr_va_vdst(0)303; GFX11-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3304; GFX11-NEXT:    v_cvt_u32_f32_e32 v3, v3305; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)306; GFX11-NEXT:    v_mul_lo_u32 v4, v3, -7307; GFX11-NEXT:    v_mul_hi_u32 v4, v3, v4308; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)309; GFX11-NEXT:    v_add_nc_u32_e32 v3, v3, v4310; GFX11-NEXT:    v_mul_hi_u32 v3, v2, v3311; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)312; GFX11-NEXT:    v_mul_lo_u32 v3, v3, 7313; GFX11-NEXT:    v_sub_nc_u32_e32 v2, v2, v3314; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)315; GFX11-NEXT:    v_add_nc_u32_e32 v3, -7, v2316; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 7, v2317; GFX11-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo318; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)319; GFX11-NEXT:    v_add_nc_u32_e32 v3, -7, v2320; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 7, v2321; GFX11-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo322; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)323; GFX11-NEXT:    v_sub_nc_u16 v3, 6, v2324; GFX11-NEXT:    v_and_b32_e32 v2, 0x7f, v2325; GFX11-NEXT:    v_and_b32_e32 v3, 0x7f, v3326; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)327; GFX11-NEXT:    v_lshrrev_b16 v1, v2, v1328; GFX11-NEXT:    v_lshlrev_b16 v0, v3, v0329; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)330; GFX11-NEXT:    v_or_b32_e32 v0, v0, v1331; GFX11-NEXT:    s_setpc_b64 s[30:31]332  %result = call i7 @llvm.fshr.i7(i7 %lhs, i7 %rhs, i7 %amt)333  ret i7 %result334}335 336define amdgpu_ps i8 @s_fshr_i8(i8 inreg %lhs, i8 inreg %rhs, i8 inreg %amt) {337; GFX6-LABEL: s_fshr_i8:338; GFX6:       ; %bb.0:339; GFX6-NEXT:    s_and_b32 s3, s2, 7340; GFX6-NEXT:    s_andn2_b32 s2, 7, s2341; GFX6-NEXT:    s_lshl_b32 s0, s0, 1342; GFX6-NEXT:    s_and_b32 s1, s1, 0xff343; GFX6-NEXT:    s_lshl_b32 s0, s0, s2344; GFX6-NEXT:    s_lshr_b32 s1, s1, s3345; GFX6-NEXT:    s_or_b32 s0, s0, s1346; GFX6-NEXT:    ; return to shader part epilog347;348; GFX8-LABEL: s_fshr_i8:349; GFX8:       ; %bb.0:350; GFX8-NEXT:    s_lshl_b32 s0, s0, 1351; GFX8-NEXT:    s_andn2_b32 s3, 7, s2352; GFX8-NEXT:    s_and_b32 s2, s2, 7353; GFX8-NEXT:    s_and_b32 s1, s1, 0xff354; GFX8-NEXT:    s_lshl_b32 s0, s0, s3355; GFX8-NEXT:    s_lshr_b32 s1, s1, s2356; GFX8-NEXT:    s_or_b32 s0, s0, s1357; GFX8-NEXT:    ; return to shader part epilog358;359; GFX9-LABEL: s_fshr_i8:360; GFX9:       ; %bb.0:361; GFX9-NEXT:    s_lshl_b32 s0, s0, 1362; GFX9-NEXT:    s_andn2_b32 s3, 7, s2363; GFX9-NEXT:    s_and_b32 s2, s2, 7364; GFX9-NEXT:    s_and_b32 s1, s1, 0xff365; GFX9-NEXT:    s_lshl_b32 s0, s0, s3366; GFX9-NEXT:    s_lshr_b32 s1, s1, s2367; GFX9-NEXT:    s_or_b32 s0, s0, s1368; GFX9-NEXT:    ; return to shader part epilog369;370; GFX10-LABEL: s_fshr_i8:371; GFX10:       ; %bb.0:372; GFX10-NEXT:    s_lshl_b32 s0, s0, 1373; GFX10-NEXT:    s_andn2_b32 s3, 7, s2374; GFX10-NEXT:    s_and_b32 s2, s2, 7375; GFX10-NEXT:    s_and_b32 s1, s1, 0xff376; GFX10-NEXT:    s_lshl_b32 s0, s0, s3377; GFX10-NEXT:    s_lshr_b32 s1, s1, s2378; GFX10-NEXT:    s_or_b32 s0, s0, s1379; GFX10-NEXT:    ; return to shader part epilog380;381; GFX11-LABEL: s_fshr_i8:382; GFX11:       ; %bb.0:383; GFX11-NEXT:    s_lshl_b32 s0, s0, 1384; GFX11-NEXT:    s_and_not1_b32 s3, 7, s2385; GFX11-NEXT:    s_and_b32 s2, s2, 7386; GFX11-NEXT:    s_and_b32 s1, s1, 0xff387; GFX11-NEXT:    s_lshl_b32 s0, s0, s3388; GFX11-NEXT:    s_lshr_b32 s1, s1, s2389; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)390; GFX11-NEXT:    s_or_b32 s0, s0, s1391; GFX11-NEXT:    ; return to shader part epilog392  %result = call i8 @llvm.fshr.i8(i8 %lhs, i8 %rhs, i8 %amt)393  ret i8 %result394}395 396define i8 @v_fshr_i8(i8 %lhs, i8 %rhs, i8 %amt) {397; GFX6-LABEL: v_fshr_i8:398; GFX6:       ; %bb.0:399; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)400; GFX6-NEXT:    v_and_b32_e32 v3, 7, v2401; GFX6-NEXT:    v_bfi_b32 v2, v2, 0, 7402; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v0403; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v1404; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v2, v0405; GFX6-NEXT:    v_lshrrev_b32_e32 v1, v3, v1406; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1407; GFX6-NEXT:    s_setpc_b64 s[30:31]408;409; GFX8-LABEL: v_fshr_i8:410; GFX8:       ; %bb.0:411; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)412; GFX8-NEXT:    v_xor_b32_e32 v3, -1, v2413; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 1, v0414; GFX8-NEXT:    v_and_b32_e32 v3, 7, v3415; GFX8-NEXT:    v_and_b32_e32 v2, 7, v2416; GFX8-NEXT:    v_lshlrev_b16_e32 v0, v3, v0417; GFX8-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0418; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1419; GFX8-NEXT:    s_setpc_b64 s[30:31]420;421; GFX9-LABEL: v_fshr_i8:422; GFX9:       ; %bb.0:423; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)424; GFX9-NEXT:    v_xor_b32_e32 v3, -1, v2425; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 1, v0426; GFX9-NEXT:    v_and_b32_e32 v3, 7, v3427; GFX9-NEXT:    v_and_b32_e32 v2, 7, v2428; GFX9-NEXT:    v_lshlrev_b16_e32 v0, v3, v0429; GFX9-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0430; GFX9-NEXT:    v_or_b32_e32 v0, v0, v1431; GFX9-NEXT:    s_setpc_b64 s[30:31]432;433; GFX10-LABEL: v_fshr_i8:434; GFX10:       ; %bb.0:435; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)436; GFX10-NEXT:    v_xor_b32_e32 v3, -1, v2437; GFX10-NEXT:    v_lshlrev_b16 v0, 1, v0438; GFX10-NEXT:    v_and_b32_e32 v2, 7, v2439; GFX10-NEXT:    v_and_b32_e32 v1, 0xff, v1440; GFX10-NEXT:    v_and_b32_e32 v3, 7, v3441; GFX10-NEXT:    v_lshrrev_b16 v1, v2, v1442; GFX10-NEXT:    v_lshlrev_b16 v0, v3, v0443; GFX10-NEXT:    v_or_b32_e32 v0, v0, v1444; GFX10-NEXT:    s_setpc_b64 s[30:31]445;446; GFX11-LABEL: v_fshr_i8:447; GFX11:       ; %bb.0:448; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)449; GFX11-NEXT:    v_xor_b32_e32 v3, -1, v2450; GFX11-NEXT:    v_lshlrev_b16 v0, 1, v0451; GFX11-NEXT:    v_and_b32_e32 v2, 7, v2452; GFX11-NEXT:    v_and_b32_e32 v1, 0xff, v1453; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)454; GFX11-NEXT:    v_and_b32_e32 v3, 7, v3455; GFX11-NEXT:    v_lshrrev_b16 v1, v2, v1456; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)457; GFX11-NEXT:    v_lshlrev_b16 v0, v3, v0458; GFX11-NEXT:    v_or_b32_e32 v0, v0, v1459; GFX11-NEXT:    s_setpc_b64 s[30:31]460  %result = call i8 @llvm.fshr.i8(i8 %lhs, i8 %rhs, i8 %amt)461  ret i8 %result462}463 464define amdgpu_ps i8 @s_fshr_i8_4(i8 inreg %lhs, i8 inreg %rhs) {465; GFX6-LABEL: s_fshr_i8_4:466; GFX6:       ; %bb.0:467; GFX6-NEXT:    s_lshl_b32 s0, s0, 4468; GFX6-NEXT:    s_bfe_u32 s1, s1, 0x40004469; GFX6-NEXT:    s_or_b32 s0, s0, s1470; GFX6-NEXT:    ; return to shader part epilog471;472; GFX8-LABEL: s_fshr_i8_4:473; GFX8:       ; %bb.0:474; GFX8-NEXT:    s_and_b32 s1, s1, 0xff475; GFX8-NEXT:    s_lshl_b32 s0, s0, 4476; GFX8-NEXT:    s_lshr_b32 s1, s1, 4477; GFX8-NEXT:    s_or_b32 s0, s0, s1478; GFX8-NEXT:    ; return to shader part epilog479;480; GFX9-LABEL: s_fshr_i8_4:481; GFX9:       ; %bb.0:482; GFX9-NEXT:    s_and_b32 s1, s1, 0xff483; GFX9-NEXT:    s_lshl_b32 s0, s0, 4484; GFX9-NEXT:    s_lshr_b32 s1, s1, 4485; GFX9-NEXT:    s_or_b32 s0, s0, s1486; GFX9-NEXT:    ; return to shader part epilog487;488; GFX10-LABEL: s_fshr_i8_4:489; GFX10:       ; %bb.0:490; GFX10-NEXT:    s_and_b32 s1, s1, 0xff491; GFX10-NEXT:    s_lshl_b32 s0, s0, 4492; GFX10-NEXT:    s_lshr_b32 s1, s1, 4493; GFX10-NEXT:    s_or_b32 s0, s0, s1494; GFX10-NEXT:    ; return to shader part epilog495;496; GFX11-LABEL: s_fshr_i8_4:497; GFX11:       ; %bb.0:498; GFX11-NEXT:    s_and_b32 s1, s1, 0xff499; GFX11-NEXT:    s_lshl_b32 s0, s0, 4500; GFX11-NEXT:    s_lshr_b32 s1, s1, 4501; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)502; GFX11-NEXT:    s_or_b32 s0, s0, s1503; GFX11-NEXT:    ; return to shader part epilog504  %result = call i8 @llvm.fshr.i8(i8 %lhs, i8 %rhs, i8 4)505  ret i8 %result506}507 508define i8 @v_fshr_i8_4(i8 %lhs, i8 %rhs) {509; GFX6-LABEL: v_fshr_i8_4:510; GFX6:       ; %bb.0:511; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)512; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 4, v0513; GFX6-NEXT:    v_bfe_u32 v1, v1, 4, 4514; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1515; GFX6-NEXT:    s_setpc_b64 s[30:31]516;517; GFX8-LABEL: v_fshr_i8_4:518; GFX8:       ; %bb.0:519; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)520; GFX8-NEXT:    v_mov_b32_e32 v2, 4521; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 4, v0522; GFX8-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0523; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1524; GFX8-NEXT:    s_setpc_b64 s[30:31]525;526; GFX9-LABEL: v_fshr_i8_4:527; GFX9:       ; %bb.0:528; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)529; GFX9-NEXT:    v_mov_b32_e32 v2, 4530; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 4, v0531; GFX9-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0532; GFX9-NEXT:    v_or_b32_e32 v0, v0, v1533; GFX9-NEXT:    s_setpc_b64 s[30:31]534;535; GFX10-LABEL: v_fshr_i8_4:536; GFX10:       ; %bb.0:537; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)538; GFX10-NEXT:    v_and_b32_e32 v1, 0xff, v1539; GFX10-NEXT:    v_lshlrev_b16 v0, 4, v0540; GFX10-NEXT:    v_lshrrev_b16 v1, 4, v1541; GFX10-NEXT:    v_or_b32_e32 v0, v0, v1542; GFX10-NEXT:    s_setpc_b64 s[30:31]543;544; GFX11-LABEL: v_fshr_i8_4:545; GFX11:       ; %bb.0:546; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)547; GFX11-NEXT:    v_and_b32_e32 v1, 0xff, v1548; GFX11-NEXT:    v_lshlrev_b16 v0, 4, v0549; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)550; GFX11-NEXT:    v_lshrrev_b16 v1, 4, v1551; GFX11-NEXT:    v_or_b32_e32 v0, v0, v1552; GFX11-NEXT:    s_setpc_b64 s[30:31]553  %result = call i8 @llvm.fshr.i8(i8 %lhs, i8 %rhs, i8 4)554  ret i8 %result555}556 557define amdgpu_ps i8 @s_fshr_i8_5(i8 inreg %lhs, i8 inreg %rhs) {558; GFX6-LABEL: s_fshr_i8_5:559; GFX6:       ; %bb.0:560; GFX6-NEXT:    s_lshl_b32 s0, s0, 3561; GFX6-NEXT:    s_bfe_u32 s1, s1, 0x30005562; GFX6-NEXT:    s_or_b32 s0, s0, s1563; GFX6-NEXT:    ; return to shader part epilog564;565; GFX8-LABEL: s_fshr_i8_5:566; GFX8:       ; %bb.0:567; GFX8-NEXT:    s_and_b32 s1, s1, 0xff568; GFX8-NEXT:    s_lshl_b32 s0, s0, 3569; GFX8-NEXT:    s_lshr_b32 s1, s1, 5570; GFX8-NEXT:    s_or_b32 s0, s0, s1571; GFX8-NEXT:    ; return to shader part epilog572;573; GFX9-LABEL: s_fshr_i8_5:574; GFX9:       ; %bb.0:575; GFX9-NEXT:    s_and_b32 s1, s1, 0xff576; GFX9-NEXT:    s_lshl_b32 s0, s0, 3577; GFX9-NEXT:    s_lshr_b32 s1, s1, 5578; GFX9-NEXT:    s_or_b32 s0, s0, s1579; GFX9-NEXT:    ; return to shader part epilog580;581; GFX10-LABEL: s_fshr_i8_5:582; GFX10:       ; %bb.0:583; GFX10-NEXT:    s_and_b32 s1, s1, 0xff584; GFX10-NEXT:    s_lshl_b32 s0, s0, 3585; GFX10-NEXT:    s_lshr_b32 s1, s1, 5586; GFX10-NEXT:    s_or_b32 s0, s0, s1587; GFX10-NEXT:    ; return to shader part epilog588;589; GFX11-LABEL: s_fshr_i8_5:590; GFX11:       ; %bb.0:591; GFX11-NEXT:    s_and_b32 s1, s1, 0xff592; GFX11-NEXT:    s_lshl_b32 s0, s0, 3593; GFX11-NEXT:    s_lshr_b32 s1, s1, 5594; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)595; GFX11-NEXT:    s_or_b32 s0, s0, s1596; GFX11-NEXT:    ; return to shader part epilog597  %result = call i8 @llvm.fshr.i8(i8 %lhs, i8 %rhs, i8 5)598  ret i8 %result599}600 601define i8 @v_fshr_i8_5(i8 %lhs, i8 %rhs) {602; GFX6-LABEL: v_fshr_i8_5:603; GFX6:       ; %bb.0:604; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)605; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 3, v0606; GFX6-NEXT:    v_bfe_u32 v1, v1, 5, 3607; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1608; GFX6-NEXT:    s_setpc_b64 s[30:31]609;610; GFX8-LABEL: v_fshr_i8_5:611; GFX8:       ; %bb.0:612; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)613; GFX8-NEXT:    v_mov_b32_e32 v2, 5614; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 3, v0615; GFX8-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0616; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1617; GFX8-NEXT:    s_setpc_b64 s[30:31]618;619; GFX9-LABEL: v_fshr_i8_5:620; GFX9:       ; %bb.0:621; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)622; GFX9-NEXT:    v_mov_b32_e32 v2, 5623; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 3, v0624; GFX9-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0625; GFX9-NEXT:    v_or_b32_e32 v0, v0, v1626; GFX9-NEXT:    s_setpc_b64 s[30:31]627;628; GFX10-LABEL: v_fshr_i8_5:629; GFX10:       ; %bb.0:630; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)631; GFX10-NEXT:    v_and_b32_e32 v1, 0xff, v1632; GFX10-NEXT:    v_lshlrev_b16 v0, 3, v0633; GFX10-NEXT:    v_lshrrev_b16 v1, 5, v1634; GFX10-NEXT:    v_or_b32_e32 v0, v0, v1635; GFX10-NEXT:    s_setpc_b64 s[30:31]636;637; GFX11-LABEL: v_fshr_i8_5:638; GFX11:       ; %bb.0:639; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)640; GFX11-NEXT:    v_and_b32_e32 v1, 0xff, v1641; GFX11-NEXT:    v_lshlrev_b16 v0, 3, v0642; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)643; GFX11-NEXT:    v_lshrrev_b16 v1, 5, v1644; GFX11-NEXT:    v_or_b32_e32 v0, v0, v1645; GFX11-NEXT:    s_setpc_b64 s[30:31]646  %result = call i8 @llvm.fshr.i8(i8 %lhs, i8 %rhs, i8 5)647  ret i8 %result648}649 650define amdgpu_ps i16 @s_fshr_v2i8(i16 inreg %lhs.arg, i16 inreg %rhs.arg, i16 inreg %amt.arg) {651; GFX6-LABEL: s_fshr_v2i8:652; GFX6:       ; %bb.0:653; GFX6-NEXT:    s_lshr_b32 s3, s0, 8654; GFX6-NEXT:    s_lshr_b32 s4, s2, 8655; GFX6-NEXT:    s_and_b32 s5, s2, 7656; GFX6-NEXT:    s_andn2_b32 s2, 7, s2657; GFX6-NEXT:    s_lshl_b32 s0, s0, 1658; GFX6-NEXT:    s_lshl_b32 s0, s0, s2659; GFX6-NEXT:    s_and_b32 s2, s1, 0xff660; GFX6-NEXT:    s_lshr_b32 s2, s2, s5661; GFX6-NEXT:    s_or_b32 s0, s0, s2662; GFX6-NEXT:    s_and_b32 s2, s4, 7663; GFX6-NEXT:    s_andn2_b32 s4, 7, s4664; GFX6-NEXT:    s_lshl_b32 s3, s3, 1665; GFX6-NEXT:    s_bfe_u32 s1, s1, 0x80008666; GFX6-NEXT:    s_lshl_b32 s3, s3, s4667; GFX6-NEXT:    s_lshr_b32 s1, s1, s2668; GFX6-NEXT:    s_or_b32 s1, s3, s1669; GFX6-NEXT:    s_and_b32 s1, s1, 0xff670; GFX6-NEXT:    s_and_b32 s0, s0, 0xff671; GFX6-NEXT:    s_lshl_b32 s1, s1, 8672; GFX6-NEXT:    s_or_b32 s0, s0, s1673; GFX6-NEXT:    ; return to shader part epilog674;675; GFX8-LABEL: s_fshr_v2i8:676; GFX8:       ; %bb.0:677; GFX8-NEXT:    s_lshr_b32 s3, s0, 8678; GFX8-NEXT:    s_lshr_b32 s4, s1, 8679; GFX8-NEXT:    s_lshr_b32 s5, s2, 8680; GFX8-NEXT:    s_lshl_b32 s0, s0, 1681; GFX8-NEXT:    s_andn2_b32 s6, 7, s2682; GFX8-NEXT:    s_and_b32 s2, s2, 7683; GFX8-NEXT:    s_and_b32 s1, s1, 0xff684; GFX8-NEXT:    s_lshl_b32 s0, s0, s6685; GFX8-NEXT:    s_lshr_b32 s1, s1, s2686; GFX8-NEXT:    s_or_b32 s0, s0, s1687; GFX8-NEXT:    s_lshl_b32 s1, s3, 1688; GFX8-NEXT:    s_andn2_b32 s2, 7, s5689; GFX8-NEXT:    s_lshl_b32 s1, s1, s2690; GFX8-NEXT:    s_and_b32 s2, s5, 7691; GFX8-NEXT:    s_and_b32 s3, s4, 0xff692; GFX8-NEXT:    s_lshr_b32 s2, s3, s2693; GFX8-NEXT:    s_or_b32 s1, s1, s2694; GFX8-NEXT:    s_and_b32 s1, s1, 0xff695; GFX8-NEXT:    s_and_b32 s0, s0, 0xff696; GFX8-NEXT:    s_lshl_b32 s1, s1, 8697; GFX8-NEXT:    s_or_b32 s0, s0, s1698; GFX8-NEXT:    ; return to shader part epilog699;700; GFX9-LABEL: s_fshr_v2i8:701; GFX9:       ; %bb.0:702; GFX9-NEXT:    s_lshr_b32 s3, s0, 8703; GFX9-NEXT:    s_lshr_b32 s4, s1, 8704; GFX9-NEXT:    s_lshr_b32 s5, s2, 8705; GFX9-NEXT:    s_lshl_b32 s0, s0, 1706; GFX9-NEXT:    s_andn2_b32 s6, 7, s2707; GFX9-NEXT:    s_and_b32 s2, s2, 7708; GFX9-NEXT:    s_and_b32 s1, s1, 0xff709; GFX9-NEXT:    s_lshl_b32 s0, s0, s6710; GFX9-NEXT:    s_lshr_b32 s1, s1, s2711; GFX9-NEXT:    s_or_b32 s0, s0, s1712; GFX9-NEXT:    s_lshl_b32 s1, s3, 1713; GFX9-NEXT:    s_andn2_b32 s2, 7, s5714; GFX9-NEXT:    s_lshl_b32 s1, s1, s2715; GFX9-NEXT:    s_and_b32 s2, s5, 7716; GFX9-NEXT:    s_and_b32 s3, s4, 0xff717; GFX9-NEXT:    s_lshr_b32 s2, s3, s2718; GFX9-NEXT:    s_or_b32 s1, s1, s2719; GFX9-NEXT:    s_and_b32 s1, s1, 0xff720; GFX9-NEXT:    s_and_b32 s0, s0, 0xff721; GFX9-NEXT:    s_lshl_b32 s1, s1, 8722; GFX9-NEXT:    s_or_b32 s0, s0, s1723; GFX9-NEXT:    ; return to shader part epilog724;725; GFX10-LABEL: s_fshr_v2i8:726; GFX10:       ; %bb.0:727; GFX10-NEXT:    s_lshr_b32 s3, s0, 8728; GFX10-NEXT:    s_lshr_b32 s4, s1, 8729; GFX10-NEXT:    s_lshl_b32 s0, s0, 1730; GFX10-NEXT:    s_andn2_b32 s5, 7, s2731; GFX10-NEXT:    s_lshr_b32 s6, s2, 8732; GFX10-NEXT:    s_lshl_b32 s0, s0, s5733; GFX10-NEXT:    s_lshl_b32 s3, s3, 1734; GFX10-NEXT:    s_andn2_b32 s5, 7, s6735; GFX10-NEXT:    s_and_b32 s6, s6, 7736; GFX10-NEXT:    s_and_b32 s4, s4, 0xff737; GFX10-NEXT:    s_and_b32 s2, s2, 7738; GFX10-NEXT:    s_and_b32 s1, s1, 0xff739; GFX10-NEXT:    s_lshl_b32 s3, s3, s5740; GFX10-NEXT:    s_lshr_b32 s4, s4, s6741; GFX10-NEXT:    s_lshr_b32 s1, s1, s2742; GFX10-NEXT:    s_or_b32 s2, s3, s4743; GFX10-NEXT:    s_or_b32 s0, s0, s1744; GFX10-NEXT:    s_and_b32 s1, s2, 0xff745; GFX10-NEXT:    s_and_b32 s0, s0, 0xff746; GFX10-NEXT:    s_lshl_b32 s1, s1, 8747; GFX10-NEXT:    s_or_b32 s0, s0, s1748; GFX10-NEXT:    ; return to shader part epilog749;750; GFX11-LABEL: s_fshr_v2i8:751; GFX11:       ; %bb.0:752; GFX11-NEXT:    s_lshr_b32 s3, s0, 8753; GFX11-NEXT:    s_lshr_b32 s4, s1, 8754; GFX11-NEXT:    s_lshl_b32 s0, s0, 1755; GFX11-NEXT:    s_and_not1_b32 s5, 7, s2756; GFX11-NEXT:    s_lshr_b32 s6, s2, 8757; GFX11-NEXT:    s_lshl_b32 s0, s0, s5758; GFX11-NEXT:    s_lshl_b32 s3, s3, 1759; GFX11-NEXT:    s_and_not1_b32 s5, 7, s6760; GFX11-NEXT:    s_and_b32 s6, s6, 7761; GFX11-NEXT:    s_and_b32 s4, s4, 0xff762; GFX11-NEXT:    s_and_b32 s2, s2, 7763; GFX11-NEXT:    s_and_b32 s1, s1, 0xff764; GFX11-NEXT:    s_lshl_b32 s3, s3, s5765; GFX11-NEXT:    s_lshr_b32 s4, s4, s6766; GFX11-NEXT:    s_lshr_b32 s1, s1, s2767; GFX11-NEXT:    s_or_b32 s2, s3, s4768; GFX11-NEXT:    s_or_b32 s0, s0, s1769; GFX11-NEXT:    s_and_b32 s1, s2, 0xff770; GFX11-NEXT:    s_and_b32 s0, s0, 0xff771; GFX11-NEXT:    s_lshl_b32 s1, s1, 8772; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)773; GFX11-NEXT:    s_or_b32 s0, s0, s1774; GFX11-NEXT:    ; return to shader part epilog775  %lhs = bitcast i16 %lhs.arg to <2 x i8>776  %rhs = bitcast i16 %rhs.arg to <2 x i8>777  %amt = bitcast i16 %amt.arg to <2 x i8>778  %result = call <2 x i8> @llvm.fshr.v2i8(<2 x i8> %lhs, <2 x i8> %rhs, <2 x i8> %amt)779  %cast.result = bitcast <2 x i8> %result to i16780  ret i16 %cast.result781}782 783define i16 @v_fshr_v2i8(i16 %lhs.arg, i16 %rhs.arg, i16 %amt.arg) {784; GFX6-LABEL: v_fshr_v2i8:785; GFX6:       ; %bb.0:786; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)787; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 8, v0788; GFX6-NEXT:    v_lshrrev_b32_e32 v4, 8, v2789; GFX6-NEXT:    v_and_b32_e32 v5, 7, v2790; GFX6-NEXT:    v_bfi_b32 v2, v2, 0, 7791; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v0792; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v2, v0793; GFX6-NEXT:    v_and_b32_e32 v2, 0xff, v1794; GFX6-NEXT:    v_lshrrev_b32_e32 v2, v5, v2795; GFX6-NEXT:    v_or_b32_e32 v0, v0, v2796; GFX6-NEXT:    v_and_b32_e32 v2, 7, v4797; GFX6-NEXT:    v_bfi_b32 v4, v4, 0, 7798; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 1, v3799; GFX6-NEXT:    v_bfe_u32 v1, v1, 8, 8800; GFX6-NEXT:    v_lshlrev_b32_e32 v3, v4, v3801; GFX6-NEXT:    v_lshrrev_b32_e32 v1, v2, v1802; GFX6-NEXT:    v_or_b32_e32 v1, v3, v1803; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v1804; GFX6-NEXT:    v_and_b32_e32 v0, 0xff, v0805; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 8, v1806; GFX6-NEXT:    v_or_b32_e32 v0, v0, v1807; GFX6-NEXT:    s_setpc_b64 s[30:31]808;809; GFX8-LABEL: v_fshr_v2i8:810; GFX8:       ; %bb.0:811; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)812; GFX8-NEXT:    v_xor_b32_e32 v6, -1, v2813; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 8, v0814; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 8, v2815; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 1, v0816; GFX8-NEXT:    v_and_b32_e32 v6, 7, v6817; GFX8-NEXT:    v_and_b32_e32 v2, 7, v2818; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 8, v1819; GFX8-NEXT:    v_lshlrev_b16_e32 v0, v6, v0820; GFX8-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0821; GFX8-NEXT:    v_xor_b32_e32 v2, -1, v5822; GFX8-NEXT:    v_or_b32_e32 v0, v0, v1823; GFX8-NEXT:    v_lshlrev_b16_e32 v1, 1, v3824; GFX8-NEXT:    v_and_b32_e32 v2, 7, v2825; GFX8-NEXT:    v_lshlrev_b16_e32 v1, v2, v1826; GFX8-NEXT:    v_and_b32_e32 v2, 7, v5827; GFX8-NEXT:    v_lshrrev_b16_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0828; GFX8-NEXT:    v_or_b32_e32 v1, v1, v2829; GFX8-NEXT:    v_and_b32_e32 v1, 0xff, v1830; GFX8-NEXT:    v_lshlrev_b16_e32 v1, 8, v1831; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD832; GFX8-NEXT:    s_setpc_b64 s[30:31]833;834; GFX9-LABEL: v_fshr_v2i8:835; GFX9:       ; %bb.0:836; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)837; GFX9-NEXT:    v_xor_b32_e32 v6, -1, v2838; GFX9-NEXT:    v_lshrrev_b32_e32 v3, 8, v0839; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 8, v2840; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 1, v0841; GFX9-NEXT:    v_and_b32_e32 v6, 7, v6842; GFX9-NEXT:    v_and_b32_e32 v2, 7, v2843; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 8, v1844; GFX9-NEXT:    v_lshlrev_b16_e32 v0, v6, v0845; GFX9-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0846; GFX9-NEXT:    v_xor_b32_e32 v2, -1, v5847; GFX9-NEXT:    v_or_b32_e32 v0, v0, v1848; GFX9-NEXT:    v_lshlrev_b16_e32 v1, 1, v3849; GFX9-NEXT:    v_and_b32_e32 v2, 7, v2850; GFX9-NEXT:    v_lshlrev_b16_e32 v1, v2, v1851; GFX9-NEXT:    v_and_b32_e32 v2, 7, v5852; GFX9-NEXT:    v_lshrrev_b16_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0853; GFX9-NEXT:    v_or_b32_e32 v1, v1, v2854; GFX9-NEXT:    v_and_b32_e32 v1, 0xff, v1855; GFX9-NEXT:    v_lshlrev_b16_e32 v1, 8, v1856; GFX9-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD857; GFX9-NEXT:    s_setpc_b64 s[30:31]858;859; GFX10-LABEL: v_fshr_v2i8:860; GFX10:       ; %bb.0:861; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)862; GFX10-NEXT:    v_lshrrev_b32_e32 v3, 8, v2863; GFX10-NEXT:    v_lshrrev_b32_e32 v4, 8, v0864; GFX10-NEXT:    v_lshrrev_b32_e32 v5, 8, v1865; GFX10-NEXT:    v_xor_b32_e32 v7, -1, v2866; GFX10-NEXT:    v_lshlrev_b16 v0, 1, v0867; GFX10-NEXT:    v_xor_b32_e32 v6, -1, v3868; GFX10-NEXT:    v_lshlrev_b16 v4, 1, v4869; GFX10-NEXT:    v_and_b32_e32 v3, 7, v3870; GFX10-NEXT:    v_and_b32_e32 v5, 0xff, v5871; GFX10-NEXT:    v_and_b32_e32 v2, 7, v2872; GFX10-NEXT:    v_and_b32_e32 v6, 7, v6873; GFX10-NEXT:    v_and_b32_e32 v1, 0xff, v1874; GFX10-NEXT:    v_and_b32_e32 v7, 7, v7875; GFX10-NEXT:    v_lshrrev_b16 v3, v3, v5876; GFX10-NEXT:    v_lshlrev_b16 v4, v6, v4877; GFX10-NEXT:    v_lshrrev_b16 v1, v2, v1878; GFX10-NEXT:    v_lshlrev_b16 v0, v7, v0879; GFX10-NEXT:    v_or_b32_e32 v2, v4, v3880; GFX10-NEXT:    v_mov_b32_e32 v3, 0xff881; GFX10-NEXT:    v_or_b32_e32 v0, v0, v1882; GFX10-NEXT:    v_and_b32_sdwa v1, v2, v3 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD883; GFX10-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD884; GFX10-NEXT:    s_setpc_b64 s[30:31]885;886; GFX11-LABEL: v_fshr_v2i8:887; GFX11:       ; %bb.0:888; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)889; GFX11-NEXT:    v_lshrrev_b32_e32 v3, 8, v2890; GFX11-NEXT:    v_lshrrev_b32_e32 v4, 8, v0891; GFX11-NEXT:    v_lshrrev_b32_e32 v5, 8, v1892; GFX11-NEXT:    v_xor_b32_e32 v7, -1, v2893; GFX11-NEXT:    v_lshlrev_b16 v0, 1, v0894; GFX11-NEXT:    v_xor_b32_e32 v6, -1, v3895; GFX11-NEXT:    v_lshlrev_b16 v4, 1, v4896; GFX11-NEXT:    v_and_b32_e32 v3, 7, v3897; GFX11-NEXT:    v_and_b32_e32 v5, 0xff, v5898; GFX11-NEXT:    v_and_b32_e32 v2, 7, v2899; GFX11-NEXT:    v_and_b32_e32 v6, 7, v6900; GFX11-NEXT:    v_and_b32_e32 v1, 0xff, v1901; GFX11-NEXT:    v_and_b32_e32 v7, 7, v7902; GFX11-NEXT:    v_lshrrev_b16 v3, v3, v5903; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)904; GFX11-NEXT:    v_lshlrev_b16 v4, v6, v4905; GFX11-NEXT:    v_lshrrev_b16 v1, v2, v1906; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)907; GFX11-NEXT:    v_lshlrev_b16 v0, v7, v0908; GFX11-NEXT:    v_or_b32_e32 v2, v4, v3909; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)910; GFX11-NEXT:    v_or_b32_e32 v0, v0, v1911; GFX11-NEXT:    v_and_b32_e32 v1, 0xff, v2912; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)913; GFX11-NEXT:    v_and_b32_e32 v0, 0xff, v0914; GFX11-NEXT:    v_lshlrev_b16 v1, 8, v1915; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)916; GFX11-NEXT:    v_or_b32_e32 v0, v0, v1917; GFX11-NEXT:    s_setpc_b64 s[30:31]918  %lhs = bitcast i16 %lhs.arg to <2 x i8>919  %rhs = bitcast i16 %rhs.arg to <2 x i8>920  %amt = bitcast i16 %amt.arg to <2 x i8>921  %result = call <2 x i8> @llvm.fshr.v2i8(<2 x i8> %lhs, <2 x i8> %rhs, <2 x i8> %amt)922  %cast.result = bitcast <2 x i8> %result to i16923  ret i16 %cast.result924}925 926define amdgpu_ps i32 @s_fshr_v4i8(i32 inreg %lhs.arg, i32 inreg %rhs.arg, i32 inreg %amt.arg) {927; GFX6-LABEL: s_fshr_v4i8:928; GFX6:       ; %bb.0:929; GFX6-NEXT:    s_lshr_b32 s3, s0, 8930; GFX6-NEXT:    s_lshr_b32 s4, s0, 16931; GFX6-NEXT:    s_lshr_b32 s5, s0, 24932; GFX6-NEXT:    s_lshr_b32 s7, s2, 8933; GFX6-NEXT:    s_lshr_b32 s8, s2, 16934; GFX6-NEXT:    s_lshr_b32 s9, s2, 24935; GFX6-NEXT:    s_and_b32 s10, s2, 7936; GFX6-NEXT:    s_andn2_b32 s2, 7, s2937; GFX6-NEXT:    s_lshl_b32 s0, s0, 1938; GFX6-NEXT:    s_lshl_b32 s0, s0, s2939; GFX6-NEXT:    s_and_b32 s2, s1, 0xff940; GFX6-NEXT:    s_lshr_b32 s2, s2, s10941; GFX6-NEXT:    s_or_b32 s0, s0, s2942; GFX6-NEXT:    s_and_b32 s2, s7, 7943; GFX6-NEXT:    s_andn2_b32 s7, 7, s7944; GFX6-NEXT:    s_lshl_b32 s3, s3, 1945; GFX6-NEXT:    s_lshl_b32 s3, s3, s7946; GFX6-NEXT:    s_bfe_u32 s7, s1, 0x80008947; GFX6-NEXT:    s_lshr_b32 s2, s7, s2948; GFX6-NEXT:    s_lshr_b32 s6, s1, 24949; GFX6-NEXT:    s_or_b32 s2, s3, s2950; GFX6-NEXT:    s_and_b32 s3, s8, 7951; GFX6-NEXT:    s_andn2_b32 s7, 7, s8952; GFX6-NEXT:    s_lshl_b32 s4, s4, 1953; GFX6-NEXT:    s_bfe_u32 s1, s1, 0x80010954; GFX6-NEXT:    s_lshl_b32 s4, s4, s7955; GFX6-NEXT:    s_lshr_b32 s1, s1, s3956; GFX6-NEXT:    s_or_b32 s1, s4, s1957; GFX6-NEXT:    s_and_b32 s3, s9, 7958; GFX6-NEXT:    s_andn2_b32 s4, 7, s9959; GFX6-NEXT:    s_lshl_b32 s5, s5, 1960; GFX6-NEXT:    s_and_b32 s2, s2, 0xff961; GFX6-NEXT:    s_lshl_b32 s4, s5, s4962; GFX6-NEXT:    s_lshr_b32 s3, s6, s3963; GFX6-NEXT:    s_and_b32 s0, s0, 0xff964; GFX6-NEXT:    s_lshl_b32 s2, s2, 8965; GFX6-NEXT:    s_and_b32 s1, s1, 0xff966; GFX6-NEXT:    s_or_b32 s3, s4, s3967; GFX6-NEXT:    s_or_b32 s0, s0, s2968; GFX6-NEXT:    s_lshl_b32 s1, s1, 16969; GFX6-NEXT:    s_or_b32 s0, s0, s1970; GFX6-NEXT:    s_and_b32 s1, s3, 0xff971; GFX6-NEXT:    s_lshl_b32 s1, s1, 24972; GFX6-NEXT:    s_or_b32 s0, s0, s1973; GFX6-NEXT:    ; return to shader part epilog974;975; GFX8-LABEL: s_fshr_v4i8:976; GFX8:       ; %bb.0:977; GFX8-NEXT:    s_lshr_b32 s3, s0, 8978; GFX8-NEXT:    s_lshr_b32 s4, s0, 16979; GFX8-NEXT:    s_lshr_b32 s5, s0, 24980; GFX8-NEXT:    s_lshr_b32 s6, s1, 8981; GFX8-NEXT:    s_lshr_b32 s7, s1, 16982; GFX8-NEXT:    s_lshr_b32 s8, s1, 24983; GFX8-NEXT:    s_lshr_b32 s9, s2, 8984; GFX8-NEXT:    s_lshr_b32 s10, s2, 16985; GFX8-NEXT:    s_lshr_b32 s11, s2, 24986; GFX8-NEXT:    s_lshl_b32 s0, s0, 1987; GFX8-NEXT:    s_andn2_b32 s12, 7, s2988; GFX8-NEXT:    s_and_b32 s2, s2, 7989; GFX8-NEXT:    s_and_b32 s1, s1, 0xff990; GFX8-NEXT:    s_lshl_b32 s0, s0, s12991; GFX8-NEXT:    s_lshr_b32 s1, s1, s2992; GFX8-NEXT:    s_or_b32 s0, s0, s1993; GFX8-NEXT:    s_lshl_b32 s1, s3, 1994; GFX8-NEXT:    s_andn2_b32 s2, 7, s9995; GFX8-NEXT:    s_lshl_b32 s1, s1, s2996; GFX8-NEXT:    s_and_b32 s2, s9, 7997; GFX8-NEXT:    s_and_b32 s3, s6, 0xff998; GFX8-NEXT:    s_lshr_b32 s2, s3, s2999; GFX8-NEXT:    s_or_b32 s1, s1, s21000; GFX8-NEXT:    s_lshl_b32 s2, s4, 11001; GFX8-NEXT:    s_andn2_b32 s3, 7, s101002; GFX8-NEXT:    s_lshl_b32 s2, s2, s31003; GFX8-NEXT:    s_and_b32 s3, s10, 71004; GFX8-NEXT:    s_and_b32 s4, s7, 0xff1005; GFX8-NEXT:    s_lshr_b32 s3, s4, s31006; GFX8-NEXT:    s_or_b32 s2, s2, s31007; GFX8-NEXT:    s_lshl_b32 s3, s5, 11008; GFX8-NEXT:    s_andn2_b32 s4, 7, s111009; GFX8-NEXT:    s_and_b32 s1, s1, 0xff1010; GFX8-NEXT:    s_lshl_b32 s3, s3, s41011; GFX8-NEXT:    s_and_b32 s4, s11, 71012; GFX8-NEXT:    s_and_b32 s0, s0, 0xff1013; GFX8-NEXT:    s_lshl_b32 s1, s1, 81014; GFX8-NEXT:    s_lshr_b32 s4, s8, s41015; GFX8-NEXT:    s_or_b32 s0, s0, s11016; GFX8-NEXT:    s_and_b32 s1, s2, 0xff1017; GFX8-NEXT:    s_or_b32 s3, s3, s41018; GFX8-NEXT:    s_lshl_b32 s1, s1, 161019; GFX8-NEXT:    s_or_b32 s0, s0, s11020; GFX8-NEXT:    s_and_b32 s1, s3, 0xff1021; GFX8-NEXT:    s_lshl_b32 s1, s1, 241022; GFX8-NEXT:    s_or_b32 s0, s0, s11023; GFX8-NEXT:    ; return to shader part epilog1024;1025; GFX9-LABEL: s_fshr_v4i8:1026; GFX9:       ; %bb.0:1027; GFX9-NEXT:    s_lshr_b32 s3, s0, 81028; GFX9-NEXT:    s_lshr_b32 s4, s0, 161029; GFX9-NEXT:    s_lshr_b32 s5, s0, 241030; GFX9-NEXT:    s_lshr_b32 s6, s1, 81031; GFX9-NEXT:    s_lshr_b32 s7, s1, 161032; GFX9-NEXT:    s_lshr_b32 s8, s1, 241033; GFX9-NEXT:    s_lshr_b32 s9, s2, 81034; GFX9-NEXT:    s_lshr_b32 s10, s2, 161035; GFX9-NEXT:    s_lshr_b32 s11, s2, 241036; GFX9-NEXT:    s_lshl_b32 s0, s0, 11037; GFX9-NEXT:    s_andn2_b32 s12, 7, s21038; GFX9-NEXT:    s_and_b32 s2, s2, 71039; GFX9-NEXT:    s_and_b32 s1, s1, 0xff1040; GFX9-NEXT:    s_lshl_b32 s0, s0, s121041; GFX9-NEXT:    s_lshr_b32 s1, s1, s21042; GFX9-NEXT:    s_or_b32 s0, s0, s11043; GFX9-NEXT:    s_lshl_b32 s1, s3, 11044; GFX9-NEXT:    s_andn2_b32 s2, 7, s91045; GFX9-NEXT:    s_lshl_b32 s1, s1, s21046; GFX9-NEXT:    s_and_b32 s2, s9, 71047; GFX9-NEXT:    s_and_b32 s3, s6, 0xff1048; GFX9-NEXT:    s_lshr_b32 s2, s3, s21049; GFX9-NEXT:    s_or_b32 s1, s1, s21050; GFX9-NEXT:    s_lshl_b32 s2, s4, 11051; GFX9-NEXT:    s_andn2_b32 s3, 7, s101052; GFX9-NEXT:    s_lshl_b32 s2, s2, s31053; GFX9-NEXT:    s_and_b32 s3, s10, 71054; GFX9-NEXT:    s_and_b32 s4, s7, 0xff1055; GFX9-NEXT:    s_lshr_b32 s3, s4, s31056; GFX9-NEXT:    s_or_b32 s2, s2, s31057; GFX9-NEXT:    s_lshl_b32 s3, s5, 11058; GFX9-NEXT:    s_andn2_b32 s4, 7, s111059; GFX9-NEXT:    s_and_b32 s1, s1, 0xff1060; GFX9-NEXT:    s_lshl_b32 s3, s3, s41061; GFX9-NEXT:    s_and_b32 s4, s11, 71062; GFX9-NEXT:    s_and_b32 s0, s0, 0xff1063; GFX9-NEXT:    s_lshl_b32 s1, s1, 81064; GFX9-NEXT:    s_lshr_b32 s4, s8, s41065; GFX9-NEXT:    s_or_b32 s0, s0, s11066; GFX9-NEXT:    s_and_b32 s1, s2, 0xff1067; GFX9-NEXT:    s_or_b32 s3, s3, s41068; GFX9-NEXT:    s_lshl_b32 s1, s1, 161069; GFX9-NEXT:    s_or_b32 s0, s0, s11070; GFX9-NEXT:    s_and_b32 s1, s3, 0xff1071; GFX9-NEXT:    s_lshl_b32 s1, s1, 241072; GFX9-NEXT:    s_or_b32 s0, s0, s11073; GFX9-NEXT:    ; return to shader part epilog1074;1075; GFX10-LABEL: s_fshr_v4i8:1076; GFX10:       ; %bb.0:1077; GFX10-NEXT:    s_lshr_b32 s3, s0, 81078; GFX10-NEXT:    s_lshr_b32 s6, s1, 81079; GFX10-NEXT:    s_lshr_b32 s7, s1, 161080; GFX10-NEXT:    s_lshr_b32 s8, s1, 241081; GFX10-NEXT:    s_lshr_b32 s9, s2, 81082; GFX10-NEXT:    s_lshr_b32 s10, s2, 161083; GFX10-NEXT:    s_lshr_b32 s11, s2, 241084; GFX10-NEXT:    s_andn2_b32 s12, 7, s21085; GFX10-NEXT:    s_and_b32 s2, s2, 71086; GFX10-NEXT:    s_and_b32 s1, s1, 0xff1087; GFX10-NEXT:    s_lshr_b32 s4, s0, 161088; GFX10-NEXT:    s_lshr_b32 s5, s0, 241089; GFX10-NEXT:    s_lshl_b32 s0, s0, 11090; GFX10-NEXT:    s_lshr_b32 s1, s1, s21091; GFX10-NEXT:    s_lshl_b32 s2, s3, 11092; GFX10-NEXT:    s_andn2_b32 s3, 7, s91093; GFX10-NEXT:    s_and_b32 s9, s9, 71094; GFX10-NEXT:    s_and_b32 s6, s6, 0xff1095; GFX10-NEXT:    s_lshl_b32 s0, s0, s121096; GFX10-NEXT:    s_lshl_b32 s2, s2, s31097; GFX10-NEXT:    s_lshr_b32 s3, s6, s91098; GFX10-NEXT:    s_or_b32 s0, s0, s11099; GFX10-NEXT:    s_or_b32 s1, s2, s31100; GFX10-NEXT:    s_lshl_b32 s2, s4, 11101; GFX10-NEXT:    s_andn2_b32 s3, 7, s101102; GFX10-NEXT:    s_and_b32 s4, s10, 71103; GFX10-NEXT:    s_and_b32 s6, s7, 0xff1104; GFX10-NEXT:    s_lshl_b32 s2, s2, s31105; GFX10-NEXT:    s_lshr_b32 s3, s6, s41106; GFX10-NEXT:    s_lshl_b32 s4, s5, 11107; GFX10-NEXT:    s_andn2_b32 s5, 7, s111108; GFX10-NEXT:    s_and_b32 s6, s11, 71109; GFX10-NEXT:    s_lshl_b32 s4, s4, s51110; GFX10-NEXT:    s_lshr_b32 s5, s8, s61111; GFX10-NEXT:    s_or_b32 s2, s2, s31112; GFX10-NEXT:    s_and_b32 s1, s1, 0xff1113; GFX10-NEXT:    s_or_b32 s3, s4, s51114; GFX10-NEXT:    s_and_b32 s0, s0, 0xff1115; GFX10-NEXT:    s_lshl_b32 s1, s1, 81116; GFX10-NEXT:    s_and_b32 s2, s2, 0xff1117; GFX10-NEXT:    s_or_b32 s0, s0, s11118; GFX10-NEXT:    s_lshl_b32 s1, s2, 161119; GFX10-NEXT:    s_and_b32 s2, s3, 0xff1120; GFX10-NEXT:    s_or_b32 s0, s0, s11121; GFX10-NEXT:    s_lshl_b32 s1, s2, 241122; GFX10-NEXT:    s_or_b32 s0, s0, s11123; GFX10-NEXT:    ; return to shader part epilog1124;1125; GFX11-LABEL: s_fshr_v4i8:1126; GFX11:       ; %bb.0:1127; GFX11-NEXT:    s_lshr_b32 s3, s0, 81128; GFX11-NEXT:    s_lshr_b32 s6, s1, 81129; GFX11-NEXT:    s_lshr_b32 s7, s1, 161130; GFX11-NEXT:    s_lshr_b32 s8, s1, 241131; GFX11-NEXT:    s_lshr_b32 s9, s2, 81132; GFX11-NEXT:    s_lshr_b32 s10, s2, 161133; GFX11-NEXT:    s_lshr_b32 s11, s2, 241134; GFX11-NEXT:    s_and_not1_b32 s12, 7, s21135; GFX11-NEXT:    s_and_b32 s2, s2, 71136; GFX11-NEXT:    s_and_b32 s1, s1, 0xff1137; GFX11-NEXT:    s_lshr_b32 s4, s0, 161138; GFX11-NEXT:    s_lshr_b32 s5, s0, 241139; GFX11-NEXT:    s_lshl_b32 s0, s0, 11140; GFX11-NEXT:    s_lshr_b32 s1, s1, s21141; GFX11-NEXT:    s_lshl_b32 s2, s3, 11142; GFX11-NEXT:    s_and_not1_b32 s3, 7, s91143; GFX11-NEXT:    s_and_b32 s9, s9, 71144; GFX11-NEXT:    s_and_b32 s6, s6, 0xff1145; GFX11-NEXT:    s_lshl_b32 s0, s0, s121146; GFX11-NEXT:    s_lshl_b32 s2, s2, s31147; GFX11-NEXT:    s_lshr_b32 s3, s6, s91148; GFX11-NEXT:    s_or_b32 s0, s0, s11149; GFX11-NEXT:    s_or_b32 s1, s2, s31150; GFX11-NEXT:    s_lshl_b32 s2, s4, 11151; GFX11-NEXT:    s_and_not1_b32 s3, 7, s101152; GFX11-NEXT:    s_and_b32 s4, s10, 71153; GFX11-NEXT:    s_and_b32 s6, s7, 0xff1154; GFX11-NEXT:    s_lshl_b32 s2, s2, s31155; GFX11-NEXT:    s_lshr_b32 s3, s6, s41156; GFX11-NEXT:    s_lshl_b32 s4, s5, 11157; GFX11-NEXT:    s_and_not1_b32 s5, 7, s111158; GFX11-NEXT:    s_and_b32 s6, s11, 71159; GFX11-NEXT:    s_lshl_b32 s4, s4, s51160; GFX11-NEXT:    s_lshr_b32 s5, s8, s61161; GFX11-NEXT:    s_or_b32 s2, s2, s31162; GFX11-NEXT:    s_and_b32 s1, s1, 0xff1163; GFX11-NEXT:    s_or_b32 s3, s4, s51164; GFX11-NEXT:    s_and_b32 s0, s0, 0xff1165; GFX11-NEXT:    s_lshl_b32 s1, s1, 81166; GFX11-NEXT:    s_and_b32 s2, s2, 0xff1167; GFX11-NEXT:    s_or_b32 s0, s0, s11168; GFX11-NEXT:    s_lshl_b32 s1, s2, 161169; GFX11-NEXT:    s_and_b32 s2, s3, 0xff1170; GFX11-NEXT:    s_or_b32 s0, s0, s11171; GFX11-NEXT:    s_lshl_b32 s1, s2, 241172; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)1173; GFX11-NEXT:    s_or_b32 s0, s0, s11174; GFX11-NEXT:    ; return to shader part epilog1175  %lhs = bitcast i32 %lhs.arg to <4 x i8>1176  %rhs = bitcast i32 %rhs.arg to <4 x i8>1177  %amt = bitcast i32 %amt.arg to <4 x i8>1178  %result = call <4 x i8> @llvm.fshr.v4i8(<4 x i8> %lhs, <4 x i8> %rhs, <4 x i8> %amt)1179  %cast.result = bitcast <4 x i8> %result to i321180  ret i32 %cast.result1181}1182 1183define i32 @v_fshr_v4i8(i32 %lhs.arg, i32 %rhs.arg, i32 %amt.arg) {1184; GFX6-LABEL: v_fshr_v4i8:1185; GFX6:       ; %bb.0:1186; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1187; GFX6-NEXT:    v_lshrrev_b32_e32 v3, 8, v01188; GFX6-NEXT:    v_lshrrev_b32_e32 v4, 16, v01189; GFX6-NEXT:    v_lshrrev_b32_e32 v5, 24, v01190; GFX6-NEXT:    v_lshrrev_b32_e32 v7, 8, v21191; GFX6-NEXT:    v_lshrrev_b32_e32 v8, 16, v21192; GFX6-NEXT:    v_lshrrev_b32_e32 v9, 24, v21193; GFX6-NEXT:    v_and_b32_e32 v10, 7, v21194; GFX6-NEXT:    v_bfi_b32 v2, v2, 0, 71195; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v01196; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v2, v01197; GFX6-NEXT:    v_and_b32_e32 v2, 0xff, v11198; GFX6-NEXT:    v_lshrrev_b32_e32 v2, v10, v21199; GFX6-NEXT:    v_or_b32_e32 v0, v0, v21200; GFX6-NEXT:    v_and_b32_e32 v2, 7, v71201; GFX6-NEXT:    v_bfi_b32 v7, v7, 0, 71202; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 1, v31203; GFX6-NEXT:    v_lshlrev_b32_e32 v3, v7, v31204; GFX6-NEXT:    v_bfe_u32 v7, v1, 8, 81205; GFX6-NEXT:    v_lshrrev_b32_e32 v2, v2, v71206; GFX6-NEXT:    v_lshrrev_b32_e32 v6, 24, v11207; GFX6-NEXT:    v_or_b32_e32 v2, v3, v21208; GFX6-NEXT:    v_and_b32_e32 v3, 7, v81209; GFX6-NEXT:    v_bfi_b32 v7, v8, 0, 71210; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 1, v41211; GFX6-NEXT:    v_bfe_u32 v1, v1, 16, 81212; GFX6-NEXT:    v_lshlrev_b32_e32 v4, v7, v41213; GFX6-NEXT:    v_lshrrev_b32_e32 v1, v3, v11214; GFX6-NEXT:    v_or_b32_e32 v1, v4, v11215; GFX6-NEXT:    v_and_b32_e32 v3, 7, v91216; GFX6-NEXT:    v_bfi_b32 v4, v9, 0, 71217; GFX6-NEXT:    v_lshlrev_b32_e32 v5, 1, v51218; GFX6-NEXT:    v_and_b32_e32 v2, 0xff, v21219; GFX6-NEXT:    v_lshlrev_b32_e32 v4, v4, v51220; GFX6-NEXT:    v_lshrrev_b32_e32 v3, v3, v61221; GFX6-NEXT:    v_and_b32_e32 v0, 0xff, v01222; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 8, v21223; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v11224; GFX6-NEXT:    v_or_b32_e32 v3, v4, v31225; GFX6-NEXT:    v_or_b32_e32 v0, v0, v21226; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v11227; GFX6-NEXT:    v_or_b32_e32 v0, v0, v11228; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v31229; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 24, v11230; GFX6-NEXT:    v_or_b32_e32 v0, v0, v11231; GFX6-NEXT:    s_setpc_b64 s[30:31]1232;1233; GFX8-LABEL: v_fshr_v4i8:1234; GFX8:       ; %bb.0:1235; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1236; GFX8-NEXT:    v_xor_b32_e32 v7, -1, v21237; GFX8-NEXT:    v_lshlrev_b16_e32 v6, 1, v01238; GFX8-NEXT:    v_and_b32_e32 v7, 7, v71239; GFX8-NEXT:    v_lshlrev_b16_e32 v6, v7, v61240; GFX8-NEXT:    v_and_b32_e32 v7, 7, v21241; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 8, v21242; GFX8-NEXT:    v_lshrrev_b16_sdwa v7, v7, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01243; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 8, v01244; GFX8-NEXT:    v_or_b32_e32 v6, v6, v71245; GFX8-NEXT:    v_xor_b32_e32 v7, -1, v51246; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 8, v11247; GFX8-NEXT:    v_lshlrev_b16_e32 v3, 1, v31248; GFX8-NEXT:    v_and_b32_e32 v7, 7, v71249; GFX8-NEXT:    v_and_b32_e32 v5, 7, v51250; GFX8-NEXT:    v_lshlrev_b16_e32 v3, v7, v31251; GFX8-NEXT:    v_lshrrev_b16_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01252; GFX8-NEXT:    v_mov_b32_e32 v7, -11253; GFX8-NEXT:    v_or_b32_e32 v3, v3, v41254; GFX8-NEXT:    v_mov_b32_e32 v4, 11255; GFX8-NEXT:    v_xor_b32_sdwa v9, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1256; GFX8-NEXT:    v_lshlrev_b16_sdwa v5, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11257; GFX8-NEXT:    v_and_b32_e32 v9, 7, v91258; GFX8-NEXT:    v_mov_b32_e32 v8, 0xff1259; GFX8-NEXT:    v_lshlrev_b16_e32 v5, v9, v51260; GFX8-NEXT:    v_mov_b32_e32 v9, 71261; GFX8-NEXT:    v_lshlrev_b16_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_31262; GFX8-NEXT:    v_xor_b32_sdwa v4, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1263; GFX8-NEXT:    v_and_b32_sdwa v10, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1264; GFX8-NEXT:    v_and_b32_sdwa v8, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1265; GFX8-NEXT:    v_and_b32_e32 v4, 7, v41266; GFX8-NEXT:    v_and_b32_sdwa v2, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1267; GFX8-NEXT:    v_lshrrev_b16_e32 v8, v10, v81268; GFX8-NEXT:    v_lshlrev_b16_e32 v0, v4, v01269; GFX8-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_31270; GFX8-NEXT:    v_or_b32_e32 v5, v5, v81271; GFX8-NEXT:    v_or_b32_e32 v0, v0, v11272; GFX8-NEXT:    v_mov_b32_e32 v1, 81273; GFX8-NEXT:    v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01274; GFX8-NEXT:    v_and_b32_e32 v2, 0xff, v51275; GFX8-NEXT:    v_or_b32_sdwa v1, v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1276; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 16, v21277; GFX8-NEXT:    v_and_b32_e32 v0, 0xff, v01278; GFX8-NEXT:    v_or_b32_e32 v1, v1, v21279; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 24, v01280; GFX8-NEXT:    v_or_b32_e32 v0, v1, v01281; GFX8-NEXT:    s_setpc_b64 s[30:31]1282;1283; GFX9-LABEL: v_fshr_v4i8:1284; GFX9:       ; %bb.0:1285; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1286; GFX9-NEXT:    v_xor_b32_e32 v7, -1, v21287; GFX9-NEXT:    v_lshlrev_b16_e32 v6, 1, v01288; GFX9-NEXT:    v_and_b32_e32 v7, 7, v71289; GFX9-NEXT:    v_lshlrev_b16_e32 v6, v7, v61290; GFX9-NEXT:    v_and_b32_e32 v7, 7, v21291; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 8, v21292; GFX9-NEXT:    v_lshrrev_b16_sdwa v7, v7, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01293; GFX9-NEXT:    v_lshrrev_b32_e32 v3, 8, v01294; GFX9-NEXT:    v_or_b32_e32 v6, v6, v71295; GFX9-NEXT:    v_xor_b32_e32 v7, -1, v51296; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 8, v11297; GFX9-NEXT:    v_lshlrev_b16_e32 v3, 1, v31298; GFX9-NEXT:    v_and_b32_e32 v7, 7, v71299; GFX9-NEXT:    v_and_b32_e32 v5, 7, v51300; GFX9-NEXT:    v_lshlrev_b16_e32 v3, v7, v31301; GFX9-NEXT:    v_lshrrev_b16_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01302; GFX9-NEXT:    v_mov_b32_e32 v7, -11303; GFX9-NEXT:    v_or_b32_e32 v3, v3, v41304; GFX9-NEXT:    v_mov_b32_e32 v4, 11305; GFX9-NEXT:    v_xor_b32_sdwa v9, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1306; GFX9-NEXT:    v_lshlrev_b16_sdwa v5, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11307; GFX9-NEXT:    v_and_b32_e32 v9, 7, v91308; GFX9-NEXT:    v_mov_b32_e32 v8, 0xff1309; GFX9-NEXT:    v_lshlrev_b16_e32 v5, v9, v51310; GFX9-NEXT:    v_mov_b32_e32 v9, 71311; GFX9-NEXT:    v_lshlrev_b16_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_31312; GFX9-NEXT:    v_xor_b32_sdwa v4, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1313; GFX9-NEXT:    v_and_b32_sdwa v10, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1314; GFX9-NEXT:    v_and_b32_sdwa v11, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1315; GFX9-NEXT:    v_and_b32_e32 v4, 7, v41316; GFX9-NEXT:    v_and_b32_sdwa v2, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1317; GFX9-NEXT:    v_lshrrev_b16_e32 v10, v10, v111318; GFX9-NEXT:    v_lshlrev_b16_e32 v0, v4, v01319; GFX9-NEXT:    v_lshrrev_b16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_31320; GFX9-NEXT:    v_or_b32_e32 v5, v5, v101321; GFX9-NEXT:    v_or_b32_e32 v0, v0, v11322; GFX9-NEXT:    v_mov_b32_e32 v1, 81323; GFX9-NEXT:    v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01324; GFX9-NEXT:    v_and_b32_e32 v2, 0xff, v51325; GFX9-NEXT:    v_and_b32_e32 v0, 0xff, v01326; GFX9-NEXT:    v_and_or_b32 v1, v6, v8, v11327; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 16, v21328; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 24, v01329; GFX9-NEXT:    v_or3_b32 v0, v1, v2, v01330; GFX9-NEXT:    s_setpc_b64 s[30:31]1331;1332; GFX10-LABEL: v_fshr_v4i8:1333; GFX10:       ; %bb.0:1334; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1335; GFX10-NEXT:    v_lshrrev_b32_e32 v5, 8, v21336; GFX10-NEXT:    v_lshrrev_b32_e32 v4, 8, v01337; GFX10-NEXT:    v_xor_b32_e32 v8, -1, v21338; GFX10-NEXT:    v_mov_b32_e32 v3, -11339; GFX10-NEXT:    v_lshrrev_b32_e32 v6, 16, v01340; GFX10-NEXT:    v_xor_b32_e32 v10, -1, v51341; GFX10-NEXT:    v_lshrrev_b32_e32 v7, 24, v01342; GFX10-NEXT:    v_lshrrev_b32_e32 v9, 8, v11343; GFX10-NEXT:    v_lshlrev_b16 v0, 1, v01344; GFX10-NEXT:    v_and_b32_e32 v8, 7, v81345; GFX10-NEXT:    v_lshlrev_b16 v4, 1, v41346; GFX10-NEXT:    v_and_b32_e32 v10, 7, v101347; GFX10-NEXT:    v_mov_b32_e32 v14, 0xff1348; GFX10-NEXT:    v_lshrrev_b32_e32 v11, 24, v11349; GFX10-NEXT:    v_lshlrev_b16 v0, v8, v01350; GFX10-NEXT:    v_and_b32_e32 v8, 0xff, v91351; GFX10-NEXT:    v_lshlrev_b16 v4, v10, v41352; GFX10-NEXT:    v_xor_b32_sdwa v9, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1353; GFX10-NEXT:    v_mov_b32_e32 v10, 71354; GFX10-NEXT:    v_xor_b32_sdwa v3, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1355; GFX10-NEXT:    v_and_b32_e32 v12, 7, v21356; GFX10-NEXT:    v_and_b32_e32 v13, 0xff, v11357; GFX10-NEXT:    v_and_b32_e32 v5, 7, v51358; GFX10-NEXT:    v_lshlrev_b16 v6, 1, v61359; GFX10-NEXT:    v_and_b32_e32 v9, 7, v91360; GFX10-NEXT:    v_and_b32_sdwa v15, v2, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1361; GFX10-NEXT:    v_and_b32_sdwa v1, v1, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1362; GFX10-NEXT:    v_lshlrev_b16 v7, 1, v71363; GFX10-NEXT:    v_and_b32_e32 v3, 7, v31364; GFX10-NEXT:    v_and_b32_sdwa v2, v2, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD1365; GFX10-NEXT:    v_lshrrev_b16 v5, v5, v81366; GFX10-NEXT:    v_lshlrev_b16 v6, v9, v61367; GFX10-NEXT:    v_lshrrev_b16 v1, v15, v11368; GFX10-NEXT:    v_lshlrev_b16 v3, v3, v71369; GFX10-NEXT:    v_lshrrev_b16 v2, v2, v111370; GFX10-NEXT:    v_lshrrev_b16 v7, v12, v131371; GFX10-NEXT:    v_or_b32_e32 v4, v4, v51372; GFX10-NEXT:    v_mov_b32_e32 v5, 81373; GFX10-NEXT:    v_or_b32_e32 v1, v6, v11374; GFX10-NEXT:    v_or_b32_e32 v2, v3, v21375; GFX10-NEXT:    v_or_b32_e32 v0, v0, v71376; GFX10-NEXT:    v_lshlrev_b32_sdwa v3, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01377; GFX10-NEXT:    v_and_b32_e32 v1, 0xff, v11378; GFX10-NEXT:    v_and_b32_e32 v2, 0xff, v21379; GFX10-NEXT:    v_and_or_b32 v0, 0xff, v0, v31380; GFX10-NEXT:    v_lshlrev_b32_e32 v1, 16, v11381; GFX10-NEXT:    v_lshlrev_b32_e32 v2, 24, v21382; GFX10-NEXT:    v_or3_b32 v0, v0, v1, v21383; GFX10-NEXT:    s_setpc_b64 s[30:31]1384;1385; GFX11-LABEL: v_fshr_v4i8:1386; GFX11:       ; %bb.0:1387; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1388; GFX11-NEXT:    v_lshrrev_b32_e32 v6, 8, v11389; GFX11-NEXT:    v_lshrrev_b32_e32 v7, 8, v21390; GFX11-NEXT:    v_lshrrev_b32_e32 v3, 8, v01391; GFX11-NEXT:    v_lshrrev_b32_e32 v11, 16, v21392; GFX11-NEXT:    v_lshrrev_b32_e32 v13, 24, v21393; GFX11-NEXT:    v_and_b32_e32 v6, 0xff, v61394; GFX11-NEXT:    v_xor_b32_e32 v12, -1, v71395; GFX11-NEXT:    v_and_b32_e32 v7, 7, v71396; GFX11-NEXT:    v_lshrrev_b32_e32 v4, 16, v01397; GFX11-NEXT:    v_lshrrev_b32_e32 v5, 24, v01398; GFX11-NEXT:    v_lshrrev_b32_e32 v8, 16, v11399; GFX11-NEXT:    v_lshlrev_b16 v3, 1, v31400; GFX11-NEXT:    v_and_b32_e32 v12, 7, v121401; GFX11-NEXT:    v_xor_b32_e32 v14, -1, v111402; GFX11-NEXT:    v_lshrrev_b16 v6, v7, v61403; GFX11-NEXT:    v_xor_b32_e32 v7, -1, v131404; GFX11-NEXT:    v_lshrrev_b32_e32 v9, 24, v11405; GFX11-NEXT:    v_xor_b32_e32 v10, -1, v21406; GFX11-NEXT:    v_lshlrev_b16 v3, v12, v31407; GFX11-NEXT:    v_lshlrev_b16 v4, 1, v41408; GFX11-NEXT:    v_and_b32_e32 v12, 7, v141409; GFX11-NEXT:    v_and_b32_e32 v11, 7, v111410; GFX11-NEXT:    v_and_b32_e32 v8, 0xff, v81411; GFX11-NEXT:    v_lshlrev_b16 v5, 1, v51412; GFX11-NEXT:    v_and_b32_e32 v7, 7, v71413; GFX11-NEXT:    v_and_b32_e32 v13, 7, v131414; GFX11-NEXT:    v_lshlrev_b16 v0, 1, v01415; GFX11-NEXT:    v_and_b32_e32 v10, 7, v101416; GFX11-NEXT:    v_and_b32_e32 v2, 7, v21417; GFX11-NEXT:    v_and_b32_e32 v1, 0xff, v11418; GFX11-NEXT:    v_or_b32_e32 v3, v3, v61419; GFX11-NEXT:    v_lshlrev_b16 v4, v12, v41420; GFX11-NEXT:    v_lshrrev_b16 v6, v11, v81421; GFX11-NEXT:    v_lshlrev_b16 v5, v7, v51422; GFX11-NEXT:    v_lshrrev_b16 v7, v13, v91423; GFX11-NEXT:    v_lshlrev_b16 v0, v10, v01424; GFX11-NEXT:    v_lshrrev_b16 v1, v2, v11425; GFX11-NEXT:    v_and_b32_e32 v2, 0xff, v31426; GFX11-NEXT:    v_or_b32_e32 v3, v4, v61427; GFX11-NEXT:    v_or_b32_e32 v4, v5, v71428; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1429; GFX11-NEXT:    v_or_b32_e32 v0, v0, v11430; GFX11-NEXT:    v_lshlrev_b32_e32 v1, 8, v21431; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1432; GFX11-NEXT:    v_and_b32_e32 v2, 0xff, v31433; GFX11-NEXT:    v_and_b32_e32 v3, 0xff, v41434; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1435; GFX11-NEXT:    v_and_or_b32 v0, 0xff, v0, v11436; GFX11-NEXT:    v_lshlrev_b32_e32 v1, 16, v21437; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1438; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 24, v31439; GFX11-NEXT:    v_or3_b32 v0, v0, v1, v21440; GFX11-NEXT:    s_setpc_b64 s[30:31]1441  %lhs = bitcast i32 %lhs.arg to <4 x i8>1442  %rhs = bitcast i32 %rhs.arg to <4 x i8>1443  %amt = bitcast i32 %amt.arg to <4 x i8>1444  %result = call <4 x i8> @llvm.fshr.v4i8(<4 x i8> %lhs, <4 x i8> %rhs, <4 x i8> %amt)1445  %cast.result = bitcast <4 x i8> %result to i321446  ret i32 %cast.result1447}1448 1449define amdgpu_ps i24 @s_fshr_i24(i24 inreg %lhs, i24 inreg %rhs, i24 inreg %amt) {1450; GFX6-LABEL: s_fshr_i24:1451; GFX6:       ; %bb.0:1452; GFX6-NEXT:    v_cvt_f32_ubyte0_e32 v0, 241453; GFX6-NEXT:    v_rcp_iflag_f32_e32 v0, v01454; GFX6-NEXT:    v_not_b32_e32 v1, 231455; GFX6-NEXT:    s_and_b32 s2, s2, 0xffffff1456; GFX6-NEXT:    s_lshl_b32 s0, s0, 11457; GFX6-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v01458; GFX6-NEXT:    v_cvt_u32_f32_e32 v0, v01459; GFX6-NEXT:    s_and_b32 s1, s1, 0xffffff1460; GFX6-NEXT:    v_mul_lo_u32 v2, v0, v11461; GFX6-NEXT:    v_mul_hi_u32 v2, v0, v21462; GFX6-NEXT:    v_add_i32_e32 v0, vcc, v0, v21463; GFX6-NEXT:    v_mul_hi_u32 v0, s2, v01464; GFX6-NEXT:    v_mul_lo_u32 v0, v0, 241465; GFX6-NEXT:    v_sub_i32_e32 v0, vcc, s2, v01466; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v0, v11467; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v01468; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc1469; GFX6-NEXT:    v_add_i32_e32 v1, vcc, v0, v11470; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v01471; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc1472; GFX6-NEXT:    v_sub_i32_e32 v1, vcc, 23, v01473; GFX6-NEXT:    v_and_b32_e32 v0, 0xffffff, v01474; GFX6-NEXT:    v_and_b32_e32 v1, 0xffffff, v11475; GFX6-NEXT:    v_lshl_b32_e32 v1, s0, v11476; GFX6-NEXT:    v_lshr_b32_e32 v0, s1, v01477; GFX6-NEXT:    v_or_b32_e32 v0, v1, v01478; GFX6-NEXT:    v_readfirstlane_b32 s0, v01479; GFX6-NEXT:    ; return to shader part epilog1480;1481; GFX8-LABEL: s_fshr_i24:1482; GFX8:       ; %bb.0:1483; GFX8-NEXT:    v_cvt_f32_ubyte0_e32 v0, 241484; GFX8-NEXT:    v_rcp_iflag_f32_e32 v0, v01485; GFX8-NEXT:    v_not_b32_e32 v1, 231486; GFX8-NEXT:    s_and_b32 s2, s2, 0xffffff1487; GFX8-NEXT:    s_lshl_b32 s0, s0, 11488; GFX8-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v01489; GFX8-NEXT:    v_cvt_u32_f32_e32 v0, v01490; GFX8-NEXT:    s_and_b32 s1, s1, 0xffffff1491; GFX8-NEXT:    v_mul_lo_u32 v2, v0, v11492; GFX8-NEXT:    v_mul_hi_u32 v2, v0, v21493; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v21494; GFX8-NEXT:    v_mul_hi_u32 v0, s2, v01495; GFX8-NEXT:    v_mul_lo_u32 v0, v0, 241496; GFX8-NEXT:    v_sub_u32_e32 v0, vcc, s2, v01497; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v0, v11498; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v01499; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc1500; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v0, v11501; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v01502; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc1503; GFX8-NEXT:    v_sub_u32_e32 v1, vcc, 23, v01504; GFX8-NEXT:    v_and_b32_e32 v0, 0xffffff, v01505; GFX8-NEXT:    v_and_b32_e32 v1, 0xffffff, v11506; GFX8-NEXT:    v_lshlrev_b32_e64 v1, v1, s01507; GFX8-NEXT:    v_lshrrev_b32_e64 v0, v0, s11508; GFX8-NEXT:    v_or_b32_e32 v0, v1, v01509; GFX8-NEXT:    v_readfirstlane_b32 s0, v01510; GFX8-NEXT:    ; return to shader part epilog1511;1512; GFX9-LABEL: s_fshr_i24:1513; GFX9:       ; %bb.0:1514; GFX9-NEXT:    v_cvt_f32_ubyte0_e32 v0, 241515; GFX9-NEXT:    v_rcp_iflag_f32_e32 v0, v01516; GFX9-NEXT:    v_not_b32_e32 v1, 231517; GFX9-NEXT:    s_and_b32 s2, s2, 0xffffff1518; GFX9-NEXT:    s_and_b32 s1, s1, 0xffffff1519; GFX9-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v01520; GFX9-NEXT:    v_cvt_u32_f32_e32 v0, v01521; GFX9-NEXT:    s_lshl_b32 s0, s0, 11522; GFX9-NEXT:    v_mul_lo_u32 v1, v0, v11523; GFX9-NEXT:    v_mul_hi_u32 v1, v0, v11524; GFX9-NEXT:    v_add_u32_e32 v0, v0, v11525; GFX9-NEXT:    v_mul_hi_u32 v0, s2, v01526; GFX9-NEXT:    v_mul_lo_u32 v0, v0, 241527; GFX9-NEXT:    v_sub_u32_e32 v0, s2, v01528; GFX9-NEXT:    v_add_u32_e32 v1, 0xffffffe8, v01529; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v01530; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc1531; GFX9-NEXT:    v_add_u32_e32 v1, 0xffffffe8, v01532; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v01533; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc1534; GFX9-NEXT:    v_sub_u32_e32 v1, 23, v01535; GFX9-NEXT:    v_and_b32_e32 v0, 0xffffff, v01536; GFX9-NEXT:    v_and_b32_e32 v1, 0xffffff, v11537; GFX9-NEXT:    v_lshrrev_b32_e64 v0, v0, s11538; GFX9-NEXT:    v_lshl_or_b32 v0, s0, v1, v01539; GFX9-NEXT:    v_readfirstlane_b32 s0, v01540; GFX9-NEXT:    ; return to shader part epilog1541;1542; GFX10-LABEL: s_fshr_i24:1543; GFX10:       ; %bb.0:1544; GFX10-NEXT:    v_cvt_f32_ubyte0_e32 v0, 241545; GFX10-NEXT:    s_and_b32 s2, s2, 0xffffff1546; GFX10-NEXT:    s_and_b32 s1, s1, 0xffffff1547; GFX10-NEXT:    s_lshl_b32 s0, s0, 11548; GFX10-NEXT:    v_rcp_iflag_f32_e32 v0, v01549; GFX10-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v01550; GFX10-NEXT:    v_cvt_u32_f32_e32 v0, v01551; GFX10-NEXT:    v_mul_lo_u32 v1, 0xffffffe8, v01552; GFX10-NEXT:    v_mul_hi_u32 v1, v0, v11553; GFX10-NEXT:    v_add_nc_u32_e32 v0, v0, v11554; GFX10-NEXT:    v_mul_hi_u32 v0, s2, v01555; GFX10-NEXT:    v_mul_lo_u32 v0, v0, 241556; GFX10-NEXT:    v_sub_nc_u32_e32 v0, s2, v01557; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0xffffffe8, v01558; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v01559; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo1560; GFX10-NEXT:    v_add_nc_u32_e32 v1, 0xffffffe8, v01561; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v01562; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo1563; GFX10-NEXT:    v_sub_nc_u32_e32 v1, 23, v01564; GFX10-NEXT:    v_and_b32_e32 v0, 0xffffff, v01565; GFX10-NEXT:    v_and_b32_e32 v1, 0xffffff, v11566; GFX10-NEXT:    v_lshrrev_b32_e64 v0, v0, s11567; GFX10-NEXT:    v_lshl_or_b32 v0, s0, v1, v01568; GFX10-NEXT:    v_readfirstlane_b32 s0, v01569; GFX10-NEXT:    ; return to shader part epilog1570;1571; GFX11-LABEL: s_fshr_i24:1572; GFX11:       ; %bb.0:1573; GFX11-NEXT:    v_cvt_f32_ubyte0_e32 v0, 241574; GFX11-NEXT:    s_and_b32 s2, s2, 0xffffff1575; GFX11-NEXT:    s_and_b32 s1, s1, 0xffffff1576; GFX11-NEXT:    s_lshl_b32 s0, s0, 11577; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1578; GFX11-NEXT:    v_rcp_iflag_f32_e32 v0, v01579; GFX11-NEXT:    s_waitcnt_depctr depctr_va_vdst(0)1580; GFX11-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v01581; GFX11-NEXT:    v_cvt_u32_f32_e32 v0, v01582; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1583; GFX11-NEXT:    v_mul_lo_u32 v1, 0xffffffe8, v01584; GFX11-NEXT:    v_mul_hi_u32 v1, v0, v11585; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1586; GFX11-NEXT:    v_add_nc_u32_e32 v0, v0, v11587; GFX11-NEXT:    v_mul_hi_u32 v0, s2, v01588; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1589; GFX11-NEXT:    v_mul_lo_u32 v0, v0, 241590; GFX11-NEXT:    v_sub_nc_u32_e32 v0, s2, v01591; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1592; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0xffffffe8, v01593; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v01594; GFX11-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo1595; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1596; GFX11-NEXT:    v_add_nc_u32_e32 v1, 0xffffffe8, v01597; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v01598; GFX11-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo1599; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1600; GFX11-NEXT:    v_sub_nc_u32_e32 v1, 23, v01601; GFX11-NEXT:    v_and_b32_e32 v0, 0xffffff, v01602; GFX11-NEXT:    v_and_b32_e32 v1, 0xffffff, v11603; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1604; GFX11-NEXT:    v_lshrrev_b32_e64 v0, v0, s11605; GFX11-NEXT:    v_lshl_or_b32 v0, s0, v1, v01606; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)1607; GFX11-NEXT:    v_readfirstlane_b32 s0, v01608; GFX11-NEXT:    ; return to shader part epilog1609  %result = call i24 @llvm.fshr.i24(i24 %lhs, i24 %rhs, i24 %amt)1610  ret i24 %result1611}1612 1613define i24 @v_fshr_i24(i24 %lhs, i24 %rhs, i24 %amt) {1614; GFX6-LABEL: v_fshr_i24:1615; GFX6:       ; %bb.0:1616; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1617; GFX6-NEXT:    v_cvt_f32_ubyte0_e32 v3, 241618; GFX6-NEXT:    v_rcp_iflag_f32_e32 v3, v31619; GFX6-NEXT:    v_not_b32_e32 v4, 231620; GFX6-NEXT:    v_and_b32_e32 v2, 0xffffff, v21621; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v01622; GFX6-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v31623; GFX6-NEXT:    v_cvt_u32_f32_e32 v3, v31624; GFX6-NEXT:    v_and_b32_e32 v1, 0xffffff, v11625; GFX6-NEXT:    v_mul_lo_u32 v5, v3, v41626; GFX6-NEXT:    v_mul_hi_u32 v5, v3, v51627; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v3, v51628; GFX6-NEXT:    v_mul_hi_u32 v3, v2, v31629; GFX6-NEXT:    v_mul_lo_u32 v3, v3, 241630; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, v2, v31631; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v2, v41632; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21633; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1634; GFX6-NEXT:    v_add_i32_e32 v3, vcc, 0xffffffe8, v21635; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21636; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1637; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 23, v21638; GFX6-NEXT:    v_and_b32_e32 v2, 0xffffff, v21639; GFX6-NEXT:    v_and_b32_e32 v3, 0xffffff, v31640; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v3, v01641; GFX6-NEXT:    v_lshrrev_b32_e32 v1, v2, v11642; GFX6-NEXT:    v_or_b32_e32 v0, v0, v11643; GFX6-NEXT:    s_setpc_b64 s[30:31]1644;1645; GFX8-LABEL: v_fshr_i24:1646; GFX8:       ; %bb.0:1647; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1648; GFX8-NEXT:    v_cvt_f32_ubyte0_e32 v3, 241649; GFX8-NEXT:    v_rcp_iflag_f32_e32 v3, v31650; GFX8-NEXT:    v_not_b32_e32 v4, 231651; GFX8-NEXT:    v_and_b32_e32 v2, 0xffffff, v21652; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 1, v01653; GFX8-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v31654; GFX8-NEXT:    v_cvt_u32_f32_e32 v3, v31655; GFX8-NEXT:    v_and_b32_e32 v1, 0xffffff, v11656; GFX8-NEXT:    v_mul_lo_u32 v5, v3, v41657; GFX8-NEXT:    v_mul_hi_u32 v5, v3, v51658; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v3, v51659; GFX8-NEXT:    v_mul_hi_u32 v3, v2, v31660; GFX8-NEXT:    v_mul_lo_u32 v3, v3, 241661; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, v2, v31662; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v2, v41663; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21664; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1665; GFX8-NEXT:    v_add_u32_e32 v3, vcc, 0xffffffe8, v21666; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21667; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1668; GFX8-NEXT:    v_sub_u32_e32 v3, vcc, 23, v21669; GFX8-NEXT:    v_and_b32_e32 v2, 0xffffff, v21670; GFX8-NEXT:    v_and_b32_e32 v3, 0xffffff, v31671; GFX8-NEXT:    v_lshlrev_b32_e32 v0, v3, v01672; GFX8-NEXT:    v_lshrrev_b32_e32 v1, v2, v11673; GFX8-NEXT:    v_or_b32_e32 v0, v0, v11674; GFX8-NEXT:    s_setpc_b64 s[30:31]1675;1676; GFX9-LABEL: v_fshr_i24:1677; GFX9:       ; %bb.0:1678; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1679; GFX9-NEXT:    v_cvt_f32_ubyte0_e32 v3, 241680; GFX9-NEXT:    v_rcp_iflag_f32_e32 v3, v31681; GFX9-NEXT:    v_not_b32_e32 v4, 231682; GFX9-NEXT:    v_and_b32_e32 v2, 0xffffff, v21683; GFX9-NEXT:    v_and_b32_e32 v1, 0xffffff, v11684; GFX9-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v31685; GFX9-NEXT:    v_cvt_u32_f32_e32 v3, v31686; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 1, v01687; GFX9-NEXT:    v_mul_lo_u32 v4, v3, v41688; GFX9-NEXT:    v_mul_hi_u32 v4, v3, v41689; GFX9-NEXT:    v_add_u32_e32 v3, v3, v41690; GFX9-NEXT:    v_mul_hi_u32 v3, v2, v31691; GFX9-NEXT:    v_mul_lo_u32 v3, v3, 241692; GFX9-NEXT:    v_sub_u32_e32 v2, v2, v31693; GFX9-NEXT:    v_add_u32_e32 v3, 0xffffffe8, v21694; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21695; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1696; GFX9-NEXT:    v_add_u32_e32 v3, 0xffffffe8, v21697; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21698; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1699; GFX9-NEXT:    v_sub_u32_e32 v3, 23, v21700; GFX9-NEXT:    v_and_b32_e32 v2, 0xffffff, v21701; GFX9-NEXT:    v_and_b32_e32 v3, 0xffffff, v31702; GFX9-NEXT:    v_lshrrev_b32_e32 v1, v2, v11703; GFX9-NEXT:    v_lshl_or_b32 v0, v0, v3, v11704; GFX9-NEXT:    s_setpc_b64 s[30:31]1705;1706; GFX10-LABEL: v_fshr_i24:1707; GFX10:       ; %bb.0:1708; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1709; GFX10-NEXT:    v_cvt_f32_ubyte0_e32 v3, 241710; GFX10-NEXT:    v_and_b32_e32 v2, 0xffffff, v21711; GFX10-NEXT:    v_and_b32_e32 v1, 0xffffff, v11712; GFX10-NEXT:    v_lshlrev_b32_e32 v0, 1, v01713; GFX10-NEXT:    v_rcp_iflag_f32_e32 v3, v31714; GFX10-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v31715; GFX10-NEXT:    v_cvt_u32_f32_e32 v3, v31716; GFX10-NEXT:    v_mul_lo_u32 v4, 0xffffffe8, v31717; GFX10-NEXT:    v_mul_hi_u32 v4, v3, v41718; GFX10-NEXT:    v_add_nc_u32_e32 v3, v3, v41719; GFX10-NEXT:    v_mul_hi_u32 v3, v2, v31720; GFX10-NEXT:    v_mul_lo_u32 v3, v3, 241721; GFX10-NEXT:    v_sub_nc_u32_e32 v2, v2, v31722; GFX10-NEXT:    v_add_nc_u32_e32 v3, 0xffffffe8, v21723; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v21724; GFX10-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo1725; GFX10-NEXT:    v_add_nc_u32_e32 v3, 0xffffffe8, v21726; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v21727; GFX10-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo1728; GFX10-NEXT:    v_sub_nc_u32_e32 v3, 23, v21729; GFX10-NEXT:    v_and_b32_e32 v2, 0xffffff, v21730; GFX10-NEXT:    v_and_b32_e32 v3, 0xffffff, v31731; GFX10-NEXT:    v_lshrrev_b32_e32 v1, v2, v11732; GFX10-NEXT:    v_lshl_or_b32 v0, v0, v3, v11733; GFX10-NEXT:    s_setpc_b64 s[30:31]1734;1735; GFX11-LABEL: v_fshr_i24:1736; GFX11:       ; %bb.0:1737; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1738; GFX11-NEXT:    v_cvt_f32_ubyte0_e32 v3, 241739; GFX11-NEXT:    v_and_b32_e32 v2, 0xffffff, v21740; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 1, v01741; GFX11-NEXT:    v_and_b32_e32 v1, 0xffffff, v11742; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)1743; GFX11-NEXT:    v_rcp_iflag_f32_e32 v3, v31744; GFX11-NEXT:    s_waitcnt_depctr depctr_va_vdst(0)1745; GFX11-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v31746; GFX11-NEXT:    v_cvt_u32_f32_e32 v3, v31747; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1748; GFX11-NEXT:    v_mul_lo_u32 v4, 0xffffffe8, v31749; GFX11-NEXT:    v_mul_hi_u32 v4, v3, v41750; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1751; GFX11-NEXT:    v_add_nc_u32_e32 v3, v3, v41752; GFX11-NEXT:    v_mul_hi_u32 v3, v2, v31753; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1754; GFX11-NEXT:    v_mul_lo_u32 v3, v3, 241755; GFX11-NEXT:    v_sub_nc_u32_e32 v2, v2, v31756; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1757; GFX11-NEXT:    v_add_nc_u32_e32 v3, 0xffffffe8, v21758; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v21759; GFX11-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo1760; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1761; GFX11-NEXT:    v_add_nc_u32_e32 v3, 0xffffffe8, v21762; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v21763; GFX11-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo1764; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1765; GFX11-NEXT:    v_sub_nc_u32_e32 v3, 23, v21766; GFX11-NEXT:    v_and_b32_e32 v2, 0xffffff, v21767; GFX11-NEXT:    v_and_b32_e32 v3, 0xffffff, v31768; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1769; GFX11-NEXT:    v_lshrrev_b32_e32 v1, v2, v11770; GFX11-NEXT:    v_lshl_or_b32 v0, v0, v3, v11771; GFX11-NEXT:    s_setpc_b64 s[30:31]1772  %result = call i24 @llvm.fshr.i24(i24 %lhs, i24 %rhs, i24 %amt)1773  ret i24 %result1774}1775 1776define amdgpu_ps i48 @s_fshr_v2i24(i48 inreg %lhs.arg, i48 inreg %rhs.arg, i48 inreg %amt.arg) {1777; GFX6-LABEL: s_fshr_v2i24:1778; GFX6:       ; %bb.0:1779; GFX6-NEXT:    v_cvt_f32_ubyte0_e32 v2, 241780; GFX6-NEXT:    v_rcp_iflag_f32_e32 v2, v21781; GFX6-NEXT:    s_bfe_u32 s9, s0, 0x800081782; GFX6-NEXT:    v_not_b32_e32 v3, 231783; GFX6-NEXT:    s_lshr_b32 s7, s1, 81784; GFX6-NEXT:    v_mul_f32_e32 v2, 0x4f7ffffe, v21785; GFX6-NEXT:    v_cvt_u32_f32_e32 v2, v21786; GFX6-NEXT:    s_and_b32 s8, s0, 0xff1787; GFX6-NEXT:    s_lshl_b32 s9, s9, 81788; GFX6-NEXT:    s_and_b32 s1, s1, 0xff1789; GFX6-NEXT:    v_mov_b32_e32 v0, s01790; GFX6-NEXT:    s_bfe_u32 s10, s2, 0x800081791; GFX6-NEXT:    v_mul_lo_u32 v4, v2, v31792; GFX6-NEXT:    s_or_b32 s8, s8, s91793; GFX6-NEXT:    v_alignbit_b32 v0, s1, v0, 241794; GFX6-NEXT:    s_lshr_b32 s1, s2, 161795; GFX6-NEXT:    s_and_b32 s9, s2, 0xff1796; GFX6-NEXT:    s_lshl_b32 s10, s10, 81797; GFX6-NEXT:    s_lshr_b32 s6, s0, 161798; GFX6-NEXT:    s_and_b32 s0, s7, 0xff1799; GFX6-NEXT:    s_lshr_b32 s7, s3, 81800; GFX6-NEXT:    s_or_b32 s9, s9, s101801; GFX6-NEXT:    s_and_b32 s1, s1, 0xff1802; GFX6-NEXT:    s_and_b32 s3, s3, 0xff1803; GFX6-NEXT:    v_mov_b32_e32 v1, s21804; GFX6-NEXT:    s_and_b32 s9, 0xffff, s91805; GFX6-NEXT:    s_lshl_b32 s1, s1, 161806; GFX6-NEXT:    v_alignbit_b32 v1, s3, v1, 241807; GFX6-NEXT:    s_and_b32 s2, s7, 0xff1808; GFX6-NEXT:    s_or_b32 s1, s9, s11809; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v11810; GFX6-NEXT:    s_lshl_b32 s2, s2, 161811; GFX6-NEXT:    s_bfe_u32 s9, s4, 0x800081812; GFX6-NEXT:    v_mul_hi_u32 v4, v2, v41813; GFX6-NEXT:    v_or_b32_e32 v1, s2, v11814; GFX6-NEXT:    s_lshr_b32 s2, s4, 161815; GFX6-NEXT:    s_and_b32 s7, s4, 0xff1816; GFX6-NEXT:    s_lshl_b32 s9, s9, 81817; GFX6-NEXT:    s_or_b32 s7, s7, s91818; GFX6-NEXT:    s_and_b32 s2, s2, 0xff1819; GFX6-NEXT:    s_and_b32 s7, 0xffff, s71820; GFX6-NEXT:    s_lshl_b32 s2, s2, 161821; GFX6-NEXT:    s_or_b32 s2, s7, s21822; GFX6-NEXT:    v_add_i32_e32 v2, vcc, v2, v41823; GFX6-NEXT:    v_mul_hi_u32 v4, s2, v21824; GFX6-NEXT:    s_lshr_b32 s3, s5, 81825; GFX6-NEXT:    s_and_b32 s5, s5, 0xff1826; GFX6-NEXT:    v_mov_b32_e32 v5, s41827; GFX6-NEXT:    v_alignbit_b32 v5, s5, v5, 241828; GFX6-NEXT:    s_and_b32 s3, s3, 0xff1829; GFX6-NEXT:    v_and_b32_e32 v5, 0xffff, v51830; GFX6-NEXT:    v_mul_lo_u32 v4, v4, 241831; GFX6-NEXT:    s_lshl_b32 s3, s3, 161832; GFX6-NEXT:    v_or_b32_e32 v5, s3, v51833; GFX6-NEXT:    v_mul_hi_u32 v2, v5, v21834; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, s2, v41835; GFX6-NEXT:    v_add_i32_e32 v6, vcc, v4, v31836; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v41837; GFX6-NEXT:    v_mul_lo_u32 v2, v2, 241838; GFX6-NEXT:    v_cndmask_b32_e32 v4, v4, v6, vcc1839; GFX6-NEXT:    v_add_i32_e32 v6, vcc, v4, v31840; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v41841; GFX6-NEXT:    v_cndmask_b32_e32 v4, v4, v6, vcc1842; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, v5, v21843; GFX6-NEXT:    v_sub_i32_e32 v6, vcc, 23, v41844; GFX6-NEXT:    v_add_i32_e32 v5, vcc, v2, v31845; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21846; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v5, vcc1847; GFX6-NEXT:    s_and_b32 s6, s6, 0xff1848; GFX6-NEXT:    s_and_b32 s8, 0xffff, s81849; GFX6-NEXT:    v_add_i32_e32 v3, vcc, v2, v31850; GFX6-NEXT:    s_lshl_b32 s2, s6, 171851; GFX6-NEXT:    s_lshl_b32 s3, s8, 11852; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21853; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v01854; GFX6-NEXT:    s_or_b32 s2, s2, s31855; GFX6-NEXT:    v_and_b32_e32 v6, 0xffffff, v61856; GFX6-NEXT:    v_and_b32_e32 v4, 0xffffff, v41857; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1858; GFX6-NEXT:    v_lshl_b32_e32 v6, s2, v61859; GFX6-NEXT:    v_lshr_b32_e32 v4, s1, v41860; GFX6-NEXT:    v_sub_i32_e32 v3, vcc, 23, v21861; GFX6-NEXT:    s_lshl_b32 s0, s0, 171862; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v01863; GFX6-NEXT:    v_or_b32_e32 v4, v6, v41864; GFX6-NEXT:    v_or_b32_e32 v0, s0, v01865; GFX6-NEXT:    v_and_b32_e32 v3, 0xffffff, v31866; GFX6-NEXT:    v_and_b32_e32 v2, 0xffffff, v21867; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v3, v01868; GFX6-NEXT:    v_lshrrev_b32_e32 v1, v2, v11869; GFX6-NEXT:    v_bfe_u32 v2, v4, 8, 81870; GFX6-NEXT:    v_or_b32_e32 v0, v0, v11871; GFX6-NEXT:    v_and_b32_e32 v1, 0xff, v41872; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 8, v21873; GFX6-NEXT:    v_or_b32_e32 v1, v1, v21874; GFX6-NEXT:    v_bfe_u32 v2, v4, 16, 81875; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 16, v21876; GFX6-NEXT:    v_or_b32_e32 v1, v1, v21877; GFX6-NEXT:    v_and_b32_e32 v2, 0xff, v01878; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 24, v21879; GFX6-NEXT:    v_or_b32_e32 v1, v1, v21880; GFX6-NEXT:    v_bfe_u32 v2, v0, 8, 81881; GFX6-NEXT:    v_bfe_u32 v0, v0, 16, 81882; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 8, v01883; GFX6-NEXT:    v_or_b32_e32 v0, v2, v01884; GFX6-NEXT:    v_readfirstlane_b32 s0, v11885; GFX6-NEXT:    v_readfirstlane_b32 s1, v01886; GFX6-NEXT:    ; return to shader part epilog1887;1888; GFX8-LABEL: s_fshr_v2i24:1889; GFX8:       ; %bb.0:1890; GFX8-NEXT:    v_cvt_f32_ubyte0_e32 v0, 241891; GFX8-NEXT:    v_rcp_iflag_f32_e32 v0, v01892; GFX8-NEXT:    s_lshr_b32 s9, s1, 81893; GFX8-NEXT:    s_and_b32 s1, s1, 0xff1894; GFX8-NEXT:    s_lshr_b32 s6, s0, 81895; GFX8-NEXT:    s_lshr_b32 s8, s0, 241896; GFX8-NEXT:    s_lshl_b32 s1, s1, 81897; GFX8-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v01898; GFX8-NEXT:    s_and_b32 s6, s6, 0xff1899; GFX8-NEXT:    s_or_b32 s1, s8, s11900; GFX8-NEXT:    s_lshr_b32 s8, s2, 81901; GFX8-NEXT:    v_cvt_u32_f32_e32 v0, v01902; GFX8-NEXT:    s_lshr_b32 s7, s0, 161903; GFX8-NEXT:    s_and_b32 s0, s0, 0xff1904; GFX8-NEXT:    s_lshl_b32 s6, s6, 81905; GFX8-NEXT:    s_and_b32 s8, s8, 0xff1906; GFX8-NEXT:    s_or_b32 s0, s0, s61907; GFX8-NEXT:    s_and_b32 s6, s7, 0xff1908; GFX8-NEXT:    s_and_b32 s7, s9, 0xff1909; GFX8-NEXT:    s_lshr_b32 s9, s2, 161910; GFX8-NEXT:    s_lshr_b32 s10, s2, 241911; GFX8-NEXT:    s_and_b32 s2, s2, 0xff1912; GFX8-NEXT:    s_lshl_b32 s8, s8, 81913; GFX8-NEXT:    s_or_b32 s2, s2, s81914; GFX8-NEXT:    s_and_b32 s8, s9, 0xff1915; GFX8-NEXT:    v_not_b32_e32 v1, 231916; GFX8-NEXT:    s_lshr_b32 s11, s3, 81917; GFX8-NEXT:    s_lshl_b32 s8, s8, 161918; GFX8-NEXT:    s_and_b32 s3, s3, 0xff1919; GFX8-NEXT:    v_mul_lo_u32 v2, v0, v11920; GFX8-NEXT:    s_or_b32 s2, s2, s81921; GFX8-NEXT:    s_lshl_b32 s3, s3, 81922; GFX8-NEXT:    s_and_b32 s8, s11, 0xff1923; GFX8-NEXT:    s_or_b32 s3, s10, s31924; GFX8-NEXT:    s_lshl_b32 s8, s8, 161925; GFX8-NEXT:    s_or_b32 s3, s3, s81926; GFX8-NEXT:    s_lshr_b32 s8, s4, 81927; GFX8-NEXT:    s_and_b32 s8, s8, 0xff1928; GFX8-NEXT:    v_mul_hi_u32 v2, v0, v21929; GFX8-NEXT:    s_lshr_b32 s9, s4, 161930; GFX8-NEXT:    s_lshr_b32 s10, s4, 241931; GFX8-NEXT:    s_and_b32 s4, s4, 0xff1932; GFX8-NEXT:    s_lshl_b32 s8, s8, 81933; GFX8-NEXT:    s_or_b32 s4, s4, s81934; GFX8-NEXT:    s_and_b32 s8, s9, 0xff1935; GFX8-NEXT:    s_lshl_b32 s8, s8, 161936; GFX8-NEXT:    s_or_b32 s4, s4, s81937; GFX8-NEXT:    v_add_u32_e32 v0, vcc, v0, v21938; GFX8-NEXT:    v_mul_hi_u32 v2, s4, v01939; GFX8-NEXT:    s_lshr_b32 s11, s5, 81940; GFX8-NEXT:    s_and_b32 s5, s5, 0xff1941; GFX8-NEXT:    s_lshl_b32 s5, s5, 81942; GFX8-NEXT:    v_mul_lo_u32 v2, v2, 241943; GFX8-NEXT:    s_and_b32 s8, s11, 0xff1944; GFX8-NEXT:    s_or_b32 s5, s10, s51945; GFX8-NEXT:    s_lshl_b32 s8, s8, 161946; GFX8-NEXT:    s_or_b32 s5, s5, s81947; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, s4, v21948; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v2, v11949; GFX8-NEXT:    v_mul_hi_u32 v0, s5, v01950; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21951; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1952; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v2, v11953; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v21954; GFX8-NEXT:    v_mul_lo_u32 v0, v0, 241955; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc1956; GFX8-NEXT:    v_sub_u32_e32 v3, vcc, 23, v21957; GFX8-NEXT:    s_lshl_b32 s4, s6, 171958; GFX8-NEXT:    s_lshl_b32 s0, s0, 11959; GFX8-NEXT:    s_or_b32 s0, s4, s01960; GFX8-NEXT:    v_and_b32_e32 v3, 0xffffff, v31961; GFX8-NEXT:    v_and_b32_e32 v2, 0xffffff, v21962; GFX8-NEXT:    v_lshlrev_b32_e64 v3, v3, s01963; GFX8-NEXT:    v_lshrrev_b32_e64 v2, v2, s21964; GFX8-NEXT:    v_sub_u32_e32 v0, vcc, s5, v01965; GFX8-NEXT:    v_or_b32_e32 v2, v3, v21966; GFX8-NEXT:    v_add_u32_e32 v3, vcc, v0, v11967; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v01968; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc1969; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v0, v11970; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v01971; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc1972; GFX8-NEXT:    v_sub_u32_e32 v1, vcc, 23, v01973; GFX8-NEXT:    s_lshl_b32 s0, s7, 171974; GFX8-NEXT:    s_lshl_b32 s1, s1, 11975; GFX8-NEXT:    s_or_b32 s0, s0, s11976; GFX8-NEXT:    v_and_b32_e32 v1, 0xffffff, v11977; GFX8-NEXT:    v_and_b32_e32 v0, 0xffffff, v01978; GFX8-NEXT:    v_lshlrev_b32_e64 v1, v1, s01979; GFX8-NEXT:    v_lshrrev_b32_e64 v0, v0, s31980; GFX8-NEXT:    v_or_b32_e32 v0, v1, v01981; GFX8-NEXT:    v_mov_b32_e32 v1, 81982; GFX8-NEXT:    v_lshlrev_b32_sdwa v3, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_11983; GFX8-NEXT:    v_mov_b32_e32 v4, 161984; GFX8-NEXT:    v_or_b32_sdwa v3, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD1985; GFX8-NEXT:    v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_21986; GFX8-NEXT:    v_or_b32_e32 v2, v3, v21987; GFX8-NEXT:    v_and_b32_e32 v3, 0xff, v01988; GFX8-NEXT:    v_lshlrev_b32_e32 v3, 24, v31989; GFX8-NEXT:    v_lshlrev_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_21990; GFX8-NEXT:    v_or_b32_e32 v2, v2, v31991; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD1992; GFX8-NEXT:    v_readfirstlane_b32 s0, v21993; GFX8-NEXT:    v_readfirstlane_b32 s1, v01994; GFX8-NEXT:    ; return to shader part epilog1995;1996; GFX9-LABEL: s_fshr_v2i24:1997; GFX9:       ; %bb.0:1998; GFX9-NEXT:    v_cvt_f32_ubyte0_e32 v0, 241999; GFX9-NEXT:    v_rcp_iflag_f32_e32 v0, v02000; GFX9-NEXT:    s_lshr_b32 s9, s1, 82001; GFX9-NEXT:    s_and_b32 s1, s1, 0xff2002; GFX9-NEXT:    s_lshr_b32 s6, s0, 82003; GFX9-NEXT:    s_lshr_b32 s8, s0, 242004; GFX9-NEXT:    s_lshl_b32 s1, s1, 82005; GFX9-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v02006; GFX9-NEXT:    s_and_b32 s6, s6, 0xff2007; GFX9-NEXT:    s_or_b32 s1, s8, s12008; GFX9-NEXT:    s_lshr_b32 s8, s2, 82009; GFX9-NEXT:    v_cvt_u32_f32_e32 v0, v02010; GFX9-NEXT:    s_lshr_b32 s7, s0, 162011; GFX9-NEXT:    s_and_b32 s0, s0, 0xff2012; GFX9-NEXT:    s_lshl_b32 s6, s6, 82013; GFX9-NEXT:    s_and_b32 s8, s8, 0xff2014; GFX9-NEXT:    s_or_b32 s0, s0, s62015; GFX9-NEXT:    s_and_b32 s6, s7, 0xff2016; GFX9-NEXT:    s_and_b32 s7, s9, 0xff2017; GFX9-NEXT:    s_lshr_b32 s9, s2, 162018; GFX9-NEXT:    s_lshr_b32 s10, s2, 242019; GFX9-NEXT:    s_and_b32 s2, s2, 0xff2020; GFX9-NEXT:    s_lshl_b32 s8, s8, 82021; GFX9-NEXT:    s_or_b32 s2, s2, s82022; GFX9-NEXT:    s_and_b32 s8, s9, 0xff2023; GFX9-NEXT:    v_not_b32_e32 v1, 232024; GFX9-NEXT:    s_lshr_b32 s11, s3, 82025; GFX9-NEXT:    s_lshl_b32 s8, s8, 162026; GFX9-NEXT:    s_and_b32 s3, s3, 0xff2027; GFX9-NEXT:    v_mul_lo_u32 v1, v0, v12028; GFX9-NEXT:    s_or_b32 s2, s2, s82029; GFX9-NEXT:    s_lshl_b32 s3, s3, 82030; GFX9-NEXT:    s_and_b32 s8, s11, 0xff2031; GFX9-NEXT:    s_or_b32 s3, s10, s32032; GFX9-NEXT:    s_lshl_b32 s8, s8, 162033; GFX9-NEXT:    s_or_b32 s3, s3, s82034; GFX9-NEXT:    s_lshr_b32 s8, s4, 82035; GFX9-NEXT:    s_and_b32 s8, s8, 0xff2036; GFX9-NEXT:    v_mul_hi_u32 v1, v0, v12037; GFX9-NEXT:    s_lshr_b32 s9, s4, 162038; GFX9-NEXT:    s_lshr_b32 s10, s4, 242039; GFX9-NEXT:    s_and_b32 s4, s4, 0xff2040; GFX9-NEXT:    s_lshl_b32 s8, s8, 82041; GFX9-NEXT:    s_or_b32 s4, s4, s82042; GFX9-NEXT:    s_and_b32 s8, s9, 0xff2043; GFX9-NEXT:    s_lshl_b32 s8, s8, 162044; GFX9-NEXT:    s_or_b32 s4, s4, s82045; GFX9-NEXT:    v_add_u32_e32 v0, v0, v12046; GFX9-NEXT:    v_mul_hi_u32 v1, s4, v02047; GFX9-NEXT:    s_lshr_b32 s11, s5, 82048; GFX9-NEXT:    s_and_b32 s5, s5, 0xff2049; GFX9-NEXT:    s_lshl_b32 s5, s5, 82050; GFX9-NEXT:    s_and_b32 s8, s11, 0xff2051; GFX9-NEXT:    s_or_b32 s5, s10, s52052; GFX9-NEXT:    v_mul_lo_u32 v1, v1, 242053; GFX9-NEXT:    s_lshl_b32 s8, s8, 162054; GFX9-NEXT:    s_or_b32 s5, s5, s82055; GFX9-NEXT:    v_mul_hi_u32 v0, s5, v02056; GFX9-NEXT:    v_sub_u32_e32 v1, s4, v12057; GFX9-NEXT:    v_add_u32_e32 v2, 0xffffffe8, v12058; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v12059; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc2060; GFX9-NEXT:    v_mul_lo_u32 v0, v0, 242061; GFX9-NEXT:    v_add_u32_e32 v2, 0xffffffe8, v12062; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v12063; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc2064; GFX9-NEXT:    v_sub_u32_e32 v2, 23, v12065; GFX9-NEXT:    s_lshl_b32 s4, s6, 172066; GFX9-NEXT:    s_lshl_b32 s0, s0, 12067; GFX9-NEXT:    v_and_b32_e32 v1, 0xffffff, v12068; GFX9-NEXT:    s_or_b32 s0, s4, s02069; GFX9-NEXT:    v_and_b32_e32 v2, 0xffffff, v22070; GFX9-NEXT:    v_lshrrev_b32_e64 v1, v1, s22071; GFX9-NEXT:    v_sub_u32_e32 v0, s5, v02072; GFX9-NEXT:    v_lshl_or_b32 v1, s0, v2, v12073; GFX9-NEXT:    v_add_u32_e32 v2, 0xffffffe8, v02074; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v02075; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc2076; GFX9-NEXT:    v_add_u32_e32 v2, 0xffffffe8, v02077; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v02078; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc2079; GFX9-NEXT:    v_sub_u32_e32 v2, 23, v02080; GFX9-NEXT:    s_lshl_b32 s0, s7, 172081; GFX9-NEXT:    s_lshl_b32 s1, s1, 12082; GFX9-NEXT:    v_and_b32_e32 v0, 0xffffff, v02083; GFX9-NEXT:    s_or_b32 s0, s0, s12084; GFX9-NEXT:    v_and_b32_e32 v2, 0xffffff, v22085; GFX9-NEXT:    v_lshrrev_b32_e64 v0, v0, s32086; GFX9-NEXT:    v_mov_b32_e32 v3, 82087; GFX9-NEXT:    v_lshl_or_b32 v0, s0, v2, v02088; GFX9-NEXT:    v_mov_b32_e32 v2, 0xff2089; GFX9-NEXT:    v_lshlrev_b32_sdwa v3, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_12090; GFX9-NEXT:    v_and_or_b32 v2, v1, v2, v32091; GFX9-NEXT:    v_mov_b32_e32 v3, 162092; GFX9-NEXT:    v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_22093; GFX9-NEXT:    v_and_b32_e32 v3, 0xff, v02094; GFX9-NEXT:    v_lshlrev_b32_e32 v3, 24, v32095; GFX9-NEXT:    v_or3_b32 v1, v2, v1, v32096; GFX9-NEXT:    v_bfe_u32 v2, v0, 8, 82097; GFX9-NEXT:    v_bfe_u32 v0, v0, 16, 82098; GFX9-NEXT:    v_lshl_or_b32 v0, v0, 8, v22099; GFX9-NEXT:    v_readfirstlane_b32 s0, v12100; GFX9-NEXT:    v_readfirstlane_b32 s1, v02101; GFX9-NEXT:    ; return to shader part epilog2102;2103; GFX10-LABEL: s_fshr_v2i24:2104; GFX10:       ; %bb.0:2105; GFX10-NEXT:    v_cvt_f32_ubyte0_e32 v0, 242106; GFX10-NEXT:    s_lshr_b32 s13, s4, 82107; GFX10-NEXT:    s_lshr_b32 s14, s4, 162108; GFX10-NEXT:    s_and_b32 s13, s13, 0xff2109; GFX10-NEXT:    s_lshr_b32 s15, s4, 242110; GFX10-NEXT:    v_rcp_iflag_f32_e32 v0, v02111; GFX10-NEXT:    s_and_b32 s4, s4, 0xff2112; GFX10-NEXT:    s_and_b32 s14, s14, 0xff2113; GFX10-NEXT:    s_lshl_b32 s13, s13, 82114; GFX10-NEXT:    s_lshl_b32 s14, s14, 162115; GFX10-NEXT:    s_or_b32 s4, s4, s132116; GFX10-NEXT:    s_lshr_b32 s16, s5, 82117; GFX10-NEXT:    s_and_b32 s5, s5, 0xff2118; GFX10-NEXT:    s_or_b32 s4, s4, s142119; GFX10-NEXT:    s_lshl_b32 s5, s5, 82120; GFX10-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v02121; GFX10-NEXT:    s_and_b32 s16, s16, 0xff2122; GFX10-NEXT:    s_or_b32 s5, s15, s52123; GFX10-NEXT:    s_lshl_b32 s13, s16, 162124; GFX10-NEXT:    s_lshr_b32 s10, s2, 82125; GFX10-NEXT:    v_cvt_u32_f32_e32 v0, v02126; GFX10-NEXT:    s_or_b32 s5, s5, s132127; GFX10-NEXT:    s_lshr_b32 s9, s1, 82128; GFX10-NEXT:    s_and_b32 s1, s1, 0xff2129; GFX10-NEXT:    s_lshr_b32 s11, s2, 162130; GFX10-NEXT:    v_mul_lo_u32 v2, 0xffffffe8, v02131; GFX10-NEXT:    s_lshr_b32 s13, s3, 82132; GFX10-NEXT:    s_and_b32 s3, s3, 0xff2133; GFX10-NEXT:    s_and_b32 s10, s10, 0xff2134; GFX10-NEXT:    s_lshr_b32 s6, s0, 82135; GFX10-NEXT:    s_lshr_b32 s8, s0, 242136; GFX10-NEXT:    s_lshr_b32 s12, s2, 242137; GFX10-NEXT:    s_and_b32 s2, s2, 0xff2138; GFX10-NEXT:    v_mul_hi_u32 v2, v0, v22139; GFX10-NEXT:    s_lshl_b32 s1, s1, 82140; GFX10-NEXT:    s_and_b32 s11, s11, 0xff2141; GFX10-NEXT:    s_lshl_b32 s3, s3, 82142; GFX10-NEXT:    s_and_b32 s13, s13, 0xff2143; GFX10-NEXT:    s_and_b32 s6, s6, 0xff2144; GFX10-NEXT:    s_or_b32 s1, s8, s12145; GFX10-NEXT:    s_or_b32 s3, s12, s32146; GFX10-NEXT:    v_add_nc_u32_e32 v0, v0, v22147; GFX10-NEXT:    s_lshl_b32 s8, s13, 162148; GFX10-NEXT:    s_lshr_b32 s7, s0, 162149; GFX10-NEXT:    s_and_b32 s0, s0, 0xff2150; GFX10-NEXT:    s_lshl_b32 s6, s6, 82151; GFX10-NEXT:    v_mul_hi_u32 v2, s4, v02152; GFX10-NEXT:    v_mul_hi_u32 v0, s5, v02153; GFX10-NEXT:    s_or_b32 s3, s3, s82154; GFX10-NEXT:    s_and_b32 s7, s7, 0xff2155; GFX10-NEXT:    s_and_b32 s9, s9, 0xff2156; GFX10-NEXT:    s_or_b32 s0, s0, s62157; GFX10-NEXT:    s_lshl_b32 s7, s7, 172158; GFX10-NEXT:    s_lshl_b32 s9, s9, 172159; GFX10-NEXT:    v_mul_lo_u32 v2, v2, 242160; GFX10-NEXT:    v_mul_lo_u32 v0, v0, 242161; GFX10-NEXT:    s_lshl_b32 s0, s0, 12162; GFX10-NEXT:    s_lshl_b32 s1, s1, 12163; GFX10-NEXT:    s_or_b32 s0, s7, s02164; GFX10-NEXT:    s_or_b32 s1, s9, s12165; GFX10-NEXT:    v_mov_b32_e32 v1, 82166; GFX10-NEXT:    v_sub_nc_u32_e32 v2, s4, v22167; GFX10-NEXT:    v_sub_nc_u32_e32 v0, s5, v02168; GFX10-NEXT:    s_lshl_b32 s4, s10, 82169; GFX10-NEXT:    s_lshl_b32 s5, s11, 162170; GFX10-NEXT:    s_or_b32 s2, s2, s42171; GFX10-NEXT:    v_add_nc_u32_e32 v3, 0xffffffe8, v22172; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v22173; GFX10-NEXT:    v_add_nc_u32_e32 v4, 0xffffffe8, v02174; GFX10-NEXT:    s_or_b32 s2, s2, s52175; GFX10-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo2176; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v02177; GFX10-NEXT:    v_add_nc_u32_e32 v3, 0xffffffe8, v22178; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc_lo2179; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v22180; GFX10-NEXT:    v_add_nc_u32_e32 v4, 0xffffffe8, v02181; GFX10-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc_lo2182; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v02183; GFX10-NEXT:    v_sub_nc_u32_e32 v3, 23, v22184; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc_lo2185; GFX10-NEXT:    v_and_b32_e32 v2, 0xffffff, v22186; GFX10-NEXT:    v_and_b32_e32 v3, 0xffffff, v32187; GFX10-NEXT:    v_sub_nc_u32_e32 v4, 23, v02188; GFX10-NEXT:    v_and_b32_e32 v0, 0xffffff, v02189; GFX10-NEXT:    v_lshrrev_b32_e64 v2, v2, s22190; GFX10-NEXT:    v_and_b32_e32 v4, 0xffffff, v42191; GFX10-NEXT:    v_lshrrev_b32_e64 v0, v0, s32192; GFX10-NEXT:    v_lshl_or_b32 v2, s0, v3, v22193; GFX10-NEXT:    v_mov_b32_e32 v3, 162194; GFX10-NEXT:    v_lshl_or_b32 v0, s1, v4, v02195; GFX10-NEXT:    v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_12196; GFX10-NEXT:    v_lshlrev_b32_sdwa v3, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_22197; GFX10-NEXT:    v_and_b32_e32 v4, 0xff, v02198; GFX10-NEXT:    v_bfe_u32 v5, v0, 8, 82199; GFX10-NEXT:    v_and_or_b32 v1, 0xff, v2, v12200; GFX10-NEXT:    v_bfe_u32 v0, v0, 16, 82201; GFX10-NEXT:    v_lshlrev_b32_e32 v2, 24, v42202; GFX10-NEXT:    v_lshl_or_b32 v0, v0, 8, v52203; GFX10-NEXT:    v_or3_b32 v1, v1, v3, v22204; GFX10-NEXT:    v_readfirstlane_b32 s1, v02205; GFX10-NEXT:    v_readfirstlane_b32 s0, v12206; GFX10-NEXT:    ; return to shader part epilog2207;2208; GFX11-LABEL: s_fshr_v2i24:2209; GFX11:       ; %bb.0:2210; GFX11-NEXT:    v_cvt_f32_ubyte0_e32 v0, 242211; GFX11-NEXT:    s_lshr_b32 s14, s4, 82212; GFX11-NEXT:    s_lshr_b32 s15, s4, 162213; GFX11-NEXT:    s_and_b32 s14, s14, 0xff2214; GFX11-NEXT:    s_lshr_b32 s16, s4, 242215; GFX11-NEXT:    v_rcp_iflag_f32_e32 v0, v02216; GFX11-NEXT:    s_and_b32 s4, s4, 0xff2217; GFX11-NEXT:    s_and_b32 s15, s15, 0xff2218; GFX11-NEXT:    s_lshl_b32 s14, s14, 82219; GFX11-NEXT:    s_lshl_b32 s15, s15, 162220; GFX11-NEXT:    s_or_b32 s4, s4, s142221; GFX11-NEXT:    s_lshr_b32 s17, s5, 82222; GFX11-NEXT:    s_and_b32 s5, s5, 0xff2223; GFX11-NEXT:    s_or_b32 s4, s4, s152224; GFX11-NEXT:    s_lshl_b32 s5, s5, 82225; GFX11-NEXT:    s_waitcnt_depctr depctr_va_vdst(0)2226; GFX11-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v02227; GFX11-NEXT:    s_and_b32 s17, s17, 0xff2228; GFX11-NEXT:    s_or_b32 s5, s16, s52229; GFX11-NEXT:    s_lshl_b32 s14, s17, 162230; GFX11-NEXT:    s_lshr_b32 s10, s2, 82231; GFX11-NEXT:    v_cvt_u32_f32_e32 v0, v02232; GFX11-NEXT:    s_or_b32 s5, s5, s142233; GFX11-NEXT:    s_lshr_b32 s11, s2, 162234; GFX11-NEXT:    s_and_b32 s10, s10, 0xff2235; GFX11-NEXT:    s_lshr_b32 s6, s0, 82236; GFX11-NEXT:    v_mul_lo_u32 v1, 0xffffffe8, v02237; GFX11-NEXT:    s_lshr_b32 s12, s2, 242238; GFX11-NEXT:    s_and_b32 s2, s2, 0xff2239; GFX11-NEXT:    s_and_b32 s11, s11, 0xff2240; GFX11-NEXT:    s_and_b32 s6, s6, 0xff2241; GFX11-NEXT:    s_lshr_b32 s7, s0, 162242; GFX11-NEXT:    s_lshr_b32 s8, s0, 242243; GFX11-NEXT:    s_lshr_b32 s9, s1, 82244; GFX11-NEXT:    v_mul_hi_u32 v1, v0, v12245; GFX11-NEXT:    s_and_b32 s0, s0, 0xff2246; GFX11-NEXT:    s_and_b32 s1, s1, 0xff2247; GFX11-NEXT:    s_lshr_b32 s13, s3, 82248; GFX11-NEXT:    s_and_b32 s3, s3, 0xff2249; GFX11-NEXT:    s_lshl_b32 s6, s6, 82250; GFX11-NEXT:    s_and_b32 s7, s7, 0xff2251; GFX11-NEXT:    s_lshl_b32 s1, s1, 82252; GFX11-NEXT:    v_add_nc_u32_e32 v0, v0, v12253; GFX11-NEXT:    s_lshl_b32 s3, s3, 82254; GFX11-NEXT:    s_and_b32 s13, s13, 0xff2255; GFX11-NEXT:    s_or_b32 s0, s0, s62256; GFX11-NEXT:    s_or_b32 s1, s8, s12257; GFX11-NEXT:    v_mul_hi_u32 v1, s4, v02258; GFX11-NEXT:    v_mul_hi_u32 v0, s5, v02259; GFX11-NEXT:    s_or_b32 s3, s12, s32260; GFX11-NEXT:    s_lshl_b32 s8, s13, 162261; GFX11-NEXT:    s_lshl_b32 s7, s7, 172262; GFX11-NEXT:    s_lshl_b32 s0, s0, 12263; GFX11-NEXT:    s_or_b32 s3, s3, s82264; GFX11-NEXT:    s_or_b32 s0, s7, s02265; GFX11-NEXT:    v_mul_lo_u32 v1, v1, 242266; GFX11-NEXT:    v_mul_lo_u32 v0, v0, 242267; GFX11-NEXT:    s_and_b32 s9, s9, 0xff2268; GFX11-NEXT:    s_lshl_b32 s1, s1, 12269; GFX11-NEXT:    s_lshl_b32 s9, s9, 172270; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2271; GFX11-NEXT:    v_sub_nc_u32_e32 v1, s4, v12272; GFX11-NEXT:    v_sub_nc_u32_e32 v0, s5, v02273; GFX11-NEXT:    s_lshl_b32 s4, s10, 82274; GFX11-NEXT:    s_lshl_b32 s5, s11, 162275; GFX11-NEXT:    s_or_b32 s2, s2, s42276; GFX11-NEXT:    v_add_nc_u32_e32 v2, 0xffffffe8, v12277; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v12278; GFX11-NEXT:    v_add_nc_u32_e32 v3, 0xffffffe8, v02279; GFX11-NEXT:    s_or_b32 s2, s2, s52280; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2281; GFX11-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc_lo2282; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v02283; GFX11-NEXT:    v_add_nc_u32_e32 v2, 0xffffffe8, v12284; GFX11-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc_lo2285; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v12286; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2287; GFX11-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc_lo2288; GFX11-NEXT:    v_sub_nc_u32_e32 v2, 23, v12289; GFX11-NEXT:    v_and_b32_e32 v1, 0xffffff, v12290; GFX11-NEXT:    v_add_nc_u32_e32 v3, 0xffffffe8, v02291; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v02292; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2293; GFX11-NEXT:    v_and_b32_e32 v2, 0xffffff, v22294; GFX11-NEXT:    v_lshrrev_b32_e64 v1, v1, s22295; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)2296; GFX11-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc_lo2297; GFX11-NEXT:    v_lshl_or_b32 v1, s0, v2, v12298; GFX11-NEXT:    s_or_b32 s0, s9, s12299; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)2300; GFX11-NEXT:    v_sub_nc_u32_e32 v3, 23, v02301; GFX11-NEXT:    v_and_b32_e32 v0, 0xffffff, v02302; GFX11-NEXT:    v_bfe_u32 v2, v1, 8, 82303; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2304; GFX11-NEXT:    v_and_b32_e32 v3, 0xffffff, v32305; GFX11-NEXT:    v_lshrrev_b32_e64 v0, v0, s32306; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2307; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 8, v22308; GFX11-NEXT:    v_lshl_or_b32 v0, s0, v3, v02309; GFX11-NEXT:    v_bfe_u32 v3, v1, 16, 82310; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2311; GFX11-NEXT:    v_and_or_b32 v1, 0xff, v1, v22312; GFX11-NEXT:    v_and_b32_e32 v4, 0xff, v02313; GFX11-NEXT:    v_bfe_u32 v5, v0, 8, 82314; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)2315; GFX11-NEXT:    v_lshlrev_b32_e32 v3, 16, v32316; GFX11-NEXT:    v_bfe_u32 v0, v0, 16, 82317; GFX11-NEXT:    v_lshlrev_b32_e32 v4, 24, v42318; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2319; GFX11-NEXT:    v_lshl_or_b32 v0, v0, 8, v52320; GFX11-NEXT:    v_or3_b32 v1, v1, v3, v42321; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2322; GFX11-NEXT:    v_readfirstlane_b32 s1, v02323; GFX11-NEXT:    v_readfirstlane_b32 s0, v12324; GFX11-NEXT:    ; return to shader part epilog2325  %lhs = bitcast i48 %lhs.arg to <2 x i24>2326  %rhs = bitcast i48 %rhs.arg to <2 x i24>2327  %amt = bitcast i48 %amt.arg to <2 x i24>2328  %result = call <2 x i24> @llvm.fshr.v2i24(<2 x i24> %lhs, <2 x i24> %rhs, <2 x i24> %amt)2329  %cast.result = bitcast <2 x i24> %result to i482330  ret i48 %cast.result2331}2332 2333define <2 x i24> @v_fshr_v2i24(<2 x i24> %lhs, <2 x i24> %rhs, <2 x i24> %amt) {2334; GFX6-LABEL: v_fshr_v2i24:2335; GFX6:       ; %bb.0:2336; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2337; GFX6-NEXT:    v_cvt_f32_ubyte0_e32 v6, 242338; GFX6-NEXT:    v_rcp_iflag_f32_e32 v6, v62339; GFX6-NEXT:    v_not_b32_e32 v7, 232340; GFX6-NEXT:    v_and_b32_e32 v4, 0xffffff, v42341; GFX6-NEXT:    v_and_b32_e32 v5, 0xffffff, v52342; GFX6-NEXT:    v_mul_f32_e32 v6, 0x4f7ffffe, v62343; GFX6-NEXT:    v_cvt_u32_f32_e32 v6, v62344; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v02345; GFX6-NEXT:    v_and_b32_e32 v2, 0xffffff, v22346; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 1, v12347; GFX6-NEXT:    v_mul_lo_u32 v8, v6, v72348; GFX6-NEXT:    v_and_b32_e32 v3, 0xffffff, v32349; GFX6-NEXT:    v_mul_hi_u32 v8, v6, v82350; GFX6-NEXT:    v_add_i32_e32 v6, vcc, v6, v82351; GFX6-NEXT:    v_mul_hi_u32 v8, v4, v62352; GFX6-NEXT:    v_mul_hi_u32 v6, v5, v62353; GFX6-NEXT:    v_mul_lo_u32 v8, v8, 242354; GFX6-NEXT:    v_mul_lo_u32 v6, v6, 242355; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, v4, v82356; GFX6-NEXT:    v_add_i32_e32 v8, vcc, v4, v72357; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v42358; GFX6-NEXT:    v_cndmask_b32_e32 v4, v4, v8, vcc2359; GFX6-NEXT:    v_add_i32_e32 v8, vcc, v4, v72360; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v42361; GFX6-NEXT:    v_cndmask_b32_e32 v4, v4, v8, vcc2362; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, 23, v42363; GFX6-NEXT:    v_and_b32_e32 v8, 0xffffff, v82364; GFX6-NEXT:    v_and_b32_e32 v4, 0xffffff, v42365; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v8, v02366; GFX6-NEXT:    v_lshrrev_b32_e32 v2, v4, v22367; GFX6-NEXT:    v_or_b32_e32 v0, v0, v22368; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, v5, v62369; GFX6-NEXT:    v_add_i32_e32 v4, vcc, v2, v72370; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v22371; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc2372; GFX6-NEXT:    v_add_i32_e32 v4, vcc, 0xffffffe8, v22373; GFX6-NEXT:    v_cmp_le_u32_e32 vcc, 24, v22374; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc2375; GFX6-NEXT:    v_sub_i32_e32 v4, vcc, 23, v22376; GFX6-NEXT:    v_and_b32_e32 v4, 0xffffff, v42377; GFX6-NEXT:    v_and_b32_e32 v2, 0xffffff, v22378; GFX6-NEXT:    v_lshlrev_b32_e32 v1, v4, v12379; GFX6-NEXT:    v_lshrrev_b32_e32 v2, v2, v32380; GFX6-NEXT:    v_or_b32_e32 v1, v1, v22381; GFX6-NEXT:    s_setpc_b64 s[30:31]2382;2383; GFX8-LABEL: v_fshr_v2i24:2384; GFX8:       ; %bb.0:2385; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2386; GFX8-NEXT:    v_cvt_f32_ubyte0_e32 v6, 242387; GFX8-NEXT:    v_rcp_iflag_f32_e32 v6, v62388; GFX8-NEXT:    v_not_b32_e32 v7, 232389; GFX8-NEXT:    v_and_b32_e32 v4, 0xffffff, v42390; GFX8-NEXT:    v_and_b32_e32 v5, 0xffffff, v52391; GFX8-NEXT:    v_mul_f32_e32 v6, 0x4f7ffffe, v62392; GFX8-NEXT:    v_cvt_u32_f32_e32 v6, v62393; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 1, v02394; GFX8-NEXT:    v_and_b32_e32 v2, 0xffffff, v22395; GFX8-NEXT:    v_lshlrev_b32_e32 v1, 1, v12396; GFX8-NEXT:    v_mul_lo_u32 v8, v6, v72397; GFX8-NEXT:    v_and_b32_e32 v3, 0xffffff, v32398; GFX8-NEXT:    v_mul_hi_u32 v8, v6, v82399; GFX8-NEXT:    v_add_u32_e32 v6, vcc, v6, v82400; GFX8-NEXT:    v_mul_hi_u32 v8, v4, v62401; GFX8-NEXT:    v_mul_hi_u32 v6, v5, v62402; GFX8-NEXT:    v_mul_lo_u32 v8, v8, 242403; GFX8-NEXT:    v_mul_lo_u32 v6, v6, 242404; GFX8-NEXT:    v_sub_u32_e32 v4, vcc, v4, v82405; GFX8-NEXT:    v_add_u32_e32 v8, vcc, v4, v72406; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v42407; GFX8-NEXT:    v_cndmask_b32_e32 v4, v4, v8, vcc2408; GFX8-NEXT:    v_add_u32_e32 v8, vcc, v4, v72409; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v42410; GFX8-NEXT:    v_cndmask_b32_e32 v4, v4, v8, vcc2411; GFX8-NEXT:    v_sub_u32_e32 v8, vcc, 23, v42412; GFX8-NEXT:    v_and_b32_e32 v8, 0xffffff, v82413; GFX8-NEXT:    v_and_b32_e32 v4, 0xffffff, v42414; GFX8-NEXT:    v_lshlrev_b32_e32 v0, v8, v02415; GFX8-NEXT:    v_lshrrev_b32_e32 v2, v4, v22416; GFX8-NEXT:    v_or_b32_e32 v0, v0, v22417; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, v5, v62418; GFX8-NEXT:    v_add_u32_e32 v4, vcc, v2, v72419; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v22420; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc2421; GFX8-NEXT:    v_add_u32_e32 v4, vcc, 0xffffffe8, v22422; GFX8-NEXT:    v_cmp_le_u32_e32 vcc, 24, v22423; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc2424; GFX8-NEXT:    v_sub_u32_e32 v4, vcc, 23, v22425; GFX8-NEXT:    v_and_b32_e32 v4, 0xffffff, v42426; GFX8-NEXT:    v_and_b32_e32 v2, 0xffffff, v22427; GFX8-NEXT:    v_lshlrev_b32_e32 v1, v4, v12428; GFX8-NEXT:    v_lshrrev_b32_e32 v2, v2, v32429; GFX8-NEXT:    v_or_b32_e32 v1, v1, v22430; GFX8-NEXT:    s_setpc_b64 s[30:31]2431;2432; GFX9-LABEL: v_fshr_v2i24:2433; GFX9:       ; %bb.0:2434; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2435; GFX9-NEXT:    v_cvt_f32_ubyte0_e32 v6, 242436; GFX9-NEXT:    v_rcp_iflag_f32_e32 v6, v62437; GFX9-NEXT:    v_not_b32_e32 v7, 232438; GFX9-NEXT:    v_and_b32_e32 v4, 0xffffff, v42439; GFX9-NEXT:    v_and_b32_e32 v5, 0xffffff, v52440; GFX9-NEXT:    v_mul_f32_e32 v6, 0x4f7ffffe, v62441; GFX9-NEXT:    v_cvt_u32_f32_e32 v6, v62442; GFX9-NEXT:    v_and_b32_e32 v2, 0xffffff, v22443; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 1, v02444; GFX9-NEXT:    v_and_b32_e32 v3, 0xffffff, v32445; GFX9-NEXT:    v_mul_lo_u32 v7, v6, v72446; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 1, v12447; GFX9-NEXT:    v_mul_hi_u32 v7, v6, v72448; GFX9-NEXT:    v_add_u32_e32 v6, v6, v72449; GFX9-NEXT:    v_mul_hi_u32 v7, v4, v62450; GFX9-NEXT:    v_mul_hi_u32 v6, v5, v62451; GFX9-NEXT:    v_mul_lo_u32 v7, v7, 242452; GFX9-NEXT:    v_mul_lo_u32 v6, v6, 242453; GFX9-NEXT:    v_sub_u32_e32 v4, v4, v72454; GFX9-NEXT:    v_sub_u32_e32 v5, v5, v62455; GFX9-NEXT:    v_add_u32_e32 v6, 0xffffffe8, v42456; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v42457; GFX9-NEXT:    v_cndmask_b32_e32 v4, v4, v6, vcc2458; GFX9-NEXT:    v_add_u32_e32 v6, 0xffffffe8, v42459; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v42460; GFX9-NEXT:    v_cndmask_b32_e32 v4, v4, v6, vcc2461; GFX9-NEXT:    v_sub_u32_e32 v6, 23, v42462; GFX9-NEXT:    v_and_b32_e32 v4, 0xffffff, v42463; GFX9-NEXT:    v_and_b32_e32 v6, 0xffffff, v62464; GFX9-NEXT:    v_lshrrev_b32_e32 v2, v4, v22465; GFX9-NEXT:    v_lshl_or_b32 v0, v0, v6, v22466; GFX9-NEXT:    v_add_u32_e32 v2, 0xffffffe8, v52467; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v52468; GFX9-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc2469; GFX9-NEXT:    v_add_u32_e32 v4, 0xffffffe8, v22470; GFX9-NEXT:    v_cmp_le_u32_e32 vcc, 24, v22471; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc2472; GFX9-NEXT:    v_sub_u32_e32 v4, 23, v22473; GFX9-NEXT:    v_and_b32_e32 v2, 0xffffff, v22474; GFX9-NEXT:    v_and_b32_e32 v4, 0xffffff, v42475; GFX9-NEXT:    v_lshrrev_b32_e32 v2, v2, v32476; GFX9-NEXT:    v_lshl_or_b32 v1, v1, v4, v22477; GFX9-NEXT:    s_setpc_b64 s[30:31]2478;2479; GFX10-LABEL: v_fshr_v2i24:2480; GFX10:       ; %bb.0:2481; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2482; GFX10-NEXT:    v_cvt_f32_ubyte0_e32 v6, 242483; GFX10-NEXT:    v_and_b32_e32 v4, 0xffffff, v42484; GFX10-NEXT:    v_and_b32_e32 v5, 0xffffff, v52485; GFX10-NEXT:    v_and_b32_e32 v2, 0xffffff, v22486; GFX10-NEXT:    v_and_b32_e32 v3, 0xffffff, v32487; GFX10-NEXT:    v_rcp_iflag_f32_e32 v6, v62488; GFX10-NEXT:    v_lshlrev_b32_e32 v0, 1, v02489; GFX10-NEXT:    v_lshlrev_b32_e32 v1, 1, v12490; GFX10-NEXT:    v_mul_f32_e32 v6, 0x4f7ffffe, v62491; GFX10-NEXT:    v_cvt_u32_f32_e32 v6, v62492; GFX10-NEXT:    v_mul_lo_u32 v7, 0xffffffe8, v62493; GFX10-NEXT:    v_mul_hi_u32 v7, v6, v72494; GFX10-NEXT:    v_add_nc_u32_e32 v6, v6, v72495; GFX10-NEXT:    v_mul_hi_u32 v7, v4, v62496; GFX10-NEXT:    v_mul_hi_u32 v6, v5, v62497; GFX10-NEXT:    v_mul_lo_u32 v7, v7, 242498; GFX10-NEXT:    v_mul_lo_u32 v6, v6, 242499; GFX10-NEXT:    v_sub_nc_u32_e32 v4, v4, v72500; GFX10-NEXT:    v_sub_nc_u32_e32 v5, v5, v62501; GFX10-NEXT:    v_add_nc_u32_e32 v6, 0xffffffe8, v42502; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v42503; GFX10-NEXT:    v_add_nc_u32_e32 v7, 0xffffffe8, v52504; GFX10-NEXT:    v_cndmask_b32_e32 v4, v4, v6, vcc_lo2505; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v52506; GFX10-NEXT:    v_add_nc_u32_e32 v6, 0xffffffe8, v42507; GFX10-NEXT:    v_cndmask_b32_e32 v5, v5, v7, vcc_lo2508; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v42509; GFX10-NEXT:    v_add_nc_u32_e32 v7, 0xffffffe8, v52510; GFX10-NEXT:    v_cndmask_b32_e32 v4, v4, v6, vcc_lo2511; GFX10-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v52512; GFX10-NEXT:    v_sub_nc_u32_e32 v6, 23, v42513; GFX10-NEXT:    v_cndmask_b32_e32 v5, v5, v7, vcc_lo2514; GFX10-NEXT:    v_and_b32_e32 v4, 0xffffff, v42515; GFX10-NEXT:    v_and_b32_e32 v6, 0xffffff, v62516; GFX10-NEXT:    v_sub_nc_u32_e32 v7, 23, v52517; GFX10-NEXT:    v_and_b32_e32 v5, 0xffffff, v52518; GFX10-NEXT:    v_lshrrev_b32_e32 v2, v4, v22519; GFX10-NEXT:    v_and_b32_e32 v4, 0xffffff, v72520; GFX10-NEXT:    v_lshrrev_b32_e32 v3, v5, v32521; GFX10-NEXT:    v_lshl_or_b32 v0, v0, v6, v22522; GFX10-NEXT:    v_lshl_or_b32 v1, v1, v4, v32523; GFX10-NEXT:    s_setpc_b64 s[30:31]2524;2525; GFX11-LABEL: v_fshr_v2i24:2526; GFX11:       ; %bb.0:2527; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2528; GFX11-NEXT:    v_cvt_f32_ubyte0_e32 v6, 242529; GFX11-NEXT:    v_and_b32_e32 v4, 0xffffff, v42530; GFX11-NEXT:    v_and_b32_e32 v2, 0xffffff, v22531; GFX11-NEXT:    v_and_b32_e32 v3, 0xffffff, v32532; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 1, v02533; GFX11-NEXT:    v_rcp_iflag_f32_e32 v6, v62534; GFX11-NEXT:    s_waitcnt_depctr depctr_va_vdst(0)2535; GFX11-NEXT:    v_dual_mul_f32 v6, 0x4f7ffffe, v6 :: v_dual_lshlrev_b32 v1, 1, v12536; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2537; GFX11-NEXT:    v_cvt_u32_f32_e32 v6, v62538; GFX11-NEXT:    v_mul_lo_u32 v7, 0xffffffe8, v62539; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2540; GFX11-NEXT:    v_mul_hi_u32 v7, v6, v72541; GFX11-NEXT:    v_add_nc_u32_e32 v6, v6, v72542; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2543; GFX11-NEXT:    v_mul_hi_u32 v7, v4, v62544; GFX11-NEXT:    v_mul_lo_u32 v7, v7, 242545; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2546; GFX11-NEXT:    v_sub_nc_u32_e32 v4, v4, v72547; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v42548; GFX11-NEXT:    v_and_b32_e32 v5, 0xffffff, v52549; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2550; GFX11-NEXT:    v_mul_hi_u32 v6, v5, v62551; GFX11-NEXT:    v_mul_lo_u32 v6, v6, 242552; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2553; GFX11-NEXT:    v_sub_nc_u32_e32 v5, v5, v62554; GFX11-NEXT:    v_add_nc_u32_e32 v6, 0xffffffe8, v42555; GFX11-NEXT:    v_cndmask_b32_e32 v4, v4, v6, vcc_lo2556; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2557; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v52558; GFX11-NEXT:    v_add_nc_u32_e32 v6, 0xffffffe8, v42559; GFX11-NEXT:    v_add_nc_u32_e32 v7, 0xffffffe8, v52560; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2561; GFX11-NEXT:    v_cndmask_b32_e32 v5, v5, v7, vcc_lo2562; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v42563; GFX11-NEXT:    v_dual_cndmask_b32 v4, v4, v6 :: v_dual_add_nc_u32 v7, 0xffffffe8, v52564; GFX11-NEXT:    v_cmp_le_u32_e32 vcc_lo, 24, v52565; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)2566; GFX11-NEXT:    v_sub_nc_u32_e32 v6, 23, v42567; GFX11-NEXT:    v_dual_cndmask_b32 v5, v5, v7 :: v_dual_and_b32 v4, 0xffffff, v42568; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2569; GFX11-NEXT:    v_and_b32_e32 v6, 0xffffff, v62570; GFX11-NEXT:    v_sub_nc_u32_e32 v7, 23, v52571; GFX11-NEXT:    v_and_b32_e32 v5, 0xffffff, v52572; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)2573; GFX11-NEXT:    v_lshrrev_b32_e32 v2, v4, v22574; GFX11-NEXT:    v_and_b32_e32 v4, 0xffffff, v72575; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2576; GFX11-NEXT:    v_lshrrev_b32_e32 v3, v5, v32577; GFX11-NEXT:    v_lshl_or_b32 v0, v0, v6, v22578; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2)2579; GFX11-NEXT:    v_lshl_or_b32 v1, v1, v4, v32580; GFX11-NEXT:    s_setpc_b64 s[30:31]2581  %result = call <2 x i24> @llvm.fshr.v2i24(<2 x i24> %lhs, <2 x i24> %rhs, <2 x i24> %amt)2582  ret <2 x i24> %result2583}2584 2585define amdgpu_ps i32 @s_fshr_i32(i32 inreg %lhs, i32 inreg %rhs, i32 inreg %amt) {2586; GFX6-LABEL: s_fshr_i32:2587; GFX6:       ; %bb.0:2588; GFX6-NEXT:    v_mov_b32_e32 v0, s12589; GFX6-NEXT:    v_mov_b32_e32 v1, s22590; GFX6-NEXT:    v_alignbit_b32 v0, s0, v0, v12591; GFX6-NEXT:    v_readfirstlane_b32 s0, v02592; GFX6-NEXT:    ; return to shader part epilog2593;2594; GFX8-LABEL: s_fshr_i32:2595; GFX8:       ; %bb.0:2596; GFX8-NEXT:    v_mov_b32_e32 v0, s12597; GFX8-NEXT:    v_mov_b32_e32 v1, s22598; GFX8-NEXT:    v_alignbit_b32 v0, s0, v0, v12599; GFX8-NEXT:    v_readfirstlane_b32 s0, v02600; GFX8-NEXT:    ; return to shader part epilog2601;2602; GFX9-LABEL: s_fshr_i32:2603; GFX9:       ; %bb.0:2604; GFX9-NEXT:    v_mov_b32_e32 v0, s12605; GFX9-NEXT:    v_mov_b32_e32 v1, s22606; GFX9-NEXT:    v_alignbit_b32 v0, s0, v0, v12607; GFX9-NEXT:    v_readfirstlane_b32 s0, v02608; GFX9-NEXT:    ; return to shader part epilog2609;2610; GFX10-LABEL: s_fshr_i32:2611; GFX10:       ; %bb.0:2612; GFX10-NEXT:    v_mov_b32_e32 v0, s22613; GFX10-NEXT:    v_alignbit_b32 v0, s0, s1, v02614; GFX10-NEXT:    v_readfirstlane_b32 s0, v02615; GFX10-NEXT:    ; return to shader part epilog2616;2617; GFX11-LABEL: s_fshr_i32:2618; GFX11:       ; %bb.0:2619; GFX11-NEXT:    v_mov_b32_e32 v0, s22620; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2621; GFX11-NEXT:    v_alignbit_b32 v0, s0, s1, v02622; GFX11-NEXT:    v_readfirstlane_b32 s0, v02623; GFX11-NEXT:    ; return to shader part epilog2624  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 %amt)2625  ret i32 %result2626}2627 2628define amdgpu_ps i32 @s_fshr_i32_5(i32 inreg %lhs, i32 inreg %rhs) {2629; GFX6-LABEL: s_fshr_i32_5:2630; GFX6:       ; %bb.0:2631; GFX6-NEXT:    v_mov_b32_e32 v0, s12632; GFX6-NEXT:    v_alignbit_b32 v0, s0, v0, 52633; GFX6-NEXT:    v_readfirstlane_b32 s0, v02634; GFX6-NEXT:    ; return to shader part epilog2635;2636; GFX8-LABEL: s_fshr_i32_5:2637; GFX8:       ; %bb.0:2638; GFX8-NEXT:    v_mov_b32_e32 v0, s12639; GFX8-NEXT:    v_alignbit_b32 v0, s0, v0, 52640; GFX8-NEXT:    v_readfirstlane_b32 s0, v02641; GFX8-NEXT:    ; return to shader part epilog2642;2643; GFX9-LABEL: s_fshr_i32_5:2644; GFX9:       ; %bb.0:2645; GFX9-NEXT:    v_mov_b32_e32 v0, s12646; GFX9-NEXT:    v_alignbit_b32 v0, s0, v0, 52647; GFX9-NEXT:    v_readfirstlane_b32 s0, v02648; GFX9-NEXT:    ; return to shader part epilog2649;2650; GFX10-LABEL: s_fshr_i32_5:2651; GFX10:       ; %bb.0:2652; GFX10-NEXT:    v_alignbit_b32 v0, s0, s1, 52653; GFX10-NEXT:    v_readfirstlane_b32 s0, v02654; GFX10-NEXT:    ; return to shader part epilog2655;2656; GFX11-LABEL: s_fshr_i32_5:2657; GFX11:       ; %bb.0:2658; GFX11-NEXT:    v_alignbit_b32 v0, s0, s1, 52659; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)2660; GFX11-NEXT:    v_readfirstlane_b32 s0, v02661; GFX11-NEXT:    ; return to shader part epilog2662  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 5)2663  ret i32 %result2664}2665 2666define amdgpu_ps i32 @s_fshr_i32_8(i32 inreg %lhs, i32 inreg %rhs) {2667; GFX6-LABEL: s_fshr_i32_8:2668; GFX6:       ; %bb.0:2669; GFX6-NEXT:    v_mov_b32_e32 v0, s12670; GFX6-NEXT:    v_alignbit_b32 v0, s0, v0, 82671; GFX6-NEXT:    v_readfirstlane_b32 s0, v02672; GFX6-NEXT:    ; return to shader part epilog2673;2674; GFX8-LABEL: s_fshr_i32_8:2675; GFX8:       ; %bb.0:2676; GFX8-NEXT:    v_mov_b32_e32 v0, s12677; GFX8-NEXT:    v_alignbit_b32 v0, s0, v0, 82678; GFX8-NEXT:    v_readfirstlane_b32 s0, v02679; GFX8-NEXT:    ; return to shader part epilog2680;2681; GFX9-LABEL: s_fshr_i32_8:2682; GFX9:       ; %bb.0:2683; GFX9-NEXT:    v_mov_b32_e32 v0, s12684; GFX9-NEXT:    v_alignbit_b32 v0, s0, v0, 82685; GFX9-NEXT:    v_readfirstlane_b32 s0, v02686; GFX9-NEXT:    ; return to shader part epilog2687;2688; GFX10-LABEL: s_fshr_i32_8:2689; GFX10:       ; %bb.0:2690; GFX10-NEXT:    v_alignbit_b32 v0, s0, s1, 82691; GFX10-NEXT:    v_readfirstlane_b32 s0, v02692; GFX10-NEXT:    ; return to shader part epilog2693;2694; GFX11-LABEL: s_fshr_i32_8:2695; GFX11:       ; %bb.0:2696; GFX11-NEXT:    v_alignbit_b32 v0, s0, s1, 82697; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)2698; GFX11-NEXT:    v_readfirstlane_b32 s0, v02699; GFX11-NEXT:    ; return to shader part epilog2700  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 8)2701  ret i32 %result2702}2703 2704define i32 @v_fshr_i32(i32 %lhs, i32 %rhs, i32 %amt) {2705; GCN-LABEL: v_fshr_i32:2706; GCN:       ; %bb.0:2707; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2708; GCN-NEXT:    v_alignbit_b32 v0, v0, v1, v22709; GCN-NEXT:    s_setpc_b64 s[30:31]2710;2711; GFX11-LABEL: v_fshr_i32:2712; GFX11:       ; %bb.0:2713; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2714; GFX11-NEXT:    v_alignbit_b32 v0, v0, v1, v22715; GFX11-NEXT:    s_setpc_b64 s[30:31]2716  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 %amt)2717  ret i32 %result2718}2719 2720define i32 @v_fshr_i32_5(i32 %lhs, i32 %rhs) {2721; GCN-LABEL: v_fshr_i32_5:2722; GCN:       ; %bb.0:2723; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2724; GCN-NEXT:    v_alignbit_b32 v0, v0, v1, 52725; GCN-NEXT:    s_setpc_b64 s[30:31]2726;2727; GFX11-LABEL: v_fshr_i32_5:2728; GFX11:       ; %bb.0:2729; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2730; GFX11-NEXT:    v_alignbit_b32 v0, v0, v1, 52731; GFX11-NEXT:    s_setpc_b64 s[30:31]2732  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 5)2733  ret i32 %result2734}2735 2736define i32 @v_fshr_i32_8(i32 %lhs, i32 %rhs) {2737; GCN-LABEL: v_fshr_i32_8:2738; GCN:       ; %bb.0:2739; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2740; GCN-NEXT:    v_alignbit_b32 v0, v0, v1, 82741; GCN-NEXT:    s_setpc_b64 s[30:31]2742;2743; GFX11-LABEL: v_fshr_i32_8:2744; GFX11:       ; %bb.0:2745; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2746; GFX11-NEXT:    v_alignbit_b32 v0, v0, v1, 82747; GFX11-NEXT:    s_setpc_b64 s[30:31]2748  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 8)2749  ret i32 %result2750}2751 2752define amdgpu_ps float @v_fshr_i32_ssv(i32 inreg %lhs, i32 inreg %rhs, i32 %amt) {2753; GFX6-LABEL: v_fshr_i32_ssv:2754; GFX6:       ; %bb.0:2755; GFX6-NEXT:    v_mov_b32_e32 v1, s12756; GFX6-NEXT:    v_alignbit_b32 v0, s0, v1, v02757; GFX6-NEXT:    ; return to shader part epilog2758;2759; GFX8-LABEL: v_fshr_i32_ssv:2760; GFX8:       ; %bb.0:2761; GFX8-NEXT:    v_mov_b32_e32 v1, s12762; GFX8-NEXT:    v_alignbit_b32 v0, s0, v1, v02763; GFX8-NEXT:    ; return to shader part epilog2764;2765; GFX9-LABEL: v_fshr_i32_ssv:2766; GFX9:       ; %bb.0:2767; GFX9-NEXT:    v_mov_b32_e32 v1, s12768; GFX9-NEXT:    v_alignbit_b32 v0, s0, v1, v02769; GFX9-NEXT:    ; return to shader part epilog2770;2771; GFX10-LABEL: v_fshr_i32_ssv:2772; GFX10:       ; %bb.0:2773; GFX10-NEXT:    v_alignbit_b32 v0, s0, s1, v02774; GFX10-NEXT:    ; return to shader part epilog2775;2776; GFX11-LABEL: v_fshr_i32_ssv:2777; GFX11:       ; %bb.0:2778; GFX11-NEXT:    v_alignbit_b32 v0, s0, s1, v02779; GFX11-NEXT:    ; return to shader part epilog2780  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 %amt)2781  %cast.result = bitcast i32 %result to float2782  ret float %cast.result2783}2784 2785define amdgpu_ps float @v_fshr_i32_svs(i32 inreg %lhs, i32 %rhs, i32 inreg %amt) {2786; GFX6-LABEL: v_fshr_i32_svs:2787; GFX6:       ; %bb.0:2788; GFX6-NEXT:    v_mov_b32_e32 v1, s12789; GFX6-NEXT:    v_alignbit_b32 v0, s0, v0, v12790; GFX6-NEXT:    ; return to shader part epilog2791;2792; GFX8-LABEL: v_fshr_i32_svs:2793; GFX8:       ; %bb.0:2794; GFX8-NEXT:    v_mov_b32_e32 v1, s12795; GFX8-NEXT:    v_alignbit_b32 v0, s0, v0, v12796; GFX8-NEXT:    ; return to shader part epilog2797;2798; GFX9-LABEL: v_fshr_i32_svs:2799; GFX9:       ; %bb.0:2800; GFX9-NEXT:    v_mov_b32_e32 v1, s12801; GFX9-NEXT:    v_alignbit_b32 v0, s0, v0, v12802; GFX9-NEXT:    ; return to shader part epilog2803;2804; GFX10-LABEL: v_fshr_i32_svs:2805; GFX10:       ; %bb.0:2806; GFX10-NEXT:    v_alignbit_b32 v0, s0, v0, s12807; GFX10-NEXT:    ; return to shader part epilog2808;2809; GFX11-LABEL: v_fshr_i32_svs:2810; GFX11:       ; %bb.0:2811; GFX11-NEXT:    v_alignbit_b32 v0, s0, v0, s12812; GFX11-NEXT:    ; return to shader part epilog2813  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 %amt)2814  %cast.result = bitcast i32 %result to float2815  ret float %cast.result2816}2817 2818define amdgpu_ps float @v_fshr_i32_vss(i32 inreg %lhs, i32 inreg %rhs, i32 inreg %amt) {2819; GFX6-LABEL: v_fshr_i32_vss:2820; GFX6:       ; %bb.0:2821; GFX6-NEXT:    v_mov_b32_e32 v0, s12822; GFX6-NEXT:    v_mov_b32_e32 v1, s22823; GFX6-NEXT:    v_alignbit_b32 v0, s0, v0, v12824; GFX6-NEXT:    ; return to shader part epilog2825;2826; GFX8-LABEL: v_fshr_i32_vss:2827; GFX8:       ; %bb.0:2828; GFX8-NEXT:    v_mov_b32_e32 v0, s12829; GFX8-NEXT:    v_mov_b32_e32 v1, s22830; GFX8-NEXT:    v_alignbit_b32 v0, s0, v0, v12831; GFX8-NEXT:    ; return to shader part epilog2832;2833; GFX9-LABEL: v_fshr_i32_vss:2834; GFX9:       ; %bb.0:2835; GFX9-NEXT:    v_mov_b32_e32 v0, s12836; GFX9-NEXT:    v_mov_b32_e32 v1, s22837; GFX9-NEXT:    v_alignbit_b32 v0, s0, v0, v12838; GFX9-NEXT:    ; return to shader part epilog2839;2840; GFX10-LABEL: v_fshr_i32_vss:2841; GFX10:       ; %bb.0:2842; GFX10-NEXT:    v_mov_b32_e32 v0, s22843; GFX10-NEXT:    v_alignbit_b32 v0, s0, s1, v02844; GFX10-NEXT:    ; return to shader part epilog2845;2846; GFX11-LABEL: v_fshr_i32_vss:2847; GFX11:       ; %bb.0:2848; GFX11-NEXT:    v_mov_b32_e32 v0, s22849; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)2850; GFX11-NEXT:    v_alignbit_b32 v0, s0, s1, v02851; GFX11-NEXT:    ; return to shader part epilog2852  %result = call i32 @llvm.fshr.i32(i32 %lhs, i32 %rhs, i32 %amt)2853  %cast.result = bitcast i32 %result to float2854  ret float %cast.result2855}2856 2857define <2 x i32> @v_fshr_v2i32(<2 x i32> %lhs, <2 x i32> %rhs, <2 x i32> %amt) {2858; GCN-LABEL: v_fshr_v2i32:2859; GCN:       ; %bb.0:2860; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2861; GCN-NEXT:    v_alignbit_b32 v0, v0, v2, v42862; GCN-NEXT:    v_alignbit_b32 v1, v1, v3, v52863; GCN-NEXT:    s_setpc_b64 s[30:31]2864;2865; GFX11-LABEL: v_fshr_v2i32:2866; GFX11:       ; %bb.0:2867; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2868; GFX11-NEXT:    v_alignbit_b32 v0, v0, v2, v42869; GFX11-NEXT:    v_alignbit_b32 v1, v1, v3, v52870; GFX11-NEXT:    s_setpc_b64 s[30:31]2871  %result = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %lhs, <2 x i32> %rhs, <2 x i32> %amt)2872  ret <2 x i32> %result2873}2874 2875define <3 x i32> @v_fshr_v3i32(<3 x i32> %lhs, <3 x i32> %rhs, <3 x i32> %amt) {2876; GCN-LABEL: v_fshr_v3i32:2877; GCN:       ; %bb.0:2878; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2879; GCN-NEXT:    v_alignbit_b32 v0, v0, v3, v62880; GCN-NEXT:    v_alignbit_b32 v1, v1, v4, v72881; GCN-NEXT:    v_alignbit_b32 v2, v2, v5, v82882; GCN-NEXT:    s_setpc_b64 s[30:31]2883;2884; GFX11-LABEL: v_fshr_v3i32:2885; GFX11:       ; %bb.0:2886; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2887; GFX11-NEXT:    v_alignbit_b32 v0, v0, v3, v62888; GFX11-NEXT:    v_alignbit_b32 v1, v1, v4, v72889; GFX11-NEXT:    v_alignbit_b32 v2, v2, v5, v82890; GFX11-NEXT:    s_setpc_b64 s[30:31]2891  %result = call <3 x i32> @llvm.fshr.v3i32(<3 x i32> %lhs, <3 x i32> %rhs, <3 x i32> %amt)2892  ret <3 x i32> %result2893}2894 2895define <4 x i32> @v_fshr_v4i32(<4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> %amt) {2896; GCN-LABEL: v_fshr_v4i32:2897; GCN:       ; %bb.0:2898; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2899; GCN-NEXT:    v_alignbit_b32 v0, v0, v4, v82900; GCN-NEXT:    v_alignbit_b32 v1, v1, v5, v92901; GCN-NEXT:    v_alignbit_b32 v2, v2, v6, v102902; GCN-NEXT:    v_alignbit_b32 v3, v3, v7, v112903; GCN-NEXT:    s_setpc_b64 s[30:31]2904;2905; GFX11-LABEL: v_fshr_v4i32:2906; GFX11:       ; %bb.0:2907; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2908; GFX11-NEXT:    v_alignbit_b32 v0, v0, v4, v82909; GFX11-NEXT:    v_alignbit_b32 v1, v1, v5, v92910; GFX11-NEXT:    v_alignbit_b32 v2, v2, v6, v102911; GFX11-NEXT:    v_alignbit_b32 v3, v3, v7, v112912; GFX11-NEXT:    s_setpc_b64 s[30:31]2913  %result = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %lhs, <4 x i32> %rhs, <4 x i32> %amt)2914  ret <4 x i32> %result2915}2916 2917define amdgpu_ps i16 @s_fshr_i16(i16 inreg %lhs, i16 inreg %rhs, i16 inreg %amt) {2918; GFX6-LABEL: s_fshr_i16:2919; GFX6:       ; %bb.0:2920; GFX6-NEXT:    s_and_b32 s3, s2, 152921; GFX6-NEXT:    s_andn2_b32 s2, 15, s22922; GFX6-NEXT:    s_lshl_b32 s0, s0, 12923; GFX6-NEXT:    s_and_b32 s1, s1, 0xffff2924; GFX6-NEXT:    s_lshl_b32 s0, s0, s22925; GFX6-NEXT:    s_lshr_b32 s1, s1, s32926; GFX6-NEXT:    s_or_b32 s0, s0, s12927; GFX6-NEXT:    ; return to shader part epilog2928;2929; GFX8-LABEL: s_fshr_i16:2930; GFX8:       ; %bb.0:2931; GFX8-NEXT:    s_and_b32 s3, s2, 152932; GFX8-NEXT:    s_andn2_b32 s2, 15, s22933; GFX8-NEXT:    s_lshl_b32 s0, s0, 12934; GFX8-NEXT:    s_and_b32 s1, 0xffff, s12935; GFX8-NEXT:    s_lshl_b32 s0, s0, s22936; GFX8-NEXT:    s_lshr_b32 s1, s1, s32937; GFX8-NEXT:    s_or_b32 s0, s0, s12938; GFX8-NEXT:    ; return to shader part epilog2939;2940; GFX9-LABEL: s_fshr_i16:2941; GFX9:       ; %bb.0:2942; GFX9-NEXT:    s_and_b32 s3, s2, 152943; GFX9-NEXT:    s_andn2_b32 s2, 15, s22944; GFX9-NEXT:    s_lshl_b32 s0, s0, 12945; GFX9-NEXT:    s_and_b32 s1, 0xffff, s12946; GFX9-NEXT:    s_lshl_b32 s0, s0, s22947; GFX9-NEXT:    s_lshr_b32 s1, s1, s32948; GFX9-NEXT:    s_or_b32 s0, s0, s12949; GFX9-NEXT:    ; return to shader part epilog2950;2951; GFX10-LABEL: s_fshr_i16:2952; GFX10:       ; %bb.0:2953; GFX10-NEXT:    s_and_b32 s3, s2, 152954; GFX10-NEXT:    s_andn2_b32 s2, 15, s22955; GFX10-NEXT:    s_lshl_b32 s0, s0, 12956; GFX10-NEXT:    s_and_b32 s1, 0xffff, s12957; GFX10-NEXT:    s_lshl_b32 s0, s0, s22958; GFX10-NEXT:    s_lshr_b32 s1, s1, s32959; GFX10-NEXT:    s_or_b32 s0, s0, s12960; GFX10-NEXT:    ; return to shader part epilog2961;2962; GFX11-LABEL: s_fshr_i16:2963; GFX11:       ; %bb.0:2964; GFX11-NEXT:    s_and_b32 s3, s2, 152965; GFX11-NEXT:    s_and_not1_b32 s2, 15, s22966; GFX11-NEXT:    s_lshl_b32 s0, s0, 12967; GFX11-NEXT:    s_and_b32 s1, 0xffff, s12968; GFX11-NEXT:    s_lshl_b32 s0, s0, s22969; GFX11-NEXT:    s_lshr_b32 s1, s1, s32970; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)2971; GFX11-NEXT:    s_or_b32 s0, s0, s12972; GFX11-NEXT:    ; return to shader part epilog2973  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 %amt)2974  ret i16 %result2975}2976 2977define amdgpu_ps i16 @s_fshr_i16_4(i16 inreg %lhs, i16 inreg %rhs) {2978; GFX6-LABEL: s_fshr_i16_4:2979; GFX6:       ; %bb.0:2980; GFX6-NEXT:    s_lshl_b32 s0, s0, 122981; GFX6-NEXT:    s_bfe_u32 s1, s1, 0xc00042982; GFX6-NEXT:    s_or_b32 s0, s0, s12983; GFX6-NEXT:    ; return to shader part epilog2984;2985; GFX8-LABEL: s_fshr_i16_4:2986; GFX8:       ; %bb.0:2987; GFX8-NEXT:    s_and_b32 s1, 0xffff, s12988; GFX8-NEXT:    s_lshl_b32 s0, s0, 122989; GFX8-NEXT:    s_lshr_b32 s1, s1, 42990; GFX8-NEXT:    s_or_b32 s0, s0, s12991; GFX8-NEXT:    ; return to shader part epilog2992;2993; GFX9-LABEL: s_fshr_i16_4:2994; GFX9:       ; %bb.0:2995; GFX9-NEXT:    s_and_b32 s1, 0xffff, s12996; GFX9-NEXT:    s_lshl_b32 s0, s0, 122997; GFX9-NEXT:    s_lshr_b32 s1, s1, 42998; GFX9-NEXT:    s_or_b32 s0, s0, s12999; GFX9-NEXT:    ; return to shader part epilog3000;3001; GFX10-LABEL: s_fshr_i16_4:3002; GFX10:       ; %bb.0:3003; GFX10-NEXT:    s_and_b32 s1, 0xffff, s13004; GFX10-NEXT:    s_lshl_b32 s0, s0, 123005; GFX10-NEXT:    s_lshr_b32 s1, s1, 43006; GFX10-NEXT:    s_or_b32 s0, s0, s13007; GFX10-NEXT:    ; return to shader part epilog3008;3009; GFX11-LABEL: s_fshr_i16_4:3010; GFX11:       ; %bb.0:3011; GFX11-NEXT:    s_and_b32 s1, 0xffff, s13012; GFX11-NEXT:    s_lshl_b32 s0, s0, 123013; GFX11-NEXT:    s_lshr_b32 s1, s1, 43014; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)3015; GFX11-NEXT:    s_or_b32 s0, s0, s13016; GFX11-NEXT:    ; return to shader part epilog3017  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 4)3018  ret i16 %result3019}3020 3021define amdgpu_ps i16 @s_fshr_i16_5(i16 inreg %lhs, i16 inreg %rhs) {3022; GFX6-LABEL: s_fshr_i16_5:3023; GFX6:       ; %bb.0:3024; GFX6-NEXT:    s_lshl_b32 s0, s0, 113025; GFX6-NEXT:    s_bfe_u32 s1, s1, 0xb00053026; GFX6-NEXT:    s_or_b32 s0, s0, s13027; GFX6-NEXT:    ; return to shader part epilog3028;3029; GFX8-LABEL: s_fshr_i16_5:3030; GFX8:       ; %bb.0:3031; GFX8-NEXT:    s_and_b32 s1, 0xffff, s13032; GFX8-NEXT:    s_lshl_b32 s0, s0, 113033; GFX8-NEXT:    s_lshr_b32 s1, s1, 53034; GFX8-NEXT:    s_or_b32 s0, s0, s13035; GFX8-NEXT:    ; return to shader part epilog3036;3037; GFX9-LABEL: s_fshr_i16_5:3038; GFX9:       ; %bb.0:3039; GFX9-NEXT:    s_and_b32 s1, 0xffff, s13040; GFX9-NEXT:    s_lshl_b32 s0, s0, 113041; GFX9-NEXT:    s_lshr_b32 s1, s1, 53042; GFX9-NEXT:    s_or_b32 s0, s0, s13043; GFX9-NEXT:    ; return to shader part epilog3044;3045; GFX10-LABEL: s_fshr_i16_5:3046; GFX10:       ; %bb.0:3047; GFX10-NEXT:    s_and_b32 s1, 0xffff, s13048; GFX10-NEXT:    s_lshl_b32 s0, s0, 113049; GFX10-NEXT:    s_lshr_b32 s1, s1, 53050; GFX10-NEXT:    s_or_b32 s0, s0, s13051; GFX10-NEXT:    ; return to shader part epilog3052;3053; GFX11-LABEL: s_fshr_i16_5:3054; GFX11:       ; %bb.0:3055; GFX11-NEXT:    s_and_b32 s1, 0xffff, s13056; GFX11-NEXT:    s_lshl_b32 s0, s0, 113057; GFX11-NEXT:    s_lshr_b32 s1, s1, 53058; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)3059; GFX11-NEXT:    s_or_b32 s0, s0, s13060; GFX11-NEXT:    ; return to shader part epilog3061  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 5)3062  ret i16 %result3063}3064 3065define i16 @v_fshr_i16(i16 %lhs, i16 %rhs, i16 %amt) {3066; GFX6-LABEL: v_fshr_i16:3067; GFX6:       ; %bb.0:3068; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3069; GFX6-NEXT:    v_and_b32_e32 v3, 15, v23070; GFX6-NEXT:    v_xor_b32_e32 v2, -1, v23071; GFX6-NEXT:    v_and_b32_e32 v2, 15, v23072; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v03073; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v13074; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v2, v03075; GFX6-NEXT:    v_lshrrev_b32_e32 v1, v3, v13076; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13077; GFX6-NEXT:    s_setpc_b64 s[30:31]3078;3079; GFX8-LABEL: v_fshr_i16:3080; GFX8:       ; %bb.0:3081; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3082; GFX8-NEXT:    v_and_b32_e32 v3, 15, v23083; GFX8-NEXT:    v_xor_b32_e32 v2, -1, v23084; GFX8-NEXT:    v_and_b32_e32 v2, 15, v23085; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 1, v03086; GFX8-NEXT:    v_lshlrev_b16_e32 v0, v2, v03087; GFX8-NEXT:    v_lshrrev_b16_e32 v1, v3, v13088; GFX8-NEXT:    v_or_b32_e32 v0, v0, v13089; GFX8-NEXT:    s_setpc_b64 s[30:31]3090;3091; GFX9-LABEL: v_fshr_i16:3092; GFX9:       ; %bb.0:3093; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3094; GFX9-NEXT:    v_and_b32_e32 v3, 15, v23095; GFX9-NEXT:    v_xor_b32_e32 v2, -1, v23096; GFX9-NEXT:    v_and_b32_e32 v2, 15, v23097; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 1, v03098; GFX9-NEXT:    v_lshlrev_b16_e32 v0, v2, v03099; GFX9-NEXT:    v_lshrrev_b16_e32 v1, v3, v13100; GFX9-NEXT:    v_or_b32_e32 v0, v0, v13101; GFX9-NEXT:    s_setpc_b64 s[30:31]3102;3103; GFX10-LABEL: v_fshr_i16:3104; GFX10:       ; %bb.0:3105; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3106; GFX10-NEXT:    v_xor_b32_e32 v3, -1, v23107; GFX10-NEXT:    v_lshlrev_b16 v0, 1, v03108; GFX10-NEXT:    v_and_b32_e32 v2, 15, v23109; GFX10-NEXT:    v_and_b32_e32 v3, 15, v33110; GFX10-NEXT:    v_lshrrev_b16 v1, v2, v13111; GFX10-NEXT:    v_lshlrev_b16 v0, v3, v03112; GFX10-NEXT:    v_or_b32_e32 v0, v0, v13113; GFX10-NEXT:    s_setpc_b64 s[30:31]3114;3115; GFX11-LABEL: v_fshr_i16:3116; GFX11:       ; %bb.0:3117; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3118; GFX11-NEXT:    v_xor_b32_e32 v3, -1, v23119; GFX11-NEXT:    v_lshlrev_b16 v0, 1, v03120; GFX11-NEXT:    v_and_b32_e32 v2, 15, v23121; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)3122; GFX11-NEXT:    v_and_b32_e32 v3, 15, v33123; GFX11-NEXT:    v_lshrrev_b16 v1, v2, v13124; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3125; GFX11-NEXT:    v_lshlrev_b16 v0, v3, v03126; GFX11-NEXT:    v_or_b32_e32 v0, v0, v13127; GFX11-NEXT:    s_setpc_b64 s[30:31]3128  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 %amt)3129  ret i16 %result3130}3131 3132define i16 @v_fshr_i16_4(i16 %lhs, i16 %rhs) {3133; GFX6-LABEL: v_fshr_i16_4:3134; GFX6:       ; %bb.0:3135; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3136; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 12, v03137; GFX6-NEXT:    v_bfe_u32 v1, v1, 4, 123138; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13139; GFX6-NEXT:    s_setpc_b64 s[30:31]3140;3141; GFX8-LABEL: v_fshr_i16_4:3142; GFX8:       ; %bb.0:3143; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3144; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 12, v03145; GFX8-NEXT:    v_lshrrev_b16_e32 v1, 4, v13146; GFX8-NEXT:    v_or_b32_e32 v0, v0, v13147; GFX8-NEXT:    s_setpc_b64 s[30:31]3148;3149; GFX9-LABEL: v_fshr_i16_4:3150; GFX9:       ; %bb.0:3151; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3152; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 12, v03153; GFX9-NEXT:    v_lshrrev_b16_e32 v1, 4, v13154; GFX9-NEXT:    v_or_b32_e32 v0, v0, v13155; GFX9-NEXT:    s_setpc_b64 s[30:31]3156;3157; GFX10-LABEL: v_fshr_i16_4:3158; GFX10:       ; %bb.0:3159; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3160; GFX10-NEXT:    v_lshlrev_b16 v0, 12, v03161; GFX10-NEXT:    v_lshrrev_b16 v1, 4, v13162; GFX10-NEXT:    v_or_b32_e32 v0, v0, v13163; GFX10-NEXT:    s_setpc_b64 s[30:31]3164;3165; GFX11-LABEL: v_fshr_i16_4:3166; GFX11:       ; %bb.0:3167; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3168; GFX11-NEXT:    v_lshlrev_b16 v0, 12, v03169; GFX11-NEXT:    v_lshrrev_b16 v1, 4, v13170; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)3171; GFX11-NEXT:    v_or_b32_e32 v0, v0, v13172; GFX11-NEXT:    s_setpc_b64 s[30:31]3173  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 4)3174  ret i16 %result3175}3176 3177define i16 @v_fshr_i16_5(i16 %lhs, i16 %rhs) {3178; GFX6-LABEL: v_fshr_i16_5:3179; GFX6:       ; %bb.0:3180; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3181; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 11, v03182; GFX6-NEXT:    v_bfe_u32 v1, v1, 5, 113183; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13184; GFX6-NEXT:    s_setpc_b64 s[30:31]3185;3186; GFX8-LABEL: v_fshr_i16_5:3187; GFX8:       ; %bb.0:3188; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3189; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 11, v03190; GFX8-NEXT:    v_lshrrev_b16_e32 v1, 5, v13191; GFX8-NEXT:    v_or_b32_e32 v0, v0, v13192; GFX8-NEXT:    s_setpc_b64 s[30:31]3193;3194; GFX9-LABEL: v_fshr_i16_5:3195; GFX9:       ; %bb.0:3196; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3197; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 11, v03198; GFX9-NEXT:    v_lshrrev_b16_e32 v1, 5, v13199; GFX9-NEXT:    v_or_b32_e32 v0, v0, v13200; GFX9-NEXT:    s_setpc_b64 s[30:31]3201;3202; GFX10-LABEL: v_fshr_i16_5:3203; GFX10:       ; %bb.0:3204; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3205; GFX10-NEXT:    v_lshlrev_b16 v0, 11, v03206; GFX10-NEXT:    v_lshrrev_b16 v1, 5, v13207; GFX10-NEXT:    v_or_b32_e32 v0, v0, v13208; GFX10-NEXT:    s_setpc_b64 s[30:31]3209;3210; GFX11-LABEL: v_fshr_i16_5:3211; GFX11:       ; %bb.0:3212; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3213; GFX11-NEXT:    v_lshlrev_b16 v0, 11, v03214; GFX11-NEXT:    v_lshrrev_b16 v1, 5, v13215; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)3216; GFX11-NEXT:    v_or_b32_e32 v0, v0, v13217; GFX11-NEXT:    s_setpc_b64 s[30:31]3218  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 5)3219  ret i16 %result3220}3221 3222define amdgpu_ps half @v_fshr_i16_ssv(i16 inreg %lhs, i16 inreg %rhs, i16 %amt) {3223; GFX6-LABEL: v_fshr_i16_ssv:3224; GFX6:       ; %bb.0:3225; GFX6-NEXT:    v_and_b32_e32 v1, 15, v03226; GFX6-NEXT:    v_xor_b32_e32 v0, -1, v03227; GFX6-NEXT:    v_and_b32_e32 v0, 15, v03228; GFX6-NEXT:    s_lshl_b32 s0, s0, 13229; GFX6-NEXT:    v_lshl_b32_e32 v0, s0, v03230; GFX6-NEXT:    s_and_b32 s0, s1, 0xffff3231; GFX6-NEXT:    v_lshr_b32_e32 v1, s0, v13232; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13233; GFX6-NEXT:    ; return to shader part epilog3234;3235; GFX8-LABEL: v_fshr_i16_ssv:3236; GFX8:       ; %bb.0:3237; GFX8-NEXT:    v_and_b32_e32 v1, 15, v03238; GFX8-NEXT:    v_xor_b32_e32 v0, -1, v03239; GFX8-NEXT:    v_and_b32_e32 v0, 15, v03240; GFX8-NEXT:    s_lshl_b32 s0, s0, 13241; GFX8-NEXT:    v_lshlrev_b16_e64 v0, v0, s03242; GFX8-NEXT:    v_lshrrev_b16_e64 v1, v1, s13243; GFX8-NEXT:    v_or_b32_e32 v0, v0, v13244; GFX8-NEXT:    ; return to shader part epilog3245;3246; GFX9-LABEL: v_fshr_i16_ssv:3247; GFX9:       ; %bb.0:3248; GFX9-NEXT:    v_and_b32_e32 v1, 15, v03249; GFX9-NEXT:    v_xor_b32_e32 v0, -1, v03250; GFX9-NEXT:    v_and_b32_e32 v0, 15, v03251; GFX9-NEXT:    s_lshl_b32 s0, s0, 13252; GFX9-NEXT:    v_lshlrev_b16_e64 v0, v0, s03253; GFX9-NEXT:    v_lshrrev_b16_e64 v1, v1, s13254; GFX9-NEXT:    v_or_b32_e32 v0, v0, v13255; GFX9-NEXT:    ; return to shader part epilog3256;3257; GFX10-LABEL: v_fshr_i16_ssv:3258; GFX10:       ; %bb.0:3259; GFX10-NEXT:    v_xor_b32_e32 v1, -1, v03260; GFX10-NEXT:    v_and_b32_e32 v0, 15, v03261; GFX10-NEXT:    s_lshl_b32 s0, s0, 13262; GFX10-NEXT:    v_and_b32_e32 v1, 15, v13263; GFX10-NEXT:    v_lshrrev_b16 v0, v0, s13264; GFX10-NEXT:    v_lshlrev_b16 v1, v1, s03265; GFX10-NEXT:    v_or_b32_e32 v0, v1, v03266; GFX10-NEXT:    ; return to shader part epilog3267;3268; GFX11-LABEL: v_fshr_i16_ssv:3269; GFX11:       ; %bb.0:3270; GFX11-NEXT:    v_xor_b32_e32 v1, -1, v03271; GFX11-NEXT:    v_and_b32_e32 v0, 15, v03272; GFX11-NEXT:    s_lshl_b32 s0, s0, 13273; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3274; GFX11-NEXT:    v_and_b32_e32 v1, 15, v13275; GFX11-NEXT:    v_lshrrev_b16 v0, v0, s13276; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3277; GFX11-NEXT:    v_lshlrev_b16 v1, v1, s03278; GFX11-NEXT:    v_or_b32_e32 v0, v1, v03279; GFX11-NEXT:    ; return to shader part epilog3280  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 %amt)3281  %cast.result = bitcast i16 %result to half3282  ret half %cast.result3283}3284 3285define amdgpu_ps half @v_fshr_i16_svs(i16 inreg %lhs, i16 %rhs, i16 inreg %amt) {3286; GFX6-LABEL: v_fshr_i16_svs:3287; GFX6:       ; %bb.0:3288; GFX6-NEXT:    s_and_b32 s2, s1, 153289; GFX6-NEXT:    s_andn2_b32 s1, 15, s13290; GFX6-NEXT:    s_lshl_b32 s0, s0, 13291; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v03292; GFX6-NEXT:    s_lshl_b32 s0, s0, s13293; GFX6-NEXT:    v_lshrrev_b32_e32 v0, s2, v03294; GFX6-NEXT:    v_or_b32_e32 v0, s0, v03295; GFX6-NEXT:    ; return to shader part epilog3296;3297; GFX8-LABEL: v_fshr_i16_svs:3298; GFX8:       ; %bb.0:3299; GFX8-NEXT:    s_and_b32 s2, s1, 153300; GFX8-NEXT:    s_andn2_b32 s1, 15, s13301; GFX8-NEXT:    s_lshl_b32 s0, s0, 13302; GFX8-NEXT:    s_lshl_b32 s0, s0, s13303; GFX8-NEXT:    v_lshrrev_b16_e32 v0, s2, v03304; GFX8-NEXT:    v_or_b32_e32 v0, s0, v03305; GFX8-NEXT:    ; return to shader part epilog3306;3307; GFX9-LABEL: v_fshr_i16_svs:3308; GFX9:       ; %bb.0:3309; GFX9-NEXT:    s_and_b32 s2, s1, 153310; GFX9-NEXT:    s_andn2_b32 s1, 15, s13311; GFX9-NEXT:    s_lshl_b32 s0, s0, 13312; GFX9-NEXT:    s_lshl_b32 s0, s0, s13313; GFX9-NEXT:    v_lshrrev_b16_e32 v0, s2, v03314; GFX9-NEXT:    v_or_b32_e32 v0, s0, v03315; GFX9-NEXT:    ; return to shader part epilog3316;3317; GFX10-LABEL: v_fshr_i16_svs:3318; GFX10:       ; %bb.0:3319; GFX10-NEXT:    s_and_b32 s2, s1, 153320; GFX10-NEXT:    s_andn2_b32 s1, 15, s13321; GFX10-NEXT:    v_lshrrev_b16 v0, s2, v03322; GFX10-NEXT:    s_lshl_b32 s0, s0, 13323; GFX10-NEXT:    s_lshl_b32 s0, s0, s13324; GFX10-NEXT:    v_or_b32_e32 v0, s0, v03325; GFX10-NEXT:    ; return to shader part epilog3326;3327; GFX11-LABEL: v_fshr_i16_svs:3328; GFX11:       ; %bb.0:3329; GFX11-NEXT:    s_and_b32 s2, s1, 153330; GFX11-NEXT:    s_and_not1_b32 s1, 15, s13331; GFX11-NEXT:    v_lshrrev_b16 v0, s2, v03332; GFX11-NEXT:    s_lshl_b32 s0, s0, 13333; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)3334; GFX11-NEXT:    s_lshl_b32 s0, s0, s13335; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)3336; GFX11-NEXT:    v_or_b32_e32 v0, s0, v03337; GFX11-NEXT:    ; return to shader part epilog3338  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 %amt)3339  %cast.result = bitcast i16 %result to half3340  ret half %cast.result3341}3342 3343define amdgpu_ps half @v_fshr_i16_vss(i16 %lhs, i16 inreg %rhs, i16 inreg %amt) {3344; GFX6-LABEL: v_fshr_i16_vss:3345; GFX6:       ; %bb.0:3346; GFX6-NEXT:    s_and_b32 s2, s1, 153347; GFX6-NEXT:    s_andn2_b32 s1, 15, s13348; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v03349; GFX6-NEXT:    s_and_b32 s0, s0, 0xffff3350; GFX6-NEXT:    v_lshlrev_b32_e32 v0, s1, v03351; GFX6-NEXT:    s_lshr_b32 s0, s0, s23352; GFX6-NEXT:    v_or_b32_e32 v0, s0, v03353; GFX6-NEXT:    ; return to shader part epilog3354;3355; GFX8-LABEL: v_fshr_i16_vss:3356; GFX8:       ; %bb.0:3357; GFX8-NEXT:    s_and_b32 s2, s1, 153358; GFX8-NEXT:    s_andn2_b32 s1, 15, s13359; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 1, v03360; GFX8-NEXT:    s_and_b32 s0, 0xffff, s03361; GFX8-NEXT:    v_lshlrev_b16_e32 v0, s1, v03362; GFX8-NEXT:    s_lshr_b32 s0, s0, s23363; GFX8-NEXT:    v_or_b32_e32 v0, s0, v03364; GFX8-NEXT:    ; return to shader part epilog3365;3366; GFX9-LABEL: v_fshr_i16_vss:3367; GFX9:       ; %bb.0:3368; GFX9-NEXT:    s_and_b32 s2, s1, 153369; GFX9-NEXT:    s_andn2_b32 s1, 15, s13370; GFX9-NEXT:    v_lshlrev_b16_e32 v0, 1, v03371; GFX9-NEXT:    s_and_b32 s0, 0xffff, s03372; GFX9-NEXT:    v_lshlrev_b16_e32 v0, s1, v03373; GFX9-NEXT:    s_lshr_b32 s0, s0, s23374; GFX9-NEXT:    v_or_b32_e32 v0, s0, v03375; GFX9-NEXT:    ; return to shader part epilog3376;3377; GFX10-LABEL: v_fshr_i16_vss:3378; GFX10:       ; %bb.0:3379; GFX10-NEXT:    v_lshlrev_b16 v0, 1, v03380; GFX10-NEXT:    s_andn2_b32 s2, 15, s13381; GFX10-NEXT:    s_and_b32 s1, s1, 153382; GFX10-NEXT:    s_and_b32 s0, 0xffff, s03383; GFX10-NEXT:    s_lshr_b32 s0, s0, s13384; GFX10-NEXT:    v_lshlrev_b16 v0, s2, v03385; GFX10-NEXT:    v_or_b32_e32 v0, s0, v03386; GFX10-NEXT:    ; return to shader part epilog3387;3388; GFX11-LABEL: v_fshr_i16_vss:3389; GFX11:       ; %bb.0:3390; GFX11-NEXT:    v_lshlrev_b16 v0, 1, v03391; GFX11-NEXT:    s_and_not1_b32 s2, 15, s13392; GFX11-NEXT:    s_and_b32 s1, s1, 153393; GFX11-NEXT:    s_and_b32 s0, 0xffff, s03394; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)3395; GFX11-NEXT:    s_lshr_b32 s0, s0, s13396; GFX11-NEXT:    v_lshlrev_b16 v0, s2, v03397; GFX11-NEXT:    v_or_b32_e32 v0, s0, v03398; GFX11-NEXT:    ; return to shader part epilog3399  %result = call i16 @llvm.fshr.i16(i16 %lhs, i16 %rhs, i16 %amt)3400  %cast.result = bitcast i16 %result to half3401  ret half %cast.result3402}3403 3404define amdgpu_ps i32 @s_fshr_v2i16(<2 x i16> inreg %lhs, <2 x i16> inreg %rhs, <2 x i16> inreg %amt) {3405; GFX6-LABEL: s_fshr_v2i16:3406; GFX6:       ; %bb.0:3407; GFX6-NEXT:    s_and_b32 s6, s4, 153408; GFX6-NEXT:    s_andn2_b32 s4, 15, s43409; GFX6-NEXT:    s_lshl_b32 s0, s0, 13410; GFX6-NEXT:    s_and_b32 s2, s2, 0xffff3411; GFX6-NEXT:    s_lshl_b32 s0, s0, s43412; GFX6-NEXT:    s_lshr_b32 s2, s2, s63413; GFX6-NEXT:    s_or_b32 s0, s0, s23414; GFX6-NEXT:    s_and_b32 s2, s5, 153415; GFX6-NEXT:    s_andn2_b32 s4, 15, s53416; GFX6-NEXT:    s_lshl_b32 s1, s1, 13417; GFX6-NEXT:    s_and_b32 s3, s3, 0xffff3418; GFX6-NEXT:    s_lshl_b32 s1, s1, s43419; GFX6-NEXT:    s_lshr_b32 s2, s3, s23420; GFX6-NEXT:    s_or_b32 s1, s1, s23421; GFX6-NEXT:    s_and_b32 s1, 0xffff, s13422; GFX6-NEXT:    s_and_b32 s0, 0xffff, s03423; GFX6-NEXT:    s_lshl_b32 s1, s1, 163424; GFX6-NEXT:    s_or_b32 s0, s0, s13425; GFX6-NEXT:    ; return to shader part epilog3426;3427; GFX8-LABEL: s_fshr_v2i16:3428; GFX8:       ; %bb.0:3429; GFX8-NEXT:    s_lshr_b32 s3, s0, 163430; GFX8-NEXT:    s_lshr_b32 s4, s1, 163431; GFX8-NEXT:    s_lshr_b32 s5, s2, 163432; GFX8-NEXT:    s_and_b32 s6, s2, 153433; GFX8-NEXT:    s_andn2_b32 s2, 15, s23434; GFX8-NEXT:    s_lshl_b32 s0, s0, 13435; GFX8-NEXT:    s_and_b32 s1, 0xffff, s13436; GFX8-NEXT:    s_lshl_b32 s0, s0, s23437; GFX8-NEXT:    s_lshr_b32 s1, s1, s63438; GFX8-NEXT:    s_or_b32 s0, s0, s13439; GFX8-NEXT:    s_and_b32 s1, s5, 153440; GFX8-NEXT:    s_andn2_b32 s2, 15, s53441; GFX8-NEXT:    s_lshl_b32 s3, s3, 13442; GFX8-NEXT:    s_lshl_b32 s2, s3, s23443; GFX8-NEXT:    s_lshr_b32 s1, s4, s13444; GFX8-NEXT:    s_or_b32 s1, s2, s13445; GFX8-NEXT:    s_and_b32 s1, 0xffff, s13446; GFX8-NEXT:    s_and_b32 s0, 0xffff, s03447; GFX8-NEXT:    s_lshl_b32 s1, s1, 163448; GFX8-NEXT:    s_or_b32 s0, s0, s13449; GFX8-NEXT:    ; return to shader part epilog3450;3451; GFX9-LABEL: s_fshr_v2i16:3452; GFX9:       ; %bb.0:3453; GFX9-NEXT:    s_lshr_b32 s4, s0, 163454; GFX9-NEXT:    s_lshl_b32 s0, s0, 0x100013455; GFX9-NEXT:    s_lshl_b32 s4, s4, 13456; GFX9-NEXT:    s_and_b32 s3, s2, 0xf000f3457; GFX9-NEXT:    s_andn2_b32 s2, 0xf000f, s23458; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s43459; GFX9-NEXT:    s_lshr_b32 s4, s0, 163460; GFX9-NEXT:    s_lshr_b32 s5, s2, 163461; GFX9-NEXT:    s_lshl_b32 s0, s0, s23462; GFX9-NEXT:    s_lshl_b32 s2, s4, s53463; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s23464; GFX9-NEXT:    s_lshr_b32 s2, s1, 163465; GFX9-NEXT:    s_and_b32 s1, s1, 0xffff3466; GFX9-NEXT:    s_lshr_b32 s4, s3, 163467; GFX9-NEXT:    s_lshr_b32 s1, s1, s33468; GFX9-NEXT:    s_lshr_b32 s2, s2, s43469; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s23470; GFX9-NEXT:    s_or_b32 s0, s0, s13471; GFX9-NEXT:    ; return to shader part epilog3472;3473; GFX10-LABEL: s_fshr_v2i16:3474; GFX10:       ; %bb.0:3475; GFX10-NEXT:    s_lshr_b32 s3, s0, 163476; GFX10-NEXT:    s_lshl_b32 s0, s0, 0x100013477; GFX10-NEXT:    s_lshl_b32 s3, s3, 13478; GFX10-NEXT:    s_and_b32 s4, s2, 0xf000f3479; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s33480; GFX10-NEXT:    s_andn2_b32 s2, 0xf000f, s23481; GFX10-NEXT:    s_lshr_b32 s3, s0, 163482; GFX10-NEXT:    s_lshr_b32 s5, s2, 163483; GFX10-NEXT:    s_lshl_b32 s0, s0, s23484; GFX10-NEXT:    s_lshl_b32 s2, s3, s53485; GFX10-NEXT:    s_lshr_b32 s3, s1, 163486; GFX10-NEXT:    s_and_b32 s1, s1, 0xffff3487; GFX10-NEXT:    s_lshr_b32 s5, s4, 163488; GFX10-NEXT:    s_lshr_b32 s1, s1, s43489; GFX10-NEXT:    s_lshr_b32 s3, s3, s53490; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s23491; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s33492; GFX10-NEXT:    s_or_b32 s0, s0, s13493; GFX10-NEXT:    ; return to shader part epilog3494;3495; GFX11-LABEL: s_fshr_v2i16:3496; GFX11:       ; %bb.0:3497; GFX11-NEXT:    s_lshr_b32 s3, s0, 163498; GFX11-NEXT:    s_lshl_b32 s0, s0, 0x100013499; GFX11-NEXT:    s_lshl_b32 s3, s3, 13500; GFX11-NEXT:    s_and_b32 s4, s2, 0xf000f3501; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s33502; GFX11-NEXT:    s_and_not1_b32 s2, 0xf000f, s23503; GFX11-NEXT:    s_lshr_b32 s3, s0, 163504; GFX11-NEXT:    s_lshr_b32 s5, s2, 163505; GFX11-NEXT:    s_lshl_b32 s0, s0, s23506; GFX11-NEXT:    s_lshl_b32 s2, s3, s53507; GFX11-NEXT:    s_lshr_b32 s3, s1, 163508; GFX11-NEXT:    s_and_b32 s1, s1, 0xffff3509; GFX11-NEXT:    s_lshr_b32 s5, s4, 163510; GFX11-NEXT:    s_lshr_b32 s1, s1, s43511; GFX11-NEXT:    s_lshr_b32 s3, s3, s53512; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s23513; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s33514; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)3515; GFX11-NEXT:    s_or_b32 s0, s0, s13516; GFX11-NEXT:    ; return to shader part epilog3517  %result = call <2 x i16> @llvm.fshr.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)3518  %cast = bitcast <2 x i16> %result to i323519  ret i32 %cast3520}3521 3522define <2 x i16> @v_fshr_v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt) {3523; GFX6-LABEL: v_fshr_v2i16:3524; GFX6:       ; %bb.0:3525; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3526; GFX6-NEXT:    v_and_b32_e32 v6, 15, v43527; GFX6-NEXT:    v_xor_b32_e32 v4, -1, v43528; GFX6-NEXT:    v_and_b32_e32 v4, 15, v43529; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v03530; GFX6-NEXT:    v_and_b32_e32 v2, 0xffff, v23531; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v4, v03532; GFX6-NEXT:    v_lshrrev_b32_e32 v2, v6, v23533; GFX6-NEXT:    v_xor_b32_e32 v4, -1, v53534; GFX6-NEXT:    v_or_b32_e32 v0, v0, v23535; GFX6-NEXT:    v_and_b32_e32 v2, 15, v53536; GFX6-NEXT:    v_and_b32_e32 v4, 15, v43537; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 1, v13538; GFX6-NEXT:    v_and_b32_e32 v3, 0xffff, v33539; GFX6-NEXT:    v_lshlrev_b32_e32 v1, v4, v13540; GFX6-NEXT:    v_lshrrev_b32_e32 v2, v2, v33541; GFX6-NEXT:    v_or_b32_e32 v1, v1, v23542; GFX6-NEXT:    s_setpc_b64 s[30:31]3543;3544; GFX8-LABEL: v_fshr_v2i16:3545; GFX8:       ; %bb.0:3546; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3547; GFX8-NEXT:    v_xor_b32_e32 v4, -1, v23548; GFX8-NEXT:    v_and_b32_e32 v3, 15, v23549; GFX8-NEXT:    v_and_b32_e32 v4, 15, v43550; GFX8-NEXT:    v_lshlrev_b16_e32 v5, 1, v03551; GFX8-NEXT:    v_lshlrev_b16_e32 v4, v4, v53552; GFX8-NEXT:    v_lshrrev_b16_e32 v3, v3, v13553; GFX8-NEXT:    v_or_b32_e32 v3, v4, v33554; GFX8-NEXT:    v_mov_b32_e32 v4, 153555; GFX8-NEXT:    v_mov_b32_e32 v5, -13556; GFX8-NEXT:    v_and_b32_sdwa v4, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3557; GFX8-NEXT:    v_xor_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3558; GFX8-NEXT:    v_mov_b32_e32 v5, 13559; GFX8-NEXT:    v_and_b32_e32 v2, 15, v23560; GFX8-NEXT:    v_lshlrev_b16_sdwa v0, v5, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13561; GFX8-NEXT:    v_lshlrev_b16_e32 v0, v2, v03562; GFX8-NEXT:    v_lshrrev_b16_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13563; GFX8-NEXT:    v_or_b32_e32 v0, v0, v13564; GFX8-NEXT:    v_and_b32_e32 v0, 0xffff, v03565; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 16, v03566; GFX8-NEXT:    v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3567; GFX8-NEXT:    s_setpc_b64 s[30:31]3568;3569; GFX9-LABEL: v_fshr_v2i16:3570; GFX9:       ; %bb.0:3571; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3572; GFX9-NEXT:    v_and_b32_e32 v3, 0xf000f, v23573; GFX9-NEXT:    v_xor_b32_e32 v2, -1, v23574; GFX9-NEXT:    v_and_b32_e32 v2, 0xf000f, v23575; GFX9-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]3576; GFX9-NEXT:    v_pk_lshlrev_b16 v0, v2, v03577; GFX9-NEXT:    v_pk_lshrrev_b16 v1, v3, v13578; GFX9-NEXT:    v_or_b32_e32 v0, v0, v13579; GFX9-NEXT:    s_setpc_b64 s[30:31]3580;3581; GFX10-LABEL: v_fshr_v2i16:3582; GFX10:       ; %bb.0:3583; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3584; GFX10-NEXT:    v_xor_b32_e32 v3, -1, v23585; GFX10-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]3586; GFX10-NEXT:    v_and_b32_e32 v2, 0xf000f, v23587; GFX10-NEXT:    v_and_b32_e32 v3, 0xf000f, v33588; GFX10-NEXT:    v_pk_lshrrev_b16 v1, v2, v13589; GFX10-NEXT:    v_pk_lshlrev_b16 v0, v3, v03590; GFX10-NEXT:    v_or_b32_e32 v0, v0, v13591; GFX10-NEXT:    s_setpc_b64 s[30:31]3592;3593; GFX11-LABEL: v_fshr_v2i16:3594; GFX11:       ; %bb.0:3595; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3596; GFX11-NEXT:    v_xor_b32_e32 v3, -1, v23597; GFX11-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]3598; GFX11-NEXT:    v_and_b32_e32 v2, 0xf000f, v23599; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)3600; GFX11-NEXT:    v_and_b32_e32 v3, 0xf000f, v33601; GFX11-NEXT:    v_pk_lshrrev_b16 v1, v2, v13602; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3603; GFX11-NEXT:    v_pk_lshlrev_b16 v0, v3, v03604; GFX11-NEXT:    v_or_b32_e32 v0, v0, v13605; GFX11-NEXT:    s_setpc_b64 s[30:31]3606  %result = call <2 x i16> @llvm.fshr.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)3607  ret <2 x i16> %result3608}3609 3610define <2 x i16> @v_fshr_v2i16_4_8(<2 x i16> %lhs, <2 x i16> %rhs) {3611; GFX6-LABEL: v_fshr_v2i16_4_8:3612; GFX6:       ; %bb.0:3613; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3614; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 12, v03615; GFX6-NEXT:    v_bfe_u32 v2, v2, 4, 123616; GFX6-NEXT:    v_or_b32_e32 v0, v0, v23617; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 8, v13618; GFX6-NEXT:    v_bfe_u32 v2, v3, 8, 83619; GFX6-NEXT:    v_or_b32_e32 v1, v1, v23620; GFX6-NEXT:    s_setpc_b64 s[30:31]3621;3622; GFX8-LABEL: v_fshr_v2i16_4_8:3623; GFX8:       ; %bb.0:3624; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3625; GFX8-NEXT:    v_lshrrev_b32_e32 v2, 16, v03626; GFX8-NEXT:    v_lshlrev_b16_e32 v2, 8, v23627; GFX8-NEXT:    v_lshrrev_b16_e32 v3, 4, v13628; GFX8-NEXT:    v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_33629; GFX8-NEXT:    v_lshlrev_b16_e32 v0, 12, v03630; GFX8-NEXT:    v_and_b32_e32 v1, 0xffff, v13631; GFX8-NEXT:    v_or_b32_e32 v0, v0, v33632; GFX8-NEXT:    v_lshlrev_b32_e32 v1, 16, v13633; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3634; GFX8-NEXT:    s_setpc_b64 s[30:31]3635;3636; GFX9-LABEL: v_fshr_v2i16_4_8:3637; GFX9:       ; %bb.0:3638; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3639; GFX9-NEXT:    v_mov_b32_e32 v2, 0x8000c3640; GFX9-NEXT:    v_pk_lshlrev_b16 v0, v2, v03641; GFX9-NEXT:    v_mov_b32_e32 v2, 0x800043642; GFX9-NEXT:    v_pk_lshrrev_b16 v1, v2, v13643; GFX9-NEXT:    v_or_b32_e32 v0, v0, v13644; GFX9-NEXT:    s_setpc_b64 s[30:31]3645;3646; GFX10-LABEL: v_fshr_v2i16_4_8:3647; GFX10:       ; %bb.0:3648; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3649; GFX10-NEXT:    v_pk_lshlrev_b16 v0, 0x8000c, v03650; GFX10-NEXT:    v_pk_lshrrev_b16 v1, 0x80004, v13651; GFX10-NEXT:    v_or_b32_e32 v0, v0, v13652; GFX10-NEXT:    s_setpc_b64 s[30:31]3653;3654; GFX11-LABEL: v_fshr_v2i16_4_8:3655; GFX11:       ; %bb.0:3656; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3657; GFX11-NEXT:    v_pk_lshlrev_b16 v0, 0x8000c, v03658; GFX11-NEXT:    v_pk_lshrrev_b16 v1, 0x80004, v13659; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)3660; GFX11-NEXT:    v_or_b32_e32 v0, v0, v13661; GFX11-NEXT:    s_setpc_b64 s[30:31]3662  %result = call <2 x i16> @llvm.fshr.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> <i16 4, i16 8>)3663  ret <2 x i16> %result3664}3665 3666define amdgpu_ps float @v_fshr_v2i16_ssv(<2 x i16> inreg %lhs, <2 x i16> inreg %rhs, <2 x i16> %amt) {3667; GFX6-LABEL: v_fshr_v2i16_ssv:3668; GFX6:       ; %bb.0:3669; GFX6-NEXT:    v_and_b32_e32 v2, 15, v03670; GFX6-NEXT:    v_xor_b32_e32 v0, -1, v03671; GFX6-NEXT:    v_and_b32_e32 v0, 15, v03672; GFX6-NEXT:    s_lshl_b32 s0, s0, 13673; GFX6-NEXT:    v_lshl_b32_e32 v0, s0, v03674; GFX6-NEXT:    s_and_b32 s0, s2, 0xffff3675; GFX6-NEXT:    v_lshr_b32_e32 v2, s0, v23676; GFX6-NEXT:    v_or_b32_e32 v0, v0, v23677; GFX6-NEXT:    v_and_b32_e32 v2, 15, v13678; GFX6-NEXT:    v_xor_b32_e32 v1, -1, v13679; GFX6-NEXT:    v_and_b32_e32 v1, 15, v13680; GFX6-NEXT:    s_lshl_b32 s0, s1, 13681; GFX6-NEXT:    v_lshl_b32_e32 v1, s0, v13682; GFX6-NEXT:    s_and_b32 s0, s3, 0xffff3683; GFX6-NEXT:    v_lshr_b32_e32 v2, s0, v23684; GFX6-NEXT:    v_or_b32_e32 v1, v1, v23685; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v13686; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v03687; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13688; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13689; GFX6-NEXT:    ; return to shader part epilog3690;3691; GFX8-LABEL: v_fshr_v2i16_ssv:3692; GFX8:       ; %bb.0:3693; GFX8-NEXT:    v_xor_b32_e32 v2, -1, v03694; GFX8-NEXT:    s_lshr_b32 s2, s0, 163695; GFX8-NEXT:    v_and_b32_e32 v1, 15, v03696; GFX8-NEXT:    v_and_b32_e32 v2, 15, v23697; GFX8-NEXT:    s_lshl_b32 s0, s0, 13698; GFX8-NEXT:    v_lshlrev_b16_e64 v2, v2, s03699; GFX8-NEXT:    v_lshrrev_b16_e64 v1, v1, s13700; GFX8-NEXT:    v_or_b32_e32 v1, v2, v13701; GFX8-NEXT:    v_mov_b32_e32 v2, 153702; GFX8-NEXT:    v_mov_b32_e32 v3, -13703; GFX8-NEXT:    v_and_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3704; GFX8-NEXT:    v_xor_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3705; GFX8-NEXT:    s_lshr_b32 s3, s1, 163706; GFX8-NEXT:    v_and_b32_e32 v0, 15, v03707; GFX8-NEXT:    s_lshl_b32 s0, s2, 13708; GFX8-NEXT:    v_lshlrev_b16_e64 v0, v0, s03709; GFX8-NEXT:    v_lshrrev_b16_e64 v2, v2, s33710; GFX8-NEXT:    v_or_b32_e32 v0, v0, v23711; GFX8-NEXT:    v_and_b32_e32 v0, 0xffff, v03712; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 16, v03713; GFX8-NEXT:    v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3714; GFX8-NEXT:    ; return to shader part epilog3715;3716; GFX9-LABEL: v_fshr_v2i16_ssv:3717; GFX9:       ; %bb.0:3718; GFX9-NEXT:    s_lshr_b32 s2, s0, 163719; GFX9-NEXT:    v_and_b32_e32 v1, 0xf000f, v03720; GFX9-NEXT:    v_xor_b32_e32 v0, -1, v03721; GFX9-NEXT:    s_lshl_b32 s0, s0, 0x100013722; GFX9-NEXT:    s_lshl_b32 s2, s2, 13723; GFX9-NEXT:    v_and_b32_e32 v0, 0xf000f, v03724; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s23725; GFX9-NEXT:    v_pk_lshlrev_b16 v0, v0, s03726; GFX9-NEXT:    v_pk_lshrrev_b16 v1, v1, s13727; GFX9-NEXT:    v_or_b32_e32 v0, v0, v13728; GFX9-NEXT:    ; return to shader part epilog3729;3730; GFX10-LABEL: v_fshr_v2i16_ssv:3731; GFX10:       ; %bb.0:3732; GFX10-NEXT:    v_xor_b32_e32 v1, -1, v03733; GFX10-NEXT:    s_lshr_b32 s2, s0, 163734; GFX10-NEXT:    v_and_b32_e32 v0, 0xf000f, v03735; GFX10-NEXT:    s_lshl_b32 s0, s0, 0x100013736; GFX10-NEXT:    s_lshl_b32 s2, s2, 13737; GFX10-NEXT:    v_and_b32_e32 v1, 0xf000f, v13738; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s23739; GFX10-NEXT:    v_pk_lshrrev_b16 v0, v0, s13740; GFX10-NEXT:    v_pk_lshlrev_b16 v1, v1, s03741; GFX10-NEXT:    v_or_b32_e32 v0, v1, v03742; GFX10-NEXT:    ; return to shader part epilog3743;3744; GFX11-LABEL: v_fshr_v2i16_ssv:3745; GFX11:       ; %bb.0:3746; GFX11-NEXT:    v_xor_b32_e32 v1, -1, v03747; GFX11-NEXT:    s_lshr_b32 s2, s0, 163748; GFX11-NEXT:    v_and_b32_e32 v0, 0xf000f, v03749; GFX11-NEXT:    s_lshl_b32 s0, s0, 0x100013750; GFX11-NEXT:    s_lshl_b32 s2, s2, 13751; GFX11-NEXT:    v_and_b32_e32 v1, 0xf000f, v13752; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s23753; GFX11-NEXT:    v_pk_lshrrev_b16 v0, v0, s13754; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3755; GFX11-NEXT:    v_pk_lshlrev_b16 v1, v1, s03756; GFX11-NEXT:    v_or_b32_e32 v0, v1, v03757; GFX11-NEXT:    ; return to shader part epilog3758  %result = call <2 x i16> @llvm.fshr.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)3759  %cast = bitcast <2 x i16> %result to float3760  ret float %cast3761}3762 3763define amdgpu_ps float @v_fshr_v2i16_svs(<2 x i16> inreg %lhs, <2 x i16> %rhs, <2 x i16> inreg %amt) {3764; GFX6-LABEL: v_fshr_v2i16_svs:3765; GFX6:       ; %bb.0:3766; GFX6-NEXT:    s_and_b32 s4, s2, 153767; GFX6-NEXT:    s_andn2_b32 s2, 15, s23768; GFX6-NEXT:    s_lshl_b32 s0, s0, 13769; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v03770; GFX6-NEXT:    s_lshl_b32 s0, s0, s23771; GFX6-NEXT:    v_lshrrev_b32_e32 v0, s4, v03772; GFX6-NEXT:    v_or_b32_e32 v0, s0, v03773; GFX6-NEXT:    s_and_b32 s0, s3, 153774; GFX6-NEXT:    s_andn2_b32 s2, 15, s33775; GFX6-NEXT:    s_lshl_b32 s1, s1, 13776; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v13777; GFX6-NEXT:    s_lshl_b32 s1, s1, s23778; GFX6-NEXT:    v_lshrrev_b32_e32 v1, s0, v13779; GFX6-NEXT:    v_or_b32_e32 v1, s1, v13780; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v13781; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v03782; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13783; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13784; GFX6-NEXT:    ; return to shader part epilog3785;3786; GFX8-LABEL: v_fshr_v2i16_svs:3787; GFX8:       ; %bb.0:3788; GFX8-NEXT:    s_lshr_b32 s2, s0, 163789; GFX8-NEXT:    s_lshr_b32 s3, s1, 163790; GFX8-NEXT:    s_and_b32 s4, s1, 153791; GFX8-NEXT:    s_andn2_b32 s1, 15, s13792; GFX8-NEXT:    s_lshl_b32 s0, s0, 13793; GFX8-NEXT:    s_lshl_b32 s0, s0, s13794; GFX8-NEXT:    v_lshrrev_b16_e32 v1, s4, v03795; GFX8-NEXT:    v_or_b32_e32 v1, s0, v13796; GFX8-NEXT:    s_and_b32 s0, s3, 153797; GFX8-NEXT:    s_andn2_b32 s1, 15, s33798; GFX8-NEXT:    s_lshl_b32 s2, s2, 13799; GFX8-NEXT:    v_mov_b32_e32 v2, s03800; GFX8-NEXT:    s_lshl_b32 s1, s2, s13801; GFX8-NEXT:    v_lshrrev_b16_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13802; GFX8-NEXT:    v_or_b32_e32 v0, s1, v03803; GFX8-NEXT:    v_and_b32_e32 v0, 0xffff, v03804; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 16, v03805; GFX8-NEXT:    v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3806; GFX8-NEXT:    ; return to shader part epilog3807;3808; GFX9-LABEL: v_fshr_v2i16_svs:3809; GFX9:       ; %bb.0:3810; GFX9-NEXT:    s_lshr_b32 s3, s0, 163811; GFX9-NEXT:    s_lshl_b32 s0, s0, 0x100013812; GFX9-NEXT:    s_lshl_b32 s3, s3, 13813; GFX9-NEXT:    s_and_b32 s2, s1, 0xf000f3814; GFX9-NEXT:    s_andn2_b32 s1, 0xf000f, s13815; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s33816; GFX9-NEXT:    s_lshr_b32 s3, s0, 163817; GFX9-NEXT:    s_lshr_b32 s4, s1, 163818; GFX9-NEXT:    s_lshl_b32 s0, s0, s13819; GFX9-NEXT:    s_lshl_b32 s1, s3, s43820; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s13821; GFX9-NEXT:    v_pk_lshrrev_b16 v0, s2, v03822; GFX9-NEXT:    v_or_b32_e32 v0, s0, v03823; GFX9-NEXT:    ; return to shader part epilog3824;3825; GFX10-LABEL: v_fshr_v2i16_svs:3826; GFX10:       ; %bb.0:3827; GFX10-NEXT:    s_lshr_b32 s2, s0, 163828; GFX10-NEXT:    s_lshl_b32 s0, s0, 0x100013829; GFX10-NEXT:    s_lshl_b32 s2, s2, 13830; GFX10-NEXT:    s_and_b32 s3, s1, 0xf000f3831; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s23832; GFX10-NEXT:    s_andn2_b32 s1, 0xf000f, s13833; GFX10-NEXT:    s_lshr_b32 s2, s0, 163834; GFX10-NEXT:    s_lshr_b32 s4, s1, 163835; GFX10-NEXT:    v_pk_lshrrev_b16 v0, s3, v03836; GFX10-NEXT:    s_lshl_b32 s0, s0, s13837; GFX10-NEXT:    s_lshl_b32 s1, s2, s43838; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s13839; GFX10-NEXT:    v_or_b32_e32 v0, s0, v03840; GFX10-NEXT:    ; return to shader part epilog3841;3842; GFX11-LABEL: v_fshr_v2i16_svs:3843; GFX11:       ; %bb.0:3844; GFX11-NEXT:    s_lshr_b32 s2, s0, 163845; GFX11-NEXT:    s_lshl_b32 s0, s0, 0x100013846; GFX11-NEXT:    s_lshl_b32 s2, s2, 13847; GFX11-NEXT:    s_and_b32 s3, s1, 0xf000f3848; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s23849; GFX11-NEXT:    s_and_not1_b32 s1, 0xf000f, s13850; GFX11-NEXT:    s_lshr_b32 s2, s0, 163851; GFX11-NEXT:    s_lshr_b32 s4, s1, 163852; GFX11-NEXT:    v_pk_lshrrev_b16 v0, s3, v03853; GFX11-NEXT:    s_lshl_b32 s0, s0, s13854; GFX11-NEXT:    s_lshl_b32 s1, s2, s43855; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)3856; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s13857; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)3858; GFX11-NEXT:    v_or_b32_e32 v0, s0, v03859; GFX11-NEXT:    ; return to shader part epilog3860  %result = call <2 x i16> @llvm.fshr.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)3861  %cast = bitcast <2 x i16> %result to float3862  ret float %cast3863}3864 3865define amdgpu_ps float @v_fshr_v2i16_vss(<2 x i16> %lhs, <2 x i16> inreg %rhs, <2 x i16> inreg %amt) {3866; GFX6-LABEL: v_fshr_v2i16_vss:3867; GFX6:       ; %bb.0:3868; GFX6-NEXT:    s_and_b32 s4, s2, 153869; GFX6-NEXT:    s_andn2_b32 s2, 15, s23870; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v03871; GFX6-NEXT:    s_and_b32 s0, s0, 0xffff3872; GFX6-NEXT:    v_lshlrev_b32_e32 v0, s2, v03873; GFX6-NEXT:    s_lshr_b32 s0, s0, s43874; GFX6-NEXT:    v_or_b32_e32 v0, s0, v03875; GFX6-NEXT:    s_and_b32 s0, s3, 153876; GFX6-NEXT:    s_andn2_b32 s2, 15, s33877; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 1, v13878; GFX6-NEXT:    s_and_b32 s1, s1, 0xffff3879; GFX6-NEXT:    v_lshlrev_b32_e32 v1, s2, v13880; GFX6-NEXT:    s_lshr_b32 s0, s1, s03881; GFX6-NEXT:    v_or_b32_e32 v1, s0, v13882; GFX6-NEXT:    v_and_b32_e32 v1, 0xffff, v13883; GFX6-NEXT:    v_and_b32_e32 v0, 0xffff, v03884; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 16, v13885; GFX6-NEXT:    v_or_b32_e32 v0, v0, v13886; GFX6-NEXT:    ; return to shader part epilog3887;3888; GFX8-LABEL: v_fshr_v2i16_vss:3889; GFX8:       ; %bb.0:3890; GFX8-NEXT:    s_lshr_b32 s2, s0, 163891; GFX8-NEXT:    s_lshr_b32 s3, s1, 163892; GFX8-NEXT:    s_and_b32 s4, s1, 153893; GFX8-NEXT:    s_andn2_b32 s1, 15, s13894; GFX8-NEXT:    v_lshlrev_b16_e32 v1, 1, v03895; GFX8-NEXT:    s_and_b32 s0, 0xffff, s03896; GFX8-NEXT:    v_lshlrev_b16_e32 v1, s1, v13897; GFX8-NEXT:    s_lshr_b32 s0, s0, s43898; GFX8-NEXT:    v_mov_b32_e32 v2, 13899; GFX8-NEXT:    v_or_b32_e32 v1, s0, v13900; GFX8-NEXT:    s_and_b32 s0, s3, 153901; GFX8-NEXT:    s_andn2_b32 s1, 15, s33902; GFX8-NEXT:    v_lshlrev_b16_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13903; GFX8-NEXT:    v_lshlrev_b16_e32 v0, s1, v03904; GFX8-NEXT:    s_lshr_b32 s0, s2, s03905; GFX8-NEXT:    v_or_b32_e32 v0, s0, v03906; GFX8-NEXT:    v_and_b32_e32 v0, 0xffff, v03907; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 16, v03908; GFX8-NEXT:    v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3909; GFX8-NEXT:    ; return to shader part epilog3910;3911; GFX9-LABEL: v_fshr_v2i16_vss:3912; GFX9:       ; %bb.0:3913; GFX9-NEXT:    s_and_b32 s2, s1, 0xf000f3914; GFX9-NEXT:    s_andn2_b32 s1, 0xf000f, s13915; GFX9-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]3916; GFX9-NEXT:    v_pk_lshlrev_b16 v0, s1, v03917; GFX9-NEXT:    s_lshr_b32 s1, s0, 163918; GFX9-NEXT:    s_and_b32 s0, s0, 0xffff3919; GFX9-NEXT:    s_lshr_b32 s3, s2, 163920; GFX9-NEXT:    s_lshr_b32 s0, s0, s23921; GFX9-NEXT:    s_lshr_b32 s1, s1, s33922; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s13923; GFX9-NEXT:    v_or_b32_e32 v0, s0, v03924; GFX9-NEXT:    ; return to shader part epilog3925;3926; GFX10-LABEL: v_fshr_v2i16_vss:3927; GFX10:       ; %bb.0:3928; GFX10-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]3929; GFX10-NEXT:    s_and_b32 s2, s1, 0xf000f3930; GFX10-NEXT:    s_andn2_b32 s1, 0xf000f, s13931; GFX10-NEXT:    s_lshr_b32 s3, s0, 163932; GFX10-NEXT:    s_and_b32 s0, s0, 0xffff3933; GFX10-NEXT:    s_lshr_b32 s4, s2, 163934; GFX10-NEXT:    v_pk_lshlrev_b16 v0, s1, v03935; GFX10-NEXT:    s_lshr_b32 s0, s0, s23936; GFX10-NEXT:    s_lshr_b32 s1, s3, s43937; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s13938; GFX10-NEXT:    v_or_b32_e32 v0, s0, v03939; GFX10-NEXT:    ; return to shader part epilog3940;3941; GFX11-LABEL: v_fshr_v2i16_vss:3942; GFX11:       ; %bb.0:3943; GFX11-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]3944; GFX11-NEXT:    s_and_b32 s2, s1, 0xf000f3945; GFX11-NEXT:    s_and_not1_b32 s1, 0xf000f, s13946; GFX11-NEXT:    s_lshr_b32 s3, s0, 163947; GFX11-NEXT:    s_and_b32 s0, s0, 0xffff3948; GFX11-NEXT:    s_lshr_b32 s4, s2, 163949; GFX11-NEXT:    v_pk_lshlrev_b16 v0, s1, v03950; GFX11-NEXT:    s_lshr_b32 s0, s0, s23951; GFX11-NEXT:    s_lshr_b32 s1, s3, s43952; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)3953; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s13954; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)3955; GFX11-NEXT:    v_or_b32_e32 v0, s0, v03956; GFX11-NEXT:    ; return to shader part epilog3957  %result = call <2 x i16> @llvm.fshr.v2i16(<2 x i16> %lhs, <2 x i16> %rhs, <2 x i16> %amt)3958  %cast = bitcast <2 x i16> %result to float3959  ret float %cast3960}3961 3962define amdgpu_ps i48 @s_fshr_v3i16(<3 x i16> inreg %lhs, <3 x i16> inreg %rhs, <3 x i16> inreg %amt) {3963; GFX6-LABEL: s_fshr_v3i16:3964; GFX6:       ; %bb.0:3965; GFX6-NEXT:    s_and_b32 s9, s6, 153966; GFX6-NEXT:    s_andn2_b32 s6, 15, s63967; GFX6-NEXT:    s_lshl_b32 s0, s0, 13968; GFX6-NEXT:    s_and_b32 s3, s3, 0xffff3969; GFX6-NEXT:    s_lshl_b32 s0, s0, s63970; GFX6-NEXT:    s_lshr_b32 s3, s3, s93971; GFX6-NEXT:    s_or_b32 s0, s0, s33972; GFX6-NEXT:    s_and_b32 s3, s7, 153973; GFX6-NEXT:    s_andn2_b32 s6, 15, s73974; GFX6-NEXT:    s_lshl_b32 s1, s1, 13975; GFX6-NEXT:    s_and_b32 s4, s4, 0xffff3976; GFX6-NEXT:    s_lshl_b32 s1, s1, s63977; GFX6-NEXT:    s_lshr_b32 s3, s4, s33978; GFX6-NEXT:    s_andn2_b32 s4, 15, s83979; GFX6-NEXT:    s_lshl_b32 s2, s2, 13980; GFX6-NEXT:    s_or_b32 s1, s1, s33981; GFX6-NEXT:    s_and_b32 s3, s8, 153982; GFX6-NEXT:    s_lshl_b32 s2, s2, s43983; GFX6-NEXT:    s_and_b32 s4, s5, 0xffff3984; GFX6-NEXT:    s_lshr_b32 s3, s4, s33985; GFX6-NEXT:    s_and_b32 s1, 0xffff, s13986; GFX6-NEXT:    s_or_b32 s2, s2, s33987; GFX6-NEXT:    s_and_b32 s0, 0xffff, s03988; GFX6-NEXT:    s_lshl_b32 s1, s1, 163989; GFX6-NEXT:    s_or_b32 s0, s0, s13990; GFX6-NEXT:    s_and_b32 s1, 0xffff, s23991; GFX6-NEXT:    ; return to shader part epilog3992;3993; GFX8-LABEL: s_fshr_v3i16:3994; GFX8:       ; %bb.0:3995; GFX8-NEXT:    s_lshr_b32 s6, s0, 163996; GFX8-NEXT:    s_lshr_b32 s7, s2, 163997; GFX8-NEXT:    s_lshr_b32 s8, s4, 163998; GFX8-NEXT:    s_and_b32 s9, s4, 153999; GFX8-NEXT:    s_andn2_b32 s4, 15, s44000; GFX8-NEXT:    s_lshl_b32 s0, s0, 14001; GFX8-NEXT:    s_and_b32 s2, 0xffff, s24002; GFX8-NEXT:    s_lshl_b32 s0, s0, s44003; GFX8-NEXT:    s_lshr_b32 s2, s2, s94004; GFX8-NEXT:    s_or_b32 s0, s0, s24005; GFX8-NEXT:    s_and_b32 s2, s8, 154006; GFX8-NEXT:    s_andn2_b32 s4, 15, s84007; GFX8-NEXT:    s_lshl_b32 s6, s6, 14008; GFX8-NEXT:    s_lshl_b32 s4, s6, s44009; GFX8-NEXT:    s_lshr_b32 s2, s7, s24010; GFX8-NEXT:    s_or_b32 s2, s4, s24011; GFX8-NEXT:    s_and_b32 s4, s5, 154012; GFX8-NEXT:    s_andn2_b32 s5, 15, s54013; GFX8-NEXT:    s_lshl_b32 s1, s1, 14014; GFX8-NEXT:    s_and_b32 s3, 0xffff, s34015; GFX8-NEXT:    s_lshl_b32 s1, s1, s54016; GFX8-NEXT:    s_lshr_b32 s3, s3, s44017; GFX8-NEXT:    s_and_b32 s2, 0xffff, s24018; GFX8-NEXT:    s_or_b32 s1, s1, s34019; GFX8-NEXT:    s_and_b32 s0, 0xffff, s04020; GFX8-NEXT:    s_lshl_b32 s2, s2, 164021; GFX8-NEXT:    s_or_b32 s0, s0, s24022; GFX8-NEXT:    s_and_b32 s1, 0xffff, s14023; GFX8-NEXT:    ; return to shader part epilog4024;4025; GFX9-LABEL: s_fshr_v3i16:4026; GFX9:       ; %bb.0:4027; GFX9-NEXT:    s_lshr_b32 s7, s0, 164028; GFX9-NEXT:    s_lshl_b32 s0, s0, 0x100014029; GFX9-NEXT:    s_lshl_b32 s7, s7, 14030; GFX9-NEXT:    s_and_b32 s6, s4, 0xf000f4031; GFX9-NEXT:    s_andn2_b32 s4, 0xf000f, s44032; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s74033; GFX9-NEXT:    s_lshr_b32 s7, s0, 164034; GFX9-NEXT:    s_lshr_b32 s8, s4, 164035; GFX9-NEXT:    s_lshl_b32 s0, s0, s44036; GFX9-NEXT:    s_lshl_b32 s4, s7, s84037; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s44038; GFX9-NEXT:    s_lshr_b32 s4, s2, 164039; GFX9-NEXT:    s_and_b32 s2, s2, 0xffff4040; GFX9-NEXT:    s_lshr_b32 s7, s6, 164041; GFX9-NEXT:    s_lshr_b32 s2, s2, s64042; GFX9-NEXT:    s_lshr_b32 s4, s4, s74043; GFX9-NEXT:    s_pack_ll_b32_b16 s2, s2, s44044; GFX9-NEXT:    s_or_b32 s0, s0, s24045; GFX9-NEXT:    s_and_b32 s2, s5, 0xf000f4046; GFX9-NEXT:    s_andn2_b32 s4, 0xf000f, s54047; GFX9-NEXT:    s_lshr_b32 s5, s1, 164048; GFX9-NEXT:    s_lshl_b32 s1, s1, 0x100014049; GFX9-NEXT:    s_lshl_b32 s5, s5, 14050; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s54051; GFX9-NEXT:    s_lshr_b32 s5, s1, 164052; GFX9-NEXT:    s_lshr_b32 s6, s4, 164053; GFX9-NEXT:    s_lshl_b32 s1, s1, s44054; GFX9-NEXT:    s_lshl_b32 s4, s5, s64055; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s44056; GFX9-NEXT:    s_lshr_b32 s4, s3, 164057; GFX9-NEXT:    s_and_b32 s3, s3, 0xffff4058; GFX9-NEXT:    s_lshr_b32 s5, s2, 164059; GFX9-NEXT:    s_lshr_b32 s2, s3, s24060; GFX9-NEXT:    s_lshr_b32 s3, s4, s54061; GFX9-NEXT:    s_pack_ll_b32_b16 s2, s2, s34062; GFX9-NEXT:    s_or_b32 s1, s1, s24063; GFX9-NEXT:    s_lshr_b32 s2, s0, 164064; GFX9-NEXT:    s_and_b32 s0, s0, 0xffff4065; GFX9-NEXT:    s_lshl_b32 s2, s2, 164066; GFX9-NEXT:    s_or_b32 s0, s0, s24067; GFX9-NEXT:    s_and_b32 s1, s1, 0xffff4068; GFX9-NEXT:    ; return to shader part epilog4069;4070; GFX10-LABEL: s_fshr_v3i16:4071; GFX10:       ; %bb.0:4072; GFX10-NEXT:    s_lshr_b32 s6, s0, 164073; GFX10-NEXT:    s_lshl_b32 s0, s0, 0x100014074; GFX10-NEXT:    s_lshl_b32 s6, s6, 14075; GFX10-NEXT:    s_and_b32 s7, s4, 0xf000f4076; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s64077; GFX10-NEXT:    s_andn2_b32 s4, 0xf000f, s44078; GFX10-NEXT:    s_lshr_b32 s6, s0, 164079; GFX10-NEXT:    s_lshr_b32 s8, s4, 164080; GFX10-NEXT:    s_lshl_b32 s0, s0, s44081; GFX10-NEXT:    s_lshl_b32 s4, s6, s84082; GFX10-NEXT:    s_lshr_b32 s6, s2, 164083; GFX10-NEXT:    s_and_b32 s2, s2, 0xffff4084; GFX10-NEXT:    s_lshr_b32 s8, s7, 164085; GFX10-NEXT:    s_lshr_b32 s2, s2, s74086; GFX10-NEXT:    s_lshr_b32 s6, s6, s84087; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s44088; GFX10-NEXT:    s_pack_ll_b32_b16 s2, s2, s64089; GFX10-NEXT:    s_and_b32 s4, s5, 0xf000f4090; GFX10-NEXT:    s_or_b32 s0, s0, s24091; GFX10-NEXT:    s_lshr_b32 s2, s1, 164092; GFX10-NEXT:    s_lshl_b32 s1, s1, 0x100014093; GFX10-NEXT:    s_lshl_b32 s2, s2, 14094; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s24095; GFX10-NEXT:    s_andn2_b32 s2, 0xf000f, s54096; GFX10-NEXT:    s_lshr_b32 s5, s1, 164097; GFX10-NEXT:    s_lshr_b32 s6, s2, 164098; GFX10-NEXT:    s_lshl_b32 s1, s1, s24099; GFX10-NEXT:    s_lshl_b32 s2, s5, s64100; GFX10-NEXT:    s_lshr_b32 s5, s3, 164101; GFX10-NEXT:    s_and_b32 s3, s3, 0xffff4102; GFX10-NEXT:    s_lshr_b32 s6, s4, 164103; GFX10-NEXT:    s_lshr_b32 s3, s3, s44104; GFX10-NEXT:    s_lshr_b32 s4, s5, s64105; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s24106; GFX10-NEXT:    s_pack_ll_b32_b16 s2, s3, s44107; GFX10-NEXT:    s_lshr_b32 s3, s0, 164108; GFX10-NEXT:    s_and_b32 s0, s0, 0xffff4109; GFX10-NEXT:    s_lshl_b32 s3, s3, 164110; GFX10-NEXT:    s_or_b32 s1, s1, s24111; GFX10-NEXT:    s_or_b32 s0, s0, s34112; GFX10-NEXT:    s_and_b32 s1, s1, 0xffff4113; GFX10-NEXT:    ; return to shader part epilog4114;4115; GFX11-LABEL: s_fshr_v3i16:4116; GFX11:       ; %bb.0:4117; GFX11-NEXT:    s_lshr_b32 s6, s0, 164118; GFX11-NEXT:    s_lshl_b32 s0, s0, 0x100014119; GFX11-NEXT:    s_lshl_b32 s6, s6, 14120; GFX11-NEXT:    s_and_b32 s7, s4, 0xf000f4121; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s64122; GFX11-NEXT:    s_and_not1_b32 s4, 0xf000f, s44123; GFX11-NEXT:    s_lshr_b32 s6, s0, 164124; GFX11-NEXT:    s_lshr_b32 s8, s4, 164125; GFX11-NEXT:    s_lshl_b32 s0, s0, s44126; GFX11-NEXT:    s_lshl_b32 s4, s6, s84127; GFX11-NEXT:    s_lshr_b32 s6, s2, 164128; GFX11-NEXT:    s_and_b32 s2, s2, 0xffff4129; GFX11-NEXT:    s_lshr_b32 s8, s7, 164130; GFX11-NEXT:    s_lshr_b32 s2, s2, s74131; GFX11-NEXT:    s_lshr_b32 s6, s6, s84132; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s44133; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s64134; GFX11-NEXT:    s_and_b32 s4, s5, 0xf000f4135; GFX11-NEXT:    s_or_b32 s0, s0, s24136; GFX11-NEXT:    s_lshr_b32 s2, s1, 164137; GFX11-NEXT:    s_lshl_b32 s1, s1, 0x100014138; GFX11-NEXT:    s_lshl_b32 s2, s2, 14139; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)4140; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s24141; GFX11-NEXT:    s_and_not1_b32 s2, 0xf000f, s54142; GFX11-NEXT:    s_lshr_b32 s5, s1, 164143; GFX11-NEXT:    s_lshr_b32 s6, s2, 164144; GFX11-NEXT:    s_lshl_b32 s1, s1, s24145; GFX11-NEXT:    s_lshl_b32 s2, s5, s64146; GFX11-NEXT:    s_lshr_b32 s5, s3, 164147; GFX11-NEXT:    s_and_b32 s3, s3, 0xffff4148; GFX11-NEXT:    s_lshr_b32 s6, s4, 164149; GFX11-NEXT:    s_lshr_b32 s3, s3, s44150; GFX11-NEXT:    s_lshr_b32 s4, s5, s64151; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s24152; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s3, s44153; GFX11-NEXT:    s_lshr_b32 s3, s0, 164154; GFX11-NEXT:    s_and_b32 s0, s0, 0xffff4155; GFX11-NEXT:    s_lshl_b32 s3, s3, 164156; GFX11-NEXT:    s_or_b32 s1, s1, s24157; GFX11-NEXT:    s_or_b32 s0, s0, s34158; GFX11-NEXT:    s_and_b32 s1, s1, 0xffff4159; GFX11-NEXT:    ; return to shader part epilog4160  %result = call <3 x i16> @llvm.fshr.v3i16(<3 x i16> %lhs, <3 x i16> %rhs, <3 x i16> %amt)4161  %cast = bitcast <3 x i16> %result to i484162  ret i48 %cast4163}4164 4165define <3 x half> @v_fshr_v3i16(<3 x i16> %lhs, <3 x i16> %rhs, <3 x i16> %amt) {4166; GFX6-LABEL: v_fshr_v3i16:4167; GFX6:       ; %bb.0:4168; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4169; GFX6-NEXT:    v_and_b32_e32 v9, 15, v64170; GFX6-NEXT:    v_xor_b32_e32 v6, -1, v64171; GFX6-NEXT:    v_and_b32_e32 v6, 15, v64172; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v04173; GFX6-NEXT:    v_and_b32_e32 v3, 0xffff, v34174; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v6, v04175; GFX6-NEXT:    v_lshrrev_b32_e32 v3, v9, v34176; GFX6-NEXT:    v_or_b32_e32 v0, v0, v34177; GFX6-NEXT:    v_and_b32_e32 v3, 15, v74178; GFX6-NEXT:    v_xor_b32_e32 v6, -1, v74179; GFX6-NEXT:    v_and_b32_e32 v4, 0xffff, v44180; GFX6-NEXT:    v_and_b32_e32 v6, 15, v64181; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 1, v14182; GFX6-NEXT:    v_lshrrev_b32_e32 v3, v3, v44183; GFX6-NEXT:    v_xor_b32_e32 v4, -1, v84184; GFX6-NEXT:    v_lshlrev_b32_e32 v1, v6, v14185; GFX6-NEXT:    v_and_b32_e32 v4, 15, v44186; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 1, v24187; GFX6-NEXT:    v_or_b32_e32 v1, v1, v34188; GFX6-NEXT:    v_and_b32_e32 v3, 15, v84189; GFX6-NEXT:    v_lshlrev_b32_e32 v2, v4, v24190; GFX6-NEXT:    v_and_b32_e32 v4, 0xffff, v54191; GFX6-NEXT:    v_lshrrev_b32_e32 v3, v3, v44192; GFX6-NEXT:    v_or_b32_e32 v2, v2, v34193; GFX6-NEXT:    s_setpc_b64 s[30:31]4194;4195; GFX8-LABEL: v_fshr_v3i16:4196; GFX8:       ; %bb.0:4197; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4198; GFX8-NEXT:    v_xor_b32_e32 v7, -1, v44199; GFX8-NEXT:    v_and_b32_e32 v6, 15, v44200; GFX8-NEXT:    v_and_b32_e32 v7, 15, v74201; GFX8-NEXT:    v_lshlrev_b16_e32 v8, 1, v04202; GFX8-NEXT:    v_lshlrev_b16_e32 v7, v7, v84203; GFX8-NEXT:    v_lshrrev_b16_e32 v6, v6, v24204; GFX8-NEXT:    v_or_b32_e32 v6, v7, v64205; GFX8-NEXT:    v_mov_b32_e32 v7, 154206; GFX8-NEXT:    v_mov_b32_e32 v8, -14207; GFX8-NEXT:    v_and_b32_sdwa v7, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4208; GFX8-NEXT:    v_xor_b32_sdwa v4, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4209; GFX8-NEXT:    v_mov_b32_e32 v8, 14210; GFX8-NEXT:    v_and_b32_e32 v4, 15, v44211; GFX8-NEXT:    v_lshlrev_b16_sdwa v0, v8, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14212; GFX8-NEXT:    v_lshlrev_b16_e32 v0, v4, v04213; GFX8-NEXT:    v_lshrrev_b16_sdwa v2, v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14214; GFX8-NEXT:    v_xor_b32_e32 v4, -1, v54215; GFX8-NEXT:    v_or_b32_e32 v0, v0, v24216; GFX8-NEXT:    v_and_b32_e32 v2, 15, v54217; GFX8-NEXT:    v_and_b32_e32 v4, 15, v44218; GFX8-NEXT:    v_lshlrev_b16_e32 v1, 1, v14219; GFX8-NEXT:    v_lshlrev_b16_e32 v1, v4, v14220; GFX8-NEXT:    v_lshrrev_b16_e32 v2, v2, v34221; GFX8-NEXT:    v_and_b32_e32 v0, 0xffff, v04222; GFX8-NEXT:    v_or_b32_e32 v1, v1, v24223; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 16, v04224; GFX8-NEXT:    v_or_b32_sdwa v0, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4225; GFX8-NEXT:    v_and_b32_e32 v1, 0xffff, v14226; GFX8-NEXT:    s_setpc_b64 s[30:31]4227;4228; GFX9-LABEL: v_fshr_v3i16:4229; GFX9:       ; %bb.0:4230; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4231; GFX9-NEXT:    v_and_b32_e32 v6, 0xf000f, v44232; GFX9-NEXT:    v_xor_b32_e32 v4, -1, v44233; GFX9-NEXT:    v_and_b32_e32 v4, 0xf000f, v44234; GFX9-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]4235; GFX9-NEXT:    v_pk_lshlrev_b16 v0, v4, v04236; GFX9-NEXT:    v_pk_lshrrev_b16 v2, v6, v24237; GFX9-NEXT:    v_xor_b32_e32 v4, -1, v54238; GFX9-NEXT:    v_or_b32_e32 v0, v0, v24239; GFX9-NEXT:    v_and_b32_e32 v2, 0xf000f, v54240; GFX9-NEXT:    v_and_b32_e32 v4, 0xf000f, v44241; GFX9-NEXT:    v_pk_lshlrev_b16 v1, 1, v1 op_sel_hi:[0,1]4242; GFX9-NEXT:    v_pk_lshlrev_b16 v1, v4, v14243; GFX9-NEXT:    v_pk_lshrrev_b16 v2, v2, v34244; GFX9-NEXT:    v_or_b32_e32 v1, v1, v24245; GFX9-NEXT:    s_setpc_b64 s[30:31]4246;4247; GFX10-LABEL: v_fshr_v3i16:4248; GFX10:       ; %bb.0:4249; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4250; GFX10-NEXT:    v_xor_b32_e32 v6, -1, v44251; GFX10-NEXT:    v_xor_b32_e32 v7, -1, v54252; GFX10-NEXT:    v_and_b32_e32 v4, 0xf000f, v44253; GFX10-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]4254; GFX10-NEXT:    v_and_b32_e32 v5, 0xf000f, v54255; GFX10-NEXT:    v_and_b32_e32 v6, 0xf000f, v64256; GFX10-NEXT:    v_pk_lshlrev_b16 v1, 1, v1 op_sel_hi:[0,1]4257; GFX10-NEXT:    v_and_b32_e32 v7, 0xf000f, v74258; GFX10-NEXT:    v_pk_lshrrev_b16 v2, v4, v24259; GFX10-NEXT:    v_pk_lshrrev_b16 v3, v5, v34260; GFX10-NEXT:    v_pk_lshlrev_b16 v0, v6, v04261; GFX10-NEXT:    v_pk_lshlrev_b16 v1, v7, v14262; GFX10-NEXT:    v_or_b32_e32 v0, v0, v24263; GFX10-NEXT:    v_or_b32_e32 v1, v1, v34264; GFX10-NEXT:    s_setpc_b64 s[30:31]4265;4266; GFX11-LABEL: v_fshr_v3i16:4267; GFX11:       ; %bb.0:4268; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4269; GFX11-NEXT:    v_xor_b32_e32 v6, -1, v44270; GFX11-NEXT:    v_xor_b32_e32 v7, -1, v54271; GFX11-NEXT:    v_and_b32_e32 v4, 0xf000f, v44272; GFX11-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]4273; GFX11-NEXT:    v_and_b32_e32 v5, 0xf000f, v54274; GFX11-NEXT:    v_and_b32_e32 v6, 0xf000f, v64275; GFX11-NEXT:    v_pk_lshlrev_b16 v1, 1, v1 op_sel_hi:[0,1]4276; GFX11-NEXT:    v_and_b32_e32 v7, 0xf000f, v74277; GFX11-NEXT:    v_pk_lshrrev_b16 v2, v4, v24278; GFX11-NEXT:    v_pk_lshrrev_b16 v3, v5, v34279; GFX11-NEXT:    v_pk_lshlrev_b16 v0, v6, v04280; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)4281; GFX11-NEXT:    v_pk_lshlrev_b16 v1, v7, v14282; GFX11-NEXT:    v_or_b32_e32 v0, v0, v24283; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2)4284; GFX11-NEXT:    v_or_b32_e32 v1, v1, v34285; GFX11-NEXT:    s_setpc_b64 s[30:31]4286  %result = call <3 x i16> @llvm.fshr.v3i16(<3 x i16> %lhs, <3 x i16> %rhs, <3 x i16> %amt)4287  %cast.result = bitcast <3 x i16> %result to <3 x half>4288  ret <3 x half> %cast.result4289}4290 4291define amdgpu_ps <2 x i32> @s_fshr_v4i16(<4 x i16> inreg %lhs, <4 x i16> inreg %rhs, <4 x i16> inreg %amt) {4292; GFX6-LABEL: s_fshr_v4i16:4293; GFX6:       ; %bb.0:4294; GFX6-NEXT:    s_and_b32 s12, s8, 154295; GFX6-NEXT:    s_andn2_b32 s8, 15, s84296; GFX6-NEXT:    s_lshl_b32 s0, s0, 14297; GFX6-NEXT:    s_and_b32 s4, s4, 0xffff4298; GFX6-NEXT:    s_lshl_b32 s0, s0, s84299; GFX6-NEXT:    s_lshr_b32 s4, s4, s124300; GFX6-NEXT:    s_or_b32 s0, s0, s44301; GFX6-NEXT:    s_and_b32 s4, s9, 154302; GFX6-NEXT:    s_andn2_b32 s8, 15, s94303; GFX6-NEXT:    s_lshl_b32 s1, s1, 14304; GFX6-NEXT:    s_and_b32 s5, s5, 0xffff4305; GFX6-NEXT:    s_lshl_b32 s1, s1, s84306; GFX6-NEXT:    s_lshr_b32 s4, s5, s44307; GFX6-NEXT:    s_or_b32 s1, s1, s44308; GFX6-NEXT:    s_and_b32 s1, 0xffff, s14309; GFX6-NEXT:    s_and_b32 s0, 0xffff, s04310; GFX6-NEXT:    s_lshl_b32 s1, s1, 164311; GFX6-NEXT:    s_andn2_b32 s4, 15, s104312; GFX6-NEXT:    s_lshl_b32 s2, s2, 14313; GFX6-NEXT:    s_or_b32 s0, s0, s14314; GFX6-NEXT:    s_and_b32 s1, s10, 154315; GFX6-NEXT:    s_lshl_b32 s2, s2, s44316; GFX6-NEXT:    s_and_b32 s4, s6, 0xffff4317; GFX6-NEXT:    s_lshr_b32 s1, s4, s14318; GFX6-NEXT:    s_andn2_b32 s4, 15, s114319; GFX6-NEXT:    s_lshl_b32 s3, s3, 14320; GFX6-NEXT:    s_or_b32 s1, s2, s14321; GFX6-NEXT:    s_and_b32 s2, s11, 154322; GFX6-NEXT:    s_lshl_b32 s3, s3, s44323; GFX6-NEXT:    s_and_b32 s4, s7, 0xffff4324; GFX6-NEXT:    s_lshr_b32 s2, s4, s24325; GFX6-NEXT:    s_or_b32 s2, s3, s24326; GFX6-NEXT:    s_and_b32 s2, 0xffff, s24327; GFX6-NEXT:    s_and_b32 s1, 0xffff, s14328; GFX6-NEXT:    s_lshl_b32 s2, s2, 164329; GFX6-NEXT:    s_or_b32 s1, s1, s24330; GFX6-NEXT:    ; return to shader part epilog4331;4332; GFX8-LABEL: s_fshr_v4i16:4333; GFX8:       ; %bb.0:4334; GFX8-NEXT:    s_lshr_b32 s6, s0, 164335; GFX8-NEXT:    s_lshr_b32 s7, s2, 164336; GFX8-NEXT:    s_lshr_b32 s8, s4, 164337; GFX8-NEXT:    s_and_b32 s9, s4, 154338; GFX8-NEXT:    s_andn2_b32 s4, 15, s44339; GFX8-NEXT:    s_lshl_b32 s0, s0, 14340; GFX8-NEXT:    s_and_b32 s2, 0xffff, s24341; GFX8-NEXT:    s_lshl_b32 s0, s0, s44342; GFX8-NEXT:    s_lshr_b32 s2, s2, s94343; GFX8-NEXT:    s_or_b32 s0, s0, s24344; GFX8-NEXT:    s_and_b32 s2, s8, 154345; GFX8-NEXT:    s_andn2_b32 s4, 15, s84346; GFX8-NEXT:    s_lshl_b32 s6, s6, 14347; GFX8-NEXT:    s_lshl_b32 s4, s6, s44348; GFX8-NEXT:    s_lshr_b32 s2, s7, s24349; GFX8-NEXT:    s_or_b32 s2, s4, s24350; GFX8-NEXT:    s_and_b32 s2, 0xffff, s24351; GFX8-NEXT:    s_and_b32 s0, 0xffff, s04352; GFX8-NEXT:    s_lshl_b32 s2, s2, 164353; GFX8-NEXT:    s_or_b32 s0, s0, s24354; GFX8-NEXT:    s_lshr_b32 s2, s1, 164355; GFX8-NEXT:    s_lshr_b32 s4, s3, 164356; GFX8-NEXT:    s_lshr_b32 s6, s5, 164357; GFX8-NEXT:    s_and_b32 s7, s5, 154358; GFX8-NEXT:    s_andn2_b32 s5, 15, s54359; GFX8-NEXT:    s_lshl_b32 s1, s1, 14360; GFX8-NEXT:    s_and_b32 s3, 0xffff, s34361; GFX8-NEXT:    s_lshl_b32 s1, s1, s54362; GFX8-NEXT:    s_lshr_b32 s3, s3, s74363; GFX8-NEXT:    s_or_b32 s1, s1, s34364; GFX8-NEXT:    s_and_b32 s3, s6, 154365; GFX8-NEXT:    s_andn2_b32 s5, 15, s64366; GFX8-NEXT:    s_lshl_b32 s2, s2, 14367; GFX8-NEXT:    s_lshl_b32 s2, s2, s54368; GFX8-NEXT:    s_lshr_b32 s3, s4, s34369; GFX8-NEXT:    s_or_b32 s2, s2, s34370; GFX8-NEXT:    s_and_b32 s2, 0xffff, s24371; GFX8-NEXT:    s_and_b32 s1, 0xffff, s14372; GFX8-NEXT:    s_lshl_b32 s2, s2, 164373; GFX8-NEXT:    s_or_b32 s1, s1, s24374; GFX8-NEXT:    ; return to shader part epilog4375;4376; GFX9-LABEL: s_fshr_v4i16:4377; GFX9:       ; %bb.0:4378; GFX9-NEXT:    s_lshr_b32 s7, s0, 164379; GFX9-NEXT:    s_lshl_b32 s0, s0, 0x100014380; GFX9-NEXT:    s_lshl_b32 s7, s7, 14381; GFX9-NEXT:    s_and_b32 s6, s4, 0xf000f4382; GFX9-NEXT:    s_andn2_b32 s4, 0xf000f, s44383; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s74384; GFX9-NEXT:    s_lshr_b32 s7, s0, 164385; GFX9-NEXT:    s_lshr_b32 s8, s4, 164386; GFX9-NEXT:    s_lshl_b32 s0, s0, s44387; GFX9-NEXT:    s_lshl_b32 s4, s7, s84388; GFX9-NEXT:    s_pack_ll_b32_b16 s0, s0, s44389; GFX9-NEXT:    s_lshr_b32 s4, s2, 164390; GFX9-NEXT:    s_and_b32 s2, s2, 0xffff4391; GFX9-NEXT:    s_lshr_b32 s7, s6, 164392; GFX9-NEXT:    s_lshr_b32 s2, s2, s64393; GFX9-NEXT:    s_lshr_b32 s4, s4, s74394; GFX9-NEXT:    s_pack_ll_b32_b16 s2, s2, s44395; GFX9-NEXT:    s_or_b32 s0, s0, s24396; GFX9-NEXT:    s_and_b32 s2, s5, 0xf000f4397; GFX9-NEXT:    s_andn2_b32 s4, 0xf000f, s54398; GFX9-NEXT:    s_lshr_b32 s5, s1, 164399; GFX9-NEXT:    s_lshl_b32 s1, s1, 0x100014400; GFX9-NEXT:    s_lshl_b32 s5, s5, 14401; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s54402; GFX9-NEXT:    s_lshr_b32 s5, s1, 164403; GFX9-NEXT:    s_lshr_b32 s6, s4, 164404; GFX9-NEXT:    s_lshl_b32 s1, s1, s44405; GFX9-NEXT:    s_lshl_b32 s4, s5, s64406; GFX9-NEXT:    s_pack_ll_b32_b16 s1, s1, s44407; GFX9-NEXT:    s_lshr_b32 s4, s3, 164408; GFX9-NEXT:    s_and_b32 s3, s3, 0xffff4409; GFX9-NEXT:    s_lshr_b32 s5, s2, 164410; GFX9-NEXT:    s_lshr_b32 s2, s3, s24411; GFX9-NEXT:    s_lshr_b32 s3, s4, s54412; GFX9-NEXT:    s_pack_ll_b32_b16 s2, s2, s34413; GFX9-NEXT:    s_or_b32 s1, s1, s24414; GFX9-NEXT:    ; return to shader part epilog4415;4416; GFX10-LABEL: s_fshr_v4i16:4417; GFX10:       ; %bb.0:4418; GFX10-NEXT:    s_lshr_b32 s6, s0, 164419; GFX10-NEXT:    s_lshl_b32 s0, s0, 0x100014420; GFX10-NEXT:    s_lshl_b32 s6, s6, 14421; GFX10-NEXT:    s_and_b32 s7, s4, 0xf000f4422; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s64423; GFX10-NEXT:    s_andn2_b32 s4, 0xf000f, s44424; GFX10-NEXT:    s_lshr_b32 s6, s0, 164425; GFX10-NEXT:    s_lshr_b32 s8, s4, 164426; GFX10-NEXT:    s_lshl_b32 s0, s0, s44427; GFX10-NEXT:    s_lshl_b32 s4, s6, s84428; GFX10-NEXT:    s_lshr_b32 s6, s2, 164429; GFX10-NEXT:    s_pack_ll_b32_b16 s0, s0, s44430; GFX10-NEXT:    s_lshr_b32 s4, s1, 164431; GFX10-NEXT:    s_and_b32 s2, s2, 0xffff4432; GFX10-NEXT:    s_lshr_b32 s8, s7, 164433; GFX10-NEXT:    s_lshl_b32 s1, s1, 0x100014434; GFX10-NEXT:    s_lshl_b32 s4, s4, 14435; GFX10-NEXT:    s_lshr_b32 s2, s2, s74436; GFX10-NEXT:    s_lshr_b32 s6, s6, s84437; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s44438; GFX10-NEXT:    s_andn2_b32 s4, 0xf000f, s54439; GFX10-NEXT:    s_pack_ll_b32_b16 s2, s2, s64440; GFX10-NEXT:    s_and_b32 s6, s5, 0xf000f4441; GFX10-NEXT:    s_lshr_b32 s5, s1, 164442; GFX10-NEXT:    s_lshr_b32 s7, s4, 164443; GFX10-NEXT:    s_lshl_b32 s1, s1, s44444; GFX10-NEXT:    s_lshl_b32 s4, s5, s74445; GFX10-NEXT:    s_lshr_b32 s5, s3, 164446; GFX10-NEXT:    s_and_b32 s3, s3, 0xffff4447; GFX10-NEXT:    s_lshr_b32 s7, s6, 164448; GFX10-NEXT:    s_lshr_b32 s3, s3, s64449; GFX10-NEXT:    s_lshr_b32 s5, s5, s74450; GFX10-NEXT:    s_pack_ll_b32_b16 s1, s1, s44451; GFX10-NEXT:    s_pack_ll_b32_b16 s3, s3, s54452; GFX10-NEXT:    s_or_b32 s0, s0, s24453; GFX10-NEXT:    s_or_b32 s1, s1, s34454; GFX10-NEXT:    ; return to shader part epilog4455;4456; GFX11-LABEL: s_fshr_v4i16:4457; GFX11:       ; %bb.0:4458; GFX11-NEXT:    s_lshr_b32 s6, s0, 164459; GFX11-NEXT:    s_lshl_b32 s0, s0, 0x100014460; GFX11-NEXT:    s_lshl_b32 s6, s6, 14461; GFX11-NEXT:    s_and_b32 s7, s4, 0xf000f4462; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s64463; GFX11-NEXT:    s_and_not1_b32 s4, 0xf000f, s44464; GFX11-NEXT:    s_lshr_b32 s6, s0, 164465; GFX11-NEXT:    s_lshr_b32 s8, s4, 164466; GFX11-NEXT:    s_lshl_b32 s0, s0, s44467; GFX11-NEXT:    s_lshl_b32 s4, s6, s84468; GFX11-NEXT:    s_lshr_b32 s6, s2, 164469; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s44470; GFX11-NEXT:    s_lshr_b32 s4, s1, 164471; GFX11-NEXT:    s_and_b32 s2, s2, 0xffff4472; GFX11-NEXT:    s_lshr_b32 s8, s7, 164473; GFX11-NEXT:    s_lshl_b32 s1, s1, 0x100014474; GFX11-NEXT:    s_lshl_b32 s4, s4, 14475; GFX11-NEXT:    s_lshr_b32 s2, s2, s74476; GFX11-NEXT:    s_lshr_b32 s6, s6, s84477; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s44478; GFX11-NEXT:    s_and_not1_b32 s4, 0xf000f, s54479; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s64480; GFX11-NEXT:    s_and_b32 s6, s5, 0xf000f4481; GFX11-NEXT:    s_lshr_b32 s5, s1, 164482; GFX11-NEXT:    s_lshr_b32 s7, s4, 164483; GFX11-NEXT:    s_lshl_b32 s1, s1, s44484; GFX11-NEXT:    s_lshl_b32 s4, s5, s74485; GFX11-NEXT:    s_lshr_b32 s5, s3, 164486; GFX11-NEXT:    s_and_b32 s3, s3, 0xffff4487; GFX11-NEXT:    s_lshr_b32 s7, s6, 164488; GFX11-NEXT:    s_lshr_b32 s3, s3, s64489; GFX11-NEXT:    s_lshr_b32 s5, s5, s74490; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s44491; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s54492; GFX11-NEXT:    s_or_b32 s0, s0, s24493; GFX11-NEXT:    s_or_b32 s1, s1, s34494; GFX11-NEXT:    ; return to shader part epilog4495  %result = call <4 x i16> @llvm.fshr.v4i16(<4 x i16> %lhs, <4 x i16> %rhs, <4 x i16> %amt)4496  %cast.result = bitcast <4 x i16> %result to <2 x i32>4497  ret <2 x i32> %cast.result4498}4499 4500define <4 x half> @v_fshr_v4i16(<4 x i16> %lhs, <4 x i16> %rhs, <4 x i16> %amt) {4501; GFX6-LABEL: v_fshr_v4i16:4502; GFX6:       ; %bb.0:4503; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4504; GFX6-NEXT:    v_and_b32_e32 v12, 15, v84505; GFX6-NEXT:    v_xor_b32_e32 v8, -1, v84506; GFX6-NEXT:    v_and_b32_e32 v8, 15, v84507; GFX6-NEXT:    v_lshlrev_b32_e32 v0, 1, v04508; GFX6-NEXT:    v_and_b32_e32 v4, 0xffff, v44509; GFX6-NEXT:    v_lshlrev_b32_e32 v0, v8, v04510; GFX6-NEXT:    v_lshrrev_b32_e32 v4, v12, v44511; GFX6-NEXT:    v_or_b32_e32 v0, v0, v44512; GFX6-NEXT:    v_and_b32_e32 v4, 15, v94513; GFX6-NEXT:    v_xor_b32_e32 v8, -1, v94514; GFX6-NEXT:    v_and_b32_e32 v5, 0xffff, v54515; GFX6-NEXT:    v_and_b32_e32 v8, 15, v84516; GFX6-NEXT:    v_lshlrev_b32_e32 v1, 1, v14517; GFX6-NEXT:    v_lshrrev_b32_e32 v4, v4, v54518; GFX6-NEXT:    v_xor_b32_e32 v5, -1, v104519; GFX6-NEXT:    v_lshlrev_b32_e32 v1, v8, v14520; GFX6-NEXT:    v_and_b32_e32 v5, 15, v54521; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 1, v24522; GFX6-NEXT:    v_or_b32_e32 v1, v1, v44523; GFX6-NEXT:    v_and_b32_e32 v4, 15, v104524; GFX6-NEXT:    v_lshlrev_b32_e32 v2, v5, v24525; GFX6-NEXT:    v_and_b32_e32 v5, 0xffff, v64526; GFX6-NEXT:    v_lshrrev_b32_e32 v4, v4, v54527; GFX6-NEXT:    v_xor_b32_e32 v5, -1, v114528; GFX6-NEXT:    v_and_b32_e32 v5, 15, v54529; GFX6-NEXT:    v_lshlrev_b32_e32 v3, 1, v34530; GFX6-NEXT:    v_or_b32_e32 v2, v2, v44531; GFX6-NEXT:    v_and_b32_e32 v4, 15, v114532; GFX6-NEXT:    v_lshlrev_b32_e32 v3, v5, v34533; GFX6-NEXT:    v_and_b32_e32 v5, 0xffff, v74534; GFX6-NEXT:    v_lshrrev_b32_e32 v4, v4, v54535; GFX6-NEXT:    v_or_b32_e32 v3, v3, v44536; GFX6-NEXT:    s_setpc_b64 s[30:31]4537;4538; GFX8-LABEL: v_fshr_v4i16:4539; GFX8:       ; %bb.0:4540; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4541; GFX8-NEXT:    v_xor_b32_e32 v7, -1, v44542; GFX8-NEXT:    v_and_b32_e32 v6, 15, v44543; GFX8-NEXT:    v_and_b32_e32 v7, 15, v74544; GFX8-NEXT:    v_lshlrev_b16_e32 v8, 1, v04545; GFX8-NEXT:    v_lshlrev_b16_e32 v7, v7, v84546; GFX8-NEXT:    v_lshrrev_b16_e32 v6, v6, v24547; GFX8-NEXT:    v_or_b32_e32 v6, v7, v64548; GFX8-NEXT:    v_mov_b32_e32 v7, 154549; GFX8-NEXT:    v_mov_b32_e32 v9, -14550; GFX8-NEXT:    v_and_b32_sdwa v8, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4551; GFX8-NEXT:    v_xor_b32_sdwa v4, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4552; GFX8-NEXT:    v_mov_b32_e32 v10, 14553; GFX8-NEXT:    v_and_b32_e32 v4, 15, v44554; GFX8-NEXT:    v_lshlrev_b16_sdwa v0, v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14555; GFX8-NEXT:    v_lshlrev_b16_e32 v0, v4, v04556; GFX8-NEXT:    v_lshrrev_b16_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14557; GFX8-NEXT:    v_or_b32_e32 v0, v0, v24558; GFX8-NEXT:    v_and_b32_e32 v0, 0xffff, v04559; GFX8-NEXT:    v_lshlrev_b32_e32 v0, 16, v04560; GFX8-NEXT:    v_xor_b32_e32 v4, -1, v54561; GFX8-NEXT:    v_or_b32_sdwa v0, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4562; GFX8-NEXT:    v_and_b32_e32 v2, 15, v54563; GFX8-NEXT:    v_and_b32_e32 v4, 15, v44564; GFX8-NEXT:    v_lshlrev_b16_e32 v6, 1, v14565; GFX8-NEXT:    v_lshlrev_b16_e32 v4, v4, v64566; GFX8-NEXT:    v_lshrrev_b16_e32 v2, v2, v34567; GFX8-NEXT:    v_or_b32_e32 v2, v4, v24568; GFX8-NEXT:    v_and_b32_sdwa v4, v5, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4569; GFX8-NEXT:    v_xor_b32_sdwa v5, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD4570; GFX8-NEXT:    v_and_b32_e32 v5, 15, v54571; GFX8-NEXT:    v_lshlrev_b16_sdwa v1, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14572; GFX8-NEXT:    v_lshlrev_b16_e32 v1, v5, v14573; GFX8-NEXT:    v_lshrrev_b16_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14574; GFX8-NEXT:    v_or_b32_e32 v1, v1, v34575; GFX8-NEXT:    v_and_b32_e32 v1, 0xffff, v14576; GFX8-NEXT:    v_lshlrev_b32_e32 v1, 16, v14577; GFX8-NEXT:    v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD4578; GFX8-NEXT:    s_setpc_b64 s[30:31]4579;4580; GFX9-LABEL: v_fshr_v4i16:4581; GFX9:       ; %bb.0:4582; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4583; GFX9-NEXT:    v_and_b32_e32 v6, 0xf000f, v44584; GFX9-NEXT:    v_xor_b32_e32 v4, -1, v44585; GFX9-NEXT:    v_and_b32_e32 v4, 0xf000f, v44586; GFX9-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]4587; GFX9-NEXT:    v_pk_lshlrev_b16 v0, v4, v04588; GFX9-NEXT:    v_pk_lshrrev_b16 v2, v6, v24589; GFX9-NEXT:    v_xor_b32_e32 v4, -1, v54590; GFX9-NEXT:    v_or_b32_e32 v0, v0, v24591; GFX9-NEXT:    v_and_b32_e32 v2, 0xf000f, v54592; GFX9-NEXT:    v_and_b32_e32 v4, 0xf000f, v44593; GFX9-NEXT:    v_pk_lshlrev_b16 v1, 1, v1 op_sel_hi:[0,1]4594; GFX9-NEXT:    v_pk_lshlrev_b16 v1, v4, v14595; GFX9-NEXT:    v_pk_lshrrev_b16 v2, v2, v34596; GFX9-NEXT:    v_or_b32_e32 v1, v1, v24597; GFX9-NEXT:    s_setpc_b64 s[30:31]4598;4599; GFX10-LABEL: v_fshr_v4i16:4600; GFX10:       ; %bb.0:4601; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4602; GFX10-NEXT:    v_xor_b32_e32 v6, -1, v44603; GFX10-NEXT:    v_xor_b32_e32 v7, -1, v54604; GFX10-NEXT:    v_and_b32_e32 v4, 0xf000f, v44605; GFX10-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]4606; GFX10-NEXT:    v_and_b32_e32 v5, 0xf000f, v54607; GFX10-NEXT:    v_and_b32_e32 v6, 0xf000f, v64608; GFX10-NEXT:    v_pk_lshlrev_b16 v1, 1, v1 op_sel_hi:[0,1]4609; GFX10-NEXT:    v_and_b32_e32 v7, 0xf000f, v74610; GFX10-NEXT:    v_pk_lshrrev_b16 v2, v4, v24611; GFX10-NEXT:    v_pk_lshrrev_b16 v3, v5, v34612; GFX10-NEXT:    v_pk_lshlrev_b16 v0, v6, v04613; GFX10-NEXT:    v_pk_lshlrev_b16 v1, v7, v14614; GFX10-NEXT:    v_or_b32_e32 v0, v0, v24615; GFX10-NEXT:    v_or_b32_e32 v1, v1, v34616; GFX10-NEXT:    s_setpc_b64 s[30:31]4617;4618; GFX11-LABEL: v_fshr_v4i16:4619; GFX11:       ; %bb.0:4620; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4621; GFX11-NEXT:    v_xor_b32_e32 v6, -1, v44622; GFX11-NEXT:    v_xor_b32_e32 v7, -1, v54623; GFX11-NEXT:    v_and_b32_e32 v4, 0xf000f, v44624; GFX11-NEXT:    v_pk_lshlrev_b16 v0, 1, v0 op_sel_hi:[0,1]4625; GFX11-NEXT:    v_and_b32_e32 v5, 0xf000f, v54626; GFX11-NEXT:    v_and_b32_e32 v6, 0xf000f, v64627; GFX11-NEXT:    v_pk_lshlrev_b16 v1, 1, v1 op_sel_hi:[0,1]4628; GFX11-NEXT:    v_and_b32_e32 v7, 0xf000f, v74629; GFX11-NEXT:    v_pk_lshrrev_b16 v2, v4, v24630; GFX11-NEXT:    v_pk_lshrrev_b16 v3, v5, v34631; GFX11-NEXT:    v_pk_lshlrev_b16 v0, v6, v04632; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)4633; GFX11-NEXT:    v_pk_lshlrev_b16 v1, v7, v14634; GFX11-NEXT:    v_or_b32_e32 v0, v0, v24635; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2)4636; GFX11-NEXT:    v_or_b32_e32 v1, v1, v34637; GFX11-NEXT:    s_setpc_b64 s[30:31]4638  %result = call <4 x i16> @llvm.fshr.v4i16(<4 x i16> %lhs, <4 x i16> %rhs, <4 x i16> %amt)4639  %cast.result = bitcast <4 x i16> %result to <4 x half>4640  ret <4 x half> %cast.result4641}4642 4643define amdgpu_ps i64 @s_fshr_i64(i64 inreg %lhs, i64 inreg %rhs, i64 inreg %amt) {4644; GFX6-LABEL: s_fshr_i64:4645; GFX6:       ; %bb.0:4646; GFX6-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14647; GFX6-NEXT:    s_not_b32 s5, s44648; GFX6-NEXT:    s_lshl_b64 s[0:1], s[0:1], s54649; GFX6-NEXT:    s_lshr_b64 s[2:3], s[2:3], s44650; GFX6-NEXT:    s_or_b64 s[0:1], s[0:1], s[2:3]4651; GFX6-NEXT:    ; return to shader part epilog4652;4653; GFX8-LABEL: s_fshr_i64:4654; GFX8:       ; %bb.0:4655; GFX8-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14656; GFX8-NEXT:    s_not_b32 s5, s44657; GFX8-NEXT:    s_lshl_b64 s[0:1], s[0:1], s54658; GFX8-NEXT:    s_lshr_b64 s[2:3], s[2:3], s44659; GFX8-NEXT:    s_or_b64 s[0:1], s[0:1], s[2:3]4660; GFX8-NEXT:    ; return to shader part epilog4661;4662; GFX9-LABEL: s_fshr_i64:4663; GFX9:       ; %bb.0:4664; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14665; GFX9-NEXT:    s_not_b32 s5, s44666; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], s54667; GFX9-NEXT:    s_lshr_b64 s[2:3], s[2:3], s44668; GFX9-NEXT:    s_or_b64 s[0:1], s[0:1], s[2:3]4669; GFX9-NEXT:    ; return to shader part epilog4670;4671; GFX10-LABEL: s_fshr_i64:4672; GFX10:       ; %bb.0:4673; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14674; GFX10-NEXT:    s_not_b32 s5, s44675; GFX10-NEXT:    s_lshr_b64 s[2:3], s[2:3], s44676; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], s54677; GFX10-NEXT:    s_or_b64 s[0:1], s[0:1], s[2:3]4678; GFX10-NEXT:    ; return to shader part epilog4679;4680; GFX11-LABEL: s_fshr_i64:4681; GFX11:       ; %bb.0:4682; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14683; GFX11-NEXT:    s_not_b32 s5, s44684; GFX11-NEXT:    s_lshr_b64 s[2:3], s[2:3], s44685; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], s54686; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)4687; GFX11-NEXT:    s_or_b64 s[0:1], s[0:1], s[2:3]4688; GFX11-NEXT:    ; return to shader part epilog4689  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 %amt)4690  ret i64 %result4691}4692 4693define amdgpu_ps i64 @s_fshr_i64_5(i64 inreg %lhs, i64 inreg %rhs) {4694; GCN-LABEL: s_fshr_i64_5:4695; GCN:       ; %bb.0:4696; GCN-NEXT:    s_lshl_b32 s1, s0, 274697; GCN-NEXT:    s_mov_b32 s0, 04698; GCN-NEXT:    s_lshr_b64 s[2:3], s[2:3], 54699; GCN-NEXT:    s_or_b64 s[0:1], s[0:1], s[2:3]4700; GCN-NEXT:    ; return to shader part epilog4701;4702; GFX11-LABEL: s_fshr_i64_5:4703; GFX11:       ; %bb.0:4704; GFX11-NEXT:    s_lshl_b32 s1, s0, 274705; GFX11-NEXT:    s_mov_b32 s0, 04706; GFX11-NEXT:    s_lshr_b64 s[2:3], s[2:3], 54707; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)4708; GFX11-NEXT:    s_or_b64 s[0:1], s[0:1], s[2:3]4709; GFX11-NEXT:    ; return to shader part epilog4710  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 5)4711  ret i64 %result4712}4713 4714define amdgpu_ps i64 @s_fshr_i64_32(i64 inreg %lhs, i64 inreg %rhs) {4715; GCN-LABEL: s_fshr_i64_32:4716; GCN:       ; %bb.0:4717; GCN-NEXT:    s_mov_b32 s1, s04718; GCN-NEXT:    s_mov_b32 s0, s34719; GCN-NEXT:    ; return to shader part epilog4720;4721; GFX11-LABEL: s_fshr_i64_32:4722; GFX11:       ; %bb.0:4723; GFX11-NEXT:    s_mov_b32 s1, s04724; GFX11-NEXT:    s_mov_b32 s0, s34725; GFX11-NEXT:    ; return to shader part epilog4726  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 32)4727  ret i64 %result4728}4729 4730define amdgpu_ps i64 @s_fshr_i64_48(i64 inreg %lhs, i64 inreg %rhs) {4731; GCN-LABEL: s_fshr_i64_48:4732; GCN:       ; %bb.0:4733; GCN-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164734; GCN-NEXT:    s_lshr_b32 s2, s3, 164735; GCN-NEXT:    s_or_b32 s0, s0, s24736; GCN-NEXT:    ; return to shader part epilog4737;4738; GFX11-LABEL: s_fshr_i64_48:4739; GFX11:       ; %bb.0:4740; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 164741; GFX11-NEXT:    s_lshr_b32 s2, s3, 164742; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)4743; GFX11-NEXT:    s_or_b32 s0, s0, s24744; GFX11-NEXT:    ; return to shader part epilog4745  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 48)4746  ret i64 %result4747}4748 4749define i64 @v_fshr_i64(i64 %lhs, i64 %rhs, i64 %amt) {4750; GFX6-LABEL: v_fshr_i64:4751; GFX6:       ; %bb.0:4752; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4753; GFX6-NEXT:    v_lshl_b64 v[0:1], v[0:1], 14754; GFX6-NEXT:    v_bfi_b32 v5, v4, 0, 634755; GFX6-NEXT:    v_and_b32_e32 v4, 63, v44756; GFX6-NEXT:    v_lshl_b64 v[0:1], v[0:1], v54757; GFX6-NEXT:    v_lshr_b64 v[2:3], v[2:3], v44758; GFX6-NEXT:    v_or_b32_e32 v0, v0, v24759; GFX6-NEXT:    v_or_b32_e32 v1, v1, v34760; GFX6-NEXT:    s_setpc_b64 s[30:31]4761;4762; GFX8-LABEL: v_fshr_i64:4763; GFX8:       ; %bb.0:4764; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4765; GFX8-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]4766; GFX8-NEXT:    v_bfi_b32 v5, v4, 0, 634767; GFX8-NEXT:    v_and_b32_e32 v4, 63, v44768; GFX8-NEXT:    v_lshlrev_b64 v[0:1], v5, v[0:1]4769; GFX8-NEXT:    v_lshrrev_b64 v[2:3], v4, v[2:3]4770; GFX8-NEXT:    v_or_b32_e32 v0, v0, v24771; GFX8-NEXT:    v_or_b32_e32 v1, v1, v34772; GFX8-NEXT:    s_setpc_b64 s[30:31]4773;4774; GFX9-LABEL: v_fshr_i64:4775; GFX9:       ; %bb.0:4776; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4777; GFX9-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]4778; GFX9-NEXT:    v_bfi_b32 v5, v4, 0, 634779; GFX9-NEXT:    v_and_b32_e32 v4, 63, v44780; GFX9-NEXT:    v_lshlrev_b64 v[0:1], v5, v[0:1]4781; GFX9-NEXT:    v_lshrrev_b64 v[2:3], v4, v[2:3]4782; GFX9-NEXT:    v_or_b32_e32 v0, v0, v24783; GFX9-NEXT:    v_or_b32_e32 v1, v1, v34784; GFX9-NEXT:    s_setpc_b64 s[30:31]4785;4786; GFX10-LABEL: v_fshr_i64:4787; GFX10:       ; %bb.0:4788; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4789; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]4790; GFX10-NEXT:    v_and_b32_e32 v5, 63, v44791; GFX10-NEXT:    v_bfi_b32 v4, v4, 0, 634792; GFX10-NEXT:    v_lshrrev_b64 v[2:3], v5, v[2:3]4793; GFX10-NEXT:    v_lshlrev_b64 v[0:1], v4, v[0:1]4794; GFX10-NEXT:    v_or_b32_e32 v0, v0, v24795; GFX10-NEXT:    v_or_b32_e32 v1, v1, v34796; GFX10-NEXT:    s_setpc_b64 s[30:31]4797;4798; GFX11-LABEL: v_fshr_i64:4799; GFX11:       ; %bb.0:4800; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4801; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]4802; GFX11-NEXT:    v_and_b32_e32 v5, 63, v44803; GFX11-NEXT:    v_bfi_b32 v4, v4, 0, 634804; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)4805; GFX11-NEXT:    v_lshrrev_b64 v[2:3], v5, v[2:3]4806; GFX11-NEXT:    v_lshlrev_b64 v[0:1], v4, v[0:1]4807; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)4808; GFX11-NEXT:    v_or_b32_e32 v0, v0, v24809; GFX11-NEXT:    v_or_b32_e32 v1, v1, v34810; GFX11-NEXT:    s_setpc_b64 s[30:31]4811  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 %amt)4812  ret i64 %result4813}4814 4815define i64 @v_fshr_i64_5(i64 %lhs, i64 %rhs) {4816; GFX6-LABEL: v_fshr_i64_5:4817; GFX6:       ; %bb.0:4818; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4819; GFX6-NEXT:    v_mov_b32_e32 v4, v04820; GFX6-NEXT:    v_lshr_b64 v[0:1], v[2:3], 54821; GFX6-NEXT:    v_lshlrev_b32_e32 v2, 27, v44822; GFX6-NEXT:    v_or_b32_e32 v1, v2, v14823; GFX6-NEXT:    s_setpc_b64 s[30:31]4824;4825; GFX8-LABEL: v_fshr_i64_5:4826; GFX8:       ; %bb.0:4827; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4828; GFX8-NEXT:    v_mov_b32_e32 v4, v04829; GFX8-NEXT:    v_lshrrev_b64 v[0:1], 5, v[2:3]4830; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 27, v44831; GFX8-NEXT:    v_or_b32_e32 v1, v2, v14832; GFX8-NEXT:    s_setpc_b64 s[30:31]4833;4834; GFX9-LABEL: v_fshr_i64_5:4835; GFX9:       ; %bb.0:4836; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4837; GFX9-NEXT:    v_mov_b32_e32 v4, v04838; GFX9-NEXT:    v_lshrrev_b64 v[0:1], 5, v[2:3]4839; GFX9-NEXT:    v_lshl_or_b32 v1, v4, 27, v14840; GFX9-NEXT:    s_setpc_b64 s[30:31]4841;4842; GFX10-LABEL: v_fshr_i64_5:4843; GFX10:       ; %bb.0:4844; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4845; GFX10-NEXT:    v_mov_b32_e32 v4, v04846; GFX10-NEXT:    v_lshrrev_b64 v[0:1], 5, v[2:3]4847; GFX10-NEXT:    v_lshl_or_b32 v1, v4, 27, v14848; GFX10-NEXT:    s_setpc_b64 s[30:31]4849;4850; GFX11-LABEL: v_fshr_i64_5:4851; GFX11:       ; %bb.0:4852; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4853; GFX11-NEXT:    v_mov_b32_e32 v4, v04854; GFX11-NEXT:    v_lshrrev_b64 v[0:1], 5, v[2:3]4855; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)4856; GFX11-NEXT:    v_lshl_or_b32 v1, v4, 27, v14857; GFX11-NEXT:    s_setpc_b64 s[30:31]4858  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 5)4859  ret i64 %result4860}4861 4862define i64 @v_fshr_i64_32(i64 %lhs, i64 %rhs) {4863; GCN-LABEL: v_fshr_i64_32:4864; GCN:       ; %bb.0:4865; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4866; GCN-NEXT:    v_mov_b32_e32 v1, v04867; GCN-NEXT:    v_mov_b32_e32 v0, v34868; GCN-NEXT:    s_setpc_b64 s[30:31]4869;4870; GFX11-LABEL: v_fshr_i64_32:4871; GFX11:       ; %bb.0:4872; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4873; GFX11-NEXT:    v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v0, v34874; GFX11-NEXT:    s_setpc_b64 s[30:31]4875  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 32)4876  ret i64 %result4877}4878 4879define i64 @v_fshr_i64_48(i64 %lhs, i64 %rhs) {4880; GFX6-LABEL: v_fshr_i64_48:4881; GFX6:       ; %bb.0:4882; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4883; GFX6-NEXT:    v_lshl_b64 v[0:1], v[0:1], 164884; GFX6-NEXT:    v_lshrrev_b32_e32 v2, 16, v34885; GFX6-NEXT:    v_or_b32_e32 v0, v0, v24886; GFX6-NEXT:    s_setpc_b64 s[30:31]4887;4888; GFX8-LABEL: v_fshr_i64_48:4889; GFX8:       ; %bb.0:4890; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4891; GFX8-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4892; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14893; GFX8-NEXT:    s_setpc_b64 s[30:31]4894;4895; GFX9-LABEL: v_fshr_i64_48:4896; GFX9:       ; %bb.0:4897; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4898; GFX9-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4899; GFX9-NEXT:    v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14900; GFX9-NEXT:    s_setpc_b64 s[30:31]4901;4902; GFX10-LABEL: v_fshr_i64_48:4903; GFX10:       ; %bb.0:4904; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4905; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4906; GFX10-NEXT:    v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_14907; GFX10-NEXT:    s_setpc_b64 s[30:31]4908;4909; GFX11-LABEL: v_fshr_i64_48:4910; GFX11:       ; %bb.0:4911; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4912; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 16, v[0:1]4913; GFX11-NEXT:    v_lshrrev_b32_e32 v2, 16, v34914; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1)4915; GFX11-NEXT:    v_or_b32_e32 v0, v0, v24916; GFX11-NEXT:    s_setpc_b64 s[30:31]4917  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 48)4918  ret i64 %result4919}4920 4921define amdgpu_ps <2 x float> @v_fshr_i64_ssv(i64 inreg %lhs, i64 inreg %rhs, i64 %amt) {4922; GFX6-LABEL: v_fshr_i64_ssv:4923; GFX6:       ; %bb.0:4924; GFX6-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14925; GFX6-NEXT:    v_bfi_b32 v1, v0, 0, 634926; GFX6-NEXT:    v_and_b32_e32 v0, 63, v04927; GFX6-NEXT:    v_lshl_b64 v[1:2], s[0:1], v14928; GFX6-NEXT:    v_lshr_b64 v[3:4], s[2:3], v04929; GFX6-NEXT:    v_or_b32_e32 v0, v1, v34930; GFX6-NEXT:    v_or_b32_e32 v1, v2, v44931; GFX6-NEXT:    ; return to shader part epilog4932;4933; GFX8-LABEL: v_fshr_i64_ssv:4934; GFX8:       ; %bb.0:4935; GFX8-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14936; GFX8-NEXT:    v_bfi_b32 v1, v0, 0, 634937; GFX8-NEXT:    v_and_b32_e32 v0, 63, v04938; GFX8-NEXT:    v_lshlrev_b64 v[1:2], v1, s[0:1]4939; GFX8-NEXT:    v_lshrrev_b64 v[3:4], v0, s[2:3]4940; GFX8-NEXT:    v_or_b32_e32 v0, v1, v34941; GFX8-NEXT:    v_or_b32_e32 v1, v2, v44942; GFX8-NEXT:    ; return to shader part epilog4943;4944; GFX9-LABEL: v_fshr_i64_ssv:4945; GFX9:       ; %bb.0:4946; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14947; GFX9-NEXT:    v_bfi_b32 v1, v0, 0, 634948; GFX9-NEXT:    v_and_b32_e32 v0, 63, v04949; GFX9-NEXT:    v_lshlrev_b64 v[1:2], v1, s[0:1]4950; GFX9-NEXT:    v_lshrrev_b64 v[3:4], v0, s[2:3]4951; GFX9-NEXT:    v_or_b32_e32 v0, v1, v34952; GFX9-NEXT:    v_or_b32_e32 v1, v2, v44953; GFX9-NEXT:    ; return to shader part epilog4954;4955; GFX10-LABEL: v_fshr_i64_ssv:4956; GFX10:       ; %bb.0:4957; GFX10-NEXT:    v_bfi_b32 v1, v0, 0, 634958; GFX10-NEXT:    v_and_b32_e32 v2, 63, v04959; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14960; GFX10-NEXT:    v_lshlrev_b64 v[0:1], v1, s[0:1]4961; GFX10-NEXT:    v_lshrrev_b64 v[2:3], v2, s[2:3]4962; GFX10-NEXT:    v_or_b32_e32 v0, v0, v24963; GFX10-NEXT:    v_or_b32_e32 v1, v1, v34964; GFX10-NEXT:    ; return to shader part epilog4965;4966; GFX11-LABEL: v_fshr_i64_ssv:4967; GFX11:       ; %bb.0:4968; GFX11-NEXT:    v_bfi_b32 v1, v0, 0, 634969; GFX11-NEXT:    v_and_b32_e32 v2, 63, v04970; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14971; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)4972; GFX11-NEXT:    v_lshlrev_b64 v[0:1], v1, s[0:1]4973; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4974; GFX11-NEXT:    v_lshrrev_b64 v[2:3], v2, s[2:3]4975; GFX11-NEXT:    v_or_b32_e32 v0, v0, v24976; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2)4977; GFX11-NEXT:    v_or_b32_e32 v1, v1, v34978; GFX11-NEXT:    ; return to shader part epilog4979  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 %amt)4980  %cast = bitcast i64 %result to <2 x float>4981  ret <2 x float> %cast4982}4983 4984define amdgpu_ps <2 x float> @v_fshr_i64_svs(i64 inreg %lhs, i64 %rhs, i64 inreg %amt) {4985; GFX6-LABEL: v_fshr_i64_svs:4986; GFX6:       ; %bb.0:4987; GFX6-NEXT:    s_not_b32 s3, s24988; GFX6-NEXT:    s_and_b32 s2, s2, 634989; GFX6-NEXT:    s_lshl_b64 s[0:1], s[0:1], 14990; GFX6-NEXT:    v_lshr_b64 v[0:1], v[0:1], s24991; GFX6-NEXT:    s_lshl_b64 s[0:1], s[0:1], s34992; GFX6-NEXT:    v_or_b32_e32 v0, s0, v04993; GFX6-NEXT:    v_or_b32_e32 v1, s1, v14994; GFX6-NEXT:    ; return to shader part epilog4995;4996; GFX8-LABEL: v_fshr_i64_svs:4997; GFX8:       ; %bb.0:4998; GFX8-NEXT:    s_not_b32 s3, s24999; GFX8-NEXT:    s_and_b32 s2, s2, 635000; GFX8-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15001; GFX8-NEXT:    v_lshrrev_b64 v[0:1], s2, v[0:1]5002; GFX8-NEXT:    s_lshl_b64 s[0:1], s[0:1], s35003; GFX8-NEXT:    v_or_b32_e32 v0, s0, v05004; GFX8-NEXT:    v_or_b32_e32 v1, s1, v15005; GFX8-NEXT:    ; return to shader part epilog5006;5007; GFX9-LABEL: v_fshr_i64_svs:5008; GFX9:       ; %bb.0:5009; GFX9-NEXT:    s_not_b32 s3, s25010; GFX9-NEXT:    s_and_b32 s2, s2, 635011; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15012; GFX9-NEXT:    v_lshrrev_b64 v[0:1], s2, v[0:1]5013; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], s35014; GFX9-NEXT:    v_or_b32_e32 v0, s0, v05015; GFX9-NEXT:    v_or_b32_e32 v1, s1, v15016; GFX9-NEXT:    ; return to shader part epilog5017;5018; GFX10-LABEL: v_fshr_i64_svs:5019; GFX10:       ; %bb.0:5020; GFX10-NEXT:    s_and_b32 s3, s2, 635021; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15022; GFX10-NEXT:    v_lshrrev_b64 v[0:1], s3, v[0:1]5023; GFX10-NEXT:    s_not_b32 s2, s25024; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], s25025; GFX10-NEXT:    v_or_b32_e32 v0, s0, v05026; GFX10-NEXT:    v_or_b32_e32 v1, s1, v15027; GFX10-NEXT:    ; return to shader part epilog5028;5029; GFX11-LABEL: v_fshr_i64_svs:5030; GFX11:       ; %bb.0:5031; GFX11-NEXT:    s_and_b32 s3, s2, 635032; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15033; GFX11-NEXT:    v_lshrrev_b64 v[0:1], s3, v[0:1]5034; GFX11-NEXT:    s_not_b32 s2, s25035; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)5036; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], s25037; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)5038; GFX11-NEXT:    v_or_b32_e32 v0, s0, v05039; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2)5040; GFX11-NEXT:    v_or_b32_e32 v1, s1, v15041; GFX11-NEXT:    ; return to shader part epilog5042  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 %amt)5043  %cast = bitcast i64 %result to <2 x float>5044  ret <2 x float> %cast5045}5046 5047define amdgpu_ps <2 x float> @v_fshr_i64_vss(i64 %lhs, i64 inreg %rhs, i64 inreg %amt) {5048; GFX6-LABEL: v_fshr_i64_vss:5049; GFX6:       ; %bb.0:5050; GFX6-NEXT:    v_lshl_b64 v[0:1], v[0:1], 15051; GFX6-NEXT:    s_andn2_b32 s3, 63, s25052; GFX6-NEXT:    v_lshl_b64 v[0:1], v[0:1], s35053; GFX6-NEXT:    s_lshr_b64 s[0:1], s[0:1], s25054; GFX6-NEXT:    v_or_b32_e32 v0, s0, v05055; GFX6-NEXT:    v_or_b32_e32 v1, s1, v15056; GFX6-NEXT:    ; return to shader part epilog5057;5058; GFX8-LABEL: v_fshr_i64_vss:5059; GFX8:       ; %bb.0:5060; GFX8-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5061; GFX8-NEXT:    s_andn2_b32 s3, 63, s25062; GFX8-NEXT:    v_lshlrev_b64 v[0:1], s3, v[0:1]5063; GFX8-NEXT:    s_lshr_b64 s[0:1], s[0:1], s25064; GFX8-NEXT:    v_or_b32_e32 v0, s0, v05065; GFX8-NEXT:    v_or_b32_e32 v1, s1, v15066; GFX8-NEXT:    ; return to shader part epilog5067;5068; GFX9-LABEL: v_fshr_i64_vss:5069; GFX9:       ; %bb.0:5070; GFX9-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5071; GFX9-NEXT:    s_andn2_b32 s3, 63, s25072; GFX9-NEXT:    v_lshlrev_b64 v[0:1], s3, v[0:1]5073; GFX9-NEXT:    s_lshr_b64 s[0:1], s[0:1], s25074; GFX9-NEXT:    v_or_b32_e32 v0, s0, v05075; GFX9-NEXT:    v_or_b32_e32 v1, s1, v15076; GFX9-NEXT:    ; return to shader part epilog5077;5078; GFX10-LABEL: v_fshr_i64_vss:5079; GFX10:       ; %bb.0:5080; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5081; GFX10-NEXT:    s_andn2_b32 s3, 63, s25082; GFX10-NEXT:    s_lshr_b64 s[0:1], s[0:1], s25083; GFX10-NEXT:    v_lshlrev_b64 v[0:1], s3, v[0:1]5084; GFX10-NEXT:    v_or_b32_e32 v0, s0, v05085; GFX10-NEXT:    v_or_b32_e32 v1, s1, v15086; GFX10-NEXT:    ; return to shader part epilog5087;5088; GFX11-LABEL: v_fshr_i64_vss:5089; GFX11:       ; %bb.0:5090; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5091; GFX11-NEXT:    s_and_not1_b32 s3, 63, s25092; GFX11-NEXT:    s_lshr_b64 s[0:1], s[0:1], s25093; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5094; GFX11-NEXT:    v_lshlrev_b64 v[0:1], s3, v[0:1]5095; GFX11-NEXT:    v_or_b32_e32 v0, s0, v05096; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2)5097; GFX11-NEXT:    v_or_b32_e32 v1, s1, v15098; GFX11-NEXT:    ; return to shader part epilog5099  %result = call i64 @llvm.fshr.i64(i64 %lhs, i64 %rhs, i64 %amt)5100  %cast = bitcast i64 %result to <2 x float>5101  ret <2 x float> %cast5102}5103 5104define amdgpu_ps <2 x i64> @s_fshr_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs, <2 x i64> inreg %amt) {5105; GFX6-LABEL: s_fshr_v2i64:5106; GFX6:       ; %bb.0:5107; GFX6-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15108; GFX6-NEXT:    s_not_b32 s9, s85109; GFX6-NEXT:    s_lshl_b64 s[0:1], s[0:1], s95110; GFX6-NEXT:    s_lshr_b64 s[4:5], s[4:5], s85111; GFX6-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]5112; GFX6-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15113; GFX6-NEXT:    s_not_b32 s4, s105114; GFX6-NEXT:    s_lshl_b64 s[2:3], s[2:3], s45115; GFX6-NEXT:    s_lshr_b64 s[4:5], s[6:7], s105116; GFX6-NEXT:    s_or_b64 s[2:3], s[2:3], s[4:5]5117; GFX6-NEXT:    ; return to shader part epilog5118;5119; GFX8-LABEL: s_fshr_v2i64:5120; GFX8:       ; %bb.0:5121; GFX8-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15122; GFX8-NEXT:    s_not_b32 s9, s85123; GFX8-NEXT:    s_lshl_b64 s[0:1], s[0:1], s95124; GFX8-NEXT:    s_lshr_b64 s[4:5], s[4:5], s85125; GFX8-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]5126; GFX8-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15127; GFX8-NEXT:    s_not_b32 s4, s105128; GFX8-NEXT:    s_lshl_b64 s[2:3], s[2:3], s45129; GFX8-NEXT:    s_lshr_b64 s[4:5], s[6:7], s105130; GFX8-NEXT:    s_or_b64 s[2:3], s[2:3], s[4:5]5131; GFX8-NEXT:    ; return to shader part epilog5132;5133; GFX9-LABEL: s_fshr_v2i64:5134; GFX9:       ; %bb.0:5135; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15136; GFX9-NEXT:    s_not_b32 s9, s85137; GFX9-NEXT:    s_lshl_b64 s[0:1], s[0:1], s95138; GFX9-NEXT:    s_lshr_b64 s[4:5], s[4:5], s85139; GFX9-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]5140; GFX9-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15141; GFX9-NEXT:    s_not_b32 s4, s105142; GFX9-NEXT:    s_lshl_b64 s[2:3], s[2:3], s45143; GFX9-NEXT:    s_lshr_b64 s[4:5], s[6:7], s105144; GFX9-NEXT:    s_or_b64 s[2:3], s[2:3], s[4:5]5145; GFX9-NEXT:    ; return to shader part epilog5146;5147; GFX10-LABEL: s_fshr_v2i64:5148; GFX10:       ; %bb.0:5149; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15150; GFX10-NEXT:    s_not_b32 s9, s85151; GFX10-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15152; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], s95153; GFX10-NEXT:    s_not_b32 s9, s105154; GFX10-NEXT:    s_lshr_b64 s[4:5], s[4:5], s85155; GFX10-NEXT:    s_lshl_b64 s[2:3], s[2:3], s95156; GFX10-NEXT:    s_lshr_b64 s[6:7], s[6:7], s105157; GFX10-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]5158; GFX10-NEXT:    s_or_b64 s[2:3], s[2:3], s[6:7]5159; GFX10-NEXT:    ; return to shader part epilog5160;5161; GFX11-LABEL: s_fshr_v2i64:5162; GFX11:       ; %bb.0:5163; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15164; GFX11-NEXT:    s_not_b32 s9, s85165; GFX11-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15166; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], s95167; GFX11-NEXT:    s_not_b32 s9, s105168; GFX11-NEXT:    s_lshr_b64 s[4:5], s[4:5], s85169; GFX11-NEXT:    s_lshl_b64 s[2:3], s[2:3], s95170; GFX11-NEXT:    s_lshr_b64 s[6:7], s[6:7], s105171; GFX11-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]5172; GFX11-NEXT:    s_or_b64 s[2:3], s[2:3], s[6:7]5173; GFX11-NEXT:    ; return to shader part epilog5174  %result = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %lhs, <2 x i64> %rhs, <2 x i64> %amt)5175  ret <2 x i64> %result5176}5177 5178define <2 x i64> @v_fshr_v2i64(<2 x i64> %lhs, <2 x i64> %rhs, <2 x i64> %amt) {5179; GFX6-LABEL: v_fshr_v2i64:5180; GFX6:       ; %bb.0:5181; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5182; GFX6-NEXT:    v_lshl_b64 v[0:1], v[0:1], 15183; GFX6-NEXT:    v_bfi_b32 v9, v8, 0, 635184; GFX6-NEXT:    v_and_b32_e32 v8, 63, v85185; GFX6-NEXT:    v_lshl_b64 v[0:1], v[0:1], v95186; GFX6-NEXT:    v_lshr_b64 v[4:5], v[4:5], v85187; GFX6-NEXT:    v_lshl_b64 v[2:3], v[2:3], 15188; GFX6-NEXT:    v_or_b32_e32 v0, v0, v45189; GFX6-NEXT:    v_bfi_b32 v4, v10, 0, 635190; GFX6-NEXT:    v_lshl_b64 v[2:3], v[2:3], v45191; GFX6-NEXT:    v_and_b32_e32 v4, 63, v105192; GFX6-NEXT:    v_lshr_b64 v[6:7], v[6:7], v45193; GFX6-NEXT:    v_or_b32_e32 v1, v1, v55194; GFX6-NEXT:    v_or_b32_e32 v2, v2, v65195; GFX6-NEXT:    v_or_b32_e32 v3, v3, v75196; GFX6-NEXT:    s_setpc_b64 s[30:31]5197;5198; GFX8-LABEL: v_fshr_v2i64:5199; GFX8:       ; %bb.0:5200; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5201; GFX8-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5202; GFX8-NEXT:    v_bfi_b32 v9, v8, 0, 635203; GFX8-NEXT:    v_and_b32_e32 v8, 63, v85204; GFX8-NEXT:    v_lshlrev_b64 v[0:1], v9, v[0:1]5205; GFX8-NEXT:    v_lshrrev_b64 v[4:5], v8, v[4:5]5206; GFX8-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]5207; GFX8-NEXT:    v_or_b32_e32 v0, v0, v45208; GFX8-NEXT:    v_bfi_b32 v4, v10, 0, 635209; GFX8-NEXT:    v_lshlrev_b64 v[2:3], v4, v[2:3]5210; GFX8-NEXT:    v_and_b32_e32 v4, 63, v105211; GFX8-NEXT:    v_lshrrev_b64 v[6:7], v4, v[6:7]5212; GFX8-NEXT:    v_or_b32_e32 v1, v1, v55213; GFX8-NEXT:    v_or_b32_e32 v2, v2, v65214; GFX8-NEXT:    v_or_b32_e32 v3, v3, v75215; GFX8-NEXT:    s_setpc_b64 s[30:31]5216;5217; GFX9-LABEL: v_fshr_v2i64:5218; GFX9:       ; %bb.0:5219; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5220; GFX9-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5221; GFX9-NEXT:    v_bfi_b32 v9, v8, 0, 635222; GFX9-NEXT:    v_and_b32_e32 v8, 63, v85223; GFX9-NEXT:    v_lshlrev_b64 v[0:1], v9, v[0:1]5224; GFX9-NEXT:    v_lshrrev_b64 v[4:5], v8, v[4:5]5225; GFX9-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]5226; GFX9-NEXT:    v_or_b32_e32 v0, v0, v45227; GFX9-NEXT:    v_bfi_b32 v4, v10, 0, 635228; GFX9-NEXT:    v_lshlrev_b64 v[2:3], v4, v[2:3]5229; GFX9-NEXT:    v_and_b32_e32 v4, 63, v105230; GFX9-NEXT:    v_lshrrev_b64 v[6:7], v4, v[6:7]5231; GFX9-NEXT:    v_or_b32_e32 v1, v1, v55232; GFX9-NEXT:    v_or_b32_e32 v2, v2, v65233; GFX9-NEXT:    v_or_b32_e32 v3, v3, v75234; GFX9-NEXT:    s_setpc_b64 s[30:31]5235;5236; GFX10-LABEL: v_fshr_v2i64:5237; GFX10:       ; %bb.0:5238; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5239; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5240; GFX10-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]5241; GFX10-NEXT:    v_bfi_b32 v9, v8, 0, 635242; GFX10-NEXT:    v_and_b32_e32 v8, 63, v85243; GFX10-NEXT:    v_bfi_b32 v11, v10, 0, 635244; GFX10-NEXT:    v_and_b32_e32 v10, 63, v105245; GFX10-NEXT:    v_lshlrev_b64 v[0:1], v9, v[0:1]5246; GFX10-NEXT:    v_lshrrev_b64 v[4:5], v8, v[4:5]5247; GFX10-NEXT:    v_lshlrev_b64 v[2:3], v11, v[2:3]5248; GFX10-NEXT:    v_lshrrev_b64 v[6:7], v10, v[6:7]5249; GFX10-NEXT:    v_or_b32_e32 v0, v0, v45250; GFX10-NEXT:    v_or_b32_e32 v1, v1, v55251; GFX10-NEXT:    v_or_b32_e32 v2, v2, v65252; GFX10-NEXT:    v_or_b32_e32 v3, v3, v75253; GFX10-NEXT:    s_setpc_b64 s[30:31]5254;5255; GFX11-LABEL: v_fshr_v2i64:5256; GFX11:       ; %bb.0:5257; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5258; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5259; GFX11-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]5260; GFX11-NEXT:    v_bfi_b32 v9, v8, 0, 635261; GFX11-NEXT:    v_and_b32_e32 v8, 63, v85262; GFX11-NEXT:    v_bfi_b32 v11, v10, 0, 635263; GFX11-NEXT:    v_and_b32_e32 v10, 63, v105264; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5265; GFX11-NEXT:    v_lshlrev_b64 v[0:1], v9, v[0:1]5266; GFX11-NEXT:    v_lshrrev_b64 v[4:5], v8, v[4:5]5267; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5268; GFX11-NEXT:    v_lshlrev_b64 v[2:3], v11, v[2:3]5269; GFX11-NEXT:    v_lshrrev_b64 v[6:7], v10, v[6:7]5270; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)5271; GFX11-NEXT:    v_or_b32_e32 v0, v0, v45272; GFX11-NEXT:    v_or_b32_e32 v1, v1, v55273; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)5274; GFX11-NEXT:    v_or_b32_e32 v2, v2, v65275; GFX11-NEXT:    v_or_b32_e32 v3, v3, v75276; GFX11-NEXT:    s_setpc_b64 s[30:31]5277  %result = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %lhs, <2 x i64> %rhs, <2 x i64> %amt)5278  ret <2 x i64> %result5279}5280 5281define amdgpu_ps i128 @s_fshr_i128(i128 inreg %lhs, i128 inreg %rhs, i128 inreg %amt) {5282; GFX6-LABEL: s_fshr_i128:5283; GFX6:       ; %bb.0:5284; GFX6-NEXT:    s_lshl_b64 s[10:11], s[0:1], 15285; GFX6-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15286; GFX6-NEXT:    s_lshr_b32 s0, s1, 315287; GFX6-NEXT:    s_or_b32 s2, s2, s05288; GFX6-NEXT:    s_andn2_b32 s0, 0x7f, s85289; GFX6-NEXT:    s_not_b32 s9, s85290; GFX6-NEXT:    s_sub_i32 s16, s0, 645291; GFX6-NEXT:    s_sub_i32 s12, 64, s05292; GFX6-NEXT:    s_cmp_lt_u32 s0, 645293; GFX6-NEXT:    s_cselect_b32 s17, 1, 05294; GFX6-NEXT:    s_cmp_eq_u32 s0, 05295; GFX6-NEXT:    s_cselect_b32 s18, 1, 05296; GFX6-NEXT:    s_lshr_b64 s[12:13], s[10:11], s125297; GFX6-NEXT:    s_lshl_b64 s[14:15], s[2:3], s95298; GFX6-NEXT:    s_lshl_b64 s[0:1], s[10:11], s95299; GFX6-NEXT:    s_or_b64 s[12:13], s[12:13], s[14:15]5300; GFX6-NEXT:    s_lshl_b64 s[10:11], s[10:11], s165301; GFX6-NEXT:    s_cmp_lg_u32 s17, 05302; GFX6-NEXT:    s_cselect_b64 s[0:1], s[0:1], 05303; GFX6-NEXT:    s_cselect_b64 s[10:11], s[12:13], s[10:11]5304; GFX6-NEXT:    s_cmp_lg_u32 s18, 05305; GFX6-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[10:11]5306; GFX6-NEXT:    s_and_b32 s9, s8, 0x7f5307; GFX6-NEXT:    s_sub_i32 s14, s9, 645308; GFX6-NEXT:    s_sub_i32 s12, 64, s95309; GFX6-NEXT:    s_cmp_lt_u32 s9, 645310; GFX6-NEXT:    s_cselect_b32 s15, 1, 05311; GFX6-NEXT:    s_cmp_eq_u32 s9, 05312; GFX6-NEXT:    s_cselect_b32 s16, 1, 05313; GFX6-NEXT:    s_lshr_b64 s[10:11], s[6:7], s85314; GFX6-NEXT:    s_lshr_b64 s[8:9], s[4:5], s85315; GFX6-NEXT:    s_lshl_b64 s[12:13], s[6:7], s125316; GFX6-NEXT:    s_or_b64 s[8:9], s[8:9], s[12:13]5317; GFX6-NEXT:    s_lshr_b64 s[6:7], s[6:7], s145318; GFX6-NEXT:    s_cmp_lg_u32 s15, 05319; GFX6-NEXT:    s_cselect_b64 s[6:7], s[8:9], s[6:7]5320; GFX6-NEXT:    s_cmp_lg_u32 s16, 05321; GFX6-NEXT:    s_cselect_b64 s[4:5], s[4:5], s[6:7]5322; GFX6-NEXT:    s_cmp_lg_u32 s15, 05323; GFX6-NEXT:    s_cselect_b64 s[6:7], s[10:11], 05324; GFX6-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]5325; GFX6-NEXT:    s_or_b64 s[2:3], s[2:3], s[6:7]5326; GFX6-NEXT:    ; return to shader part epilog5327;5328; GFX8-LABEL: s_fshr_i128:5329; GFX8:       ; %bb.0:5330; GFX8-NEXT:    s_lshl_b64 s[10:11], s[0:1], 15331; GFX8-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15332; GFX8-NEXT:    s_lshr_b32 s0, s1, 315333; GFX8-NEXT:    s_or_b32 s2, s2, s05334; GFX8-NEXT:    s_andn2_b32 s0, 0x7f, s85335; GFX8-NEXT:    s_not_b32 s9, s85336; GFX8-NEXT:    s_sub_i32 s16, s0, 645337; GFX8-NEXT:    s_sub_i32 s12, 64, s05338; GFX8-NEXT:    s_cmp_lt_u32 s0, 645339; GFX8-NEXT:    s_cselect_b32 s17, 1, 05340; GFX8-NEXT:    s_cmp_eq_u32 s0, 05341; GFX8-NEXT:    s_cselect_b32 s18, 1, 05342; GFX8-NEXT:    s_lshr_b64 s[12:13], s[10:11], s125343; GFX8-NEXT:    s_lshl_b64 s[14:15], s[2:3], s95344; GFX8-NEXT:    s_lshl_b64 s[0:1], s[10:11], s95345; GFX8-NEXT:    s_or_b64 s[12:13], s[12:13], s[14:15]5346; GFX8-NEXT:    s_lshl_b64 s[10:11], s[10:11], s165347; GFX8-NEXT:    s_cmp_lg_u32 s17, 05348; GFX8-NEXT:    s_cselect_b64 s[0:1], s[0:1], 05349; GFX8-NEXT:    s_cselect_b64 s[10:11], s[12:13], s[10:11]5350; GFX8-NEXT:    s_cmp_lg_u32 s18, 05351; GFX8-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[10:11]5352; GFX8-NEXT:    s_and_b32 s9, s8, 0x7f5353; GFX8-NEXT:    s_sub_i32 s14, s9, 645354; GFX8-NEXT:    s_sub_i32 s12, 64, s95355; GFX8-NEXT:    s_cmp_lt_u32 s9, 645356; GFX8-NEXT:    s_cselect_b32 s15, 1, 05357; GFX8-NEXT:    s_cmp_eq_u32 s9, 05358; GFX8-NEXT:    s_cselect_b32 s16, 1, 05359; GFX8-NEXT:    s_lshr_b64 s[10:11], s[6:7], s85360; GFX8-NEXT:    s_lshr_b64 s[8:9], s[4:5], s85361; GFX8-NEXT:    s_lshl_b64 s[12:13], s[6:7], s125362; GFX8-NEXT:    s_or_b64 s[8:9], s[8:9], s[12:13]5363; GFX8-NEXT:    s_lshr_b64 s[6:7], s[6:7], s145364; GFX8-NEXT:    s_cmp_lg_u32 s15, 05365; GFX8-NEXT:    s_cselect_b64 s[6:7], s[8:9], s[6:7]5366; GFX8-NEXT:    s_cmp_lg_u32 s16, 05367; GFX8-NEXT:    s_cselect_b64 s[4:5], s[4:5], s[6:7]5368; GFX8-NEXT:    s_cmp_lg_u32 s15, 05369; GFX8-NEXT:    s_cselect_b64 s[6:7], s[10:11], 05370; GFX8-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]5371; GFX8-NEXT:    s_or_b64 s[2:3], s[2:3], s[6:7]5372; GFX8-NEXT:    ; return to shader part epilog5373;5374; GFX9-LABEL: s_fshr_i128:5375; GFX9:       ; %bb.0:5376; GFX9-NEXT:    s_lshl_b64 s[10:11], s[0:1], 15377; GFX9-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15378; GFX9-NEXT:    s_lshr_b32 s0, s1, 315379; GFX9-NEXT:    s_or_b32 s2, s2, s05380; GFX9-NEXT:    s_andn2_b32 s0, 0x7f, s85381; GFX9-NEXT:    s_not_b32 s9, s85382; GFX9-NEXT:    s_sub_i32 s16, s0, 645383; GFX9-NEXT:    s_sub_i32 s12, 64, s05384; GFX9-NEXT:    s_cmp_lt_u32 s0, 645385; GFX9-NEXT:    s_cselect_b32 s17, 1, 05386; GFX9-NEXT:    s_cmp_eq_u32 s0, 05387; GFX9-NEXT:    s_cselect_b32 s18, 1, 05388; GFX9-NEXT:    s_lshr_b64 s[12:13], s[10:11], s125389; GFX9-NEXT:    s_lshl_b64 s[14:15], s[2:3], s95390; GFX9-NEXT:    s_lshl_b64 s[0:1], s[10:11], s95391; GFX9-NEXT:    s_or_b64 s[12:13], s[12:13], s[14:15]5392; GFX9-NEXT:    s_lshl_b64 s[10:11], s[10:11], s165393; GFX9-NEXT:    s_cmp_lg_u32 s17, 05394; GFX9-NEXT:    s_cselect_b64 s[0:1], s[0:1], 05395; GFX9-NEXT:    s_cselect_b64 s[10:11], s[12:13], s[10:11]5396; GFX9-NEXT:    s_cmp_lg_u32 s18, 05397; GFX9-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[10:11]5398; GFX9-NEXT:    s_and_b32 s9, s8, 0x7f5399; GFX9-NEXT:    s_sub_i32 s14, s9, 645400; GFX9-NEXT:    s_sub_i32 s12, 64, s95401; GFX9-NEXT:    s_cmp_lt_u32 s9, 645402; GFX9-NEXT:    s_cselect_b32 s15, 1, 05403; GFX9-NEXT:    s_cmp_eq_u32 s9, 05404; GFX9-NEXT:    s_cselect_b32 s16, 1, 05405; GFX9-NEXT:    s_lshr_b64 s[10:11], s[6:7], s85406; GFX9-NEXT:    s_lshr_b64 s[8:9], s[4:5], s85407; GFX9-NEXT:    s_lshl_b64 s[12:13], s[6:7], s125408; GFX9-NEXT:    s_or_b64 s[8:9], s[8:9], s[12:13]5409; GFX9-NEXT:    s_lshr_b64 s[6:7], s[6:7], s145410; GFX9-NEXT:    s_cmp_lg_u32 s15, 05411; GFX9-NEXT:    s_cselect_b64 s[6:7], s[8:9], s[6:7]5412; GFX9-NEXT:    s_cmp_lg_u32 s16, 05413; GFX9-NEXT:    s_cselect_b64 s[4:5], s[4:5], s[6:7]5414; GFX9-NEXT:    s_cmp_lg_u32 s15, 05415; GFX9-NEXT:    s_cselect_b64 s[6:7], s[10:11], 05416; GFX9-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]5417; GFX9-NEXT:    s_or_b64 s[2:3], s[2:3], s[6:7]5418; GFX9-NEXT:    ; return to shader part epilog5419;5420; GFX10-LABEL: s_fshr_i128:5421; GFX10:       ; %bb.0:5422; GFX10-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15423; GFX10-NEXT:    s_lshr_b32 s9, s1, 315424; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15425; GFX10-NEXT:    s_or_b32 s2, s2, s95426; GFX10-NEXT:    s_andn2_b32 s9, 0x7f, s85427; GFX10-NEXT:    s_not_b32 s14, s85428; GFX10-NEXT:    s_sub_i32 s16, s9, 645429; GFX10-NEXT:    s_sub_i32 s10, 64, s95430; GFX10-NEXT:    s_cmp_lt_u32 s9, 645431; GFX10-NEXT:    s_cselect_b32 s17, 1, 05432; GFX10-NEXT:    s_cmp_eq_u32 s9, 05433; GFX10-NEXT:    s_cselect_b32 s9, 1, 05434; GFX10-NEXT:    s_lshr_b64 s[10:11], s[0:1], s105435; GFX10-NEXT:    s_lshl_b64 s[12:13], s[2:3], s145436; GFX10-NEXT:    s_lshl_b64 s[14:15], s[0:1], s145437; GFX10-NEXT:    s_or_b64 s[10:11], s[10:11], s[12:13]5438; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], s165439; GFX10-NEXT:    s_cmp_lg_u32 s17, 05440; GFX10-NEXT:    s_cselect_b64 s[12:13], s[14:15], 05441; GFX10-NEXT:    s_cselect_b64 s[0:1], s[10:11], s[0:1]5442; GFX10-NEXT:    s_cmp_lg_u32 s9, 05443; GFX10-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]5444; GFX10-NEXT:    s_and_b32 s0, s8, 0x7f5445; GFX10-NEXT:    s_sub_i32 s14, s0, 645446; GFX10-NEXT:    s_sub_i32 s9, 64, s05447; GFX10-NEXT:    s_cmp_lt_u32 s0, 645448; GFX10-NEXT:    s_cselect_b32 s15, 1, 05449; GFX10-NEXT:    s_cmp_eq_u32 s0, 05450; GFX10-NEXT:    s_cselect_b32 s16, 1, 05451; GFX10-NEXT:    s_lshr_b64 s[0:1], s[4:5], s85452; GFX10-NEXT:    s_lshl_b64 s[10:11], s[6:7], s95453; GFX10-NEXT:    s_lshr_b64 s[8:9], s[6:7], s85454; GFX10-NEXT:    s_or_b64 s[0:1], s[0:1], s[10:11]5455; GFX10-NEXT:    s_lshr_b64 s[6:7], s[6:7], s145456; GFX10-NEXT:    s_cmp_lg_u32 s15, 05457; GFX10-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[6:7]5458; GFX10-NEXT:    s_cmp_lg_u32 s16, 05459; GFX10-NEXT:    s_cselect_b64 s[0:1], s[4:5], s[0:1]5460; GFX10-NEXT:    s_cmp_lg_u32 s15, 05461; GFX10-NEXT:    s_cselect_b64 s[4:5], s[8:9], 05462; GFX10-NEXT:    s_or_b64 s[0:1], s[12:13], s[0:1]5463; GFX10-NEXT:    s_or_b64 s[2:3], s[2:3], s[4:5]5464; GFX10-NEXT:    ; return to shader part epilog5465;5466; GFX11-LABEL: s_fshr_i128:5467; GFX11:       ; %bb.0:5468; GFX11-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15469; GFX11-NEXT:    s_lshr_b32 s9, s1, 315470; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15471; GFX11-NEXT:    s_or_b32 s2, s2, s95472; GFX11-NEXT:    s_and_not1_b32 s9, 0x7f, s85473; GFX11-NEXT:    s_not_b32 s14, s85474; GFX11-NEXT:    s_sub_i32 s16, s9, 645475; GFX11-NEXT:    s_sub_i32 s10, 64, s95476; GFX11-NEXT:    s_cmp_lt_u32 s9, 645477; GFX11-NEXT:    s_cselect_b32 s17, 1, 05478; GFX11-NEXT:    s_cmp_eq_u32 s9, 05479; GFX11-NEXT:    s_cselect_b32 s9, 1, 05480; GFX11-NEXT:    s_lshr_b64 s[10:11], s[0:1], s105481; GFX11-NEXT:    s_lshl_b64 s[12:13], s[2:3], s145482; GFX11-NEXT:    s_lshl_b64 s[14:15], s[0:1], s145483; GFX11-NEXT:    s_or_b64 s[10:11], s[10:11], s[12:13]5484; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], s165485; GFX11-NEXT:    s_cmp_lg_u32 s17, 05486; GFX11-NEXT:    s_cselect_b64 s[12:13], s[14:15], 05487; GFX11-NEXT:    s_cselect_b64 s[0:1], s[10:11], s[0:1]5488; GFX11-NEXT:    s_cmp_lg_u32 s9, 05489; GFX11-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]5490; GFX11-NEXT:    s_and_b32 s0, s8, 0x7f5491; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)5492; GFX11-NEXT:    s_sub_i32 s14, s0, 645493; GFX11-NEXT:    s_sub_i32 s9, 64, s05494; GFX11-NEXT:    s_cmp_lt_u32 s0, 645495; GFX11-NEXT:    s_cselect_b32 s15, 1, 05496; GFX11-NEXT:    s_cmp_eq_u32 s0, 05497; GFX11-NEXT:    s_cselect_b32 s16, 1, 05498; GFX11-NEXT:    s_lshr_b64 s[0:1], s[4:5], s85499; GFX11-NEXT:    s_lshl_b64 s[10:11], s[6:7], s95500; GFX11-NEXT:    s_lshr_b64 s[8:9], s[6:7], s85501; GFX11-NEXT:    s_or_b64 s[0:1], s[0:1], s[10:11]5502; GFX11-NEXT:    s_lshr_b64 s[6:7], s[6:7], s145503; GFX11-NEXT:    s_cmp_lg_u32 s15, 05504; GFX11-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[6:7]5505; GFX11-NEXT:    s_cmp_lg_u32 s16, 05506; GFX11-NEXT:    s_cselect_b64 s[0:1], s[4:5], s[0:1]5507; GFX11-NEXT:    s_cmp_lg_u32 s15, 05508; GFX11-NEXT:    s_cselect_b64 s[4:5], s[8:9], 05509; GFX11-NEXT:    s_or_b64 s[0:1], s[12:13], s[0:1]5510; GFX11-NEXT:    s_or_b64 s[2:3], s[2:3], s[4:5]5511; GFX11-NEXT:    ; return to shader part epilog5512  %result = call i128 @llvm.fshr.i128(i128 %lhs, i128 %rhs, i128 %amt)5513  ret i128 %result5514}5515 5516define i128 @v_fshr_i128(i128 %lhs, i128 %rhs, i128 %amt) {5517; GFX6-LABEL: v_fshr_i128:5518; GFX6:       ; %bb.0:5519; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5520; GFX6-NEXT:    v_lshl_b64 v[2:3], v[2:3], 15521; GFX6-NEXT:    v_lshl_b64 v[9:10], v[0:1], 15522; GFX6-NEXT:    v_lshrrev_b32_e32 v0, 31, v15523; GFX6-NEXT:    v_or_b32_e32 v2, v2, v05524; GFX6-NEXT:    v_mov_b32_e32 v0, 0x7f5525; GFX6-NEXT:    v_bfi_b32 v15, v8, 0, v05526; GFX6-NEXT:    v_sub_i32_e32 v0, vcc, 64, v155527; GFX6-NEXT:    v_not_b32_e32 v16, 635528; GFX6-NEXT:    v_lshr_b64 v[0:1], v[9:10], v05529; GFX6-NEXT:    v_lshl_b64 v[11:12], v[2:3], v155530; GFX6-NEXT:    v_add_i32_e32 v17, vcc, v15, v165531; GFX6-NEXT:    v_lshl_b64 v[13:14], v[9:10], v155532; GFX6-NEXT:    v_or_b32_e32 v11, v0, v115533; GFX6-NEXT:    v_or_b32_e32 v12, v1, v125534; GFX6-NEXT:    v_lshl_b64 v[0:1], v[9:10], v175535; GFX6-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v155536; GFX6-NEXT:    v_cndmask_b32_e32 v10, 0, v13, vcc5537; GFX6-NEXT:    v_cndmask_b32_e32 v13, 0, v14, vcc5538; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v11, vcc5539; GFX6-NEXT:    v_cndmask_b32_e32 v1, v1, v12, vcc5540; GFX6-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v155541; GFX6-NEXT:    v_and_b32_e32 v14, 0x7f, v85542; GFX6-NEXT:    v_cndmask_b32_e32 v11, v0, v2, vcc5543; GFX6-NEXT:    v_cndmask_b32_e32 v12, v1, v3, vcc5544; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 64, v145545; GFX6-NEXT:    v_lshr_b64 v[0:1], v[4:5], v145546; GFX6-NEXT:    v_lshl_b64 v[2:3], v[6:7], v25547; GFX6-NEXT:    v_add_i32_e32 v15, vcc, v14, v165548; GFX6-NEXT:    v_or_b32_e32 v2, v0, v25549; GFX6-NEXT:    v_or_b32_e32 v3, v1, v35550; GFX6-NEXT:    v_lshr_b64 v[0:1], v[6:7], v155551; GFX6-NEXT:    v_lshr_b64 v[8:9], v[6:7], v145552; GFX6-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v145553; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc5554; GFX6-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5555; GFX6-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v145556; GFX6-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[4:5]5557; GFX6-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[4:5]5558; GFX6-NEXT:    v_cndmask_b32_e32 v2, 0, v8, vcc5559; GFX6-NEXT:    v_cndmask_b32_e32 v3, 0, v9, vcc5560; GFX6-NEXT:    v_or_b32_e32 v0, v10, v05561; GFX6-NEXT:    v_or_b32_e32 v1, v13, v15562; GFX6-NEXT:    v_or_b32_e32 v2, v11, v25563; GFX6-NEXT:    v_or_b32_e32 v3, v12, v35564; GFX6-NEXT:    s_setpc_b64 s[30:31]5565;5566; GFX8-LABEL: v_fshr_i128:5567; GFX8:       ; %bb.0:5568; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5569; GFX8-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]5570; GFX8-NEXT:    v_lshlrev_b64 v[9:10], 1, v[0:1]5571; GFX8-NEXT:    v_lshrrev_b32_e32 v0, 31, v15572; GFX8-NEXT:    v_or_b32_e32 v2, v2, v05573; GFX8-NEXT:    v_mov_b32_e32 v0, 0x7f5574; GFX8-NEXT:    v_bfi_b32 v15, v8, 0, v05575; GFX8-NEXT:    v_sub_u32_e32 v0, vcc, 64, v155576; GFX8-NEXT:    v_not_b32_e32 v16, 635577; GFX8-NEXT:    v_lshrrev_b64 v[0:1], v0, v[9:10]5578; GFX8-NEXT:    v_lshlrev_b64 v[11:12], v15, v[2:3]5579; GFX8-NEXT:    v_add_u32_e32 v17, vcc, v15, v165580; GFX8-NEXT:    v_lshlrev_b64 v[13:14], v15, v[9:10]5581; GFX8-NEXT:    v_or_b32_e32 v11, v0, v115582; GFX8-NEXT:    v_or_b32_e32 v12, v1, v125583; GFX8-NEXT:    v_lshlrev_b64 v[0:1], v17, v[9:10]5584; GFX8-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v155585; GFX8-NEXT:    v_cndmask_b32_e32 v10, 0, v13, vcc5586; GFX8-NEXT:    v_cndmask_b32_e32 v13, 0, v14, vcc5587; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v11, vcc5588; GFX8-NEXT:    v_cndmask_b32_e32 v1, v1, v12, vcc5589; GFX8-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v155590; GFX8-NEXT:    v_and_b32_e32 v14, 0x7f, v85591; GFX8-NEXT:    v_cndmask_b32_e32 v11, v0, v2, vcc5592; GFX8-NEXT:    v_cndmask_b32_e32 v12, v1, v3, vcc5593; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, 64, v145594; GFX8-NEXT:    v_lshrrev_b64 v[0:1], v14, v[4:5]5595; GFX8-NEXT:    v_lshlrev_b64 v[2:3], v2, v[6:7]5596; GFX8-NEXT:    v_add_u32_e32 v15, vcc, v14, v165597; GFX8-NEXT:    v_or_b32_e32 v2, v0, v25598; GFX8-NEXT:    v_or_b32_e32 v3, v1, v35599; GFX8-NEXT:    v_lshrrev_b64 v[0:1], v15, v[6:7]5600; GFX8-NEXT:    v_lshrrev_b64 v[8:9], v14, v[6:7]5601; GFX8-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v145602; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc5603; GFX8-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5604; GFX8-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v145605; GFX8-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[4:5]5606; GFX8-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[4:5]5607; GFX8-NEXT:    v_cndmask_b32_e32 v2, 0, v8, vcc5608; GFX8-NEXT:    v_cndmask_b32_e32 v3, 0, v9, vcc5609; GFX8-NEXT:    v_or_b32_e32 v0, v10, v05610; GFX8-NEXT:    v_or_b32_e32 v1, v13, v15611; GFX8-NEXT:    v_or_b32_e32 v2, v11, v25612; GFX8-NEXT:    v_or_b32_e32 v3, v12, v35613; GFX8-NEXT:    s_setpc_b64 s[30:31]5614;5615; GFX9-LABEL: v_fshr_i128:5616; GFX9:       ; %bb.0:5617; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5618; GFX9-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]5619; GFX9-NEXT:    v_lshlrev_b64 v[9:10], 1, v[0:1]5620; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 31, v15621; GFX9-NEXT:    v_or_b32_e32 v2, v2, v05622; GFX9-NEXT:    v_mov_b32_e32 v0, 0x7f5623; GFX9-NEXT:    v_bfi_b32 v15, v8, 0, v05624; GFX9-NEXT:    v_sub_u32_e32 v0, 64, v155625; GFX9-NEXT:    v_lshrrev_b64 v[0:1], v0, v[9:10]5626; GFX9-NEXT:    v_lshlrev_b64 v[11:12], v15, v[2:3]5627; GFX9-NEXT:    v_add_u32_e32 v16, 0xffffffc0, v155628; GFX9-NEXT:    v_lshlrev_b64 v[13:14], v15, v[9:10]5629; GFX9-NEXT:    v_or_b32_e32 v11, v0, v115630; GFX9-NEXT:    v_or_b32_e32 v12, v1, v125631; GFX9-NEXT:    v_lshlrev_b64 v[0:1], v16, v[9:10]5632; GFX9-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v155633; GFX9-NEXT:    v_cndmask_b32_e32 v10, 0, v13, vcc5634; GFX9-NEXT:    v_cndmask_b32_e32 v13, 0, v14, vcc5635; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v11, vcc5636; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v12, vcc5637; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v155638; GFX9-NEXT:    v_and_b32_e32 v14, 0x7f, v85639; GFX9-NEXT:    v_cndmask_b32_e32 v11, v0, v2, vcc5640; GFX9-NEXT:    v_sub_u32_e32 v2, 64, v145641; GFX9-NEXT:    v_cndmask_b32_e32 v12, v1, v3, vcc5642; GFX9-NEXT:    v_lshrrev_b64 v[0:1], v14, v[4:5]5643; GFX9-NEXT:    v_lshlrev_b64 v[2:3], v2, v[6:7]5644; GFX9-NEXT:    v_add_u32_e32 v15, 0xffffffc0, v145645; GFX9-NEXT:    v_or_b32_e32 v2, v0, v25646; GFX9-NEXT:    v_or_b32_e32 v3, v1, v35647; GFX9-NEXT:    v_lshrrev_b64 v[0:1], v15, v[6:7]5648; GFX9-NEXT:    v_lshrrev_b64 v[8:9], v14, v[6:7]5649; GFX9-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v145650; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc5651; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5652; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v145653; GFX9-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[4:5]5654; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[4:5]5655; GFX9-NEXT:    v_cndmask_b32_e32 v2, 0, v8, vcc5656; GFX9-NEXT:    v_cndmask_b32_e32 v3, 0, v9, vcc5657; GFX9-NEXT:    v_or_b32_e32 v0, v10, v05658; GFX9-NEXT:    v_or_b32_e32 v1, v13, v15659; GFX9-NEXT:    v_or_b32_e32 v2, v11, v25660; GFX9-NEXT:    v_or_b32_e32 v3, v12, v35661; GFX9-NEXT:    s_setpc_b64 s[30:31]5662;5663; GFX10-LABEL: v_fshr_i128:5664; GFX10:       ; %bb.0:5665; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5666; GFX10-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]5667; GFX10-NEXT:    v_bfi_b32 v18, v8, 0, 0x7f5668; GFX10-NEXT:    v_lshrrev_b32_e32 v9, 31, v15669; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5670; GFX10-NEXT:    v_and_b32_e32 v19, 0x7f, v85671; GFX10-NEXT:    v_sub_nc_u32_e32 v10, 64, v185672; GFX10-NEXT:    v_or_b32_e32 v2, v2, v95673; GFX10-NEXT:    v_add_nc_u32_e32 v14, 0xffffffc0, v185674; GFX10-NEXT:    v_sub_nc_u32_e32 v16, 64, v195675; GFX10-NEXT:    v_lshlrev_b64 v[12:13], v18, v[0:1]5676; GFX10-NEXT:    v_lshrrev_b64 v[8:9], v10, v[0:1]5677; GFX10-NEXT:    v_lshlrev_b64 v[10:11], v18, v[2:3]5678; GFX10-NEXT:    v_lshlrev_b64 v[0:1], v14, v[0:1]5679; GFX10-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v185680; GFX10-NEXT:    v_lshrrev_b64 v[14:15], v19, v[4:5]5681; GFX10-NEXT:    v_lshlrev_b64 v[16:17], v16, v[6:7]5682; GFX10-NEXT:    v_cmp_gt_u32_e64 s5, 64, v195683; GFX10-NEXT:    v_or_b32_e32 v8, v8, v105684; GFX10-NEXT:    v_add_nc_u32_e32 v10, 0xffffffc0, v195685; GFX10-NEXT:    v_or_b32_e32 v11, v9, v115686; GFX10-NEXT:    v_cmp_eq_u32_e64 s4, 0, v185687; GFX10-NEXT:    v_cmp_eq_u32_e64 s6, 0, v195688; GFX10-NEXT:    v_cndmask_b32_e32 v20, v0, v8, vcc_lo5689; GFX10-NEXT:    v_lshrrev_b64 v[8:9], v10, v[6:7]5690; GFX10-NEXT:    v_or_b32_e32 v0, v14, v165691; GFX10-NEXT:    v_or_b32_e32 v10, v15, v175692; GFX10-NEXT:    v_cndmask_b32_e32 v11, v1, v11, vcc_lo5693; GFX10-NEXT:    v_cndmask_b32_e32 v12, 0, v12, vcc_lo5694; GFX10-NEXT:    v_cndmask_b32_e64 v2, v20, v2, s45695; GFX10-NEXT:    v_cndmask_b32_e64 v8, v8, v0, s55696; GFX10-NEXT:    v_lshrrev_b64 v[0:1], v19, v[6:7]5697; GFX10-NEXT:    v_cndmask_b32_e64 v6, v9, v10, s55698; GFX10-NEXT:    v_cndmask_b32_e32 v7, 0, v13, vcc_lo5699; GFX10-NEXT:    v_cndmask_b32_e64 v3, v11, v3, s45700; GFX10-NEXT:    v_cndmask_b32_e64 v4, v8, v4, s65701; GFX10-NEXT:    v_cndmask_b32_e64 v5, v6, v5, s65702; GFX10-NEXT:    v_cndmask_b32_e64 v6, 0, v0, s55703; GFX10-NEXT:    v_cndmask_b32_e64 v8, 0, v1, s55704; GFX10-NEXT:    v_or_b32_e32 v0, v12, v45705; GFX10-NEXT:    v_or_b32_e32 v1, v7, v55706; GFX10-NEXT:    v_or_b32_e32 v2, v2, v65707; GFX10-NEXT:    v_or_b32_e32 v3, v3, v85708; GFX10-NEXT:    s_setpc_b64 s[30:31]5709;5710; GFX11-LABEL: v_fshr_i128:5711; GFX11:       ; %bb.0:5712; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5713; GFX11-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]5714; GFX11-NEXT:    v_bfi_b32 v18, v8, 0, 0x7f5715; GFX11-NEXT:    v_lshrrev_b32_e32 v9, 31, v15716; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]5717; GFX11-NEXT:    v_and_b32_e32 v19, 0x7f, v85718; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5719; GFX11-NEXT:    v_sub_nc_u32_e32 v10, 64, v185720; GFX11-NEXT:    v_or_b32_e32 v2, v2, v95721; GFX11-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v185722; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)5723; GFX11-NEXT:    v_sub_nc_u32_e32 v16, 64, v195724; GFX11-NEXT:    v_lshlrev_b64 v[12:13], v18, v[0:1]5725; GFX11-NEXT:    v_lshrrev_b64 v[8:9], v10, v[0:1]5726; GFX11-NEXT:    v_lshlrev_b64 v[10:11], v18, v[2:3]5727; GFX11-NEXT:    v_cmp_gt_u32_e64 s1, 64, v195728; GFX11-NEXT:    v_lshlrev_b64 v[16:17], v16, v[6:7]5729; GFX11-NEXT:    v_cmp_eq_u32_e64 s0, 0, v185730; GFX11-NEXT:    v_cmp_eq_u32_e64 s2, 0, v195731; GFX11-NEXT:    v_cndmask_b32_e32 v12, 0, v12, vcc_lo5732; GFX11-NEXT:    v_or_b32_e32 v11, v9, v115733; GFX11-NEXT:    v_add_nc_u32_e32 v14, 0xffffffc0, v185734; GFX11-NEXT:    v_or_b32_e32 v8, v8, v105735; GFX11-NEXT:    v_add_nc_u32_e32 v10, 0xffffffc0, v195736; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)5737; GFX11-NEXT:    v_lshlrev_b64 v[0:1], v14, v[0:1]5738; GFX11-NEXT:    v_lshrrev_b64 v[14:15], v19, v[4:5]5739; GFX11-NEXT:    v_cndmask_b32_e32 v20, v0, v8, vcc_lo5740; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)5741; GFX11-NEXT:    v_lshrrev_b64 v[8:9], v10, v[6:7]5742; GFX11-NEXT:    v_or_b32_e32 v0, v14, v165743; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)5744; GFX11-NEXT:    v_or_b32_e32 v10, v15, v175745; GFX11-NEXT:    v_cndmask_b32_e32 v11, v1, v11, vcc_lo5746; GFX11-NEXT:    v_cndmask_b32_e64 v2, v20, v2, s05747; GFX11-NEXT:    v_cndmask_b32_e64 v8, v8, v0, s15748; GFX11-NEXT:    v_lshrrev_b64 v[0:1], v19, v[6:7]5749; GFX11-NEXT:    v_cndmask_b32_e64 v6, v9, v10, s15750; GFX11-NEXT:    v_cndmask_b32_e32 v7, 0, v13, vcc_lo5751; GFX11-NEXT:    v_cndmask_b32_e64 v3, v11, v3, s05752; GFX11-NEXT:    v_cndmask_b32_e64 v4, v8, v4, s25753; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)5754; GFX11-NEXT:    v_cndmask_b32_e64 v5, v6, v5, s25755; GFX11-NEXT:    v_cndmask_b32_e64 v6, 0, v0, s15756; GFX11-NEXT:    v_cndmask_b32_e64 v8, 0, v1, s15757; GFX11-NEXT:    v_or_b32_e32 v0, v12, v45758; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)5759; GFX11-NEXT:    v_or_b32_e32 v1, v7, v55760; GFX11-NEXT:    v_or_b32_e32 v2, v2, v65761; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)5762; GFX11-NEXT:    v_or_b32_e32 v3, v3, v85763; GFX11-NEXT:    s_setpc_b64 s[30:31]5764  %result = call i128 @llvm.fshr.i128(i128 %lhs, i128 %rhs, i128 %amt)5765  ret i128 %result5766}5767 5768define amdgpu_ps <4 x float> @v_fshr_i128_ssv(i128 inreg %lhs, i128 inreg %rhs, i128 %amt) {5769; GFX6-LABEL: v_fshr_i128_ssv:5770; GFX6:       ; %bb.0:5771; GFX6-NEXT:    v_mov_b32_e32 v1, 0x7f5772; GFX6-NEXT:    s_lshl_b64 s[8:9], s[0:1], 15773; GFX6-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15774; GFX6-NEXT:    s_lshr_b32 s0, s1, 315775; GFX6-NEXT:    v_bfi_b32 v7, v0, 0, v15776; GFX6-NEXT:    s_or_b32 s2, s2, s05777; GFX6-NEXT:    v_sub_i32_e32 v1, vcc, 64, v75778; GFX6-NEXT:    v_not_b32_e32 v8, 635779; GFX6-NEXT:    v_lshr_b64 v[1:2], s[8:9], v15780; GFX6-NEXT:    v_lshl_b64 v[3:4], s[2:3], v75781; GFX6-NEXT:    v_add_i32_e32 v9, vcc, v7, v85782; GFX6-NEXT:    v_lshl_b64 v[5:6], s[8:9], v75783; GFX6-NEXT:    v_or_b32_e32 v3, v1, v35784; GFX6-NEXT:    v_or_b32_e32 v4, v2, v45785; GFX6-NEXT:    v_lshl_b64 v[1:2], s[8:9], v95786; GFX6-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v75787; GFX6-NEXT:    v_cndmask_b32_e32 v9, 0, v5, vcc5788; GFX6-NEXT:    v_cndmask_b32_e32 v6, 0, v6, vcc5789; GFX6-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5790; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc5791; GFX6-NEXT:    v_mov_b32_e32 v3, s25792; GFX6-NEXT:    v_mov_b32_e32 v4, s35793; GFX6-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v75794; GFX6-NEXT:    v_and_b32_e32 v11, 0x7f, v05795; GFX6-NEXT:    v_cndmask_b32_e32 v7, v1, v3, vcc5796; GFX6-NEXT:    v_cndmask_b32_e32 v10, v2, v4, vcc5797; GFX6-NEXT:    v_sub_i32_e32 v2, vcc, 64, v115798; GFX6-NEXT:    v_lshr_b64 v[0:1], s[4:5], v115799; GFX6-NEXT:    v_lshl_b64 v[2:3], s[6:7], v25800; GFX6-NEXT:    v_add_i32_e32 v8, vcc, v11, v85801; GFX6-NEXT:    v_or_b32_e32 v2, v0, v25802; GFX6-NEXT:    v_or_b32_e32 v3, v1, v35803; GFX6-NEXT:    v_lshr_b64 v[0:1], s[6:7], v85804; GFX6-NEXT:    v_lshr_b64 v[4:5], s[6:7], v115805; GFX6-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v115806; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc5807; GFX6-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5808; GFX6-NEXT:    v_mov_b32_e32 v2, s45809; GFX6-NEXT:    v_mov_b32_e32 v3, s55810; GFX6-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v115811; GFX6-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]5812; GFX6-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]5813; GFX6-NEXT:    v_cndmask_b32_e32 v2, 0, v4, vcc5814; GFX6-NEXT:    v_cndmask_b32_e32 v3, 0, v5, vcc5815; GFX6-NEXT:    v_or_b32_e32 v0, v9, v05816; GFX6-NEXT:    v_or_b32_e32 v1, v6, v15817; GFX6-NEXT:    v_or_b32_e32 v2, v7, v25818; GFX6-NEXT:    v_or_b32_e32 v3, v10, v35819; GFX6-NEXT:    ; return to shader part epilog5820;5821; GFX8-LABEL: v_fshr_i128_ssv:5822; GFX8:       ; %bb.0:5823; GFX8-NEXT:    v_mov_b32_e32 v1, 0x7f5824; GFX8-NEXT:    s_lshl_b64 s[8:9], s[0:1], 15825; GFX8-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15826; GFX8-NEXT:    s_lshr_b32 s0, s1, 315827; GFX8-NEXT:    v_bfi_b32 v7, v0, 0, v15828; GFX8-NEXT:    s_or_b32 s2, s2, s05829; GFX8-NEXT:    v_sub_u32_e32 v1, vcc, 64, v75830; GFX8-NEXT:    v_not_b32_e32 v8, 635831; GFX8-NEXT:    v_lshrrev_b64 v[1:2], v1, s[8:9]5832; GFX8-NEXT:    v_lshlrev_b64 v[3:4], v7, s[2:3]5833; GFX8-NEXT:    v_add_u32_e32 v9, vcc, v7, v85834; GFX8-NEXT:    v_lshlrev_b64 v[5:6], v7, s[8:9]5835; GFX8-NEXT:    v_or_b32_e32 v3, v1, v35836; GFX8-NEXT:    v_or_b32_e32 v4, v2, v45837; GFX8-NEXT:    v_lshlrev_b64 v[1:2], v9, s[8:9]5838; GFX8-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v75839; GFX8-NEXT:    v_cndmask_b32_e32 v9, 0, v5, vcc5840; GFX8-NEXT:    v_cndmask_b32_e32 v6, 0, v6, vcc5841; GFX8-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5842; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc5843; GFX8-NEXT:    v_mov_b32_e32 v3, s25844; GFX8-NEXT:    v_mov_b32_e32 v4, s35845; GFX8-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v75846; GFX8-NEXT:    v_and_b32_e32 v11, 0x7f, v05847; GFX8-NEXT:    v_cndmask_b32_e32 v7, v1, v3, vcc5848; GFX8-NEXT:    v_cndmask_b32_e32 v10, v2, v4, vcc5849; GFX8-NEXT:    v_sub_u32_e32 v2, vcc, 64, v115850; GFX8-NEXT:    v_lshrrev_b64 v[0:1], v11, s[4:5]5851; GFX8-NEXT:    v_lshlrev_b64 v[2:3], v2, s[6:7]5852; GFX8-NEXT:    v_add_u32_e32 v8, vcc, v11, v85853; GFX8-NEXT:    v_or_b32_e32 v2, v0, v25854; GFX8-NEXT:    v_or_b32_e32 v3, v1, v35855; GFX8-NEXT:    v_lshrrev_b64 v[0:1], v8, s[6:7]5856; GFX8-NEXT:    v_lshrrev_b64 v[4:5], v11, s[6:7]5857; GFX8-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v115858; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc5859; GFX8-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5860; GFX8-NEXT:    v_mov_b32_e32 v2, s45861; GFX8-NEXT:    v_mov_b32_e32 v3, s55862; GFX8-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v115863; GFX8-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]5864; GFX8-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]5865; GFX8-NEXT:    v_cndmask_b32_e32 v2, 0, v4, vcc5866; GFX8-NEXT:    v_cndmask_b32_e32 v3, 0, v5, vcc5867; GFX8-NEXT:    v_or_b32_e32 v0, v9, v05868; GFX8-NEXT:    v_or_b32_e32 v1, v6, v15869; GFX8-NEXT:    v_or_b32_e32 v2, v7, v25870; GFX8-NEXT:    v_or_b32_e32 v3, v10, v35871; GFX8-NEXT:    ; return to shader part epilog5872;5873; GFX9-LABEL: v_fshr_i128_ssv:5874; GFX9:       ; %bb.0:5875; GFX9-NEXT:    v_mov_b32_e32 v1, 0x7f5876; GFX9-NEXT:    s_lshl_b64 s[8:9], s[0:1], 15877; GFX9-NEXT:    s_lshl_b64 s[2:3], s[2:3], 15878; GFX9-NEXT:    s_lshr_b32 s0, s1, 315879; GFX9-NEXT:    v_bfi_b32 v7, v0, 0, v15880; GFX9-NEXT:    s_or_b32 s2, s2, s05881; GFX9-NEXT:    v_sub_u32_e32 v1, 64, v75882; GFX9-NEXT:    v_lshrrev_b64 v[1:2], v1, s[8:9]5883; GFX9-NEXT:    v_lshlrev_b64 v[3:4], v7, s[2:3]5884; GFX9-NEXT:    v_add_u32_e32 v8, 0xffffffc0, v75885; GFX9-NEXT:    v_lshlrev_b64 v[5:6], v7, s[8:9]5886; GFX9-NEXT:    v_or_b32_e32 v3, v1, v35887; GFX9-NEXT:    v_or_b32_e32 v4, v2, v45888; GFX9-NEXT:    v_lshlrev_b64 v[1:2], v8, s[8:9]5889; GFX9-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v75890; GFX9-NEXT:    v_cndmask_b32_e32 v8, 0, v5, vcc5891; GFX9-NEXT:    v_cndmask_b32_e32 v6, 0, v6, vcc5892; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5893; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc5894; GFX9-NEXT:    v_mov_b32_e32 v4, s35895; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v75896; GFX9-NEXT:    v_and_b32_e32 v10, 0x7f, v05897; GFX9-NEXT:    v_mov_b32_e32 v3, s25898; GFX9-NEXT:    v_cndmask_b32_e32 v9, v2, v4, vcc5899; GFX9-NEXT:    v_sub_u32_e32 v2, 64, v105900; GFX9-NEXT:    v_cndmask_b32_e32 v7, v1, v3, vcc5901; GFX9-NEXT:    v_lshrrev_b64 v[0:1], v10, s[4:5]5902; GFX9-NEXT:    v_lshlrev_b64 v[2:3], v2, s[6:7]5903; GFX9-NEXT:    v_add_u32_e32 v11, 0xffffffc0, v105904; GFX9-NEXT:    v_or_b32_e32 v2, v0, v25905; GFX9-NEXT:    v_or_b32_e32 v3, v1, v35906; GFX9-NEXT:    v_lshrrev_b64 v[0:1], v11, s[6:7]5907; GFX9-NEXT:    v_lshrrev_b64 v[4:5], v10, s[6:7]5908; GFX9-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v105909; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc5910; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc5911; GFX9-NEXT:    v_mov_b32_e32 v2, s45912; GFX9-NEXT:    v_mov_b32_e32 v3, s55913; GFX9-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v105914; GFX9-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]5915; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]5916; GFX9-NEXT:    v_cndmask_b32_e32 v2, 0, v4, vcc5917; GFX9-NEXT:    v_cndmask_b32_e32 v3, 0, v5, vcc5918; GFX9-NEXT:    v_or_b32_e32 v0, v8, v05919; GFX9-NEXT:    v_or_b32_e32 v1, v6, v15920; GFX9-NEXT:    v_or_b32_e32 v2, v7, v25921; GFX9-NEXT:    v_or_b32_e32 v3, v9, v35922; GFX9-NEXT:    ; return to shader part epilog5923;5924; GFX10-LABEL: v_fshr_i128_ssv:5925; GFX10:       ; %bb.0:5926; GFX10-NEXT:    v_bfi_b32 v11, v0, 0, 0x7f5927; GFX10-NEXT:    s_lshl_b64 s[8:9], s[2:3], 15928; GFX10-NEXT:    s_lshr_b32 s2, s1, 315929; GFX10-NEXT:    v_and_b32_e32 v12, 0x7f, v05930; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15931; GFX10-NEXT:    v_sub_nc_u32_e32 v1, 64, v115932; GFX10-NEXT:    s_or_b32 s8, s8, s25933; GFX10-NEXT:    v_add_nc_u32_e32 v0, 0xffffffc0, v115934; GFX10-NEXT:    v_lshlrev_b64 v[3:4], v11, s[8:9]5935; GFX10-NEXT:    v_sub_nc_u32_e32 v9, 64, v125936; GFX10-NEXT:    v_lshrrev_b64 v[1:2], v1, s[0:1]5937; GFX10-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v115938; GFX10-NEXT:    v_add_nc_u32_e32 v13, 0xffffffc0, v125939; GFX10-NEXT:    v_lshrrev_b64 v[7:8], v12, s[4:5]5940; GFX10-NEXT:    v_lshlrev_b64 v[9:10], v9, s[6:7]5941; GFX10-NEXT:    v_lshlrev_b64 v[5:6], v11, s[0:1]5942; GFX10-NEXT:    v_or_b32_e32 v3, v1, v35943; GFX10-NEXT:    v_lshlrev_b64 v[0:1], v0, s[0:1]5944; GFX10-NEXT:    v_or_b32_e32 v4, v2, v45945; GFX10-NEXT:    v_cmp_gt_u32_e64 s1, 64, v125946; GFX10-NEXT:    v_cmp_eq_u32_e64 s0, 0, v115947; GFX10-NEXT:    v_cmp_eq_u32_e64 s2, 0, v125948; GFX10-NEXT:    v_cndmask_b32_e32 v5, 0, v5, vcc_lo5949; GFX10-NEXT:    v_cndmask_b32_e32 v14, v0, v3, vcc_lo5950; GFX10-NEXT:    v_lshrrev_b64 v[2:3], v13, s[6:7]5951; GFX10-NEXT:    v_or_b32_e32 v0, v7, v95952; GFX10-NEXT:    v_or_b32_e32 v7, v8, v105953; GFX10-NEXT:    v_cndmask_b32_e32 v4, v1, v4, vcc_lo5954; GFX10-NEXT:    v_cndmask_b32_e32 v6, 0, v6, vcc_lo5955; GFX10-NEXT:    v_cndmask_b32_e64 v2, v2, v0, s15956; GFX10-NEXT:    v_lshrrev_b64 v[0:1], v12, s[6:7]5957; GFX10-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s15958; GFX10-NEXT:    v_cndmask_b32_e64 v7, v14, s8, s05959; GFX10-NEXT:    v_cndmask_b32_e64 v4, v4, s9, s05960; GFX10-NEXT:    v_cndmask_b32_e64 v2, v2, s4, s25961; GFX10-NEXT:    v_cndmask_b32_e64 v3, v3, s5, s25962; GFX10-NEXT:    v_cndmask_b32_e64 v8, 0, v0, s15963; GFX10-NEXT:    v_cndmask_b32_e64 v9, 0, v1, s15964; GFX10-NEXT:    v_or_b32_e32 v0, v5, v25965; GFX10-NEXT:    v_or_b32_e32 v1, v6, v35966; GFX10-NEXT:    v_or_b32_e32 v2, v7, v85967; GFX10-NEXT:    v_or_b32_e32 v3, v4, v95968; GFX10-NEXT:    ; return to shader part epilog5969;5970; GFX11-LABEL: v_fshr_i128_ssv:5971; GFX11:       ; %bb.0:5972; GFX11-NEXT:    v_bfi_b32 v11, v0, 0, 0x7f5973; GFX11-NEXT:    s_lshl_b64 s[8:9], s[2:3], 15974; GFX11-NEXT:    s_lshr_b32 s2, s1, 315975; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 15976; GFX11-NEXT:    s_or_b32 s8, s8, s25977; GFX11-NEXT:    v_sub_nc_u32_e32 v1, 64, v115978; GFX11-NEXT:    v_lshlrev_b64 v[5:6], v11, s[0:1]5979; GFX11-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v115980; GFX11-NEXT:    v_and_b32_e32 v12, 0x7f, v05981; GFX11-NEXT:    v_lshlrev_b64 v[3:4], v11, s[8:9]5982; GFX11-NEXT:    v_lshrrev_b64 v[1:2], v1, s[0:1]5983; GFX11-NEXT:    v_dual_cndmask_b32 v5, 0, v5 :: v_dual_add_nc_u32 v0, 0xffffffc0, v115984; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)5985; GFX11-NEXT:    v_sub_nc_u32_e32 v9, 64, v125986; GFX11-NEXT:    v_lshrrev_b64 v[7:8], v12, s[4:5]5987; GFX11-NEXT:    v_cmp_eq_u32_e64 s2, 0, v125988; GFX11-NEXT:    v_or_b32_e32 v3, v1, v35989; GFX11-NEXT:    v_lshlrev_b64 v[0:1], v0, s[0:1]5990; GFX11-NEXT:    v_add_nc_u32_e32 v13, 0xffffffc0, v125991; GFX11-NEXT:    v_lshlrev_b64 v[9:10], v9, s[6:7]5992; GFX11-NEXT:    v_or_b32_e32 v4, v2, v45993; GFX11-NEXT:    v_cmp_gt_u32_e64 s1, 64, v125994; GFX11-NEXT:    v_cmp_eq_u32_e64 s0, 0, v115995; GFX11-NEXT:    v_cndmask_b32_e32 v14, v0, v3, vcc_lo5996; GFX11-NEXT:    v_lshrrev_b64 v[2:3], v13, s[6:7]5997; GFX11-NEXT:    v_or_b32_e32 v0, v7, v95998; GFX11-NEXT:    v_or_b32_e32 v7, v8, v105999; GFX11-NEXT:    v_cndmask_b32_e32 v4, v1, v4, vcc_lo6000; GFX11-NEXT:    v_cndmask_b32_e32 v6, 0, v6, vcc_lo6001; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)6002; GFX11-NEXT:    v_cndmask_b32_e64 v2, v2, v0, s16003; GFX11-NEXT:    v_lshrrev_b64 v[0:1], v12, s[6:7]6004; GFX11-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s16005; GFX11-NEXT:    v_cndmask_b32_e64 v7, v14, s8, s06006; GFX11-NEXT:    v_cndmask_b32_e64 v4, v4, s9, s06007; GFX11-NEXT:    v_cndmask_b32_e64 v2, v2, s4, s26008; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)6009; GFX11-NEXT:    v_cndmask_b32_e64 v3, v3, s5, s26010; GFX11-NEXT:    v_cndmask_b32_e64 v8, 0, v0, s16011; GFX11-NEXT:    v_cndmask_b32_e64 v9, 0, v1, s16012; GFX11-NEXT:    v_or_b32_e32 v0, v5, v26013; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)6014; GFX11-NEXT:    v_or_b32_e32 v1, v6, v36015; GFX11-NEXT:    v_or_b32_e32 v2, v7, v86016; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)6017; GFX11-NEXT:    v_or_b32_e32 v3, v4, v96018; GFX11-NEXT:    ; return to shader part epilog6019  %result = call i128 @llvm.fshr.i128(i128 %lhs, i128 %rhs, i128 %amt)6020  %cast.result = bitcast i128 %result to <4 x float>6021  ret <4 x float> %cast.result6022}6023 6024define amdgpu_ps <4 x float> @v_fshr_i128_svs(i128 inreg %lhs, i128 %rhs, i128 inreg %amt) {6025; GFX6-LABEL: v_fshr_i128_svs:6026; GFX6:       ; %bb.0:6027; GFX6-NEXT:    s_lshl_b64 s[6:7], s[0:1], 16028; GFX6-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16029; GFX6-NEXT:    s_lshr_b32 s0, s1, 316030; GFX6-NEXT:    s_or_b32 s2, s2, s06031; GFX6-NEXT:    s_andn2_b32 s0, 0x7f, s46032; GFX6-NEXT:    s_not_b32 s5, s46033; GFX6-NEXT:    s_sub_i32 s12, s0, 646034; GFX6-NEXT:    s_sub_i32 s8, 64, s06035; GFX6-NEXT:    s_cmp_lt_u32 s0, 646036; GFX6-NEXT:    s_cselect_b32 s13, 1, 06037; GFX6-NEXT:    s_cmp_eq_u32 s0, 06038; GFX6-NEXT:    s_cselect_b32 s14, 1, 06039; GFX6-NEXT:    s_lshr_b64 s[8:9], s[6:7], s86040; GFX6-NEXT:    s_lshl_b64 s[10:11], s[2:3], s56041; GFX6-NEXT:    s_lshl_b64 s[0:1], s[6:7], s56042; GFX6-NEXT:    s_or_b64 s[8:9], s[8:9], s[10:11]6043; GFX6-NEXT:    s_lshl_b64 s[6:7], s[6:7], s126044; GFX6-NEXT:    s_cmp_lg_u32 s13, 06045; GFX6-NEXT:    s_cselect_b64 s[10:11], s[0:1], 06046; GFX6-NEXT:    s_cselect_b64 s[0:1], s[8:9], s[6:7]6047; GFX6-NEXT:    s_cmp_lg_u32 s14, 06048; GFX6-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]6049; GFX6-NEXT:    s_and_b32 s0, s4, 0x7f6050; GFX6-NEXT:    s_sub_i32 s1, s0, 646051; GFX6-NEXT:    s_sub_i32 s4, 64, s06052; GFX6-NEXT:    s_cmp_lt_u32 s0, 646053; GFX6-NEXT:    s_cselect_b32 s5, 1, 06054; GFX6-NEXT:    s_cmp_eq_u32 s0, 06055; GFX6-NEXT:    v_lshr_b64 v[4:5], v[0:1], s06056; GFX6-NEXT:    v_lshl_b64 v[6:7], v[2:3], s46057; GFX6-NEXT:    s_cselect_b32 s6, 1, 06058; GFX6-NEXT:    v_lshr_b64 v[8:9], v[2:3], s06059; GFX6-NEXT:    v_lshr_b64 v[2:3], v[2:3], s16060; GFX6-NEXT:    s_and_b32 s0, 1, s56061; GFX6-NEXT:    v_or_b32_e32 v4, v4, v66062; GFX6-NEXT:    v_or_b32_e32 v5, v5, v76063; GFX6-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s06064; GFX6-NEXT:    s_and_b32 s0, 1, s66065; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc6066; GFX6-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc6067; GFX6-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s06068; GFX6-NEXT:    v_cndmask_b32_e64 v0, v2, v0, s[0:1]6069; GFX6-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[0:1]6070; GFX6-NEXT:    v_cndmask_b32_e32 v2, 0, v8, vcc6071; GFX6-NEXT:    v_cndmask_b32_e32 v3, 0, v9, vcc6072; GFX6-NEXT:    v_or_b32_e32 v0, s10, v06073; GFX6-NEXT:    v_or_b32_e32 v1, s11, v16074; GFX6-NEXT:    v_or_b32_e32 v2, s2, v26075; GFX6-NEXT:    v_or_b32_e32 v3, s3, v36076; GFX6-NEXT:    ; return to shader part epilog6077;6078; GFX8-LABEL: v_fshr_i128_svs:6079; GFX8:       ; %bb.0:6080; GFX8-NEXT:    s_lshl_b64 s[6:7], s[0:1], 16081; GFX8-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16082; GFX8-NEXT:    s_lshr_b32 s0, s1, 316083; GFX8-NEXT:    s_or_b32 s2, s2, s06084; GFX8-NEXT:    s_andn2_b32 s0, 0x7f, s46085; GFX8-NEXT:    s_not_b32 s5, s46086; GFX8-NEXT:    s_sub_i32 s12, s0, 646087; GFX8-NEXT:    s_sub_i32 s8, 64, s06088; GFX8-NEXT:    s_cmp_lt_u32 s0, 646089; GFX8-NEXT:    s_cselect_b32 s13, 1, 06090; GFX8-NEXT:    s_cmp_eq_u32 s0, 06091; GFX8-NEXT:    s_cselect_b32 s14, 1, 06092; GFX8-NEXT:    s_lshr_b64 s[8:9], s[6:7], s86093; GFX8-NEXT:    s_lshl_b64 s[10:11], s[2:3], s56094; GFX8-NEXT:    s_lshl_b64 s[0:1], s[6:7], s56095; GFX8-NEXT:    s_or_b64 s[8:9], s[8:9], s[10:11]6096; GFX8-NEXT:    s_lshl_b64 s[6:7], s[6:7], s126097; GFX8-NEXT:    s_cmp_lg_u32 s13, 06098; GFX8-NEXT:    s_cselect_b64 s[10:11], s[0:1], 06099; GFX8-NEXT:    s_cselect_b64 s[0:1], s[8:9], s[6:7]6100; GFX8-NEXT:    s_cmp_lg_u32 s14, 06101; GFX8-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]6102; GFX8-NEXT:    s_and_b32 s0, s4, 0x7f6103; GFX8-NEXT:    s_sub_i32 s1, s0, 646104; GFX8-NEXT:    s_sub_i32 s4, 64, s06105; GFX8-NEXT:    s_cmp_lt_u32 s0, 646106; GFX8-NEXT:    s_cselect_b32 s5, 1, 06107; GFX8-NEXT:    s_cmp_eq_u32 s0, 06108; GFX8-NEXT:    v_lshrrev_b64 v[4:5], s0, v[0:1]6109; GFX8-NEXT:    v_lshlrev_b64 v[6:7], s4, v[2:3]6110; GFX8-NEXT:    s_cselect_b32 s6, 1, 06111; GFX8-NEXT:    v_lshrrev_b64 v[8:9], s0, v[2:3]6112; GFX8-NEXT:    v_lshrrev_b64 v[2:3], s1, v[2:3]6113; GFX8-NEXT:    s_and_b32 s0, 1, s56114; GFX8-NEXT:    v_or_b32_e32 v4, v4, v66115; GFX8-NEXT:    v_or_b32_e32 v5, v5, v76116; GFX8-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s06117; GFX8-NEXT:    s_and_b32 s0, 1, s66118; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc6119; GFX8-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc6120; GFX8-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s06121; GFX8-NEXT:    v_cndmask_b32_e64 v0, v2, v0, s[0:1]6122; GFX8-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[0:1]6123; GFX8-NEXT:    v_cndmask_b32_e32 v2, 0, v8, vcc6124; GFX8-NEXT:    v_cndmask_b32_e32 v3, 0, v9, vcc6125; GFX8-NEXT:    v_or_b32_e32 v0, s10, v06126; GFX8-NEXT:    v_or_b32_e32 v1, s11, v16127; GFX8-NEXT:    v_or_b32_e32 v2, s2, v26128; GFX8-NEXT:    v_or_b32_e32 v3, s3, v36129; GFX8-NEXT:    ; return to shader part epilog6130;6131; GFX9-LABEL: v_fshr_i128_svs:6132; GFX9:       ; %bb.0:6133; GFX9-NEXT:    s_lshl_b64 s[6:7], s[0:1], 16134; GFX9-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16135; GFX9-NEXT:    s_lshr_b32 s0, s1, 316136; GFX9-NEXT:    s_or_b32 s2, s2, s06137; GFX9-NEXT:    s_andn2_b32 s0, 0x7f, s46138; GFX9-NEXT:    s_not_b32 s5, s46139; GFX9-NEXT:    s_sub_i32 s12, s0, 646140; GFX9-NEXT:    s_sub_i32 s8, 64, s06141; GFX9-NEXT:    s_cmp_lt_u32 s0, 646142; GFX9-NEXT:    s_cselect_b32 s13, 1, 06143; GFX9-NEXT:    s_cmp_eq_u32 s0, 06144; GFX9-NEXT:    s_cselect_b32 s14, 1, 06145; GFX9-NEXT:    s_lshr_b64 s[8:9], s[6:7], s86146; GFX9-NEXT:    s_lshl_b64 s[10:11], s[2:3], s56147; GFX9-NEXT:    s_lshl_b64 s[0:1], s[6:7], s56148; GFX9-NEXT:    s_or_b64 s[8:9], s[8:9], s[10:11]6149; GFX9-NEXT:    s_lshl_b64 s[6:7], s[6:7], s126150; GFX9-NEXT:    s_cmp_lg_u32 s13, 06151; GFX9-NEXT:    s_cselect_b64 s[10:11], s[0:1], 06152; GFX9-NEXT:    s_cselect_b64 s[0:1], s[8:9], s[6:7]6153; GFX9-NEXT:    s_cmp_lg_u32 s14, 06154; GFX9-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]6155; GFX9-NEXT:    s_and_b32 s0, s4, 0x7f6156; GFX9-NEXT:    s_sub_i32 s1, s0, 646157; GFX9-NEXT:    s_sub_i32 s4, 64, s06158; GFX9-NEXT:    s_cmp_lt_u32 s0, 646159; GFX9-NEXT:    s_cselect_b32 s5, 1, 06160; GFX9-NEXT:    s_cmp_eq_u32 s0, 06161; GFX9-NEXT:    v_lshrrev_b64 v[4:5], s0, v[0:1]6162; GFX9-NEXT:    v_lshlrev_b64 v[6:7], s4, v[2:3]6163; GFX9-NEXT:    s_cselect_b32 s6, 1, 06164; GFX9-NEXT:    v_lshrrev_b64 v[8:9], s0, v[2:3]6165; GFX9-NEXT:    v_lshrrev_b64 v[2:3], s1, v[2:3]6166; GFX9-NEXT:    s_and_b32 s0, 1, s56167; GFX9-NEXT:    v_or_b32_e32 v4, v4, v66168; GFX9-NEXT:    v_or_b32_e32 v5, v5, v76169; GFX9-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s06170; GFX9-NEXT:    s_and_b32 s0, 1, s66171; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc6172; GFX9-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc6173; GFX9-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, s06174; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v0, s[0:1]6175; GFX9-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[0:1]6176; GFX9-NEXT:    v_cndmask_b32_e32 v2, 0, v8, vcc6177; GFX9-NEXT:    v_cndmask_b32_e32 v3, 0, v9, vcc6178; GFX9-NEXT:    v_or_b32_e32 v0, s10, v06179; GFX9-NEXT:    v_or_b32_e32 v1, s11, v16180; GFX9-NEXT:    v_or_b32_e32 v2, s2, v26181; GFX9-NEXT:    v_or_b32_e32 v3, s3, v36182; GFX9-NEXT:    ; return to shader part epilog6183;6184; GFX10-LABEL: v_fshr_i128_svs:6185; GFX10:       ; %bb.0:6186; GFX10-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16187; GFX10-NEXT:    s_lshr_b32 s5, s1, 316188; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 16189; GFX10-NEXT:    s_or_b32 s2, s2, s56190; GFX10-NEXT:    s_andn2_b32 s5, 0x7f, s46191; GFX10-NEXT:    s_not_b32 s10, s46192; GFX10-NEXT:    s_sub_i32 s12, s5, 646193; GFX10-NEXT:    s_sub_i32 s6, 64, s56194; GFX10-NEXT:    s_cmp_lt_u32 s5, 646195; GFX10-NEXT:    s_cselect_b32 s13, 1, 06196; GFX10-NEXT:    s_cmp_eq_u32 s5, 06197; GFX10-NEXT:    s_cselect_b32 s5, 1, 06198; GFX10-NEXT:    s_lshr_b64 s[6:7], s[0:1], s66199; GFX10-NEXT:    s_lshl_b64 s[8:9], s[2:3], s106200; GFX10-NEXT:    s_lshl_b64 s[10:11], s[0:1], s106201; GFX10-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]6202; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], s126203; GFX10-NEXT:    s_cmp_lg_u32 s13, 06204; GFX10-NEXT:    s_cselect_b64 s[8:9], s[10:11], 06205; GFX10-NEXT:    s_cselect_b64 s[0:1], s[6:7], s[0:1]6206; GFX10-NEXT:    s_cmp_lg_u32 s5, 06207; GFX10-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]6208; GFX10-NEXT:    s_and_b32 s0, s4, 0x7f6209; GFX10-NEXT:    s_sub_i32 s1, 64, s06210; GFX10-NEXT:    v_lshrrev_b64 v[4:5], s0, v[0:1]6211; GFX10-NEXT:    v_lshlrev_b64 v[6:7], s1, v[2:3]6212; GFX10-NEXT:    s_sub_i32 s1, s0, 646213; GFX10-NEXT:    s_cmp_lt_u32 s0, 646214; GFX10-NEXT:    v_lshrrev_b64 v[8:9], s1, v[2:3]6215; GFX10-NEXT:    s_cselect_b32 s4, 1, 06216; GFX10-NEXT:    s_cmp_eq_u32 s0, 06217; GFX10-NEXT:    v_or_b32_e32 v4, v4, v66218; GFX10-NEXT:    s_cselect_b32 s5, 1, 06219; GFX10-NEXT:    s_and_b32 s1, 1, s46220; GFX10-NEXT:    v_or_b32_e32 v5, v5, v76221; GFX10-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s16222; GFX10-NEXT:    v_lshrrev_b64 v[2:3], s0, v[2:3]6223; GFX10-NEXT:    s_and_b32 s0, 1, s56224; GFX10-NEXT:    v_cmp_ne_u32_e64 s0, 0, s06225; GFX10-NEXT:    v_cndmask_b32_e32 v4, v8, v4, vcc_lo6226; GFX10-NEXT:    v_cndmask_b32_e32 v5, v9, v5, vcc_lo6227; GFX10-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc_lo6228; GFX10-NEXT:    v_cndmask_b32_e32 v3, 0, v3, vcc_lo6229; GFX10-NEXT:    v_cndmask_b32_e64 v0, v4, v0, s06230; GFX10-NEXT:    v_cndmask_b32_e64 v1, v5, v1, s06231; GFX10-NEXT:    v_or_b32_e32 v2, s2, v26232; GFX10-NEXT:    v_or_b32_e32 v3, s3, v36233; GFX10-NEXT:    v_or_b32_e32 v0, s8, v06234; GFX10-NEXT:    v_or_b32_e32 v1, s9, v16235; GFX10-NEXT:    ; return to shader part epilog6236;6237; GFX11-LABEL: v_fshr_i128_svs:6238; GFX11:       ; %bb.0:6239; GFX11-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16240; GFX11-NEXT:    s_lshr_b32 s5, s1, 316241; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 16242; GFX11-NEXT:    s_or_b32 s2, s2, s56243; GFX11-NEXT:    s_and_not1_b32 s5, 0x7f, s46244; GFX11-NEXT:    s_not_b32 s10, s46245; GFX11-NEXT:    s_sub_i32 s12, s5, 646246; GFX11-NEXT:    s_sub_i32 s6, 64, s56247; GFX11-NEXT:    s_cmp_lt_u32 s5, 646248; GFX11-NEXT:    s_cselect_b32 s13, 1, 06249; GFX11-NEXT:    s_cmp_eq_u32 s5, 06250; GFX11-NEXT:    s_cselect_b32 s5, 1, 06251; GFX11-NEXT:    s_lshr_b64 s[6:7], s[0:1], s66252; GFX11-NEXT:    s_lshl_b64 s[8:9], s[2:3], s106253; GFX11-NEXT:    s_lshl_b64 s[10:11], s[0:1], s106254; GFX11-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]6255; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], s126256; GFX11-NEXT:    s_cmp_lg_u32 s13, 06257; GFX11-NEXT:    s_cselect_b64 s[8:9], s[10:11], 06258; GFX11-NEXT:    s_cselect_b64 s[0:1], s[6:7], s[0:1]6259; GFX11-NEXT:    s_cmp_lg_u32 s5, 06260; GFX11-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]6261; GFX11-NEXT:    s_and_b32 s0, s4, 0x7f6262; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)6263; GFX11-NEXT:    s_sub_i32 s1, 64, s06264; GFX11-NEXT:    v_lshrrev_b64 v[4:5], s0, v[0:1]6265; GFX11-NEXT:    v_lshlrev_b64 v[6:7], s1, v[2:3]6266; GFX11-NEXT:    s_sub_i32 s1, s0, 646267; GFX11-NEXT:    s_cmp_lt_u32 s0, 646268; GFX11-NEXT:    v_lshrrev_b64 v[8:9], s1, v[2:3]6269; GFX11-NEXT:    s_cselect_b32 s4, 1, 06270; GFX11-NEXT:    s_cmp_eq_u32 s0, 06271; GFX11-NEXT:    v_or_b32_e32 v4, v4, v66272; GFX11-NEXT:    s_cselect_b32 s5, 1, 06273; GFX11-NEXT:    s_and_b32 s1, 1, s46274; GFX11-NEXT:    v_or_b32_e32 v5, v5, v76275; GFX11-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s16276; GFX11-NEXT:    v_lshrrev_b64 v[2:3], s0, v[2:3]6277; GFX11-NEXT:    s_and_b32 s0, 1, s56278; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)6279; GFX11-NEXT:    v_cmp_ne_u32_e64 s0, 0, s06280; GFX11-NEXT:    v_dual_cndmask_b32 v4, v8, v4 :: v_dual_cndmask_b32 v5, v9, v56281; GFX11-NEXT:    v_dual_cndmask_b32 v2, 0, v2 :: v_dual_cndmask_b32 v3, 0, v36282; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)6283; GFX11-NEXT:    v_cndmask_b32_e64 v0, v4, v0, s06284; GFX11-NEXT:    v_cndmask_b32_e64 v1, v5, v1, s06285; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)6286; GFX11-NEXT:    v_or_b32_e32 v2, s2, v26287; GFX11-NEXT:    v_or_b32_e32 v3, s3, v36288; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)6289; GFX11-NEXT:    v_or_b32_e32 v0, s8, v06290; GFX11-NEXT:    v_or_b32_e32 v1, s9, v16291; GFX11-NEXT:    ; return to shader part epilog6292  %result = call i128 @llvm.fshr.i128(i128 %lhs, i128 %rhs, i128 %amt)6293  %cast.result = bitcast i128 %result to <4 x float>6294  ret <4 x float> %cast.result6295}6296 6297define amdgpu_ps <4 x float> @v_fshr_i128_vss(i128 %lhs, i128 inreg %rhs, i128 inreg %amt) {6298; GFX6-LABEL: v_fshr_i128_vss:6299; GFX6:       ; %bb.0:6300; GFX6-NEXT:    v_lshl_b64 v[2:3], v[2:3], 16301; GFX6-NEXT:    v_lshl_b64 v[4:5], v[0:1], 16302; GFX6-NEXT:    v_lshrrev_b32_e32 v0, 31, v16303; GFX6-NEXT:    s_andn2_b32 s5, 0x7f, s46304; GFX6-NEXT:    v_or_b32_e32 v2, v2, v06305; GFX6-NEXT:    s_sub_i32 s6, s5, 646306; GFX6-NEXT:    s_sub_i32 s7, 64, s56307; GFX6-NEXT:    s_cmp_lt_u32 s5, 646308; GFX6-NEXT:    v_lshr_b64 v[0:1], v[4:5], s76309; GFX6-NEXT:    v_lshl_b64 v[6:7], v[2:3], s56310; GFX6-NEXT:    s_cselect_b32 s8, 1, 06311; GFX6-NEXT:    s_cmp_eq_u32 s5, 06312; GFX6-NEXT:    s_cselect_b32 s9, 1, 06313; GFX6-NEXT:    v_lshl_b64 v[8:9], v[4:5], s56314; GFX6-NEXT:    v_or_b32_e32 v6, v0, v66315; GFX6-NEXT:    v_or_b32_e32 v7, v1, v76316; GFX6-NEXT:    v_lshl_b64 v[0:1], v[4:5], s66317; GFX6-NEXT:    s_and_b32 s5, 1, s86318; GFX6-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s56319; GFX6-NEXT:    s_and_b32 s5, 1, s96320; GFX6-NEXT:    v_cndmask_b32_e32 v4, 0, v8, vcc6321; GFX6-NEXT:    v_cndmask_b32_e32 v5, 0, v9, vcc6322; GFX6-NEXT:    v_cndmask_b32_e32 v0, v0, v6, vcc6323; GFX6-NEXT:    v_cndmask_b32_e32 v1, v1, v7, vcc6324; GFX6-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s56325; GFX6-NEXT:    s_and_b32 s5, s4, 0x7f6326; GFX6-NEXT:    s_sub_i32 s10, s5, 646327; GFX6-NEXT:    s_sub_i32 s8, 64, s56328; GFX6-NEXT:    s_cmp_lt_u32 s5, 646329; GFX6-NEXT:    s_cselect_b32 s11, 1, 06330; GFX6-NEXT:    s_cmp_eq_u32 s5, 06331; GFX6-NEXT:    s_cselect_b32 s12, 1, 06332; GFX6-NEXT:    s_lshr_b64 s[6:7], s[2:3], s46333; GFX6-NEXT:    s_lshr_b64 s[4:5], s[0:1], s46334; GFX6-NEXT:    s_lshl_b64 s[8:9], s[2:3], s86335; GFX6-NEXT:    s_or_b64 s[4:5], s[4:5], s[8:9]6336; GFX6-NEXT:    s_lshr_b64 s[2:3], s[2:3], s106337; GFX6-NEXT:    s_cmp_lg_u32 s11, 06338; GFX6-NEXT:    s_cselect_b64 s[2:3], s[4:5], s[2:3]6339; GFX6-NEXT:    s_cmp_lg_u32 s12, 06340; GFX6-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[2:3]6341; GFX6-NEXT:    s_cmp_lg_u32 s11, 06342; GFX6-NEXT:    v_cndmask_b32_e32 v2, v0, v2, vcc6343; GFX6-NEXT:    v_cndmask_b32_e32 v3, v1, v3, vcc6344; GFX6-NEXT:    s_cselect_b64 s[2:3], s[6:7], 06345; GFX6-NEXT:    v_or_b32_e32 v0, s0, v46346; GFX6-NEXT:    v_or_b32_e32 v1, s1, v56347; GFX6-NEXT:    v_or_b32_e32 v2, s2, v26348; GFX6-NEXT:    v_or_b32_e32 v3, s3, v36349; GFX6-NEXT:    ; return to shader part epilog6350;6351; GFX8-LABEL: v_fshr_i128_vss:6352; GFX8:       ; %bb.0:6353; GFX8-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]6354; GFX8-NEXT:    v_lshlrev_b64 v[4:5], 1, v[0:1]6355; GFX8-NEXT:    v_lshrrev_b32_e32 v0, 31, v16356; GFX8-NEXT:    s_andn2_b32 s5, 0x7f, s46357; GFX8-NEXT:    v_or_b32_e32 v2, v2, v06358; GFX8-NEXT:    s_sub_i32 s6, s5, 646359; GFX8-NEXT:    s_sub_i32 s7, 64, s56360; GFX8-NEXT:    s_cmp_lt_u32 s5, 646361; GFX8-NEXT:    v_lshrrev_b64 v[0:1], s7, v[4:5]6362; GFX8-NEXT:    v_lshlrev_b64 v[6:7], s5, v[2:3]6363; GFX8-NEXT:    s_cselect_b32 s8, 1, 06364; GFX8-NEXT:    s_cmp_eq_u32 s5, 06365; GFX8-NEXT:    s_cselect_b32 s9, 1, 06366; GFX8-NEXT:    v_lshlrev_b64 v[8:9], s5, v[4:5]6367; GFX8-NEXT:    v_or_b32_e32 v6, v0, v66368; GFX8-NEXT:    v_or_b32_e32 v7, v1, v76369; GFX8-NEXT:    v_lshlrev_b64 v[0:1], s6, v[4:5]6370; GFX8-NEXT:    s_and_b32 s5, 1, s86371; GFX8-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s56372; GFX8-NEXT:    s_and_b32 s5, 1, s96373; GFX8-NEXT:    v_cndmask_b32_e32 v4, 0, v8, vcc6374; GFX8-NEXT:    v_cndmask_b32_e32 v5, 0, v9, vcc6375; GFX8-NEXT:    v_cndmask_b32_e32 v0, v0, v6, vcc6376; GFX8-NEXT:    v_cndmask_b32_e32 v1, v1, v7, vcc6377; GFX8-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s56378; GFX8-NEXT:    s_and_b32 s5, s4, 0x7f6379; GFX8-NEXT:    s_sub_i32 s10, s5, 646380; GFX8-NEXT:    s_sub_i32 s8, 64, s56381; GFX8-NEXT:    s_cmp_lt_u32 s5, 646382; GFX8-NEXT:    s_cselect_b32 s11, 1, 06383; GFX8-NEXT:    s_cmp_eq_u32 s5, 06384; GFX8-NEXT:    s_cselect_b32 s12, 1, 06385; GFX8-NEXT:    s_lshr_b64 s[6:7], s[2:3], s46386; GFX8-NEXT:    s_lshr_b64 s[4:5], s[0:1], s46387; GFX8-NEXT:    s_lshl_b64 s[8:9], s[2:3], s86388; GFX8-NEXT:    s_or_b64 s[4:5], s[4:5], s[8:9]6389; GFX8-NEXT:    s_lshr_b64 s[2:3], s[2:3], s106390; GFX8-NEXT:    s_cmp_lg_u32 s11, 06391; GFX8-NEXT:    s_cselect_b64 s[2:3], s[4:5], s[2:3]6392; GFX8-NEXT:    s_cmp_lg_u32 s12, 06393; GFX8-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[2:3]6394; GFX8-NEXT:    s_cmp_lg_u32 s11, 06395; GFX8-NEXT:    v_cndmask_b32_e32 v2, v0, v2, vcc6396; GFX8-NEXT:    v_cndmask_b32_e32 v3, v1, v3, vcc6397; GFX8-NEXT:    s_cselect_b64 s[2:3], s[6:7], 06398; GFX8-NEXT:    v_or_b32_e32 v0, s0, v46399; GFX8-NEXT:    v_or_b32_e32 v1, s1, v56400; GFX8-NEXT:    v_or_b32_e32 v2, s2, v26401; GFX8-NEXT:    v_or_b32_e32 v3, s3, v36402; GFX8-NEXT:    ; return to shader part epilog6403;6404; GFX9-LABEL: v_fshr_i128_vss:6405; GFX9:       ; %bb.0:6406; GFX9-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]6407; GFX9-NEXT:    v_lshlrev_b64 v[4:5], 1, v[0:1]6408; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 31, v16409; GFX9-NEXT:    s_andn2_b32 s5, 0x7f, s46410; GFX9-NEXT:    v_or_b32_e32 v2, v2, v06411; GFX9-NEXT:    s_sub_i32 s6, s5, 646412; GFX9-NEXT:    s_sub_i32 s7, 64, s56413; GFX9-NEXT:    s_cmp_lt_u32 s5, 646414; GFX9-NEXT:    v_lshrrev_b64 v[0:1], s7, v[4:5]6415; GFX9-NEXT:    v_lshlrev_b64 v[6:7], s5, v[2:3]6416; GFX9-NEXT:    s_cselect_b32 s8, 1, 06417; GFX9-NEXT:    s_cmp_eq_u32 s5, 06418; GFX9-NEXT:    s_cselect_b32 s9, 1, 06419; GFX9-NEXT:    v_lshlrev_b64 v[8:9], s5, v[4:5]6420; GFX9-NEXT:    v_or_b32_e32 v6, v0, v66421; GFX9-NEXT:    v_or_b32_e32 v7, v1, v76422; GFX9-NEXT:    v_lshlrev_b64 v[0:1], s6, v[4:5]6423; GFX9-NEXT:    s_and_b32 s5, 1, s86424; GFX9-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s56425; GFX9-NEXT:    s_and_b32 s5, 1, s96426; GFX9-NEXT:    v_cndmask_b32_e32 v4, 0, v8, vcc6427; GFX9-NEXT:    v_cndmask_b32_e32 v5, 0, v9, vcc6428; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v6, vcc6429; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v7, vcc6430; GFX9-NEXT:    v_cmp_ne_u32_e64 vcc, 0, s56431; GFX9-NEXT:    s_and_b32 s5, s4, 0x7f6432; GFX9-NEXT:    s_sub_i32 s10, s5, 646433; GFX9-NEXT:    s_sub_i32 s8, 64, s56434; GFX9-NEXT:    s_cmp_lt_u32 s5, 646435; GFX9-NEXT:    s_cselect_b32 s11, 1, 06436; GFX9-NEXT:    s_cmp_eq_u32 s5, 06437; GFX9-NEXT:    s_cselect_b32 s12, 1, 06438; GFX9-NEXT:    s_lshr_b64 s[6:7], s[2:3], s46439; GFX9-NEXT:    s_lshr_b64 s[4:5], s[0:1], s46440; GFX9-NEXT:    s_lshl_b64 s[8:9], s[2:3], s86441; GFX9-NEXT:    s_or_b64 s[4:5], s[4:5], s[8:9]6442; GFX9-NEXT:    s_lshr_b64 s[2:3], s[2:3], s106443; GFX9-NEXT:    s_cmp_lg_u32 s11, 06444; GFX9-NEXT:    s_cselect_b64 s[2:3], s[4:5], s[2:3]6445; GFX9-NEXT:    s_cmp_lg_u32 s12, 06446; GFX9-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[2:3]6447; GFX9-NEXT:    s_cmp_lg_u32 s11, 06448; GFX9-NEXT:    v_cndmask_b32_e32 v2, v0, v2, vcc6449; GFX9-NEXT:    v_cndmask_b32_e32 v3, v1, v3, vcc6450; GFX9-NEXT:    s_cselect_b64 s[2:3], s[6:7], 06451; GFX9-NEXT:    v_or_b32_e32 v0, s0, v46452; GFX9-NEXT:    v_or_b32_e32 v1, s1, v56453; GFX9-NEXT:    v_or_b32_e32 v2, s2, v26454; GFX9-NEXT:    v_or_b32_e32 v3, s3, v36455; GFX9-NEXT:    ; return to shader part epilog6456;6457; GFX10-LABEL: v_fshr_i128_vss:6458; GFX10:       ; %bb.0:6459; GFX10-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]6460; GFX10-NEXT:    v_lshrrev_b32_e32 v4, 31, v16461; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]6462; GFX10-NEXT:    s_andn2_b32 s5, 0x7f, s46463; GFX10-NEXT:    s_sub_i32 s7, 64, s56464; GFX10-NEXT:    v_or_b32_e32 v2, v2, v46465; GFX10-NEXT:    s_sub_i32 s6, s5, 646466; GFX10-NEXT:    s_cmp_lt_u32 s5, 646467; GFX10-NEXT:    v_lshrrev_b64 v[4:5], s7, v[0:1]6468; GFX10-NEXT:    s_cselect_b32 s8, 1, 06469; GFX10-NEXT:    v_lshlrev_b64 v[6:7], s5, v[2:3]6470; GFX10-NEXT:    s_cmp_eq_u32 s5, 06471; GFX10-NEXT:    v_lshlrev_b64 v[8:9], s5, v[0:1]6472; GFX10-NEXT:    s_cselect_b32 s9, 1, 06473; GFX10-NEXT:    s_and_b32 s5, 1, s86474; GFX10-NEXT:    v_lshlrev_b64 v[0:1], s6, v[0:1]6475; GFX10-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s56476; GFX10-NEXT:    v_or_b32_e32 v4, v4, v66477; GFX10-NEXT:    v_or_b32_e32 v5, v5, v76478; GFX10-NEXT:    s_and_b32 s5, 1, s96479; GFX10-NEXT:    s_and_b32 s6, s4, 0x7f6480; GFX10-NEXT:    v_cndmask_b32_e32 v6, 0, v8, vcc_lo6481; GFX10-NEXT:    v_cndmask_b32_e32 v7, 0, v9, vcc_lo6482; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc_lo6483; GFX10-NEXT:    v_cndmask_b32_e32 v1, v1, v5, vcc_lo6484; GFX10-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s56485; GFX10-NEXT:    s_sub_i32 s10, s6, 646486; GFX10-NEXT:    s_sub_i32 s5, 64, s66487; GFX10-NEXT:    s_cmp_lt_u32 s6, 646488; GFX10-NEXT:    s_cselect_b32 s11, 1, 06489; GFX10-NEXT:    s_cmp_eq_u32 s6, 06490; GFX10-NEXT:    v_cndmask_b32_e32 v2, v0, v2, vcc_lo6491; GFX10-NEXT:    s_cselect_b32 s12, 1, 06492; GFX10-NEXT:    s_lshr_b64 s[6:7], s[0:1], s46493; GFX10-NEXT:    s_lshl_b64 s[8:9], s[2:3], s56494; GFX10-NEXT:    s_lshr_b64 s[4:5], s[2:3], s46495; GFX10-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]6496; GFX10-NEXT:    s_lshr_b64 s[2:3], s[2:3], s106497; GFX10-NEXT:    s_cmp_lg_u32 s11, 06498; GFX10-NEXT:    v_cndmask_b32_e32 v3, v1, v3, vcc_lo6499; GFX10-NEXT:    s_cselect_b64 s[2:3], s[6:7], s[2:3]6500; GFX10-NEXT:    s_cmp_lg_u32 s12, 06501; GFX10-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[2:3]6502; GFX10-NEXT:    s_cmp_lg_u32 s11, 06503; GFX10-NEXT:    v_or_b32_e32 v0, s0, v66504; GFX10-NEXT:    s_cselect_b64 s[2:3], s[4:5], 06505; GFX10-NEXT:    v_or_b32_e32 v1, s1, v76506; GFX10-NEXT:    v_or_b32_e32 v2, s2, v26507; GFX10-NEXT:    v_or_b32_e32 v3, s3, v36508; GFX10-NEXT:    ; return to shader part epilog6509;6510; GFX11-LABEL: v_fshr_i128_vss:6511; GFX11:       ; %bb.0:6512; GFX11-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]6513; GFX11-NEXT:    v_lshrrev_b32_e32 v4, 31, v16514; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]6515; GFX11-NEXT:    s_and_not1_b32 s5, 0x7f, s46516; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)6517; GFX11-NEXT:    s_sub_i32 s7, 64, s56518; GFX11-NEXT:    v_or_b32_e32 v2, v2, v46519; GFX11-NEXT:    s_sub_i32 s6, s5, 646520; GFX11-NEXT:    s_cmp_lt_u32 s5, 646521; GFX11-NEXT:    v_lshrrev_b64 v[4:5], s7, v[0:1]6522; GFX11-NEXT:    s_cselect_b32 s8, 1, 06523; GFX11-NEXT:    v_lshlrev_b64 v[6:7], s5, v[2:3]6524; GFX11-NEXT:    s_cmp_eq_u32 s5, 06525; GFX11-NEXT:    v_lshlrev_b64 v[8:9], s5, v[0:1]6526; GFX11-NEXT:    s_cselect_b32 s9, 1, 06527; GFX11-NEXT:    s_and_b32 s5, 1, s86528; GFX11-NEXT:    v_lshlrev_b64 v[0:1], s6, v[0:1]6529; GFX11-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s56530; GFX11-NEXT:    v_or_b32_e32 v4, v4, v66531; GFX11-NEXT:    v_or_b32_e32 v5, v5, v76532; GFX11-NEXT:    s_and_b32 s5, 1, s96533; GFX11-NEXT:    s_and_b32 s6, s4, 0x7f6534; GFX11-NEXT:    v_dual_cndmask_b32 v6, 0, v8 :: v_dual_cndmask_b32 v7, 0, v96535; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2)6536; GFX11-NEXT:    v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v1, v1, v56537; GFX11-NEXT:    v_cmp_ne_u32_e64 vcc_lo, 0, s56538; GFX11-NEXT:    s_sub_i32 s10, s6, 646539; GFX11-NEXT:    s_sub_i32 s5, 64, s66540; GFX11-NEXT:    s_cmp_lt_u32 s6, 646541; GFX11-NEXT:    s_cselect_b32 s11, 1, 06542; GFX11-NEXT:    s_cmp_eq_u32 s6, 06543; GFX11-NEXT:    v_dual_cndmask_b32 v2, v0, v2 :: v_dual_cndmask_b32 v3, v1, v36544; GFX11-NEXT:    s_cselect_b32 s12, 1, 06545; GFX11-NEXT:    s_lshr_b64 s[6:7], s[0:1], s46546; GFX11-NEXT:    s_lshl_b64 s[8:9], s[2:3], s56547; GFX11-NEXT:    s_lshr_b64 s[4:5], s[2:3], s46548; GFX11-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]6549; GFX11-NEXT:    s_lshr_b64 s[2:3], s[2:3], s106550; GFX11-NEXT:    s_cmp_lg_u32 s11, 06551; GFX11-NEXT:    s_cselect_b64 s[2:3], s[6:7], s[2:3]6552; GFX11-NEXT:    s_cmp_lg_u32 s12, 06553; GFX11-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[2:3]6554; GFX11-NEXT:    s_cmp_lg_u32 s11, 06555; GFX11-NEXT:    v_or_b32_e32 v0, s0, v66556; GFX11-NEXT:    s_cselect_b64 s[2:3], s[4:5], 06557; GFX11-NEXT:    v_or_b32_e32 v1, s1, v76558; GFX11-NEXT:    v_or_b32_e32 v2, s2, v26559; GFX11-NEXT:    v_or_b32_e32 v3, s3, v36560; GFX11-NEXT:    ; return to shader part epilog6561  %result = call i128 @llvm.fshr.i128(i128 %lhs, i128 %rhs, i128 %amt)6562  %cast.result = bitcast i128 %result to <4 x float>6563  ret <4 x float> %cast.result6564}6565 6566define amdgpu_ps i128 @s_fshr_i128_65(i128 inreg %lhs, i128 inreg %rhs) {6567; GFX6-LABEL: s_fshr_i128_65:6568; GFX6:       ; %bb.0:6569; GFX6-NEXT:    s_mov_b32 s4, 06570; GFX6-NEXT:    s_lshl_b32 s5, s0, 316571; GFX6-NEXT:    s_lshl_b32 s3, s2, 316572; GFX6-NEXT:    s_mov_b32 s2, s46573; GFX6-NEXT:    s_lshr_b64 s[0:1], s[0:1], 16574; GFX6-NEXT:    s_or_b64 s[2:3], s[2:3], s[0:1]6575; GFX6-NEXT:    s_lshr_b64 s[0:1], s[6:7], 16576; GFX6-NEXT:    s_or_b64 s[0:1], s[4:5], s[0:1]6577; GFX6-NEXT:    ; return to shader part epilog6578;6579; GFX8-LABEL: s_fshr_i128_65:6580; GFX8:       ; %bb.0:6581; GFX8-NEXT:    s_mov_b32 s4, 06582; GFX8-NEXT:    s_lshl_b32 s5, s0, 316583; GFX8-NEXT:    s_lshl_b32 s3, s2, 316584; GFX8-NEXT:    s_mov_b32 s2, s46585; GFX8-NEXT:    s_lshr_b64 s[0:1], s[0:1], 16586; GFX8-NEXT:    s_or_b64 s[2:3], s[2:3], s[0:1]6587; GFX8-NEXT:    s_lshr_b64 s[0:1], s[6:7], 16588; GFX8-NEXT:    s_or_b64 s[0:1], s[4:5], s[0:1]6589; GFX8-NEXT:    ; return to shader part epilog6590;6591; GFX9-LABEL: s_fshr_i128_65:6592; GFX9:       ; %bb.0:6593; GFX9-NEXT:    s_mov_b32 s4, 06594; GFX9-NEXT:    s_lshl_b32 s5, s0, 316595; GFX9-NEXT:    s_lshl_b32 s3, s2, 316596; GFX9-NEXT:    s_mov_b32 s2, s46597; GFX9-NEXT:    s_lshr_b64 s[0:1], s[0:1], 16598; GFX9-NEXT:    s_or_b64 s[2:3], s[2:3], s[0:1]6599; GFX9-NEXT:    s_lshr_b64 s[0:1], s[6:7], 16600; GFX9-NEXT:    s_or_b64 s[0:1], s[4:5], s[0:1]6601; GFX9-NEXT:    ; return to shader part epilog6602;6603; GFX10-LABEL: s_fshr_i128_65:6604; GFX10:       ; %bb.0:6605; GFX10-NEXT:    s_mov_b32 s4, 06606; GFX10-NEXT:    s_lshl_b32 s5, s0, 316607; GFX10-NEXT:    s_lshl_b32 s3, s2, 316608; GFX10-NEXT:    s_mov_b32 s2, s46609; GFX10-NEXT:    s_lshr_b64 s[6:7], s[6:7], 16610; GFX10-NEXT:    s_lshr_b64 s[8:9], s[0:1], 16611; GFX10-NEXT:    s_or_b64 s[0:1], s[4:5], s[6:7]6612; GFX10-NEXT:    s_or_b64 s[2:3], s[2:3], s[8:9]6613; GFX10-NEXT:    ; return to shader part epilog6614;6615; GFX11-LABEL: s_fshr_i128_65:6616; GFX11:       ; %bb.0:6617; GFX11-NEXT:    s_mov_b32 s4, 06618; GFX11-NEXT:    s_lshl_b32 s5, s0, 316619; GFX11-NEXT:    s_lshl_b32 s3, s2, 316620; GFX11-NEXT:    s_mov_b32 s2, s46621; GFX11-NEXT:    s_lshr_b64 s[6:7], s[6:7], 16622; GFX11-NEXT:    s_lshr_b64 s[8:9], s[0:1], 16623; GFX11-NEXT:    s_or_b64 s[0:1], s[4:5], s[6:7]6624; GFX11-NEXT:    s_or_b64 s[2:3], s[2:3], s[8:9]6625; GFX11-NEXT:    ; return to shader part epilog6626  %result = call i128 @llvm.fshr.i128(i128 %lhs, i128 %rhs, i128 65)6627  ret i128 %result6628}6629 6630define i128 @v_fshr_i128_65(i128 %lhs, i128 %rhs) {6631; GFX6-LABEL: v_fshr_i128_65:6632; GFX6:       ; %bb.0:6633; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6634; GFX6-NEXT:    v_lshlrev_b32_e32 v4, 31, v06635; GFX6-NEXT:    v_lshlrev_b32_e32 v5, 31, v26636; GFX6-NEXT:    v_lshr_b64 v[2:3], v[0:1], 16637; GFX6-NEXT:    v_lshr_b64 v[0:1], v[6:7], 16638; GFX6-NEXT:    v_or_b32_e32 v3, v5, v36639; GFX6-NEXT:    v_or_b32_e32 v1, v4, v16640; GFX6-NEXT:    s_setpc_b64 s[30:31]6641;6642; GFX8-LABEL: v_fshr_i128_65:6643; GFX8:       ; %bb.0:6644; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6645; GFX8-NEXT:    v_lshlrev_b32_e32 v4, 31, v06646; GFX8-NEXT:    v_lshlrev_b32_e32 v5, 31, v26647; GFX8-NEXT:    v_lshrrev_b64 v[2:3], 1, v[0:1]6648; GFX8-NEXT:    v_lshrrev_b64 v[0:1], 1, v[6:7]6649; GFX8-NEXT:    v_or_b32_e32 v3, v5, v36650; GFX8-NEXT:    v_or_b32_e32 v1, v4, v16651; GFX8-NEXT:    s_setpc_b64 s[30:31]6652;6653; GFX9-LABEL: v_fshr_i128_65:6654; GFX9:       ; %bb.0:6655; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6656; GFX9-NEXT:    v_mov_b32_e32 v8, v26657; GFX9-NEXT:    v_lshrrev_b64 v[2:3], 1, v[0:1]6658; GFX9-NEXT:    v_lshrrev_b64 v[4:5], 1, v[6:7]6659; GFX9-NEXT:    v_lshl_or_b32 v3, v8, 31, v36660; GFX9-NEXT:    v_lshl_or_b32 v1, v0, 31, v56661; GFX9-NEXT:    v_mov_b32_e32 v0, v46662; GFX9-NEXT:    s_setpc_b64 s[30:31]6663;6664; GFX10-LABEL: v_fshr_i128_65:6665; GFX10:       ; %bb.0:6666; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6667; GFX10-NEXT:    v_mov_b32_e32 v8, v26668; GFX10-NEXT:    v_lshrrev_b64 v[4:5], 1, v[6:7]6669; GFX10-NEXT:    v_lshrrev_b64 v[2:3], 1, v[0:1]6670; GFX10-NEXT:    v_lshl_or_b32 v1, v0, 31, v56671; GFX10-NEXT:    v_lshl_or_b32 v3, v8, 31, v36672; GFX10-NEXT:    v_mov_b32_e32 v0, v46673; GFX10-NEXT:    s_setpc_b64 s[30:31]6674;6675; GFX11-LABEL: v_fshr_i128_65:6676; GFX11:       ; %bb.0:6677; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6678; GFX11-NEXT:    v_mov_b32_e32 v8, v26679; GFX11-NEXT:    v_lshrrev_b64 v[4:5], 1, v[6:7]6680; GFX11-NEXT:    v_lshrrev_b64 v[2:3], 1, v[0:1]6681; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)6682; GFX11-NEXT:    v_lshl_or_b32 v1, v0, 31, v56683; GFX11-NEXT:    v_lshl_or_b32 v3, v8, 31, v36684; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)6685; GFX11-NEXT:    v_mov_b32_e32 v0, v46686; GFX11-NEXT:    s_setpc_b64 s[30:31]6687  %result = call i128 @llvm.fshr.i128(i128 %lhs, i128 %rhs, i128 65)6688  ret i128 %result6689}6690 6691define amdgpu_ps <2 x i128> @s_fshr_v2i128(<2 x i128> inreg %lhs, <2 x i128> inreg %rhs, <2 x i128> inreg %amt) {6692; GFX6-LABEL: s_fshr_v2i128:6693; GFX6:       ; %bb.0:6694; GFX6-NEXT:    s_lshl_b64 s[18:19], s[0:1], 16695; GFX6-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16696; GFX6-NEXT:    s_lshr_b32 s0, s1, 316697; GFX6-NEXT:    s_or_b32 s2, s2, s06698; GFX6-NEXT:    s_andn2_b32 s0, 0x7f, s166699; GFX6-NEXT:    s_not_b32 s17, s166700; GFX6-NEXT:    s_sub_i32 s21, s0, 646701; GFX6-NEXT:    s_sub_i32 s22, 64, s06702; GFX6-NEXT:    s_cmp_lt_u32 s0, 646703; GFX6-NEXT:    s_cselect_b32 s26, 1, 06704; GFX6-NEXT:    s_cmp_eq_u32 s0, 06705; GFX6-NEXT:    s_cselect_b32 s27, 1, 06706; GFX6-NEXT:    s_lshr_b64 s[22:23], s[18:19], s226707; GFX6-NEXT:    s_lshl_b64 s[24:25], s[2:3], s176708; GFX6-NEXT:    s_lshl_b64 s[0:1], s[18:19], s176709; GFX6-NEXT:    s_or_b64 s[22:23], s[22:23], s[24:25]6710; GFX6-NEXT:    s_lshl_b64 s[18:19], s[18:19], s216711; GFX6-NEXT:    s_cmp_lg_u32 s26, 06712; GFX6-NEXT:    s_cselect_b64 s[0:1], s[0:1], 06713; GFX6-NEXT:    s_cselect_b64 s[18:19], s[22:23], s[18:19]6714; GFX6-NEXT:    s_cmp_lg_u32 s27, 06715; GFX6-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[18:19]6716; GFX6-NEXT:    s_and_b32 s17, s16, 0x7f6717; GFX6-NEXT:    s_sub_i32 s21, s17, 646718; GFX6-NEXT:    s_sub_i32 s22, 64, s176719; GFX6-NEXT:    s_cmp_lt_u32 s17, 646720; GFX6-NEXT:    s_cselect_b32 s24, 1, 06721; GFX6-NEXT:    s_cmp_eq_u32 s17, 06722; GFX6-NEXT:    s_cselect_b32 s25, 1, 06723; GFX6-NEXT:    s_lshr_b64 s[18:19], s[10:11], s166724; GFX6-NEXT:    s_lshr_b64 s[16:17], s[8:9], s166725; GFX6-NEXT:    s_lshl_b64 s[22:23], s[10:11], s226726; GFX6-NEXT:    s_or_b64 s[16:17], s[16:17], s[22:23]6727; GFX6-NEXT:    s_lshr_b64 s[10:11], s[10:11], s216728; GFX6-NEXT:    s_cmp_lg_u32 s24, 06729; GFX6-NEXT:    s_cselect_b64 s[10:11], s[16:17], s[10:11]6730; GFX6-NEXT:    s_cmp_lg_u32 s25, 06731; GFX6-NEXT:    s_cselect_b64 s[8:9], s[8:9], s[10:11]6732; GFX6-NEXT:    s_cmp_lg_u32 s24, 06733; GFX6-NEXT:    s_cselect_b64 s[10:11], s[18:19], 06734; GFX6-NEXT:    s_or_b64 s[0:1], s[0:1], s[8:9]6735; GFX6-NEXT:    s_lshl_b64 s[8:9], s[4:5], 16736; GFX6-NEXT:    s_lshl_b64 s[6:7], s[6:7], 16737; GFX6-NEXT:    s_lshr_b32 s4, s5, 316738; GFX6-NEXT:    s_or_b32 s6, s6, s46739; GFX6-NEXT:    s_andn2_b32 s4, 0x7f, s206740; GFX6-NEXT:    s_or_b64 s[2:3], s[2:3], s[10:11]6741; GFX6-NEXT:    s_not_b32 s16, s206742; GFX6-NEXT:    s_sub_i32 s18, s4, 646743; GFX6-NEXT:    s_sub_i32 s10, 64, s46744; GFX6-NEXT:    s_cmp_lt_u32 s4, 646745; GFX6-NEXT:    s_cselect_b32 s19, 1, 06746; GFX6-NEXT:    s_cmp_eq_u32 s4, 06747; GFX6-NEXT:    s_cselect_b32 s21, 1, 06748; GFX6-NEXT:    s_lshl_b64 s[4:5], s[8:9], s166749; GFX6-NEXT:    s_lshr_b64 s[10:11], s[8:9], s106750; GFX6-NEXT:    s_lshl_b64 s[16:17], s[6:7], s166751; GFX6-NEXT:    s_or_b64 s[10:11], s[10:11], s[16:17]6752; GFX6-NEXT:    s_lshl_b64 s[8:9], s[8:9], s186753; GFX6-NEXT:    s_cmp_lg_u32 s19, 06754; GFX6-NEXT:    s_cselect_b64 s[4:5], s[4:5], 06755; GFX6-NEXT:    s_cselect_b64 s[8:9], s[10:11], s[8:9]6756; GFX6-NEXT:    s_cmp_lg_u32 s21, 06757; GFX6-NEXT:    s_cselect_b64 s[6:7], s[6:7], s[8:9]6758; GFX6-NEXT:    s_and_b32 s8, s20, 0x7f6759; GFX6-NEXT:    s_sub_i32 s18, s8, 646760; GFX6-NEXT:    s_sub_i32 s16, 64, s86761; GFX6-NEXT:    s_cmp_lt_u32 s8, 646762; GFX6-NEXT:    s_cselect_b32 s19, 1, 06763; GFX6-NEXT:    s_cmp_eq_u32 s8, 06764; GFX6-NEXT:    s_cselect_b32 s21, 1, 06765; GFX6-NEXT:    s_lshr_b64 s[10:11], s[12:13], s206766; GFX6-NEXT:    s_lshl_b64 s[16:17], s[14:15], s166767; GFX6-NEXT:    s_lshr_b64 s[8:9], s[14:15], s206768; GFX6-NEXT:    s_or_b64 s[10:11], s[10:11], s[16:17]6769; GFX6-NEXT:    s_lshr_b64 s[14:15], s[14:15], s186770; GFX6-NEXT:    s_cmp_lg_u32 s19, 06771; GFX6-NEXT:    s_cselect_b64 s[10:11], s[10:11], s[14:15]6772; GFX6-NEXT:    s_cmp_lg_u32 s21, 06773; GFX6-NEXT:    s_cselect_b64 s[10:11], s[12:13], s[10:11]6774; GFX6-NEXT:    s_cmp_lg_u32 s19, 06775; GFX6-NEXT:    s_cselect_b64 s[8:9], s[8:9], 06776; GFX6-NEXT:    s_or_b64 s[4:5], s[4:5], s[10:11]6777; GFX6-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]6778; GFX6-NEXT:    ; return to shader part epilog6779;6780; GFX8-LABEL: s_fshr_v2i128:6781; GFX8:       ; %bb.0:6782; GFX8-NEXT:    s_lshl_b64 s[18:19], s[0:1], 16783; GFX8-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16784; GFX8-NEXT:    s_lshr_b32 s0, s1, 316785; GFX8-NEXT:    s_or_b32 s2, s2, s06786; GFX8-NEXT:    s_andn2_b32 s0, 0x7f, s166787; GFX8-NEXT:    s_not_b32 s17, s166788; GFX8-NEXT:    s_sub_i32 s21, s0, 646789; GFX8-NEXT:    s_sub_i32 s22, 64, s06790; GFX8-NEXT:    s_cmp_lt_u32 s0, 646791; GFX8-NEXT:    s_cselect_b32 s26, 1, 06792; GFX8-NEXT:    s_cmp_eq_u32 s0, 06793; GFX8-NEXT:    s_cselect_b32 s27, 1, 06794; GFX8-NEXT:    s_lshr_b64 s[22:23], s[18:19], s226795; GFX8-NEXT:    s_lshl_b64 s[24:25], s[2:3], s176796; GFX8-NEXT:    s_lshl_b64 s[0:1], s[18:19], s176797; GFX8-NEXT:    s_or_b64 s[22:23], s[22:23], s[24:25]6798; GFX8-NEXT:    s_lshl_b64 s[18:19], s[18:19], s216799; GFX8-NEXT:    s_cmp_lg_u32 s26, 06800; GFX8-NEXT:    s_cselect_b64 s[0:1], s[0:1], 06801; GFX8-NEXT:    s_cselect_b64 s[18:19], s[22:23], s[18:19]6802; GFX8-NEXT:    s_cmp_lg_u32 s27, 06803; GFX8-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[18:19]6804; GFX8-NEXT:    s_and_b32 s17, s16, 0x7f6805; GFX8-NEXT:    s_sub_i32 s21, s17, 646806; GFX8-NEXT:    s_sub_i32 s22, 64, s176807; GFX8-NEXT:    s_cmp_lt_u32 s17, 646808; GFX8-NEXT:    s_cselect_b32 s24, 1, 06809; GFX8-NEXT:    s_cmp_eq_u32 s17, 06810; GFX8-NEXT:    s_cselect_b32 s25, 1, 06811; GFX8-NEXT:    s_lshr_b64 s[18:19], s[10:11], s166812; GFX8-NEXT:    s_lshr_b64 s[16:17], s[8:9], s166813; GFX8-NEXT:    s_lshl_b64 s[22:23], s[10:11], s226814; GFX8-NEXT:    s_or_b64 s[16:17], s[16:17], s[22:23]6815; GFX8-NEXT:    s_lshr_b64 s[10:11], s[10:11], s216816; GFX8-NEXT:    s_cmp_lg_u32 s24, 06817; GFX8-NEXT:    s_cselect_b64 s[10:11], s[16:17], s[10:11]6818; GFX8-NEXT:    s_cmp_lg_u32 s25, 06819; GFX8-NEXT:    s_cselect_b64 s[8:9], s[8:9], s[10:11]6820; GFX8-NEXT:    s_cmp_lg_u32 s24, 06821; GFX8-NEXT:    s_cselect_b64 s[10:11], s[18:19], 06822; GFX8-NEXT:    s_or_b64 s[0:1], s[0:1], s[8:9]6823; GFX8-NEXT:    s_lshl_b64 s[8:9], s[4:5], 16824; GFX8-NEXT:    s_lshl_b64 s[6:7], s[6:7], 16825; GFX8-NEXT:    s_lshr_b32 s4, s5, 316826; GFX8-NEXT:    s_or_b32 s6, s6, s46827; GFX8-NEXT:    s_andn2_b32 s4, 0x7f, s206828; GFX8-NEXT:    s_or_b64 s[2:3], s[2:3], s[10:11]6829; GFX8-NEXT:    s_not_b32 s16, s206830; GFX8-NEXT:    s_sub_i32 s18, s4, 646831; GFX8-NEXT:    s_sub_i32 s10, 64, s46832; GFX8-NEXT:    s_cmp_lt_u32 s4, 646833; GFX8-NEXT:    s_cselect_b32 s19, 1, 06834; GFX8-NEXT:    s_cmp_eq_u32 s4, 06835; GFX8-NEXT:    s_cselect_b32 s21, 1, 06836; GFX8-NEXT:    s_lshl_b64 s[4:5], s[8:9], s166837; GFX8-NEXT:    s_lshr_b64 s[10:11], s[8:9], s106838; GFX8-NEXT:    s_lshl_b64 s[16:17], s[6:7], s166839; GFX8-NEXT:    s_or_b64 s[10:11], s[10:11], s[16:17]6840; GFX8-NEXT:    s_lshl_b64 s[8:9], s[8:9], s186841; GFX8-NEXT:    s_cmp_lg_u32 s19, 06842; GFX8-NEXT:    s_cselect_b64 s[4:5], s[4:5], 06843; GFX8-NEXT:    s_cselect_b64 s[8:9], s[10:11], s[8:9]6844; GFX8-NEXT:    s_cmp_lg_u32 s21, 06845; GFX8-NEXT:    s_cselect_b64 s[6:7], s[6:7], s[8:9]6846; GFX8-NEXT:    s_and_b32 s8, s20, 0x7f6847; GFX8-NEXT:    s_sub_i32 s18, s8, 646848; GFX8-NEXT:    s_sub_i32 s16, 64, s86849; GFX8-NEXT:    s_cmp_lt_u32 s8, 646850; GFX8-NEXT:    s_cselect_b32 s19, 1, 06851; GFX8-NEXT:    s_cmp_eq_u32 s8, 06852; GFX8-NEXT:    s_cselect_b32 s21, 1, 06853; GFX8-NEXT:    s_lshr_b64 s[10:11], s[12:13], s206854; GFX8-NEXT:    s_lshl_b64 s[16:17], s[14:15], s166855; GFX8-NEXT:    s_lshr_b64 s[8:9], s[14:15], s206856; GFX8-NEXT:    s_or_b64 s[10:11], s[10:11], s[16:17]6857; GFX8-NEXT:    s_lshr_b64 s[14:15], s[14:15], s186858; GFX8-NEXT:    s_cmp_lg_u32 s19, 06859; GFX8-NEXT:    s_cselect_b64 s[10:11], s[10:11], s[14:15]6860; GFX8-NEXT:    s_cmp_lg_u32 s21, 06861; GFX8-NEXT:    s_cselect_b64 s[10:11], s[12:13], s[10:11]6862; GFX8-NEXT:    s_cmp_lg_u32 s19, 06863; GFX8-NEXT:    s_cselect_b64 s[8:9], s[8:9], 06864; GFX8-NEXT:    s_or_b64 s[4:5], s[4:5], s[10:11]6865; GFX8-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]6866; GFX8-NEXT:    ; return to shader part epilog6867;6868; GFX9-LABEL: s_fshr_v2i128:6869; GFX9:       ; %bb.0:6870; GFX9-NEXT:    s_lshl_b64 s[18:19], s[0:1], 16871; GFX9-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16872; GFX9-NEXT:    s_lshr_b32 s0, s1, 316873; GFX9-NEXT:    s_or_b32 s2, s2, s06874; GFX9-NEXT:    s_andn2_b32 s0, 0x7f, s166875; GFX9-NEXT:    s_not_b32 s17, s166876; GFX9-NEXT:    s_sub_i32 s21, s0, 646877; GFX9-NEXT:    s_sub_i32 s22, 64, s06878; GFX9-NEXT:    s_cmp_lt_u32 s0, 646879; GFX9-NEXT:    s_cselect_b32 s26, 1, 06880; GFX9-NEXT:    s_cmp_eq_u32 s0, 06881; GFX9-NEXT:    s_cselect_b32 s27, 1, 06882; GFX9-NEXT:    s_lshr_b64 s[22:23], s[18:19], s226883; GFX9-NEXT:    s_lshl_b64 s[24:25], s[2:3], s176884; GFX9-NEXT:    s_lshl_b64 s[0:1], s[18:19], s176885; GFX9-NEXT:    s_or_b64 s[22:23], s[22:23], s[24:25]6886; GFX9-NEXT:    s_lshl_b64 s[18:19], s[18:19], s216887; GFX9-NEXT:    s_cmp_lg_u32 s26, 06888; GFX9-NEXT:    s_cselect_b64 s[0:1], s[0:1], 06889; GFX9-NEXT:    s_cselect_b64 s[18:19], s[22:23], s[18:19]6890; GFX9-NEXT:    s_cmp_lg_u32 s27, 06891; GFX9-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[18:19]6892; GFX9-NEXT:    s_and_b32 s17, s16, 0x7f6893; GFX9-NEXT:    s_sub_i32 s21, s17, 646894; GFX9-NEXT:    s_sub_i32 s22, 64, s176895; GFX9-NEXT:    s_cmp_lt_u32 s17, 646896; GFX9-NEXT:    s_cselect_b32 s24, 1, 06897; GFX9-NEXT:    s_cmp_eq_u32 s17, 06898; GFX9-NEXT:    s_cselect_b32 s25, 1, 06899; GFX9-NEXT:    s_lshr_b64 s[18:19], s[10:11], s166900; GFX9-NEXT:    s_lshr_b64 s[16:17], s[8:9], s166901; GFX9-NEXT:    s_lshl_b64 s[22:23], s[10:11], s226902; GFX9-NEXT:    s_or_b64 s[16:17], s[16:17], s[22:23]6903; GFX9-NEXT:    s_lshr_b64 s[10:11], s[10:11], s216904; GFX9-NEXT:    s_cmp_lg_u32 s24, 06905; GFX9-NEXT:    s_cselect_b64 s[10:11], s[16:17], s[10:11]6906; GFX9-NEXT:    s_cmp_lg_u32 s25, 06907; GFX9-NEXT:    s_cselect_b64 s[8:9], s[8:9], s[10:11]6908; GFX9-NEXT:    s_cmp_lg_u32 s24, 06909; GFX9-NEXT:    s_cselect_b64 s[10:11], s[18:19], 06910; GFX9-NEXT:    s_or_b64 s[0:1], s[0:1], s[8:9]6911; GFX9-NEXT:    s_lshl_b64 s[8:9], s[4:5], 16912; GFX9-NEXT:    s_lshl_b64 s[6:7], s[6:7], 16913; GFX9-NEXT:    s_lshr_b32 s4, s5, 316914; GFX9-NEXT:    s_or_b32 s6, s6, s46915; GFX9-NEXT:    s_andn2_b32 s4, 0x7f, s206916; GFX9-NEXT:    s_or_b64 s[2:3], s[2:3], s[10:11]6917; GFX9-NEXT:    s_not_b32 s16, s206918; GFX9-NEXT:    s_sub_i32 s18, s4, 646919; GFX9-NEXT:    s_sub_i32 s10, 64, s46920; GFX9-NEXT:    s_cmp_lt_u32 s4, 646921; GFX9-NEXT:    s_cselect_b32 s19, 1, 06922; GFX9-NEXT:    s_cmp_eq_u32 s4, 06923; GFX9-NEXT:    s_cselect_b32 s21, 1, 06924; GFX9-NEXT:    s_lshl_b64 s[4:5], s[8:9], s166925; GFX9-NEXT:    s_lshr_b64 s[10:11], s[8:9], s106926; GFX9-NEXT:    s_lshl_b64 s[16:17], s[6:7], s166927; GFX9-NEXT:    s_or_b64 s[10:11], s[10:11], s[16:17]6928; GFX9-NEXT:    s_lshl_b64 s[8:9], s[8:9], s186929; GFX9-NEXT:    s_cmp_lg_u32 s19, 06930; GFX9-NEXT:    s_cselect_b64 s[4:5], s[4:5], 06931; GFX9-NEXT:    s_cselect_b64 s[8:9], s[10:11], s[8:9]6932; GFX9-NEXT:    s_cmp_lg_u32 s21, 06933; GFX9-NEXT:    s_cselect_b64 s[6:7], s[6:7], s[8:9]6934; GFX9-NEXT:    s_and_b32 s8, s20, 0x7f6935; GFX9-NEXT:    s_sub_i32 s18, s8, 646936; GFX9-NEXT:    s_sub_i32 s16, 64, s86937; GFX9-NEXT:    s_cmp_lt_u32 s8, 646938; GFX9-NEXT:    s_cselect_b32 s19, 1, 06939; GFX9-NEXT:    s_cmp_eq_u32 s8, 06940; GFX9-NEXT:    s_cselect_b32 s21, 1, 06941; GFX9-NEXT:    s_lshr_b64 s[10:11], s[12:13], s206942; GFX9-NEXT:    s_lshl_b64 s[16:17], s[14:15], s166943; GFX9-NEXT:    s_lshr_b64 s[8:9], s[14:15], s206944; GFX9-NEXT:    s_or_b64 s[10:11], s[10:11], s[16:17]6945; GFX9-NEXT:    s_lshr_b64 s[14:15], s[14:15], s186946; GFX9-NEXT:    s_cmp_lg_u32 s19, 06947; GFX9-NEXT:    s_cselect_b64 s[10:11], s[10:11], s[14:15]6948; GFX9-NEXT:    s_cmp_lg_u32 s21, 06949; GFX9-NEXT:    s_cselect_b64 s[10:11], s[12:13], s[10:11]6950; GFX9-NEXT:    s_cmp_lg_u32 s19, 06951; GFX9-NEXT:    s_cselect_b64 s[8:9], s[8:9], 06952; GFX9-NEXT:    s_or_b64 s[4:5], s[4:5], s[10:11]6953; GFX9-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]6954; GFX9-NEXT:    ; return to shader part epilog6955;6956; GFX10-LABEL: s_fshr_v2i128:6957; GFX10:       ; %bb.0:6958; GFX10-NEXT:    s_lshl_b64 s[2:3], s[2:3], 16959; GFX10-NEXT:    s_lshr_b32 s17, s1, 316960; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], 16961; GFX10-NEXT:    s_or_b32 s2, s2, s176962; GFX10-NEXT:    s_andn2_b32 s17, 0x7f, s166963; GFX10-NEXT:    s_not_b32 s21, s166964; GFX10-NEXT:    s_sub_i32 s26, s17, 646965; GFX10-NEXT:    s_sub_i32 s18, 64, s176966; GFX10-NEXT:    s_cmp_lt_u32 s17, 646967; GFX10-NEXT:    s_cselect_b32 s27, 1, 06968; GFX10-NEXT:    s_cmp_eq_u32 s17, 06969; GFX10-NEXT:    s_cselect_b32 s17, 1, 06970; GFX10-NEXT:    s_lshr_b64 s[18:19], s[0:1], s186971; GFX10-NEXT:    s_lshl_b64 s[22:23], s[2:3], s216972; GFX10-NEXT:    s_lshl_b64 s[24:25], s[0:1], s216973; GFX10-NEXT:    s_or_b64 s[18:19], s[18:19], s[22:23]6974; GFX10-NEXT:    s_lshl_b64 s[0:1], s[0:1], s266975; GFX10-NEXT:    s_cmp_lg_u32 s27, 06976; GFX10-NEXT:    s_cselect_b64 s[22:23], s[24:25], 06977; GFX10-NEXT:    s_cselect_b64 s[0:1], s[18:19], s[0:1]6978; GFX10-NEXT:    s_cmp_lg_u32 s17, 06979; GFX10-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]6980; GFX10-NEXT:    s_and_b32 s0, s16, 0x7f6981; GFX10-NEXT:    s_sub_i32 s21, s0, 646982; GFX10-NEXT:    s_sub_i32 s17, 64, s06983; GFX10-NEXT:    s_cmp_lt_u32 s0, 646984; GFX10-NEXT:    s_cselect_b32 s24, 1, 06985; GFX10-NEXT:    s_cmp_eq_u32 s0, 06986; GFX10-NEXT:    s_cselect_b32 s25, 1, 06987; GFX10-NEXT:    s_lshr_b64 s[0:1], s[8:9], s166988; GFX10-NEXT:    s_lshl_b64 s[18:19], s[10:11], s176989; GFX10-NEXT:    s_lshr_b64 s[16:17], s[10:11], s166990; GFX10-NEXT:    s_or_b64 s[0:1], s[0:1], s[18:19]6991; GFX10-NEXT:    s_lshr_b64 s[10:11], s[10:11], s216992; GFX10-NEXT:    s_cmp_lg_u32 s24, 06993; GFX10-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[10:11]6994; GFX10-NEXT:    s_cmp_lg_u32 s25, 06995; GFX10-NEXT:    s_cselect_b64 s[0:1], s[8:9], s[0:1]6996; GFX10-NEXT:    s_cmp_lg_u32 s24, 06997; GFX10-NEXT:    s_cselect_b64 s[8:9], s[16:17], 06998; GFX10-NEXT:    s_lshl_b64 s[6:7], s[6:7], 16999; GFX10-NEXT:    s_or_b64 s[2:3], s[2:3], s[8:9]7000; GFX10-NEXT:    s_lshr_b32 s8, s5, 317001; GFX10-NEXT:    s_or_b64 s[0:1], s[22:23], s[0:1]7002; GFX10-NEXT:    s_or_b32 s6, s6, s87003; GFX10-NEXT:    s_andn2_b32 s8, 0x7f, s207004; GFX10-NEXT:    s_lshl_b64 s[4:5], s[4:5], 17005; GFX10-NEXT:    s_not_b32 s16, s207006; GFX10-NEXT:    s_sub_i32 s18, s8, 647007; GFX10-NEXT:    s_sub_i32 s9, 64, s87008; GFX10-NEXT:    s_cmp_lt_u32 s8, 647009; GFX10-NEXT:    s_cselect_b32 s19, 1, 07010; GFX10-NEXT:    s_cmp_eq_u32 s8, 07011; GFX10-NEXT:    s_cselect_b32 s21, 1, 07012; GFX10-NEXT:    s_lshr_b64 s[8:9], s[4:5], s97013; GFX10-NEXT:    s_lshl_b64 s[10:11], s[6:7], s167014; GFX10-NEXT:    s_lshl_b64 s[16:17], s[4:5], s167015; GFX10-NEXT:    s_or_b64 s[8:9], s[8:9], s[10:11]7016; GFX10-NEXT:    s_lshl_b64 s[4:5], s[4:5], s187017; GFX10-NEXT:    s_cmp_lg_u32 s19, 07018; GFX10-NEXT:    s_cselect_b64 s[10:11], s[16:17], 07019; GFX10-NEXT:    s_cselect_b64 s[4:5], s[8:9], s[4:5]7020; GFX10-NEXT:    s_cmp_lg_u32 s21, 07021; GFX10-NEXT:    s_cselect_b64 s[6:7], s[6:7], s[4:5]7022; GFX10-NEXT:    s_and_b32 s4, s20, 0x7f7023; GFX10-NEXT:    s_sub_i32 s18, s4, 647024; GFX10-NEXT:    s_sub_i32 s8, 64, s47025; GFX10-NEXT:    s_cmp_lt_u32 s4, 647026; GFX10-NEXT:    s_cselect_b32 s19, 1, 07027; GFX10-NEXT:    s_cmp_eq_u32 s4, 07028; GFX10-NEXT:    s_cselect_b32 s21, 1, 07029; GFX10-NEXT:    s_lshr_b64 s[4:5], s[12:13], s207030; GFX10-NEXT:    s_lshl_b64 s[8:9], s[14:15], s87031; GFX10-NEXT:    s_lshr_b64 s[16:17], s[14:15], s207032; GFX10-NEXT:    s_or_b64 s[4:5], s[4:5], s[8:9]7033; GFX10-NEXT:    s_lshr_b64 s[8:9], s[14:15], s187034; GFX10-NEXT:    s_cmp_lg_u32 s19, 07035; GFX10-NEXT:    s_cselect_b64 s[4:5], s[4:5], s[8:9]7036; GFX10-NEXT:    s_cmp_lg_u32 s21, 07037; GFX10-NEXT:    s_cselect_b64 s[4:5], s[12:13], s[4:5]7038; GFX10-NEXT:    s_cmp_lg_u32 s19, 07039; GFX10-NEXT:    s_cselect_b64 s[8:9], s[16:17], 07040; GFX10-NEXT:    s_or_b64 s[4:5], s[10:11], s[4:5]7041; GFX10-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]7042; GFX10-NEXT:    ; return to shader part epilog7043;7044; GFX11-LABEL: s_fshr_v2i128:7045; GFX11:       ; %bb.0:7046; GFX11-NEXT:    s_lshl_b64 s[2:3], s[2:3], 17047; GFX11-NEXT:    s_lshr_b32 s17, s1, 317048; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], 17049; GFX11-NEXT:    s_or_b32 s2, s2, s177050; GFX11-NEXT:    s_and_not1_b32 s17, 0x7f, s167051; GFX11-NEXT:    s_not_b32 s21, s167052; GFX11-NEXT:    s_sub_i32 s26, s17, 647053; GFX11-NEXT:    s_sub_i32 s18, 64, s177054; GFX11-NEXT:    s_cmp_lt_u32 s17, 647055; GFX11-NEXT:    s_cselect_b32 s27, 1, 07056; GFX11-NEXT:    s_cmp_eq_u32 s17, 07057; GFX11-NEXT:    s_cselect_b32 s17, 1, 07058; GFX11-NEXT:    s_lshr_b64 s[18:19], s[0:1], s187059; GFX11-NEXT:    s_lshl_b64 s[22:23], s[2:3], s217060; GFX11-NEXT:    s_lshl_b64 s[24:25], s[0:1], s217061; GFX11-NEXT:    s_or_b64 s[18:19], s[18:19], s[22:23]7062; GFX11-NEXT:    s_lshl_b64 s[0:1], s[0:1], s267063; GFX11-NEXT:    s_cmp_lg_u32 s27, 07064; GFX11-NEXT:    s_cselect_b64 s[22:23], s[24:25], 07065; GFX11-NEXT:    s_cselect_b64 s[0:1], s[18:19], s[0:1]7066; GFX11-NEXT:    s_cmp_lg_u32 s17, 07067; GFX11-NEXT:    s_cselect_b64 s[2:3], s[2:3], s[0:1]7068; GFX11-NEXT:    s_and_b32 s0, s16, 0x7f7069; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)7070; GFX11-NEXT:    s_sub_i32 s21, s0, 647071; GFX11-NEXT:    s_sub_i32 s17, 64, s07072; GFX11-NEXT:    s_cmp_lt_u32 s0, 647073; GFX11-NEXT:    s_cselect_b32 s24, 1, 07074; GFX11-NEXT:    s_cmp_eq_u32 s0, 07075; GFX11-NEXT:    s_cselect_b32 s25, 1, 07076; GFX11-NEXT:    s_lshr_b64 s[0:1], s[8:9], s167077; GFX11-NEXT:    s_lshl_b64 s[18:19], s[10:11], s177078; GFX11-NEXT:    s_lshr_b64 s[16:17], s[10:11], s167079; GFX11-NEXT:    s_or_b64 s[0:1], s[0:1], s[18:19]7080; GFX11-NEXT:    s_lshr_b64 s[10:11], s[10:11], s217081; GFX11-NEXT:    s_cmp_lg_u32 s24, 07082; GFX11-NEXT:    s_cselect_b64 s[0:1], s[0:1], s[10:11]7083; GFX11-NEXT:    s_cmp_lg_u32 s25, 07084; GFX11-NEXT:    s_cselect_b64 s[0:1], s[8:9], s[0:1]7085; GFX11-NEXT:    s_cmp_lg_u32 s24, 07086; GFX11-NEXT:    s_cselect_b64 s[8:9], s[16:17], 07087; GFX11-NEXT:    s_lshl_b64 s[6:7], s[6:7], 17088; GFX11-NEXT:    s_or_b64 s[2:3], s[2:3], s[8:9]7089; GFX11-NEXT:    s_lshr_b32 s8, s5, 317090; GFX11-NEXT:    s_or_b64 s[0:1], s[22:23], s[0:1]7091; GFX11-NEXT:    s_or_b32 s6, s6, s87092; GFX11-NEXT:    s_and_not1_b32 s8, 0x7f, s207093; GFX11-NEXT:    s_lshl_b64 s[4:5], s[4:5], 17094; GFX11-NEXT:    s_not_b32 s16, s207095; GFX11-NEXT:    s_sub_i32 s18, s8, 647096; GFX11-NEXT:    s_sub_i32 s9, 64, s87097; GFX11-NEXT:    s_cmp_lt_u32 s8, 647098; GFX11-NEXT:    s_cselect_b32 s19, 1, 07099; GFX11-NEXT:    s_cmp_eq_u32 s8, 07100; GFX11-NEXT:    s_cselect_b32 s21, 1, 07101; GFX11-NEXT:    s_lshr_b64 s[8:9], s[4:5], s97102; GFX11-NEXT:    s_lshl_b64 s[10:11], s[6:7], s167103; GFX11-NEXT:    s_lshl_b64 s[16:17], s[4:5], s167104; GFX11-NEXT:    s_or_b64 s[8:9], s[8:9], s[10:11]7105; GFX11-NEXT:    s_lshl_b64 s[4:5], s[4:5], s187106; GFX11-NEXT:    s_cmp_lg_u32 s19, 07107; GFX11-NEXT:    s_cselect_b64 s[10:11], s[16:17], 07108; GFX11-NEXT:    s_cselect_b64 s[4:5], s[8:9], s[4:5]7109; GFX11-NEXT:    s_cmp_lg_u32 s21, 07110; GFX11-NEXT:    s_cselect_b64 s[6:7], s[6:7], s[4:5]7111; GFX11-NEXT:    s_and_b32 s4, s20, 0x7f7112; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)7113; GFX11-NEXT:    s_sub_i32 s18, s4, 647114; GFX11-NEXT:    s_sub_i32 s8, 64, s47115; GFX11-NEXT:    s_cmp_lt_u32 s4, 647116; GFX11-NEXT:    s_cselect_b32 s19, 1, 07117; GFX11-NEXT:    s_cmp_eq_u32 s4, 07118; GFX11-NEXT:    s_cselect_b32 s21, 1, 07119; GFX11-NEXT:    s_lshr_b64 s[4:5], s[12:13], s207120; GFX11-NEXT:    s_lshl_b64 s[8:9], s[14:15], s87121; GFX11-NEXT:    s_lshr_b64 s[16:17], s[14:15], s207122; GFX11-NEXT:    s_or_b64 s[4:5], s[4:5], s[8:9]7123; GFX11-NEXT:    s_lshr_b64 s[8:9], s[14:15], s187124; GFX11-NEXT:    s_cmp_lg_u32 s19, 07125; GFX11-NEXT:    s_cselect_b64 s[4:5], s[4:5], s[8:9]7126; GFX11-NEXT:    s_cmp_lg_u32 s21, 07127; GFX11-NEXT:    s_cselect_b64 s[4:5], s[12:13], s[4:5]7128; GFX11-NEXT:    s_cmp_lg_u32 s19, 07129; GFX11-NEXT:    s_cselect_b64 s[8:9], s[16:17], 07130; GFX11-NEXT:    s_or_b64 s[4:5], s[10:11], s[4:5]7131; GFX11-NEXT:    s_or_b64 s[6:7], s[6:7], s[8:9]7132; GFX11-NEXT:    ; return to shader part epilog7133  %result = call <2 x i128> @llvm.fshr.v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %amt)7134  ret <2 x i128> %result7135}7136 7137define <2 x i128> @v_fshr_v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %amt) {7138; GFX6-LABEL: v_fshr_v2i128:7139; GFX6:       ; %bb.0:7140; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7141; GFX6-NEXT:    v_lshl_b64 v[2:3], v[2:3], 17142; GFX6-NEXT:    v_mov_b32_e32 v18, 0x7f7143; GFX6-NEXT:    v_lshl_b64 v[21:22], v[0:1], 17144; GFX6-NEXT:    v_lshrrev_b32_e32 v0, 31, v17145; GFX6-NEXT:    v_bfi_b32 v19, v16, 0, v187146; GFX6-NEXT:    v_or_b32_e32 v2, v2, v07147; GFX6-NEXT:    v_not_b32_e32 v17, 637148; GFX6-NEXT:    v_sub_i32_e32 v23, vcc, 64, v197149; GFX6-NEXT:    v_add_i32_e32 v27, vcc, v19, v177150; GFX6-NEXT:    v_lshr_b64 v[23:24], v[21:22], v237151; GFX6-NEXT:    v_lshl_b64 v[25:26], v[2:3], v197152; GFX6-NEXT:    v_lshl_b64 v[0:1], v[21:22], v197153; GFX6-NEXT:    v_lshl_b64 v[21:22], v[21:22], v277154; GFX6-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v197155; GFX6-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v197156; GFX6-NEXT:    v_or_b32_e32 v19, v23, v257157; GFX6-NEXT:    v_or_b32_e32 v23, v24, v267158; GFX6-NEXT:    v_cndmask_b32_e32 v24, 0, v0, vcc7159; GFX6-NEXT:    v_cndmask_b32_e32 v0, v21, v19, vcc7160; GFX6-NEXT:    v_cndmask_b32_e64 v19, v0, v2, s[4:5]7161; GFX6-NEXT:    v_and_b32_e32 v2, 0x7f, v167162; GFX6-NEXT:    v_cndmask_b32_e32 v25, 0, v1, vcc7163; GFX6-NEXT:    v_cndmask_b32_e32 v1, v22, v23, vcc7164; GFX6-NEXT:    v_add_i32_e32 v16, vcc, v2, v177165; GFX6-NEXT:    v_sub_i32_e32 v21, vcc, 64, v27166; GFX6-NEXT:    v_cndmask_b32_e64 v23, v1, v3, s[4:5]7167; GFX6-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v27168; GFX6-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v27169; GFX6-NEXT:    v_lshr_b64 v[0:1], v[10:11], v27170; GFX6-NEXT:    v_lshr_b64 v[2:3], v[8:9], v27171; GFX6-NEXT:    v_lshl_b64 v[21:22], v[10:11], v217172; GFX6-NEXT:    v_lshl_b64 v[6:7], v[6:7], 17173; GFX6-NEXT:    v_or_b32_e32 v21, v2, v217174; GFX6-NEXT:    v_or_b32_e32 v22, v3, v227175; GFX6-NEXT:    v_lshr_b64 v[2:3], v[10:11], v167176; GFX6-NEXT:    v_bfi_b32 v16, v20, 0, v187177; GFX6-NEXT:    v_cndmask_b32_e32 v2, v2, v21, vcc7178; GFX6-NEXT:    v_cndmask_b32_e32 v3, v3, v22, vcc7179; GFX6-NEXT:    v_cndmask_b32_e64 v2, v2, v8, s[4:5]7180; GFX6-NEXT:    v_cndmask_b32_e64 v3, v3, v9, s[4:5]7181; GFX6-NEXT:    v_cndmask_b32_e32 v8, 0, v0, vcc7182; GFX6-NEXT:    v_cndmask_b32_e32 v9, 0, v1, vcc7183; GFX6-NEXT:    v_or_b32_e32 v0, v24, v27184; GFX6-NEXT:    v_or_b32_e32 v1, v25, v37185; GFX6-NEXT:    v_or_b32_e32 v2, v19, v87186; GFX6-NEXT:    v_or_b32_e32 v3, v23, v97187; GFX6-NEXT:    v_lshl_b64 v[8:9], v[4:5], 17188; GFX6-NEXT:    v_lshrrev_b32_e32 v4, 31, v57189; GFX6-NEXT:    v_or_b32_e32 v6, v6, v47190; GFX6-NEXT:    v_sub_i32_e32 v10, vcc, 64, v167191; GFX6-NEXT:    v_add_i32_e32 v21, vcc, v16, v177192; GFX6-NEXT:    v_lshr_b64 v[10:11], v[8:9], v107193; GFX6-NEXT:    v_lshl_b64 v[18:19], v[6:7], v167194; GFX6-NEXT:    v_lshl_b64 v[4:5], v[8:9], v167195; GFX6-NEXT:    v_lshl_b64 v[8:9], v[8:9], v217196; GFX6-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v167197; GFX6-NEXT:    v_or_b32_e32 v10, v10, v187198; GFX6-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v167199; GFX6-NEXT:    v_cndmask_b32_e32 v16, 0, v4, vcc7200; GFX6-NEXT:    v_cndmask_b32_e32 v4, v8, v10, vcc7201; GFX6-NEXT:    v_or_b32_e32 v11, v11, v197202; GFX6-NEXT:    v_cndmask_b32_e64 v10, v4, v6, s[4:5]7203; GFX6-NEXT:    v_and_b32_e32 v6, 0x7f, v207204; GFX6-NEXT:    v_cndmask_b32_e32 v18, 0, v5, vcc7205; GFX6-NEXT:    v_cndmask_b32_e32 v5, v9, v11, vcc7206; GFX6-NEXT:    v_add_i32_e32 v17, vcc, v6, v177207; GFX6-NEXT:    v_sub_i32_e32 v8, vcc, 64, v67208; GFX6-NEXT:    v_cndmask_b32_e64 v11, v5, v7, s[4:5]7209; GFX6-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v67210; GFX6-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v67211; GFX6-NEXT:    v_lshr_b64 v[4:5], v[14:15], v67212; GFX6-NEXT:    v_lshr_b64 v[6:7], v[12:13], v67213; GFX6-NEXT:    v_lshl_b64 v[8:9], v[14:15], v87214; GFX6-NEXT:    v_or_b32_e32 v8, v6, v87215; GFX6-NEXT:    v_or_b32_e32 v9, v7, v97216; GFX6-NEXT:    v_lshr_b64 v[6:7], v[14:15], v177217; GFX6-NEXT:    v_cndmask_b32_e32 v6, v6, v8, vcc7218; GFX6-NEXT:    v_cndmask_b32_e32 v7, v7, v9, vcc7219; GFX6-NEXT:    v_cndmask_b32_e64 v6, v6, v12, s[4:5]7220; GFX6-NEXT:    v_cndmask_b32_e64 v7, v7, v13, s[4:5]7221; GFX6-NEXT:    v_cndmask_b32_e32 v8, 0, v4, vcc7222; GFX6-NEXT:    v_cndmask_b32_e32 v9, 0, v5, vcc7223; GFX6-NEXT:    v_or_b32_e32 v4, v16, v67224; GFX6-NEXT:    v_or_b32_e32 v5, v18, v77225; GFX6-NEXT:    v_or_b32_e32 v6, v10, v87226; GFX6-NEXT:    v_or_b32_e32 v7, v11, v97227; GFX6-NEXT:    s_setpc_b64 s[30:31]7228;7229; GFX8-LABEL: v_fshr_v2i128:7230; GFX8:       ; %bb.0:7231; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7232; GFX8-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]7233; GFX8-NEXT:    v_mov_b32_e32 v18, 0x7f7234; GFX8-NEXT:    v_lshlrev_b64 v[21:22], 1, v[0:1]7235; GFX8-NEXT:    v_lshrrev_b32_e32 v0, 31, v17236; GFX8-NEXT:    v_bfi_b32 v19, v16, 0, v187237; GFX8-NEXT:    v_or_b32_e32 v2, v2, v07238; GFX8-NEXT:    v_not_b32_e32 v17, 637239; GFX8-NEXT:    v_sub_u32_e32 v23, vcc, 64, v197240; GFX8-NEXT:    v_add_u32_e32 v27, vcc, v19, v177241; GFX8-NEXT:    v_lshrrev_b64 v[23:24], v23, v[21:22]7242; GFX8-NEXT:    v_lshlrev_b64 v[25:26], v19, v[2:3]7243; GFX8-NEXT:    v_lshlrev_b64 v[0:1], v19, v[21:22]7244; GFX8-NEXT:    v_lshlrev_b64 v[21:22], v27, v[21:22]7245; GFX8-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v197246; GFX8-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v197247; GFX8-NEXT:    v_or_b32_e32 v19, v23, v257248; GFX8-NEXT:    v_or_b32_e32 v23, v24, v267249; GFX8-NEXT:    v_cndmask_b32_e32 v24, 0, v0, vcc7250; GFX8-NEXT:    v_cndmask_b32_e32 v0, v21, v19, vcc7251; GFX8-NEXT:    v_cndmask_b32_e64 v19, v0, v2, s[4:5]7252; GFX8-NEXT:    v_and_b32_e32 v2, 0x7f, v167253; GFX8-NEXT:    v_cndmask_b32_e32 v25, 0, v1, vcc7254; GFX8-NEXT:    v_cndmask_b32_e32 v1, v22, v23, vcc7255; GFX8-NEXT:    v_add_u32_e32 v16, vcc, v2, v177256; GFX8-NEXT:    v_sub_u32_e32 v21, vcc, 64, v27257; GFX8-NEXT:    v_cndmask_b32_e64 v23, v1, v3, s[4:5]7258; GFX8-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v27259; GFX8-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v27260; GFX8-NEXT:    v_lshrrev_b64 v[0:1], v2, v[10:11]7261; GFX8-NEXT:    v_lshrrev_b64 v[2:3], v2, v[8:9]7262; GFX8-NEXT:    v_lshlrev_b64 v[21:22], v21, v[10:11]7263; GFX8-NEXT:    v_lshlrev_b64 v[6:7], 1, v[6:7]7264; GFX8-NEXT:    v_or_b32_e32 v21, v2, v217265; GFX8-NEXT:    v_or_b32_e32 v22, v3, v227266; GFX8-NEXT:    v_lshrrev_b64 v[2:3], v16, v[10:11]7267; GFX8-NEXT:    v_bfi_b32 v16, v20, 0, v187268; GFX8-NEXT:    v_cndmask_b32_e32 v2, v2, v21, vcc7269; GFX8-NEXT:    v_cndmask_b32_e32 v3, v3, v22, vcc7270; GFX8-NEXT:    v_cndmask_b32_e64 v2, v2, v8, s[4:5]7271; GFX8-NEXT:    v_cndmask_b32_e64 v3, v3, v9, s[4:5]7272; GFX8-NEXT:    v_cndmask_b32_e32 v8, 0, v0, vcc7273; GFX8-NEXT:    v_cndmask_b32_e32 v9, 0, v1, vcc7274; GFX8-NEXT:    v_or_b32_e32 v0, v24, v27275; GFX8-NEXT:    v_or_b32_e32 v1, v25, v37276; GFX8-NEXT:    v_or_b32_e32 v2, v19, v87277; GFX8-NEXT:    v_or_b32_e32 v3, v23, v97278; GFX8-NEXT:    v_lshlrev_b64 v[8:9], 1, v[4:5]7279; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 31, v57280; GFX8-NEXT:    v_or_b32_e32 v6, v6, v47281; GFX8-NEXT:    v_sub_u32_e32 v10, vcc, 64, v167282; GFX8-NEXT:    v_add_u32_e32 v21, vcc, v16, v177283; GFX8-NEXT:    v_lshrrev_b64 v[10:11], v10, v[8:9]7284; GFX8-NEXT:    v_lshlrev_b64 v[18:19], v16, v[6:7]7285; GFX8-NEXT:    v_lshlrev_b64 v[4:5], v16, v[8:9]7286; GFX8-NEXT:    v_lshlrev_b64 v[8:9], v21, v[8:9]7287; GFX8-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v167288; GFX8-NEXT:    v_or_b32_e32 v10, v10, v187289; GFX8-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v167290; GFX8-NEXT:    v_cndmask_b32_e32 v16, 0, v4, vcc7291; GFX8-NEXT:    v_cndmask_b32_e32 v4, v8, v10, vcc7292; GFX8-NEXT:    v_or_b32_e32 v11, v11, v197293; GFX8-NEXT:    v_cndmask_b32_e64 v10, v4, v6, s[4:5]7294; GFX8-NEXT:    v_and_b32_e32 v6, 0x7f, v207295; GFX8-NEXT:    v_cndmask_b32_e32 v18, 0, v5, vcc7296; GFX8-NEXT:    v_cndmask_b32_e32 v5, v9, v11, vcc7297; GFX8-NEXT:    v_add_u32_e32 v17, vcc, v6, v177298; GFX8-NEXT:    v_sub_u32_e32 v8, vcc, 64, v67299; GFX8-NEXT:    v_cndmask_b32_e64 v11, v5, v7, s[4:5]7300; GFX8-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v67301; GFX8-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v67302; GFX8-NEXT:    v_lshrrev_b64 v[4:5], v6, v[14:15]7303; GFX8-NEXT:    v_lshrrev_b64 v[6:7], v6, v[12:13]7304; GFX8-NEXT:    v_lshlrev_b64 v[8:9], v8, v[14:15]7305; GFX8-NEXT:    v_or_b32_e32 v8, v6, v87306; GFX8-NEXT:    v_or_b32_e32 v9, v7, v97307; GFX8-NEXT:    v_lshrrev_b64 v[6:7], v17, v[14:15]7308; GFX8-NEXT:    v_cndmask_b32_e32 v6, v6, v8, vcc7309; GFX8-NEXT:    v_cndmask_b32_e32 v7, v7, v9, vcc7310; GFX8-NEXT:    v_cndmask_b32_e64 v6, v6, v12, s[4:5]7311; GFX8-NEXT:    v_cndmask_b32_e64 v7, v7, v13, s[4:5]7312; GFX8-NEXT:    v_cndmask_b32_e32 v8, 0, v4, vcc7313; GFX8-NEXT:    v_cndmask_b32_e32 v9, 0, v5, vcc7314; GFX8-NEXT:    v_or_b32_e32 v4, v16, v67315; GFX8-NEXT:    v_or_b32_e32 v5, v18, v77316; GFX8-NEXT:    v_or_b32_e32 v6, v10, v87317; GFX8-NEXT:    v_or_b32_e32 v7, v11, v97318; GFX8-NEXT:    s_setpc_b64 s[30:31]7319;7320; GFX9-LABEL: v_fshr_v2i128:7321; GFX9:       ; %bb.0:7322; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7323; GFX9-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]7324; GFX9-NEXT:    v_mov_b32_e32 v19, 0x7f7325; GFX9-NEXT:    v_lshlrev_b64 v[17:18], 1, v[0:1]7326; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 31, v17327; GFX9-NEXT:    v_bfi_b32 v23, v16, 0, v197328; GFX9-NEXT:    v_or_b32_e32 v2, v2, v07329; GFX9-NEXT:    v_sub_u32_e32 v0, 64, v237330; GFX9-NEXT:    v_lshrrev_b64 v[0:1], v0, v[17:18]7331; GFX9-NEXT:    v_lshlrev_b64 v[21:22], v23, v[2:3]7332; GFX9-NEXT:    v_and_b32_e32 v26, 0x7f, v167333; GFX9-NEXT:    v_or_b32_e32 v24, v0, v217334; GFX9-NEXT:    v_sub_u32_e32 v0, 64, v267335; GFX9-NEXT:    v_or_b32_e32 v25, v1, v227336; GFX9-NEXT:    v_lshlrev_b64 v[0:1], v0, v[10:11]7337; GFX9-NEXT:    v_lshrrev_b64 v[21:22], v26, v[8:9]7338; GFX9-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v237339; GFX9-NEXT:    v_or_b32_e32 v21, v21, v07340; GFX9-NEXT:    v_add_u32_e32 v0, 0xffffffc0, v237341; GFX9-NEXT:    v_or_b32_e32 v22, v22, v17342; GFX9-NEXT:    v_lshlrev_b64 v[0:1], v0, v[17:18]7343; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v237344; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v24, vcc7345; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v25, vcc7346; GFX9-NEXT:    v_cndmask_b32_e64 v2, v0, v2, s[4:5]7347; GFX9-NEXT:    v_add_u32_e32 v0, 0xffffffc0, v267348; GFX9-NEXT:    v_lshlrev_b64 v[16:17], v23, v[17:18]7349; GFX9-NEXT:    v_cndmask_b32_e64 v3, v1, v3, s[4:5]7350; GFX9-NEXT:    v_lshrrev_b64 v[0:1], v0, v[10:11]7351; GFX9-NEXT:    v_cmp_gt_u32_e64 s[4:5], 64, v267352; GFX9-NEXT:    v_cndmask_b32_e32 v16, 0, v16, vcc7353; GFX9-NEXT:    v_cndmask_b32_e64 v18, v0, v21, s[4:5]7354; GFX9-NEXT:    v_cndmask_b32_e64 v21, v1, v22, s[4:5]7355; GFX9-NEXT:    v_cndmask_b32_e32 v17, 0, v17, vcc7356; GFX9-NEXT:    v_lshrrev_b64 v[0:1], v26, v[10:11]7357; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v267358; GFX9-NEXT:    v_cndmask_b32_e32 v8, v18, v8, vcc7359; GFX9-NEXT:    v_cndmask_b32_e32 v9, v21, v9, vcc7360; GFX9-NEXT:    v_lshlrev_b64 v[6:7], 1, v[6:7]7361; GFX9-NEXT:    v_cndmask_b32_e64 v10, 0, v0, s[4:5]7362; GFX9-NEXT:    v_cndmask_b32_e64 v11, 0, v1, s[4:5]7363; GFX9-NEXT:    v_or_b32_e32 v0, v16, v87364; GFX9-NEXT:    v_or_b32_e32 v1, v17, v97365; GFX9-NEXT:    v_lshlrev_b64 v[8:9], 1, v[4:5]7366; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 31, v57367; GFX9-NEXT:    v_bfi_b32 v16, v20, 0, v197368; GFX9-NEXT:    v_or_b32_e32 v6, v6, v47369; GFX9-NEXT:    v_sub_u32_e32 v4, 64, v167370; GFX9-NEXT:    v_or_b32_e32 v2, v2, v107371; GFX9-NEXT:    v_or_b32_e32 v3, v3, v117372; GFX9-NEXT:    v_lshrrev_b64 v[4:5], v4, v[8:9]7373; GFX9-NEXT:    v_lshlrev_b64 v[10:11], v16, v[6:7]7374; GFX9-NEXT:    v_add_u32_e32 v17, 0xffffffc0, v167375; GFX9-NEXT:    v_or_b32_e32 v10, v4, v107376; GFX9-NEXT:    v_or_b32_e32 v11, v5, v117377; GFX9-NEXT:    v_lshlrev_b64 v[4:5], v16, v[8:9]7378; GFX9-NEXT:    v_lshlrev_b64 v[8:9], v17, v[8:9]7379; GFX9-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v167380; GFX9-NEXT:    v_cndmask_b32_e32 v17, 0, v4, vcc7381; GFX9-NEXT:    v_cndmask_b32_e32 v18, 0, v5, vcc7382; GFX9-NEXT:    v_cndmask_b32_e32 v4, v8, v10, vcc7383; GFX9-NEXT:    v_cndmask_b32_e32 v5, v9, v11, vcc7384; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v167385; GFX9-NEXT:    v_and_b32_e32 v10, 0x7f, v207386; GFX9-NEXT:    v_cndmask_b32_e32 v8, v4, v6, vcc7387; GFX9-NEXT:    v_sub_u32_e32 v6, 64, v107388; GFX9-NEXT:    v_cndmask_b32_e32 v9, v5, v7, vcc7389; GFX9-NEXT:    v_lshrrev_b64 v[4:5], v10, v[12:13]7390; GFX9-NEXT:    v_lshlrev_b64 v[6:7], v6, v[14:15]7391; GFX9-NEXT:    v_add_u32_e32 v11, 0xffffffc0, v107392; GFX9-NEXT:    v_or_b32_e32 v16, v4, v67393; GFX9-NEXT:    v_or_b32_e32 v19, v5, v77394; GFX9-NEXT:    v_lshrrev_b64 v[6:7], v11, v[14:15]7395; GFX9-NEXT:    v_lshrrev_b64 v[4:5], v10, v[14:15]7396; GFX9-NEXT:    v_cmp_gt_u32_e32 vcc, 64, v107397; GFX9-NEXT:    v_cndmask_b32_e32 v6, v6, v16, vcc7398; GFX9-NEXT:    v_cndmask_b32_e32 v7, v7, v19, vcc7399; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v107400; GFX9-NEXT:    v_cndmask_b32_e64 v6, v6, v12, s[4:5]7401; GFX9-NEXT:    v_cndmask_b32_e64 v7, v7, v13, s[4:5]7402; GFX9-NEXT:    v_cndmask_b32_e32 v10, 0, v4, vcc7403; GFX9-NEXT:    v_cndmask_b32_e32 v11, 0, v5, vcc7404; GFX9-NEXT:    v_or_b32_e32 v4, v17, v67405; GFX9-NEXT:    v_or_b32_e32 v5, v18, v77406; GFX9-NEXT:    v_or_b32_e32 v6, v8, v107407; GFX9-NEXT:    v_or_b32_e32 v7, v9, v117408; GFX9-NEXT:    s_setpc_b64 s[30:31]7409;7410; GFX10-LABEL: v_fshr_v2i128:7411; GFX10:       ; %bb.0:7412; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7413; GFX10-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]7414; GFX10-NEXT:    v_bfi_b32 v25, v16, 0, 0x7f7415; GFX10-NEXT:    v_lshrrev_b32_e32 v17, 31, v17416; GFX10-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]7417; GFX10-NEXT:    v_and_b32_e32 v26, 0x7f, v167418; GFX10-NEXT:    v_lshlrev_b64 v[6:7], 1, v[6:7]7419; GFX10-NEXT:    v_sub_nc_u32_e32 v18, 64, v257420; GFX10-NEXT:    v_or_b32_e32 v2, v2, v177421; GFX10-NEXT:    v_add_nc_u32_e32 v19, 0xffffffc0, v257422; GFX10-NEXT:    v_lshlrev_b64 v[23:24], v25, v[0:1]7423; GFX10-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v257424; GFX10-NEXT:    v_lshrrev_b64 v[17:18], v18, v[0:1]7425; GFX10-NEXT:    v_lshlrev_b64 v[21:22], v25, v[2:3]7426; GFX10-NEXT:    v_lshlrev_b64 v[0:1], v19, v[0:1]7427; GFX10-NEXT:    v_add_nc_u32_e32 v27, 0xffffffc0, v267428; GFX10-NEXT:    v_cndmask_b32_e32 v23, 0, v23, vcc_lo7429; GFX10-NEXT:    v_cmp_eq_u32_e64 s4, 0, v257430; GFX10-NEXT:    v_cndmask_b32_e32 v24, 0, v24, vcc_lo7431; GFX10-NEXT:    v_or_b32_e32 v22, v18, v227432; GFX10-NEXT:    v_sub_nc_u32_e32 v18, 64, v267433; GFX10-NEXT:    v_or_b32_e32 v21, v17, v217434; GFX10-NEXT:    v_lshrrev_b64 v[16:17], v26, v[8:9]7435; GFX10-NEXT:    v_bfi_b32 v25, v20, 0, 0x7f7436; GFX10-NEXT:    v_cndmask_b32_e32 v22, v1, v22, vcc_lo7437; GFX10-NEXT:    v_lshlrev_b64 v[18:19], v18, v[10:11]7438; GFX10-NEXT:    v_cndmask_b32_e32 v21, v0, v21, vcc_lo7439; GFX10-NEXT:    v_lshrrev_b64 v[0:1], v27, v[10:11]7440; GFX10-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v267441; GFX10-NEXT:    v_cndmask_b32_e64 v22, v22, v3, s47442; GFX10-NEXT:    v_and_b32_e32 v20, 0x7f, v207443; GFX10-NEXT:    v_or_b32_e32 v16, v16, v187444; GFX10-NEXT:    v_cndmask_b32_e64 v21, v21, v2, s47445; GFX10-NEXT:    v_or_b32_e32 v17, v17, v197446; GFX10-NEXT:    v_cmp_eq_u32_e64 s4, 0, v267447; GFX10-NEXT:    v_lshrrev_b64 v[2:3], v26, v[10:11]7448; GFX10-NEXT:    v_cndmask_b32_e32 v0, v0, v16, vcc_lo7449; GFX10-NEXT:    v_lshrrev_b32_e32 v10, 31, v57450; GFX10-NEXT:    v_lshlrev_b64 v[4:5], 1, v[4:5]7451; GFX10-NEXT:    v_cndmask_b32_e32 v1, v1, v17, vcc_lo7452; GFX10-NEXT:    v_add_nc_u32_e32 v16, 0xffffffc0, v257453; GFX10-NEXT:    v_cndmask_b32_e64 v0, v0, v8, s47454; GFX10-NEXT:    v_sub_nc_u32_e32 v8, 64, v257455; GFX10-NEXT:    v_or_b32_e32 v6, v6, v107456; GFX10-NEXT:    v_cndmask_b32_e64 v1, v1, v9, s47457; GFX10-NEXT:    v_cndmask_b32_e32 v26, 0, v2, vcc_lo7458; GFX10-NEXT:    v_cndmask_b32_e32 v27, 0, v3, vcc_lo7459; GFX10-NEXT:    v_lshrrev_b64 v[2:3], v8, v[4:5]7460; GFX10-NEXT:    v_lshlrev_b64 v[8:9], v25, v[6:7]7461; GFX10-NEXT:    v_sub_nc_u32_e32 v18, 64, v207462; GFX10-NEXT:    v_lshlrev_b64 v[10:11], v25, v[4:5]7463; GFX10-NEXT:    v_lshlrev_b64 v[4:5], v16, v[4:5]7464; GFX10-NEXT:    v_or_b32_e32 v0, v23, v07465; GFX10-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v257466; GFX10-NEXT:    v_or_b32_e32 v8, v2, v87467; GFX10-NEXT:    v_add_nc_u32_e32 v23, 0xffffffc0, v207468; GFX10-NEXT:    v_lshrrev_b64 v[16:17], v20, v[12:13]7469; GFX10-NEXT:    v_lshlrev_b64 v[18:19], v18, v[14:15]7470; GFX10-NEXT:    v_or_b32_e32 v2, v21, v267471; GFX10-NEXT:    v_or_b32_e32 v9, v3, v97472; GFX10-NEXT:    v_cndmask_b32_e32 v21, v4, v8, vcc_lo7473; GFX10-NEXT:    v_lshrrev_b64 v[3:4], v23, v[14:15]7474; GFX10-NEXT:    v_cmp_gt_u32_e64 s5, 64, v207475; GFX10-NEXT:    v_or_b32_e32 v8, v16, v187476; GFX10-NEXT:    v_or_b32_e32 v16, v17, v197477; GFX10-NEXT:    v_cndmask_b32_e32 v5, v5, v9, vcc_lo7478; GFX10-NEXT:    v_cmp_eq_u32_e64 s4, 0, v257479; GFX10-NEXT:    v_cmp_eq_u32_e64 s6, 0, v207480; GFX10-NEXT:    v_cndmask_b32_e64 v3, v3, v8, s57481; GFX10-NEXT:    v_lshrrev_b64 v[8:9], v20, v[14:15]7482; GFX10-NEXT:    v_cndmask_b32_e64 v4, v4, v16, s57483; GFX10-NEXT:    v_cndmask_b32_e32 v10, 0, v10, vcc_lo7484; GFX10-NEXT:    v_cndmask_b32_e32 v11, 0, v11, vcc_lo7485; GFX10-NEXT:    v_cndmask_b32_e64 v6, v21, v6, s47486; GFX10-NEXT:    v_cndmask_b32_e64 v7, v5, v7, s47487; GFX10-NEXT:    v_cndmask_b32_e64 v5, v3, v12, s67488; GFX10-NEXT:    v_cndmask_b32_e64 v12, v4, v13, s67489; GFX10-NEXT:    v_cndmask_b32_e64 v8, 0, v8, s57490; GFX10-NEXT:    v_cndmask_b32_e64 v9, 0, v9, s57491; GFX10-NEXT:    v_or_b32_e32 v1, v24, v17492; GFX10-NEXT:    v_or_b32_e32 v3, v22, v277493; GFX10-NEXT:    v_or_b32_e32 v4, v10, v57494; GFX10-NEXT:    v_or_b32_e32 v5, v11, v127495; GFX10-NEXT:    v_or_b32_e32 v6, v6, v87496; GFX10-NEXT:    v_or_b32_e32 v7, v7, v97497; GFX10-NEXT:    s_setpc_b64 s[30:31]7498;7499; GFX11-LABEL: v_fshr_v2i128:7500; GFX11:       ; %bb.0:7501; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7502; GFX11-NEXT:    v_lshlrev_b64 v[2:3], 1, v[2:3]7503; GFX11-NEXT:    v_bfi_b32 v25, v16, 0, 0x7f7504; GFX11-NEXT:    v_lshrrev_b32_e32 v17, 31, v17505; GFX11-NEXT:    v_lshlrev_b64 v[0:1], 1, v[0:1]7506; GFX11-NEXT:    v_lshlrev_b64 v[6:7], 1, v[6:7]7507; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)7508; GFX11-NEXT:    v_sub_nc_u32_e32 v18, 64, v257509; GFX11-NEXT:    v_or_b32_e32 v2, v2, v177510; GFX11-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v257511; GFX11-NEXT:    v_lshlrev_b64 v[23:24], v25, v[0:1]7512; GFX11-NEXT:    v_and_b32_e32 v26, 0x7f, v167513; GFX11-NEXT:    v_lshrrev_b64 v[17:18], v18, v[0:1]7514; GFX11-NEXT:    v_lshlrev_b64 v[21:22], v25, v[2:3]7515; GFX11-NEXT:    v_add_nc_u32_e32 v19, 0xffffffc0, v257516; GFX11-NEXT:    v_cmp_eq_u32_e64 s0, 0, v257517; GFX11-NEXT:    v_dual_cndmask_b32 v23, 0, v23 :: v_dual_cndmask_b32 v24, 0, v247518; GFX11-NEXT:    v_bfi_b32 v25, v20, 0, 0x7f7519; GFX11-NEXT:    v_or_b32_e32 v22, v18, v227520; GFX11-NEXT:    v_sub_nc_u32_e32 v18, 64, v267521; GFX11-NEXT:    v_or_b32_e32 v21, v17, v217522; GFX11-NEXT:    v_lshlrev_b64 v[0:1], v19, v[0:1]7523; GFX11-NEXT:    v_lshrrev_b64 v[16:17], v26, v[8:9]7524; GFX11-NEXT:    v_and_b32_e32 v20, 0x7f, v207525; GFX11-NEXT:    v_lshlrev_b64 v[18:19], v18, v[10:11]7526; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)7527; GFX11-NEXT:    v_dual_cndmask_b32 v21, v0, v21 :: v_dual_cndmask_b32 v22, v1, v227528; GFX11-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v267529; GFX11-NEXT:    v_or_b32_e32 v16, v16, v187530; GFX11-NEXT:    v_add_nc_u32_e32 v27, 0xffffffc0, v267531; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)7532; GFX11-NEXT:    v_cndmask_b32_e64 v21, v21, v2, s07533; GFX11-NEXT:    v_or_b32_e32 v17, v17, v197534; GFX11-NEXT:    v_cndmask_b32_e64 v22, v22, v3, s07535; GFX11-NEXT:    v_cmp_eq_u32_e64 s0, 0, v267536; GFX11-NEXT:    v_lshrrev_b64 v[0:1], v27, v[10:11]7537; GFX11-NEXT:    v_lshrrev_b64 v[2:3], v26, v[10:11]7538; GFX11-NEXT:    v_lshrrev_b32_e32 v10, 31, v57539; GFX11-NEXT:    v_lshlrev_b64 v[4:5], 1, v[4:5]7540; GFX11-NEXT:    v_sub_nc_u32_e32 v18, 64, v207541; GFX11-NEXT:    v_cmp_gt_u32_e64 s1, 64, v207542; GFX11-NEXT:    v_dual_cndmask_b32 v0, v0, v16 :: v_dual_cndmask_b32 v1, v1, v177543; GFX11-NEXT:    v_cndmask_b32_e32 v26, 0, v2, vcc_lo7544; GFX11-NEXT:    v_or_b32_e32 v6, v6, v107545; GFX11-NEXT:    v_cndmask_b32_e32 v27, 0, v3, vcc_lo7546; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)7547; GFX11-NEXT:    v_cndmask_b32_e64 v0, v0, v8, s07548; GFX11-NEXT:    v_sub_nc_u32_e32 v8, 64, v257549; GFX11-NEXT:    v_cndmask_b32_e64 v1, v1, v9, s07550; GFX11-NEXT:    v_cmp_gt_u32_e32 vcc_lo, 64, v257551; GFX11-NEXT:    v_lshlrev_b64 v[10:11], v25, v[4:5]7552; GFX11-NEXT:    v_or_b32_e32 v0, v23, v07553; GFX11-NEXT:    v_lshrrev_b64 v[2:3], v8, v[4:5]7554; GFX11-NEXT:    v_lshlrev_b64 v[8:9], v25, v[6:7]7555; GFX11-NEXT:    v_add_nc_u32_e32 v23, 0xffffffc0, v207556; GFX11-NEXT:    v_lshlrev_b64 v[18:19], v18, v[14:15]7557; GFX11-NEXT:    v_cndmask_b32_e32 v10, 0, v10, vcc_lo7558; GFX11-NEXT:    v_cmp_eq_u32_e64 s0, 0, v257559; GFX11-NEXT:    v_cmp_eq_u32_e64 s2, 0, v207560; GFX11-NEXT:    v_or_b32_e32 v8, v2, v87561; GFX11-NEXT:    v_add_nc_u32_e32 v16, 0xffffffc0, v257562; GFX11-NEXT:    v_or_b32_e32 v2, v21, v267563; GFX11-NEXT:    v_or_b32_e32 v9, v3, v97564; GFX11-NEXT:    v_cndmask_b32_e32 v11, 0, v11, vcc_lo7565; GFX11-NEXT:    v_or_b32_e32 v1, v24, v17566; GFX11-NEXT:    v_lshlrev_b64 v[4:5], v16, v[4:5]7567; GFX11-NEXT:    v_lshrrev_b64 v[16:17], v20, v[12:13]7568; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)7569; GFX11-NEXT:    v_cndmask_b32_e32 v21, v4, v8, vcc_lo7570; GFX11-NEXT:    v_lshrrev_b64 v[3:4], v23, v[14:15]7571; GFX11-NEXT:    v_or_b32_e32 v8, v16, v187572; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)7573; GFX11-NEXT:    v_or_b32_e32 v16, v17, v197574; GFX11-NEXT:    v_cndmask_b32_e32 v5, v5, v9, vcc_lo7575; GFX11-NEXT:    v_cndmask_b32_e64 v6, v21, v6, s07576; GFX11-NEXT:    v_cndmask_b32_e64 v3, v3, v8, s17577; GFX11-NEXT:    v_lshrrev_b64 v[8:9], v20, v[14:15]7578; GFX11-NEXT:    v_cndmask_b32_e64 v4, v4, v16, s17579; GFX11-NEXT:    v_cndmask_b32_e64 v7, v5, v7, s07580; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)7581; GFX11-NEXT:    v_cndmask_b32_e64 v5, v3, v12, s27582; GFX11-NEXT:    v_or_b32_e32 v3, v22, v277583; GFX11-NEXT:    v_cndmask_b32_e64 v12, v4, v13, s27584; GFX11-NEXT:    v_cndmask_b32_e64 v8, 0, v8, s17585; GFX11-NEXT:    v_cndmask_b32_e64 v9, 0, v9, s17586; GFX11-NEXT:    v_or_b32_e32 v4, v10, v57587; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)7588; GFX11-NEXT:    v_or_b32_e32 v5, v11, v127589; GFX11-NEXT:    v_or_b32_e32 v6, v6, v87590; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_4)7591; GFX11-NEXT:    v_or_b32_e32 v7, v7, v97592; GFX11-NEXT:    s_setpc_b64 s[30:31]7593  %result = call <2 x i128> @llvm.fshr.v2i128(<2 x i128> %lhs, <2 x i128> %rhs, <2 x i128> %amt)7594  ret <2 x i128> %result7595}7596 7597declare i7 @llvm.fshr.i7(i7, i7, i7) #07598declare i8 @llvm.fshr.i8(i8, i8, i8) #07599declare <2 x i8> @llvm.fshr.v2i8(<2 x i8>, <2 x i8>, <2 x i8>) #07600declare <4 x i8> @llvm.fshr.v4i8(<4 x i8>, <4 x i8>, <4 x i8>) #07601 7602declare i16 @llvm.fshr.i16(i16, i16, i16) #07603declare <2 x i16> @llvm.fshr.v2i16(<2 x i16>, <2 x i16>, <2 x i16>) #07604declare <3 x i16> @llvm.fshr.v3i16(<3 x i16>, <3 x i16>, <3 x i16>) #07605declare <4 x i16> @llvm.fshr.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) #07606declare <5 x i16> @llvm.fshr.v5i16(<5 x i16>, <5 x i16>, <5 x i16>) #07607declare <6 x i16> @llvm.fshr.v6i16(<6 x i16>, <6 x i16>, <6 x i16>) #07608declare <8 x i16> @llvm.fshr.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) #07609 7610declare i24 @llvm.fshr.i24(i24, i24, i24) #07611declare <2 x i24> @llvm.fshr.v2i24(<2 x i24>, <2 x i24>, <2 x i24>) #07612 7613declare i32 @llvm.fshr.i32(i32, i32, i32) #07614declare <2 x i32> @llvm.fshr.v2i32(<2 x i32>, <2 x i32>, <2 x i32>) #07615declare <3 x i32> @llvm.fshr.v3i32(<3 x i32>, <3 x i32>, <3 x i32>) #07616declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) #07617declare <5 x i32> @llvm.fshr.v5i32(<5 x i32>, <5 x i32>, <5 x i32>) #07618declare <16 x i32> @llvm.fshr.v16i32(<16 x i32>, <16 x i32>, <16 x i32>) #07619 7620declare i48 @llvm.fshr.i48(i48, i48, i48) #07621 7622declare i64 @llvm.fshr.i64(i64, i64, i64) #07623declare <2 x i64> @llvm.fshr.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) #07624 7625declare i128 @llvm.fshr.i128(i128, i128, i128) #07626declare <2 x i128> @llvm.fshr.v2i128(<2 x i128>, <2 x i128>, <2 x i128>) #07627 7628attributes #0 = { nounwind readnone speculatable willreturn }7629