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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx908 -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX908 %s3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx90a -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX90A_GFX942 %s4; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx942 -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX90A_GFX942 %s5 6define amdgpu_ps void @global_atomic_fadd_v2f16_no_rtn(ptr addrspace(1) %ptr, <2 x half> %data) {7 ; GFX908-LABEL: name: global_atomic_fadd_v2f16_no_rtn8 ; GFX908: bb.1 (%ir-block.0):9 ; GFX908-NEXT: liveins: $vgpr0, $vgpr1, $vgpr210 ; GFX908-NEXT: {{ $}}11 ; GFX908-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr012 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr113 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub114 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr215 ; GFX908-NEXT: GLOBAL_ATOMIC_PK_ADD_F16 [[REG_SEQUENCE]], [[COPY2]], 0, 0, implicit $exec :: (load store syncscope("agent") seq_cst (<2 x s16>) on %ir.ptr, addrspace 1)16 ; GFX908-NEXT: S_ENDPGM 017 ;18 ; GFX90A_GFX942-LABEL: name: global_atomic_fadd_v2f16_no_rtn19 ; GFX90A_GFX942: bb.1 (%ir-block.0):20 ; GFX90A_GFX942-NEXT: liveins: $vgpr0, $vgpr1, $vgpr221 ; GFX90A_GFX942-NEXT: {{ $}}22 ; GFX90A_GFX942-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr023 ; GFX90A_GFX942-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr124 ; GFX90A_GFX942-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub125 ; GFX90A_GFX942-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr226 ; GFX90A_GFX942-NEXT: GLOBAL_ATOMIC_PK_ADD_F16 [[REG_SEQUENCE]], [[COPY2]], 0, 0, implicit $exec :: (load store syncscope("agent") seq_cst (<2 x s16>) on %ir.ptr, addrspace 1)27 ; GFX90A_GFX942-NEXT: S_ENDPGM 028 %ret = atomicrmw fadd ptr addrspace(1) %ptr, <2 x half> %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !029 ret void30}31 32define amdgpu_ps void @global_atomic_fadd_v2f16_saddr_no_rtn(ptr addrspace(1) inreg %ptr, <2 x half> %data) {33 ; GFX908-LABEL: name: global_atomic_fadd_v2f16_saddr_no_rtn34 ; GFX908: bb.1 (%ir-block.0):35 ; GFX908-NEXT: liveins: $sgpr0, $sgpr1, $vgpr036 ; GFX908-NEXT: {{ $}}37 ; GFX908-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr038 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr139 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec_xnull = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub140 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr041 ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec42 ; GFX908-NEXT: GLOBAL_ATOMIC_PK_ADD_F16_SADDR [[V_MOV_B32_e32_]], [[COPY2]], [[REG_SEQUENCE]], 0, 0, implicit $exec :: (load store syncscope("agent") seq_cst (<2 x s16>) on %ir.ptr, addrspace 1)43 ; GFX908-NEXT: S_ENDPGM 044 ;45 ; GFX90A_GFX942-LABEL: name: global_atomic_fadd_v2f16_saddr_no_rtn46 ; GFX90A_GFX942: bb.1 (%ir-block.0):47 ; GFX90A_GFX942-NEXT: liveins: $sgpr0, $sgpr1, $vgpr048 ; GFX90A_GFX942-NEXT: {{ $}}49 ; GFX90A_GFX942-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr050 ; GFX90A_GFX942-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr151 ; GFX90A_GFX942-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec_xnull = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub152 ; GFX90A_GFX942-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr053 ; GFX90A_GFX942-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec54 ; GFX90A_GFX942-NEXT: GLOBAL_ATOMIC_PK_ADD_F16_SADDR [[V_MOV_B32_e32_]], [[COPY2]], [[REG_SEQUENCE]], 0, 0, implicit $exec :: (load store syncscope("agent") seq_cst (<2 x s16>) on %ir.ptr, addrspace 1)55 ; GFX90A_GFX942-NEXT: S_ENDPGM 056 %ret = atomicrmw fadd ptr addrspace(1) %ptr, <2 x half> %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !057 ret void58}59 60!0 = !{}61