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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx90a -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX90A_GFX942 %s3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx942 -stop-after=instruction-select < %s | FileCheck -check-prefix=GFX90A_GFX942 %s4 5define amdgpu_ps <2 x half> @global_atomic_fadd_v2f16_rtn(ptr addrspace(1) %ptr, <2 x half> %data) {6 ; GFX90A_GFX942-LABEL: name: global_atomic_fadd_v2f16_rtn7 ; GFX90A_GFX942: bb.1 (%ir-block.0):8 ; GFX90A_GFX942-NEXT: liveins: $vgpr0, $vgpr1, $vgpr29 ; GFX90A_GFX942-NEXT: {{ $}}10 ; GFX90A_GFX942-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr011 ; GFX90A_GFX942-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr112 ; GFX90A_GFX942-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub113 ; GFX90A_GFX942-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr214 ; GFX90A_GFX942-NEXT: [[GLOBAL_ATOMIC_PK_ADD_F16_RTN:%[0-9]+]]:vgpr_32 = GLOBAL_ATOMIC_PK_ADD_F16_RTN [[REG_SEQUENCE]], [[COPY2]], 0, 1, implicit $exec :: (load store syncscope("agent") seq_cst (<2 x s16>) on %ir.ptr, addrspace 1)15 ; GFX90A_GFX942-NEXT: $vgpr0 = COPY [[GLOBAL_ATOMIC_PK_ADD_F16_RTN]]16 ; GFX90A_GFX942-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr017 %ret = atomicrmw fadd ptr addrspace(1) %ptr, <2 x half> %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !018 ret <2 x half> %ret19}20 21define amdgpu_ps <2 x half> @global_atomic_fadd_v2f16_saddr_rtn(ptr addrspace(1) inreg %ptr, <2 x half> %data) {22 ; GFX90A_GFX942-LABEL: name: global_atomic_fadd_v2f16_saddr_rtn23 ; GFX90A_GFX942: bb.1 (%ir-block.0):24 ; GFX90A_GFX942-NEXT: liveins: $sgpr0, $sgpr1, $vgpr025 ; GFX90A_GFX942-NEXT: {{ $}}26 ; GFX90A_GFX942-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr027 ; GFX90A_GFX942-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr128 ; GFX90A_GFX942-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec_xnull = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub129 ; GFX90A_GFX942-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr030 ; GFX90A_GFX942-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec31 ; GFX90A_GFX942-NEXT: [[GLOBAL_ATOMIC_PK_ADD_F16_SADDR_RTN:%[0-9]+]]:vgpr_32 = GLOBAL_ATOMIC_PK_ADD_F16_SADDR_RTN [[V_MOV_B32_e32_]], [[COPY2]], [[REG_SEQUENCE]], 0, 1, implicit $exec :: (load store syncscope("agent") seq_cst (<2 x s16>) on %ir.ptr, addrspace 1)32 ; GFX90A_GFX942-NEXT: $vgpr0 = COPY [[GLOBAL_ATOMIC_PK_ADD_F16_SADDR_RTN]]33 ; GFX90A_GFX942-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr034 %ret = atomicrmw fadd ptr addrspace(1) %ptr, <2 x half> %data syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !035 ret <2 x half> %ret36}37 38!0 = !{}39