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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -stop-after=legalizer < %s | FileCheck -check-prefix=GCN %s3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=hawaii -stop-after=legalizer < %s | FileCheck -check-prefix=GCN-PAL %s4 5@external_constant = external addrspace(4) constant i32, align 46@external_constant32 = external addrspace(6) constant i32, align 47@external_global = external addrspace(1) global i32, align 48@external_other = external addrspace(999) global i32, align 49 10@internal_constant = internal addrspace(4) constant i32 9, align 411@internal_constant32 = internal addrspace(6) constant i32 9, align 412@internal_global = internal addrspace(1) global i32 9, align 413@internal_other = internal addrspace(999) global i32 9, align 414 15 16define ptr addrspace(4) @external_constant_got() {17 18 ; GCN-LABEL: name: external_constant_got19 ; GCN: bb.1 (%ir-block.0):20 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_constant, target-flags(amdgpu-gotprel32-hi) @external_constant, implicit-def $scc21 ; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p4) from got, addrspace 4)22 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p4)23 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)24 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)25 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr126 ;27 ; GCN-PAL-LABEL: name: external_constant_got28 ; GCN-PAL: bb.1 (%ir-block.0):29 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_constant30 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_constant31 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)32 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)33 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr134 ret ptr addrspace(4) @external_constant35}36 37define ptr addrspace(1) @external_global_got() {38 39 ; GCN-LABEL: name: external_global_got40 ; GCN: bb.1 (%ir-block.0):41 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_global, target-flags(amdgpu-gotprel32-hi) @external_global, implicit-def $scc42 ; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p1) from got, addrspace 4)43 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p1)44 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)45 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)46 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr147 ;48 ; GCN-PAL-LABEL: name: external_global_got49 ; GCN-PAL: bb.1 (%ir-block.0):50 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_global51 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_global52 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)53 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)54 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr155 ret ptr addrspace(1) @external_global56}57 58define ptr addrspace(999) @external_other_got() {59 60 ; GCN-LABEL: name: external_other_got61 ; GCN: bb.1 (%ir-block.0):62 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_other, target-flags(amdgpu-gotprel32-hi) @external_other, implicit-def $scc63 ; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p999) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p999) from got, addrspace 4)64 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p999)65 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)66 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)67 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr168 ;69 ; GCN-PAL-LABEL: name: external_other_got70 ; GCN-PAL: bb.1 (%ir-block.0):71 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_other72 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_other73 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)74 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)75 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr176 ret ptr addrspace(999) @external_other77}78 79define ptr addrspace(4) @internal_constant_pcrel() {80 81 ; GCN-LABEL: name: internal_constant_pcrel82 ; GCN: bb.1 (%ir-block.0):83 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_constant, target-flags(amdgpu-rel32-hi) @internal_constant, implicit-def $scc84 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p4)85 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)86 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)87 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr188 ;89 ; GCN-PAL-LABEL: name: internal_constant_pcrel90 ; GCN-PAL: bb.1 (%ir-block.0):91 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_constant92 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_constant93 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)94 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)95 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr196 ret ptr addrspace(4) @internal_constant97}98 99define ptr addrspace(1) @internal_global_pcrel() {100 101 ; GCN-LABEL: name: internal_global_pcrel102 ; GCN: bb.1 (%ir-block.0):103 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p1) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_global, target-flags(amdgpu-rel32-hi) @internal_global, implicit-def $scc104 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p1)105 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)106 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)107 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1108 ;109 ; GCN-PAL-LABEL: name: internal_global_pcrel110 ; GCN-PAL: bb.1 (%ir-block.0):111 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_global112 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_global113 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)114 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)115 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1116 ret ptr addrspace(1) @internal_global117}118 119define ptr addrspace(999) @internal_other_pcrel() {120 121 ; GCN-LABEL: name: internal_other_pcrel122 ; GCN: bb.1 (%ir-block.0):123 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p999) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_other, target-flags(amdgpu-rel32-hi) @internal_other, implicit-def $scc124 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p999)125 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)126 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)127 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1128 ;129 ; GCN-PAL-LABEL: name: internal_other_pcrel130 ; GCN-PAL: bb.1 (%ir-block.0):131 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_other132 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_other133 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)134 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)135 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1136 ret ptr addrspace(999) @internal_other137}138 139define ptr addrspace(6) @external_constant32_got() {140 141 ; GCN-LABEL: name: external_constant32_got142 ; GCN: bb.1 (%ir-block.0):143 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_constant32, target-flags(amdgpu-gotprel32-hi) @external_constant32, implicit-def $scc144 ; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p4) from got, addrspace 4)145 ; GCN-NEXT: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[LOAD]](p4), 0146 ; GCN-NEXT: $vgpr0 = COPY [[EXTRACT]](p6)147 ; GCN-NEXT: SI_RETURN implicit $vgpr0148 ;149 ; GCN-PAL-LABEL: name: external_constant32_got150 ; GCN-PAL: bb.1 (%ir-block.0):151 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(p6) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_constant32152 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](p6)153 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0154 ret ptr addrspace(6) @external_constant32155}156 157define ptr addrspace(6) @internal_constant32_pcrel() {158 159 ; GCN-LABEL: name: internal_constant32_pcrel160 ; GCN: bb.1 (%ir-block.0):161 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_constant32, target-flags(amdgpu-rel32-hi) @internal_constant32, implicit-def $scc162 ; GCN-NEXT: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[SI_PC_ADD_REL_OFFSET]](p4), 0163 ; GCN-NEXT: $vgpr0 = COPY [[EXTRACT]](p6)164 ; GCN-NEXT: SI_RETURN implicit $vgpr0165 ;166 ; GCN-PAL-LABEL: name: internal_constant32_pcrel167 ; GCN-PAL: bb.1 (%ir-block.0):168 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(p6) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_constant32169 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](p6)170 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0171 ret ptr addrspace(6) @internal_constant32172}173