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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -mtriple=amdgcn -mcpu=fiji -stop-after=irtranslator %s -o - 2>%t | FileCheck %s3; RUN: FileCheck -check-prefix=ERR %s < %t4 5; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' %sgpr = call <4 x i32> asm sideeffect "; def $0", "={s[8:12]}"()' (in function: return_type_is_too_big_vector)6; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' %sgpr = call <4 x i32> asm sideeffect "; def $0", "={s[8:10]}"()' (in function: return_type_is_too_small_vector)7; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' %reg = call i64 asm sideeffect "; def $0", "={v8}"()' (in function: return_type_is_too_big_scalar)8; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' %reg = call i32 asm sideeffect "; def $0", "={v[8:9]}"()' (in function: return_type_is_too_small_scalar)9; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' %reg = call ptr addrspace(1) asm sideeffect "; def $0", "={v8}"()' (in function: return_type_is_too_big_pointer)10; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' %reg = call ptr addrspace(3) asm sideeffect "; def $0", "={v[8:9]}"()' (in function: return_type_is_too_small_pointer)11; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' call void asm sideeffect "; use $0", "{v[0:9]}"(<8 x i32> %arg)' (in function: use_vector_too_big)12; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' call void asm sideeffect "; use $0", "{v0}"(i64 %arg)' (in function: use_scalar_too_small)13; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' call void asm sideeffect "; use $0", "{v[0:1]}"(i32 %arg)' (in function: use_scalar_too_big)14; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' call void asm sideeffect "; use $0", "{v0}"(ptr addrspace(1) %arg)' (in function: use_pointer_too_small)15; ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' call void asm sideeffect "; use $0", "{v[0:1]}"(ptr addrspace(3) %arg)' (in function: use_pointer_too_big)16 17 18; This asm is broken because it's using a 5 element wide physical19; register for a 4 element wide value. Make sure we don't crash, and20; take the IR type as truth.21define amdgpu_kernel void @return_type_is_too_big_vector() {22 ; CHECK-LABEL: name: return_type_is_too_big_vector23 ; CHECK: bb.0:24 ; CHECK-NEXT: successors: %bb.1(0x80000000)25 ; CHECK-NEXT: liveins: $sgpr4_sgpr526 ; CHECK-NEXT: {{ $}}27 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr528 ; CHECK-NEXT: {{ $}}29 ; CHECK-NEXT: bb.1 (%ir-block.0):30 %sgpr = call <4 x i32> asm sideeffect "; def $0", "={s[8:12]}" ()31 call void asm sideeffect "; use $0", "s"(<4 x i32> %sgpr) #032 ret void33}34 35; This is broken because it requests 3 32-bit sgprs to handle a 4xi32 result.36define amdgpu_kernel void @return_type_is_too_small_vector() {37 ; CHECK-LABEL: name: return_type_is_too_small_vector38 ; CHECK: bb.0:39 ; CHECK-NEXT: successors: %bb.1(0x80000000)40 ; CHECK-NEXT: liveins: $sgpr4_sgpr541 ; CHECK-NEXT: {{ $}}42 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr543 ; CHECK-NEXT: {{ $}}44 ; CHECK-NEXT: bb.1 (%ir-block.0):45 %sgpr = call <4 x i32> asm sideeffect "; def $0", "={s[8:10]}" ()46 call void asm sideeffect "; use $0", "s"(<4 x i32> %sgpr) #047 ret void48}49 50define i64 @return_type_is_too_big_scalar() {51 ; CHECK-LABEL: name: return_type_is_too_big_scalar52 ; CHECK: bb.0:53 ; CHECK-NEXT: successors: %bb.1(0x80000000)54 ; CHECK-NEXT: {{ $}}55 ; CHECK-NEXT: bb.1 (%ir-block.0):56 ; CHECK-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vgpr857 %reg = call i64 asm sideeffect "; def $0", "={v8}" ()58 ret i64 %reg59}60 61define i32 @return_type_is_too_small_scalar() {62 ; CHECK-LABEL: name: return_type_is_too_small_scalar63 ; CHECK: bb.0:64 ; CHECK-NEXT: successors: %bb.1(0x80000000)65 ; CHECK-NEXT: {{ $}}66 ; CHECK-NEXT: bb.1 (%ir-block.0):67 %reg = call i32 asm sideeffect "; def $0", "={v[8:9]}" ()68 ret i32 %reg69}70 71define ptr addrspace(1) @return_type_is_too_big_pointer() {72 ; CHECK-LABEL: name: return_type_is_too_big_pointer73 ; CHECK: bb.0:74 ; CHECK-NEXT: successors: %bb.1(0x80000000)75 ; CHECK-NEXT: {{ $}}76 ; CHECK-NEXT: bb.1 (%ir-block.0):77 ; CHECK-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vgpr878 %reg = call ptr addrspace(1) asm sideeffect "; def $0", "={v8}" ()79 ret ptr addrspace(1) %reg80}81 82define ptr addrspace(3) @return_type_is_too_small_pointer() {83 ; CHECK-LABEL: name: return_type_is_too_small_pointer84 ; CHECK: bb.0:85 ; CHECK-NEXT: successors: %bb.1(0x80000000)86 ; CHECK-NEXT: {{ $}}87 ; CHECK-NEXT: bb.1 (%ir-block.0):88 %reg = call ptr addrspace(3) asm sideeffect "; def $0", "={v[8:9]}" ()89 ret ptr addrspace(3) %reg90}91 92define void @use_vector_too_small(<8 x i32> %arg) {93 ; CHECK-LABEL: name: use_vector_too_small94 ; CHECK: bb.1 (%ir-block.0):95 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr796 ; CHECK-NEXT: {{ $}}97 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr098 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr199 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2100 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3101 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4102 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5103 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6104 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7105 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)106 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<8 x s32>)107 ; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7108 ; CHECK-NEXT: SI_RETURN109 call void asm sideeffect "; use $0", "{v[0:7]}"(<8 x i32> %arg)110 ret void111}112 113define void @use_vector_too_big(<8 x i32> %arg) {114 ; CHECK-LABEL: name: use_vector_too_big115 ; CHECK: bb.0:116 ; CHECK-NEXT: successors: %bb.1(0x80000000)117 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7118 ; CHECK-NEXT: {{ $}}119 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0120 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1121 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2122 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3123 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4124 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5125 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6126 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7127 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)128 ; CHECK-NEXT: {{ $}}129 ; CHECK-NEXT: bb.1 (%ir-block.0):130 call void asm sideeffect "; use $0", "{v[0:9]}"(<8 x i32> %arg)131 ret void132}133 134define void @use_scalar_too_small(i64 %arg) {135 ; CHECK-LABEL: name: use_scalar_too_small136 ; CHECK: bb.0:137 ; CHECK-NEXT: successors: %bb.1(0x80000000)138 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1139 ; CHECK-NEXT: {{ $}}140 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0141 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1142 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)143 ; CHECK-NEXT: {{ $}}144 ; CHECK-NEXT: bb.1 (%ir-block.0):145 call void asm sideeffect "; use $0", "{v0}"(i64 %arg)146 ret void147}148 149define void @use_scalar_too_big(i32 %arg) {150 ; CHECK-LABEL: name: use_scalar_too_big151 ; CHECK: bb.0:152 ; CHECK-NEXT: successors: %bb.1(0x80000000)153 ; CHECK-NEXT: liveins: $vgpr0154 ; CHECK-NEXT: {{ $}}155 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0156 ; CHECK-NEXT: {{ $}}157 ; CHECK-NEXT: bb.1 (%ir-block.0):158 call void asm sideeffect "; use $0", "{v[0:1]}"(i32 %arg)159 ret void160}161 162define void @use_pointer_too_small(ptr addrspace(1) %arg) {163 ; CHECK-LABEL: name: use_pointer_too_small164 ; CHECK: bb.0:165 ; CHECK-NEXT: successors: %bb.1(0x80000000)166 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1167 ; CHECK-NEXT: {{ $}}168 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0169 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1170 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)171 ; CHECK-NEXT: {{ $}}172 ; CHECK-NEXT: bb.1 (%ir-block.0):173 call void asm sideeffect "; use $0", "{v0}"(ptr addrspace(1) %arg)174 ret void175}176 177define void @use_pointer_too_big(ptr addrspace(3) %arg) {178 ; CHECK-LABEL: name: use_pointer_too_big179 ; CHECK: bb.0:180 ; CHECK-NEXT: successors: %bb.1(0x80000000)181 ; CHECK-NEXT: liveins: $vgpr0182 ; CHECK-NEXT: {{ $}}183 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0184 ; CHECK-NEXT: {{ $}}185 ; CHECK-NEXT: bb.1 (%ir-block.0):186 call void asm sideeffect "; use $0", "{v[0:1]}"(ptr addrspace(3) %arg)187 ret void188}189