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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr="+wavefrontsize64",+real-true16 -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s3# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr="+wavefrontsize64",-real-true16 -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s4 5---6name: fcmp_false_f167legalized: true8regBankSelected: true9tracksRegLiveness: true10 11body: |12 bb.0:13 liveins: $vgpr0, $vgpr114 ; GFX11-TRUE16-LABEL: name: fcmp_false_f1615 ; GFX11-TRUE16: liveins: $vgpr0, $vgpr116 ; GFX11-TRUE16-NEXT: {{ $}}17 ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr018 ; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr119 ; GFX11-TRUE16-NEXT: [[V_CVT_F16_F32_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec20 ; GFX11-TRUE16-NEXT: [[V_CVT_F16_F32_t16_e64_1:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec21 ; GFX11-TRUE16-NEXT: [[V_CMP_F_F16_t16_e64_:%[0-9]+]]:sreg_64 = V_CMP_F_F16_t16_e64 0, [[V_CVT_F16_F32_t16_e64_]], 0, [[V_CVT_F16_F32_t16_e64_1]], 0, 0, implicit $mode, implicit $exec22 ; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[V_CMP_F_F16_t16_e64_]]23 ;24 ; GFX11-FAKE16-LABEL: name: fcmp_false_f1625 ; GFX11-FAKE16: liveins: $vgpr0, $vgpr126 ; GFX11-FAKE16-NEXT: {{ $}}27 ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr028 ; GFX11-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr129 ; GFX11-FAKE16-NEXT: [[V_CVT_F16_F32_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_fake16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec30 ; GFX11-FAKE16-NEXT: [[V_CVT_F16_F32_fake16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_fake16_e64 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec31 ; GFX11-FAKE16-NEXT: [[V_CMP_F_F16_fake16_e64_:%[0-9]+]]:sreg_64 = V_CMP_F_F16_fake16_e64 0, [[V_CVT_F16_F32_fake16_e64_]], 0, [[V_CVT_F16_F32_fake16_e64_1]], 0, implicit $mode, implicit $exec32 ; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_CMP_F_F16_fake16_e64_]]33 %0:vgpr(s32) = COPY $vgpr034 %1:vgpr(s32) = COPY $vgpr135 %2:vgpr(s16) = G_FPTRUNC %036 %3:vgpr(s16) = G_FPTRUNC %137 %4:sgpr(s64) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.fcmp), %2, %3, 038 S_ENDPGM 0, implicit %439...40 41---42name: fcmp_true_f1643legalized: true44regBankSelected: true45tracksRegLiveness: true46 47body: |48 bb.0:49 liveins: $vgpr0, $vgpr150 ; GFX11-TRUE16-LABEL: name: fcmp_true_f1651 ; GFX11-TRUE16: liveins: $vgpr0, $vgpr152 ; GFX11-TRUE16-NEXT: {{ $}}53 ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr054 ; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr155 ; GFX11-TRUE16-NEXT: [[V_CVT_F16_F32_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec56 ; GFX11-TRUE16-NEXT: [[V_CVT_F16_F32_t16_e64_1:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec57 ; GFX11-TRUE16-NEXT: [[V_CMP_TRU_F16_t16_e64_:%[0-9]+]]:sreg_64 = V_CMP_TRU_F16_t16_e64 0, [[V_CVT_F16_F32_t16_e64_]], 0, [[V_CVT_F16_F32_t16_e64_1]], 0, 0, implicit $mode, implicit $exec58 ; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[V_CMP_TRU_F16_t16_e64_]]59 ;60 ; GFX11-FAKE16-LABEL: name: fcmp_true_f1661 ; GFX11-FAKE16: liveins: $vgpr0, $vgpr162 ; GFX11-FAKE16-NEXT: {{ $}}63 ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr064 ; GFX11-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr165 ; GFX11-FAKE16-NEXT: [[V_CVT_F16_F32_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_fake16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec66 ; GFX11-FAKE16-NEXT: [[V_CVT_F16_F32_fake16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_fake16_e64 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec67 ; GFX11-FAKE16-NEXT: [[V_CMP_TRU_F16_fake16_e64_:%[0-9]+]]:sreg_64 = V_CMP_TRU_F16_fake16_e64 0, [[V_CVT_F16_F32_fake16_e64_]], 0, [[V_CVT_F16_F32_fake16_e64_1]], 0, implicit $mode, implicit $exec68 ; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_CMP_TRU_F16_fake16_e64_]]69 %0:vgpr(s32) = COPY $vgpr070 %1:vgpr(s32) = COPY $vgpr171 %2:vgpr(s16) = G_FPTRUNC %072 %3:vgpr(s16) = G_FPTRUNC %173 %4:sgpr(s64) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.fcmp), %2, %3, 1574 S_ENDPGM 0, implicit %475...76 77---78name: fcmp_false_f3279legalized: true80regBankSelected: true81tracksRegLiveness: true82 83body: |84 bb.0:85 liveins: $vgpr0, $vgpr186 ; GFX11-LABEL: name: fcmp_false_f3287 ; GFX11: liveins: $vgpr0, $vgpr188 ; GFX11-NEXT: {{ $}}89 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr090 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr191 ; GFX11-NEXT: [[V_CMP_F_F32_e64_:%[0-9]+]]:sreg_64 = V_CMP_F_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $mode, implicit $exec92 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_F_F32_e64_]]93 %0:vgpr(s32) = COPY $vgpr094 %1:vgpr(s32) = COPY $vgpr195 %4:sgpr(s64) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.fcmp), %0, %1, 096 S_ENDPGM 0, implicit %497...98 99---100name: fcmp_true_f32101legalized: true102regBankSelected: true103tracksRegLiveness: true104 105body: |106 bb.0:107 liveins: $vgpr0, $vgpr1108 ; GFX11-LABEL: name: fcmp_true_f32109 ; GFX11: liveins: $vgpr0, $vgpr1110 ; GFX11-NEXT: {{ $}}111 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0112 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1113 ; GFX11-NEXT: [[V_CMP_TRU_F32_e64_:%[0-9]+]]:sreg_64 = V_CMP_TRU_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, implicit $mode, implicit $exec114 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_TRU_F32_e64_]]115 %0:vgpr(s32) = COPY $vgpr0116 %1:vgpr(s32) = COPY $vgpr1117 %4:sgpr(s64) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.fcmp), %0, %1, 15118 S_ENDPGM 0, implicit %4119...120 121---122name: fcmp_false_f64123legalized: true124regBankSelected: true125tracksRegLiveness: true126 127body: |128 bb.0:129 liveins: $vgpr0, $vgpr1130 ; GFX11-LABEL: name: fcmp_false_f64131 ; GFX11: liveins: $vgpr0, $vgpr1132 ; GFX11-NEXT: {{ $}}133 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0134 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1135 ; GFX11-NEXT: [[V_CVT_F64_F32_e64_:%[0-9]+]]:vreg_64 = nofpexcept V_CVT_F64_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec136 ; GFX11-NEXT: [[V_CVT_F64_F32_e64_1:%[0-9]+]]:vreg_64 = nofpexcept V_CVT_F64_F32_e64 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec137 ; GFX11-NEXT: [[V_CMP_F_F64_e64_:%[0-9]+]]:sreg_64 = V_CMP_F_F64_e64 0, [[V_CVT_F64_F32_e64_]], 0, [[V_CVT_F64_F32_e64_1]], 0, implicit $mode, implicit $exec138 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_F_F64_e64_]]139 %0:vgpr(s32) = COPY $vgpr0140 %1:vgpr(s32) = COPY $vgpr1141 %2:vgpr(s64) = G_FPEXT %0142 %3:vgpr(s64) = G_FPEXT %1143 %4:sgpr(s64) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.fcmp), %2, %3, 0144 S_ENDPGM 0, implicit %4145...146 147---148name: fcmp_true_f64149legalized: true150regBankSelected: true151tracksRegLiveness: true152 153body: |154 bb.0:155 liveins: $vgpr0, $vgpr1156 ; GFX11-LABEL: name: fcmp_true_f64157 ; GFX11: liveins: $vgpr0, $vgpr1158 ; GFX11-NEXT: {{ $}}159 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0160 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1161 ; GFX11-NEXT: [[V_CVT_F64_F32_e64_:%[0-9]+]]:vreg_64 = nofpexcept V_CVT_F64_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec162 ; GFX11-NEXT: [[V_CVT_F64_F32_e64_1:%[0-9]+]]:vreg_64 = nofpexcept V_CVT_F64_F32_e64 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec163 ; GFX11-NEXT: [[V_CMP_TRU_F64_e64_:%[0-9]+]]:sreg_64 = V_CMP_TRU_F64_e64 0, [[V_CVT_F64_F32_e64_]], 0, [[V_CVT_F64_F32_e64_1]], 0, implicit $mode, implicit $exec164 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_TRU_F64_e64_]]165 %0:vgpr(s32) = COPY $vgpr0166 %1:vgpr(s32) = COPY $vgpr1167 %2:vgpr(s64) = G_FPEXT %0168 %3:vgpr(s64) = G_FPEXT %1169 %4:sgpr(s64) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.fcmp), %2, %3, 15170 S_ENDPGM 0, implicit %4171...172