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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s3 4# FIXME: Need to deal with constant bus restriction5# ---6# name: mbcnt_lo_ss7# legalized: true8# regBankSelected: true9 10# body: |11# bb.0:12# liveins: $sgpr0, $sgpr113# %0:sgpr(s32) = COPY $sgpr014# %1:sgpr(s32) = COPY $sgpr115# %2:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.mbcnt.lo), %0, %116# S_ENDPGM 0, implicit %217# ...18 19---20name: mbcnt_lo_sv21legalized: true22regBankSelected: true23 24body: |25 bb.0:26 liveins: $sgpr0, $vgpr027 ; GCN-LABEL: name: mbcnt_lo_sv28 ; GCN: liveins: $sgpr0, $vgpr029 ; GCN-NEXT: {{ $}}30 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr031 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr032 ; GCN-NEXT: [[V_MBCNT_LO_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec33 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MBCNT_LO_U32_B32_e64_]]34 %0:sgpr(s32) = COPY $sgpr035 %1:vgpr(s32) = COPY $vgpr036 %2:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.mbcnt.lo), %0, %137 S_ENDPGM 0, implicit %238...39 40---41name: smin_s32_vs42legalized: true43regBankSelected: true44 45body: |46 bb.0:47 liveins: $sgpr0, $vgpr048 ; GCN-LABEL: name: smin_s32_vs49 ; GCN: liveins: $sgpr0, $vgpr050 ; GCN-NEXT: {{ $}}51 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr052 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr053 ; GCN-NEXT: [[V_MBCNT_LO_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec54 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MBCNT_LO_U32_B32_e64_]]55 %0:vgpr(s32) = COPY $vgpr056 %1:sgpr(s32) = COPY $sgpr057 %2:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.mbcnt.lo), %0, %158 S_ENDPGM 0, implicit %259...60 61---62name: smin_s32_vv63legalized: true64regBankSelected: true65 66body: |67 bb.0:68 liveins: $vgpr0, $vgpr169 ; GCN-LABEL: name: smin_s32_vv70 ; GCN: liveins: $vgpr0, $vgpr171 ; GCN-NEXT: {{ $}}72 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr073 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr174 ; GCN-NEXT: [[V_MBCNT_LO_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec75 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MBCNT_LO_U32_B32_e64_]]76 %0:vgpr(s32) = COPY $vgpr077 %1:vgpr(s32) = COPY $vgpr178 %2:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.mbcnt.lo), %0, %179 S_ENDPGM 0, implicit %280...81