66 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - 2> %t | FileCheck -check-prefix=GCN %s3# RUN: FileCheck -check-prefix=ERR %s < %t4 5# ERR: remark: <unknown>:0:0: cannot select: %1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %0:sgpr(s32) (in function: readfirstlane_s)6 7---8name: readfirstlane_v9legalized: true10regBankSelected: true11tracksRegLiveness: true12 13body: |14 bb.0:15 liveins: $vgpr016 ; GCN-LABEL: name: readfirstlane_v17 ; GCN: liveins: $vgpr018 ; GCN-NEXT: {{ $}}19 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr020 ; GCN-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec21 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_READFIRSTLANE_B32_]]22 %0:vgpr(s32) = COPY $vgpr023 %1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %024 S_ENDPGM 0, implicit %125...26 27---28name: readfirstlane_v_imm29legalized: true30regBankSelected: true31tracksRegLiveness: true32 33body: |34 bb.0:35 36 ; GCN-LABEL: name: readfirstlane_v_imm37 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 123, implicit $exec38 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY [[V_MOV_B32_e32_]]39 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 [[COPY]]40 ; GCN-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]41 %0:vgpr(s32) = G_CONSTANT i32 12342 %1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %043 S_ENDPGM 0, implicit %144...45 46# Make sure this fails to select47---48name: readfirstlane_s49legalized: true50regBankSelected: true51tracksRegLiveness: true52 53body: |54 bb.0:55 liveins: $sgpr056 ; GCN-LABEL: name: readfirstlane_s57 ; GCN: liveins: $sgpr058 ; GCN-NEXT: {{ $}}59 ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr060 ; GCN-NEXT: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY]](s32)61 ; GCN-NEXT: S_ENDPGM 0, implicit [[INT]](s32)62 %0:sgpr(s32) = COPY $sgpr063 %1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %064 S_ENDPGM 0, implicit %165...66