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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s4# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -filetype=null 2>&1 | FileCheck -check-prefix=VI-ERR %s5# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -filetype=null 2>&1 | FileCheck -check-prefix=VI-ERR %s6 7# VI-ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.rsq.clamp), %0:sgpr(s32) (in function: rsq_clamp_s32_vs)8# VI-ERR-NEXT: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.rsq.clamp), %0:vgpr(s32) (in function: rsq_clamp_s32_vv)9 10---11name: rsq_clamp_s32_vs12legalized: true13regBankSelected: true14tracksRegLiveness: true15 16body: |17 bb.0:18 liveins: $sgpr019 20 ; CHECK-LABEL: name: rsq_clamp_s32_vs21 ; CHECK: liveins: $sgpr022 ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr023 ; CHECK: %1:vgpr_32 = nofpexcept V_RSQ_CLAMP_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec24 ; CHECK: S_ENDPGM 0, implicit %125 %0:sgpr(s32) = COPY $sgpr026 %1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.rsq.clamp), %027 S_ENDPGM 0, implicit %128...29 30---31name: rsq_clamp_s32_vv32legalized: true33regBankSelected: true34tracksRegLiveness: true35 36body: |37 bb.0:38 liveins: $vgpr039 40 ; CHECK-LABEL: name: rsq_clamp_s32_vv41 ; CHECK: liveins: $vgpr042 ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr043 ; CHECK: %1:vgpr_32 = nofpexcept V_RSQ_CLAMP_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec44 ; CHECK: S_ENDPGM 0, implicit %145 %0:vgpr(s32) = COPY $vgpr046 %1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.rsq.clamp), %047 S_ENDPGM 0, implicit %148...49