72 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3 4---5 6name: ffbl_b32_s32_s_s7legalized: true8regBankSelected: true9tracksRegLiveness: true10 11body: |12 bb.0:13 liveins: $sgpr014 15 ; CHECK-LABEL: name: ffbl_b32_s32_s_s16 ; CHECK: liveins: $sgpr017 ; CHECK-NEXT: {{ $}}18 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr019 ; CHECK-NEXT: [[S_FF1_I32_B32_:%[0-9]+]]:sreg_32 = S_FF1_I32_B32 [[COPY]]20 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_FF1_I32_B32_]]21 %0:sgpr(s32) = COPY $sgpr022 %1:sgpr(s32) = G_AMDGPU_FFBL_B32 %023 S_ENDPGM 0, implicit %124 25...26 27---28 29name: ffbl_b32_s32_v_v30legalized: true31regBankSelected: true32tracksRegLiveness: true33 34body: |35 bb.0:36 liveins: $vgpr037 38 ; CHECK-LABEL: name: ffbl_b32_s32_v_v39 ; CHECK: liveins: $vgpr040 ; CHECK-NEXT: {{ $}}41 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr042 ; CHECK-NEXT: [[V_FFBL_B32_e64_:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e64 [[COPY]], implicit $exec43 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_FFBL_B32_e64_]]44 %0:vgpr(s32) = COPY $vgpr045 %1:vgpr(s32) = G_AMDGPU_FFBL_B32 %046 S_ENDPGM 0, implicit %147 48...49 50---51 52name: ffbl_b32_v_s53legalized: true54regBankSelected: true55tracksRegLiveness: true56 57body: |58 bb.0:59 liveins: $sgpr060 61 ; CHECK-LABEL: name: ffbl_b32_v_s62 ; CHECK: liveins: $sgpr063 ; CHECK-NEXT: {{ $}}64 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr065 ; CHECK-NEXT: [[V_FFBL_B32_e64_:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e64 [[COPY]], implicit $exec66 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_FFBL_B32_e64_]]67 %0:sgpr(s32) = COPY $sgpr068 %1:vgpr(s32) = G_AMDGPU_FFBL_B32 %069 S_ENDPGM 0, implicit %170 71...72