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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2> %t | FileCheck -check-prefixes=GCN %s3# RUN: FileCheck -check-prefix=ERR %s < %t4 5# ERR-NOT: remark:6# ERR: remark: <unknown>:0:0: cannot select: G_BRCOND %1:sgpr(s1), %bb.1 (in function: brcond_sgpr)7# ERR-NEXT: remark: <unknown>:0:0: cannot select: G_BRCOND %1:vgpr(s1), %bb.1 (in function: brcond_vgpr)8# ERR-NOT: remark:9 10---11 12name: brcond_scc13legalized: true14regBankSelected: true15 16body: |17 ; GCN-LABEL: name: brcond_scc18 ; GCN: bb.0:19 ; GCN-NEXT: successors: %bb.1(0x80000000)20 ; GCN-NEXT: liveins: $sgpr0, $sgpr121 ; GCN-NEXT: {{ $}}22 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr023 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr124 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc25 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc26 ; GCN-NEXT: $scc = COPY [[COPY2]]27 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc28 ; GCN-NEXT: {{ $}}29 ; GCN-NEXT: bb.1:30 bb.0:31 liveins: $sgpr0, $sgpr132 33 %0:sgpr(s32) = COPY $sgpr034 %1:sgpr(s32) = COPY $sgpr135 %2:sgpr(s32) = G_ICMP intpred(eq), %0, %136 G_BRCOND %2, %bb.137 38 bb.1:39 40...41 42---43 44name: brcond_scc_impdef45legalized: true46regBankSelected: true47 48body: |49 ; GCN-LABEL: name: brcond_scc_impdef50 ; GCN: bb.0:51 ; GCN-NEXT: successors: %bb.1(0x80000000)52 ; GCN-NEXT: liveins: $sgpr0, $sgpr153 ; GCN-NEXT: {{ $}}54 ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF55 ; GCN-NEXT: $scc = COPY [[DEF]]56 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc57 ; GCN-NEXT: {{ $}}58 ; GCN-NEXT: bb.1:59 bb.0:60 liveins: $sgpr0, $sgpr161 62 %0:sgpr(s32) = G_IMPLICIT_DEF63 G_BRCOND %0, %bb.164 65 bb.1:66 67...68 69---70 71name: brcond_scc_br72legalized: true73regBankSelected: true74 75body: |76 ; GCN-LABEL: name: brcond_scc_br77 ; GCN: bb.0:78 ; GCN-NEXT: successors: %bb.1(0x80000000)79 ; GCN-NEXT: liveins: $sgpr0, $sgpr180 ; GCN-NEXT: {{ $}}81 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr082 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr183 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc84 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc85 ; GCN-NEXT: $scc = COPY [[COPY2]]86 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc87 ; GCN-NEXT: S_BRANCH %bb.188 ; GCN-NEXT: {{ $}}89 ; GCN-NEXT: bb.1:90 ; GCN-NEXT: successors: %bb.2(0x80000000)91 ; GCN-NEXT: {{ $}}92 ; GCN-NEXT: bb.2:93 bb.0:94 liveins: $sgpr0, $sgpr195 96 %0:sgpr(s32) = COPY $sgpr097 %1:sgpr(s32) = COPY $sgpr198 %2:sgpr(s32) = G_ICMP intpred(eq), %0, %199 G_BRCOND %2, %bb.1100 G_BR %bb.1101 102 bb.1:103 104 bb.2:105 106...107 108---109 110name: brcond_vcc111legalized: true112regBankSelected: true113 114body: |115 ; GCN-LABEL: name: brcond_vcc116 ; GCN: bb.0:117 ; GCN-NEXT: successors: %bb.1(0x80000000)118 ; GCN-NEXT: liveins: $vgpr0, $vgpr1119 ; GCN-NEXT: {{ $}}120 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0121 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1122 ; GCN-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec123 ; GCN-NEXT: $vcc = COPY [[V_CMP_EQ_U32_e64_]]124 ; GCN-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc125 ; GCN-NEXT: {{ $}}126 ; GCN-NEXT: bb.1:127 bb.0:128 liveins: $vgpr0, $vgpr1129 130 %0:vgpr(s32) = COPY $vgpr0131 %1:vgpr(s32) = COPY $vgpr1132 %2:vcc(s1) = G_ICMP intpred(eq), %0, %1133 G_BRCOND %2, %bb.1134 135 bb.1:136 137...138 139# Don't try to select this.140---141 142name: brcond_sgpr143legalized: true144regBankSelected: true145 146body: |147 ; GCN-LABEL: name: brcond_sgpr148 ; GCN: bb.0:149 ; GCN-NEXT: successors: %bb.1(0x80000000)150 ; GCN-NEXT: liveins: $sgpr0, $sgpr1151 ; GCN-NEXT: {{ $}}152 ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0153 ; GCN-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s1) = G_TRUNC [[COPY]](s32)154 ; GCN-NEXT: G_BRCOND [[TRUNC]](s1), %bb.1155 ; GCN-NEXT: {{ $}}156 ; GCN-NEXT: bb.1:157 bb.0:158 liveins: $sgpr0, $sgpr1159 160 %0:sgpr(s32) = COPY $sgpr0161 %1:sgpr(s1) = G_TRUNC %0162 G_BRCOND %1, %bb.1163 164 bb.1:165 166...167 168# Don't try to select this.169---170 171name: brcond_vgpr172legalized: true173regBankSelected: true174 175body: |176 ; GCN-LABEL: name: brcond_vgpr177 ; GCN: bb.0:178 ; GCN-NEXT: successors: %bb.1(0x80000000)179 ; GCN-NEXT: liveins: $vgpr0, $vgpr1180 ; GCN-NEXT: {{ $}}181 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0182 ; GCN-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY]](s32)183 ; GCN-NEXT: G_BRCOND [[TRUNC]](s1), %bb.1184 ; GCN-NEXT: {{ $}}185 ; GCN-NEXT: bb.1:186 bb.0:187 liveins: $vgpr0, $vgpr1188 189 %0:vgpr(s32) = COPY $vgpr0190 %1:vgpr(s1) = G_TRUNC %0191 G_BRCOND %1, %bb.1192 193 bb.1:194 195...196 197---198 199name: brcond_class_intrinsic200legalized: true201regBankSelected: true202 203body: |204 ; GCN-LABEL: name: brcond_class_intrinsic205 ; GCN: bb.0:206 ; GCN-NEXT: successors: %bb.1(0x80000000)207 ; GCN-NEXT: liveins: $vgpr0, $vgpr1208 ; GCN-NEXT: {{ $}}209 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0210 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1211 ; GCN-NEXT: [[V_CMP_CLASS_F32_e64_:%[0-9]+]]:sreg_64 = V_CMP_CLASS_F32_e64 0, [[COPY]], [[COPY1]], implicit $exec212 ; GCN-NEXT: $vcc = COPY [[V_CMP_CLASS_F32_e64_]]213 ; GCN-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc214 ; GCN-NEXT: {{ $}}215 ; GCN-NEXT: bb.1:216 bb.0:217 liveins: $vgpr0, $vgpr1218 219 %0:vgpr(s32) = COPY $vgpr0220 %1:vgpr(s32) = COPY $vgpr1221 %2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0:vgpr(s32), %1:vgpr(s32)222 G_BRCOND %2(s1), %bb.1223 224 bb.1:225 226...227 228---229 230name: brcond_cmp_logic231legalized: true232regBankSelected: true233 234body: |235 ; GCN-LABEL: name: brcond_cmp_logic236 ; GCN: bb.0:237 ; GCN-NEXT: successors: %bb.1(0x80000000)238 ; GCN-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3239 ; GCN-NEXT: {{ $}}240 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0241 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1242 ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2243 ; GCN-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3244 ; GCN-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec245 ; GCN-NEXT: [[V_CMP_EQ_F32_e64_:%[0-9]+]]:sreg_64_xexec = nofpexcept V_CMP_EQ_F32_e64 0, [[COPY2]], 0, [[COPY3]], 0, implicit $mode, implicit $exec246 ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[V_CMP_EQ_U32_e64_]], [[V_CMP_EQ_F32_e64_]], implicit-def dead $scc247 ; GCN-NEXT: $vcc = COPY [[S_AND_B64_]]248 ; GCN-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc249 ; GCN-NEXT: {{ $}}250 ; GCN-NEXT: bb.1:251 bb.0:252 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3253 254 %0:vgpr(s32) = COPY $vgpr0255 %1:vgpr(s32) = COPY $vgpr1256 %2:vgpr(s32) = COPY $vgpr2257 %3:vgpr(s32) = COPY $vgpr3258 %4:vcc(s1) = G_ICMP intpred(eq), %0, %1259 %5:vcc(s1) = G_FCMP floatpred(oeq), %2, %3260 %6:vcc(s1) = G_AND %4, %5261 G_BRCOND %6(s1), %bb.1262 263 bb.1:264 265...266 267---268 269name: brcond_logic270legalized: true271regBankSelected: true272 273body: |274 ; GCN-LABEL: name: brcond_logic275 ; GCN: bb.0:276 ; GCN-NEXT: successors: %bb.1(0x80000000)277 ; GCN-NEXT: liveins: $sgpr0, $vgpr0, $vgpr1278 ; GCN-NEXT: {{ $}}279 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0280 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1281 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr0282 ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY2]], implicit-def dead $scc283 ; GCN-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec284 ; GCN-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec285 ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_B64 [[V_CMP_EQ_U32_e64_]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc286 ; GCN-NEXT: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[S_AND_B64_]], $exec, implicit-def dead $scc287 ; GCN-NEXT: $vcc = COPY [[S_AND_B64_1]]288 ; GCN-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc289 ; GCN-NEXT: {{ $}}290 ; GCN-NEXT: bb.1:291 bb.0:292 liveins: $sgpr0, $vgpr0, $vgpr1293 294 %0:vgpr(s32) = COPY $vgpr0295 %1:vgpr(s32) = COPY $vgpr1296 %2:sgpr(s32) = COPY $sgpr0297 %3:sgpr(s1) = G_TRUNC %2(s32)298 %4:vcc(s1) = COPY %3(s1)299 %5:vcc(s1) = G_ICMP intpred(eq), %0, %1300 %6:vcc(s1) = G_AND %5, %4301 G_BRCOND %6(s1), %bb.1302 303 bb.1:304 305...306 307---308 309name: brcond_logic_const310legalized: true311regBankSelected: true312 313body: |314 ; GCN-LABEL: name: brcond_logic_const315 ; GCN: bb.0:316 ; GCN-NEXT: successors: %bb.1(0x80000000)317 ; GCN-NEXT: liveins: $vgpr0, $vgpr1318 ; GCN-NEXT: {{ $}}319 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0320 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1321 ; GCN-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec322 ; GCN-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 -1323 ; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[V_CMP_EQ_U32_e64_]], [[S_MOV_B64_]], implicit-def dead $scc324 ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[S_XOR_B64_]], $exec, implicit-def dead $scc325 ; GCN-NEXT: $vcc = COPY [[S_AND_B64_]]326 ; GCN-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc327 ; GCN-NEXT: {{ $}}328 ; GCN-NEXT: bb.1:329 bb.0:330 liveins: $vgpr0, $vgpr1331 332 %0:vgpr(s32) = COPY $vgpr0333 %1:vgpr(s32) = COPY $vgpr1334 %2:vcc(s1) = G_ICMP intpred(eq), %0, %1335 %3:sgpr(s1) = G_CONSTANT i1 true336 %4:vcc(s1) = COPY %3(s1)337 %5:vcc(s1) = G_XOR %2, %4338 G_BRCOND %5(s1), %bb.1339 340 bb.1:341 342...343