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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GFX9PLUS,GFX9 %s3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GFX9PLUS,GFX11 %s4 5---6name: test_build_vector_trunc_s_v2s16_s_s32_s_s327legalized: true8regBankSelected: true9tracksRegLiveness: true10 11body: |12 bb.0:13 liveins: $sgpr0, $sgpr114 15 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_s32_s_s3216 ; GFX9PLUS: liveins: $sgpr0, $sgpr117 ; GFX9PLUS-NEXT: {{ $}}18 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr019 ; GFX9PLUS-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr120 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[COPY1]]21 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]22 %0:sgpr(s32) = COPY $sgpr023 %1:sgpr(s32) = COPY $sgpr124 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %125 S_ENDPGM 0, implicit %226...27 28---29name: test_build_vector_trunc_s_pack_lh30legalized: true31regBankSelected: true32tracksRegLiveness: true33 34body: |35 bb.0:36 liveins: $sgpr0, $sgpr137 38 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_pack_lh39 ; GFX9PLUS: liveins: $sgpr0, $sgpr140 ; GFX9PLUS-NEXT: {{ $}}41 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr042 ; GFX9PLUS-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr143 ; GFX9PLUS-NEXT: [[S_PACK_LH_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LH_B32_B16 [[COPY]], [[COPY1]]44 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LH_B32_B16_]]45 %0:sgpr(s32) = COPY $sgpr046 %1:sgpr(s32) = COPY $sgpr147 %2:sgpr(s32) = G_CONSTANT i32 1648 %3:sgpr(s32) = G_LSHR %1, %249 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %350 S_ENDPGM 0, implicit %451...52 53# s_pack_hl_b32 was introduced in GFX1154---55name: test_build_vector_trunc_s_pack_hl56legalized: true57regBankSelected: true58tracksRegLiveness: true59 60body: |61 bb.0:62 liveins: $sgpr0, $sgpr163 64 ; GFX9-LABEL: name: test_build_vector_trunc_s_pack_hl65 ; GFX9: liveins: $sgpr0, $sgpr166 ; GFX9-NEXT: {{ $}}67 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr068 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr169 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1670 ; GFX9-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc71 ; GFX9-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[S_LSHR_B32_]], [[COPY]]72 ; GFX9-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]73 ;74 ; GFX11-LABEL: name: test_build_vector_trunc_s_pack_hl75 ; GFX11: liveins: $sgpr0, $sgpr176 ; GFX11-NEXT: {{ $}}77 ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr078 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr179 ; GFX11-NEXT: [[S_PACK_HL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_HL_B32_B16 [[COPY1]], [[COPY]]80 ; GFX11-NEXT: S_ENDPGM 0, implicit [[S_PACK_HL_B32_B16_]]81 %0:sgpr(s32) = COPY $sgpr082 %1:sgpr(s32) = COPY $sgpr183 %2:sgpr(s32) = G_CONSTANT i32 1684 %3:sgpr(s32) = G_LSHR %1, %285 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %3, %086 S_ENDPGM 0, implicit %487...88 89---90name: test_build_vector_trunc_s_pack_hh91legalized: true92regBankSelected: true93tracksRegLiveness: true94 95body: |96 bb.0:97 liveins: $sgpr0, $sgpr198 99 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_pack_hh100 ; GFX9PLUS: liveins: $sgpr0, $sgpr1101 ; GFX9PLUS-NEXT: {{ $}}102 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0103 ; GFX9PLUS-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1104 ; GFX9PLUS-NEXT: [[S_PACK_HH_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_HH_B32_B16 [[COPY]], [[COPY1]]105 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_HH_B32_B16_]]106 %0:sgpr(s32) = COPY $sgpr0107 %1:sgpr(s32) = COPY $sgpr1108 %2:sgpr(s32) = G_CONSTANT i32 16109 %3:sgpr(s32) = G_LSHR %0, %2110 %4:sgpr(s32) = G_LSHR %1, %2111 %5:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %3, %4112 S_ENDPGM 0, implicit %5113...114 115# TODO: Should this use an and instead?116---117name: test_build_vector_trunc_s_v2s16_s_s32_s_0_s32118legalized: true119regBankSelected: true120tracksRegLiveness: true121 122body: |123 bb.0:124 liveins: $sgpr0125 126 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_s32_s_0_s32127 ; GFX9PLUS: liveins: $sgpr0128 ; GFX9PLUS-NEXT: {{ $}}129 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0130 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0131 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[S_MOV_B32_]]132 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]133 %0:sgpr(s32) = COPY $sgpr0134 %1:sgpr(s32) = G_CONSTANT i32 0135 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1136 S_ENDPGM 0, implicit %2137...138 139---140name: test_build_vector_trunc_s_v2s16_s_0_s32_s_s32141legalized: true142regBankSelected: true143tracksRegLiveness: true144 145body: |146 bb.0:147 liveins: $sgpr0148 149 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_0_s32_s_s32150 ; GFX9PLUS: liveins: $sgpr0151 ; GFX9PLUS-NEXT: {{ $}}152 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0153 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0154 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[S_MOV_B32_]], [[COPY]]155 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]156 %0:sgpr(s32) = COPY $sgpr0157 %1:sgpr(s32) = G_CONSTANT i32 0158 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %1, %0159 S_ENDPGM 0, implicit %2160...161 162---163name: test_build_vector_trunc_s_v2s16_s_s32_s_undef_s32164legalized: true165regBankSelected: true166tracksRegLiveness: true167 168body: |169 bb.0:170 liveins: $sgpr0171 172 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_s32_s_undef_s32173 ; GFX9PLUS: liveins: $sgpr0174 ; GFX9PLUS-NEXT: {{ $}}175 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0176 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[COPY]]177 %0:sgpr(s32) = COPY $sgpr0178 %1:sgpr(s32) = G_IMPLICIT_DEF179 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1180 S_ENDPGM 0, implicit %2181...182 183---184name: test_build_vector_trunc_s_v2s16_s_undef_s32_s_s32185legalized: true186regBankSelected: true187tracksRegLiveness: true188 189body: |190 bb.0:191 liveins: $sgpr0192 193 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_undef_s32_s_s32194 ; GFX9PLUS: liveins: $sgpr0195 ; GFX9PLUS-NEXT: {{ $}}196 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0197 ; GFX9PLUS-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF198 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[DEF]], [[COPY]]199 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]200 %0:sgpr(s32) = COPY $sgpr0201 %1:sgpr(s32) = G_IMPLICIT_DEF202 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %1, %0203 S_ENDPGM 0, implicit %2204...205 206---207name: test_build_vector_trunc_s_v2s16_s_undef_s_s32208legalized: true209regBankSelected: true210tracksRegLiveness: true211 212body: |213 bb.0:214 liveins: $sgpr1215 216 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_undef_s_s32217 ; GFX9PLUS: liveins: $sgpr1218 ; GFX9PLUS-NEXT: {{ $}}219 ; GFX9PLUS-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF220 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr1221 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[DEF]], [[COPY]]222 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]223 %0:sgpr(s32) = G_IMPLICIT_DEF224 %1:sgpr(s32) = COPY $sgpr1225 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1226 S_ENDPGM 0, implicit %2227...228 229---230name: test_build_vector_trunc_s_v2s16_s_s32_undef231legalized: true232regBankSelected: true233tracksRegLiveness: true234 235body: |236 bb.0:237 liveins: $sgpr0238 239 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_s32_undef240 ; GFX9PLUS: liveins: $sgpr0241 ; GFX9PLUS-NEXT: {{ $}}242 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0243 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[COPY]]244 %0:sgpr(s32) = COPY $sgpr0245 %1:sgpr(s32) = G_IMPLICIT_DEF246 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1247 S_ENDPGM 0, implicit %2248...249 250---251name: test_build_vector_trunc_s_v2s16_s_zero_s_s32252legalized: true253regBankSelected: true254tracksRegLiveness: true255 256body: |257 bb.0:258 liveins: $sgpr1259 260 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_zero_s_s32261 ; GFX9PLUS: liveins: $sgpr1262 ; GFX9PLUS-NEXT: {{ $}}263 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0264 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr1265 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[S_MOV_B32_]], [[COPY]]266 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]267 %0:sgpr(s32) = G_CONSTANT i32 0268 %1:sgpr(s32) = COPY $sgpr1269 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1270 S_ENDPGM 0, implicit %2271...272 273---274name: test_build_vector_trunc_s_v2s16_s_s32_zero275legalized: true276regBankSelected: true277tracksRegLiveness: true278 279body: |280 bb.0:281 liveins: $sgpr0282 283 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_s_s32_zero284 ; GFX9PLUS: liveins: $sgpr0285 ; GFX9PLUS-NEXT: {{ $}}286 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0287 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0288 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[S_MOV_B32_]]289 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]290 %0:sgpr(s32) = COPY $sgpr0291 %1:sgpr(s32) = G_CONSTANT i32 0292 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1293 S_ENDPGM 0, implicit %2294...295 296---297name: test_build_vector_trunc_lshr16_zero298legalized: true299regBankSelected: true300tracksRegLiveness: true301 302body: |303 bb.0:304 liveins: $sgpr0305 306 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_lshr16_zero307 ; GFX9PLUS: liveins: $sgpr0308 ; GFX9PLUS-NEXT: {{ $}}309 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0310 ; GFX9PLUS-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 16, implicit-def dead $scc311 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_LSHR_B32_]]312 %0:sgpr(s32) = G_CONSTANT i32 0313 %1:sgpr(s32) = COPY $sgpr0314 %2:sgpr(s32) = G_CONSTANT i32 16315 %3:sgpr(s32) = G_LSHR %1, %2316 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %3, %0317 S_ENDPGM 0, implicit %4318...319 320# Don't use pack since it would duplicate the shift use321---322name: test_build_vector_trunc_s_pack_lh_multi_use323legalized: true324regBankSelected: true325tracksRegLiveness: true326 327body: |328 bb.0:329 liveins: $sgpr0, $sgpr1330 331 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_pack_lh_multi_use332 ; GFX9PLUS: liveins: $sgpr0, $sgpr1333 ; GFX9PLUS-NEXT: {{ $}}334 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0335 ; GFX9PLUS-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1336 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 16337 ; GFX9PLUS-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc338 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[S_LSHR_B32_]]339 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]], implicit [[S_LSHR_B32_]]340 %0:sgpr(s32) = COPY $sgpr0341 %1:sgpr(s32) = COPY $sgpr1342 %2:sgpr(s32) = G_CONSTANT i32 16343 %3:sgpr(s32) = G_LSHR %1, %2344 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %3345 S_ENDPGM 0, implicit %4, implicit %3346...347 348---349name: test_build_vector_trunc_s_pack_hh_multi_use_lhs350legalized: true351regBankSelected: true352tracksRegLiveness: true353 354body: |355 bb.0:356 liveins: $sgpr0, $sgpr1357 358 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_pack_hh_multi_use_lhs359 ; GFX9PLUS: liveins: $sgpr0, $sgpr1360 ; GFX9PLUS-NEXT: {{ $}}361 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0362 ; GFX9PLUS-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1363 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 16364 ; GFX9PLUS-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc365 ; GFX9PLUS-NEXT: [[S_PACK_LH_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LH_B32_B16 [[S_LSHR_B32_]], [[COPY1]]366 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LH_B32_B16_]], implicit [[S_LSHR_B32_]]367 %0:sgpr(s32) = COPY $sgpr0368 %1:sgpr(s32) = COPY $sgpr1369 %2:sgpr(s32) = G_CONSTANT i32 16370 %3:sgpr(s32) = G_LSHR %0, %2371 %4:sgpr(s32) = G_LSHR %1, %2372 %5:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %3, %4373 S_ENDPGM 0, implicit %5, implicit %3374...375 376---377name: test_build_vector_trunc_s_pack_hh_multi_use_rhs378legalized: true379regBankSelected: true380tracksRegLiveness: true381 382body: |383 bb.0:384 liveins: $sgpr0, $sgpr1385 386 ; GFX9-LABEL: name: test_build_vector_trunc_s_pack_hh_multi_use_rhs387 ; GFX9: liveins: $sgpr0, $sgpr1388 ; GFX9-NEXT: {{ $}}389 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0390 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1391 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 16392 ; GFX9-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc393 ; GFX9-NEXT: [[S_LSHR_B32_1:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc394 ; GFX9-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[S_LSHR_B32_]], [[S_LSHR_B32_1]]395 ; GFX9-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]], implicit [[S_LSHR_B32_1]]396 ;397 ; GFX11-LABEL: name: test_build_vector_trunc_s_pack_hh_multi_use_rhs398 ; GFX11: liveins: $sgpr0, $sgpr1399 ; GFX11-NEXT: {{ $}}400 ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0401 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1402 ; GFX11-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 16403 ; GFX11-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc404 ; GFX11-NEXT: [[S_PACK_HL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_HL_B32_B16 [[COPY]], [[S_LSHR_B32_]]405 ; GFX11-NEXT: S_ENDPGM 0, implicit [[S_PACK_HL_B32_B16_]], implicit [[S_LSHR_B32_]]406 %0:sgpr(s32) = COPY $sgpr0407 %1:sgpr(s32) = COPY $sgpr1408 %2:sgpr(s32) = G_CONSTANT i32 16409 %3:sgpr(s32) = G_LSHR %0, %2410 %4:sgpr(s32) = G_LSHR %1, %2411 %5:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %3, %4412 S_ENDPGM 0, implicit %5, implicit %4413...414 415---416name: test_build_vector_trunc_s_pack_lh_wrong_shift_amt417legalized: true418regBankSelected: true419tracksRegLiveness: true420 421body: |422 bb.0:423 liveins: $sgpr0, $sgpr1424 425 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_pack_lh_wrong_shift_amt426 ; GFX9PLUS: liveins: $sgpr0, $sgpr1427 ; GFX9PLUS-NEXT: {{ $}}428 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0429 ; GFX9PLUS-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1430 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 15431 ; GFX9PLUS-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc432 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[S_LSHR_B32_]]433 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]434 %0:sgpr(s32) = COPY $sgpr0435 %1:sgpr(s32) = COPY $sgpr1436 %2:sgpr(s32) = G_CONSTANT i32 15437 %3:sgpr(s32) = G_LSHR %1, %2438 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %3439 S_ENDPGM 0, implicit %4440...441 442---443name: test_build_vector_trunc_s_pack_hh_wrong_shift_amt444legalized: true445regBankSelected: true446tracksRegLiveness: true447 448body: |449 bb.0:450 liveins: $sgpr0, $sgpr1451 452 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_pack_hh_wrong_shift_amt453 ; GFX9PLUS: liveins: $sgpr0, $sgpr1454 ; GFX9PLUS-NEXT: {{ $}}455 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0456 ; GFX9PLUS-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1457 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 15458 ; GFX9PLUS-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc459 ; GFX9PLUS-NEXT: [[S_LSHR_B32_1:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc460 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[S_LSHR_B32_]], [[S_LSHR_B32_1]]461 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]462 %0:sgpr(s32) = COPY $sgpr0463 %1:sgpr(s32) = COPY $sgpr1464 %2:sgpr(s32) = G_CONSTANT i32 15465 %3:sgpr(s32) = G_LSHR %0, %2466 %4:sgpr(s32) = G_LSHR %1, %2467 %5:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %3, %4468 S_ENDPGM 0, implicit %5469...470 471---472name: test_build_vector_trunc_s_v2s16_constant_constant473legalized: true474regBankSelected: true475tracksRegLiveness: true476 477body: |478 bb.0:479 480 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_constant_constant481 ; GFX9PLUS: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 29884539482 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]483 %0:sgpr(s32) = G_CONSTANT i32 123484 %1:sgpr(s32) = G_CONSTANT i32 456485 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1486 S_ENDPGM 0, implicit %2487...488 489---490name: test_build_vector_trunc_s_v2s16_constant_impdef491legalized: true492regBankSelected: true493tracksRegLiveness: true494 495body: |496 bb.0:497 498 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_constant_impdef499 ; GFX9PLUS: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 123500 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]501 %0:sgpr(s32) = G_CONSTANT i32 123502 %1:sgpr(s32) = G_IMPLICIT_DEF503 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1504 S_ENDPGM 0, implicit %2505...506 507---508name: test_build_vector_trunc_s_v2s16_impdef_constant509legalized: true510regBankSelected: true511tracksRegLiveness: true512 513body: |514 bb.0:515 516 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_impdef_constant517 ; GFX9PLUS: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF518 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 123519 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[DEF]], [[S_MOV_B32_]]520 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]521 %0:sgpr(s32) = G_IMPLICIT_DEF522 %1:sgpr(s32) = G_CONSTANT i32 123523 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1524 S_ENDPGM 0, implicit %2525...526 527---528name: test_build_vector_trunc_s_v2s16_impdef_impdef529legalized: true530regBankSelected: true531tracksRegLiveness: true532 533body: |534 bb.0:535 536 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_impdef_impdef537 ; GFX9PLUS: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF538 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[DEF]]539 %0:sgpr(s32) = G_IMPLICIT_DEF540 %1:sgpr(s32) = G_IMPLICIT_DEF541 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1542 S_ENDPGM 0, implicit %2543...544 545---546name: test_build_vector_trunc_s_v2s16_zext_constant_zext_constant547legalized: true548regBankSelected: true549tracksRegLiveness: true550 551body: |552 bb.0:553 554 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_zext_constant_zext_constant555 ; GFX9PLUS: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 29884539556 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]557 %0:sgpr(s16) = G_CONSTANT i16 123558 %1:sgpr(s16) = G_CONSTANT i16 456559 %2:sgpr(s32) = G_ZEXT %0560 %3:sgpr(s32) = G_ZEXT %1561 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %2, %3562 S_ENDPGM 0, implicit %4563...564 565---566name: test_build_vector_trunc_s_v2s16_zext_impdef_zext_constant567legalized: true568regBankSelected: true569tracksRegLiveness: true570 571body: |572 bb.0:573 574 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_zext_impdef_zext_constant575 ; GFX9PLUS: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF576 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 123577 ; GFX9PLUS-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 65535578 ; GFX9PLUS-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[S_MOV_B32_1]], [[DEF]], implicit-def dead $scc579 ; GFX9PLUS-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 65535580 ; GFX9PLUS-NEXT: [[S_AND_B32_1:%[0-9]+]]:sreg_32 = S_AND_B32 [[S_MOV_B32_2]], [[S_MOV_B32_]], implicit-def dead $scc581 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[S_AND_B32_]], [[S_AND_B32_1]]582 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]583 %0:sgpr(s16) = G_IMPLICIT_DEF584 %1:sgpr(s16) = G_CONSTANT i16 123585 %2:sgpr(s32) = G_ZEXT %0586 %3:sgpr(s32) = G_ZEXT %1587 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %2, %3588 S_ENDPGM 0, implicit %4589...590 591---592name: test_build_vector_trunc_s_v2s16_sext_constant_sext_constant593legalized: true594regBankSelected: true595tracksRegLiveness: true596 597body: |598 bb.0:599 600 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_sext_constant_sext_constant601 ; GFX9PLUS: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4294836208602 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]603 %0:sgpr(s16) = G_CONSTANT i16 -16604 %1:sgpr(s16) = G_CONSTANT i16 -3605 %2:sgpr(s32) = G_SEXT %0606 %3:sgpr(s32) = G_SEXT %1607 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %2, %3608 S_ENDPGM 0, implicit %4609...610 611---612name: test_build_vector_trunc_s_v2s16_anyext_constant_anyext_constant613legalized: true614regBankSelected: true615tracksRegLiveness: true616 617body: |618 bb.0:619 620 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_anyext_constant_anyext_constant621 ; GFX9PLUS: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 29884539622 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]623 %0:sgpr(s16) = G_CONSTANT i16 123624 %1:sgpr(s16) = G_CONSTANT i16 456625 %2:sgpr(s32) = G_ANYEXT %0626 %3:sgpr(s32) = G_ANYEXT %1627 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %2, %3628 S_ENDPGM 0, implicit %4629...630 631---632name: test_build_vector_trunc_s_v2s16_anyext_impdef_anyext_constant633legalized: true634regBankSelected: true635tracksRegLiveness: true636 637body: |638 bb.0:639 640 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_anyext_impdef_anyext_constant641 ; GFX9PLUS: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF642 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 123643 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[DEF]], [[S_MOV_B32_]]644 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]645 %0:sgpr(s16) = G_IMPLICIT_DEF646 %1:sgpr(s16) = G_CONSTANT i16 123647 %2:sgpr(s32) = G_ANYEXT %0648 %3:sgpr(s32) = G_ANYEXT %1649 %4:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %2, %3650 S_ENDPGM 0, implicit %4651...652 653---654name: test_build_vector_trunc_s_v2s16_var_constant655legalized: true656regBankSelected: true657tracksRegLiveness: true658 659body: |660 bb.0:661 liveins: $sgpr0662 663 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_var_constant664 ; GFX9PLUS: liveins: $sgpr0665 ; GFX9PLUS-NEXT: {{ $}}666 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0667 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 456668 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[S_MOV_B32_]]669 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]670 %0:sgpr(s32) = COPY $sgpr0671 %1:sgpr(s32) = G_CONSTANT i32 456672 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1673 S_ENDPGM 0, implicit %2674...675 676---677name: test_build_vector_trunc_s_v2s16_constant_var678legalized: true679regBankSelected: true680tracksRegLiveness: true681 682body: |683 bb.0:684 liveins: $sgpr0685 686 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_constant_var687 ; GFX9PLUS: liveins: $sgpr0688 ; GFX9PLUS-NEXT: {{ $}}689 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 456690 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0691 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[S_MOV_B32_]], [[COPY]]692 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]693 %0:sgpr(s32) = G_CONSTANT i32 456694 %1:sgpr(s32) = COPY $sgpr0695 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1696 S_ENDPGM 0, implicit %2697...698 699---700name: test_build_vector_trunc_s_v2s16_var_0701legalized: true702regBankSelected: true703tracksRegLiveness: true704 705body: |706 bb.0:707 liveins: $sgpr0708 709 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_var_0710 ; GFX9PLUS: liveins: $sgpr0711 ; GFX9PLUS-NEXT: {{ $}}712 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0713 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0714 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[COPY]], [[S_MOV_B32_]]715 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]716 %0:sgpr(s32) = COPY $sgpr0717 %1:sgpr(s32) = G_CONSTANT i32 0718 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1719 S_ENDPGM 0, implicit %2720...721 722---723name: test_build_vector_trunc_s_v2s16_0_var724legalized: true725regBankSelected: true726tracksRegLiveness: true727 728body: |729 bb.0:730 liveins: $sgpr0731 732 ; GFX9PLUS-LABEL: name: test_build_vector_trunc_s_v2s16_0_var733 ; GFX9PLUS: liveins: $sgpr0734 ; GFX9PLUS-NEXT: {{ $}}735 ; GFX9PLUS-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0736 ; GFX9PLUS-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0737 ; GFX9PLUS-NEXT: [[S_PACK_LL_B32_B16_:%[0-9]+]]:sreg_32 = S_PACK_LL_B32_B16 [[S_MOV_B32_]], [[COPY]]738 ; GFX9PLUS-NEXT: S_ENDPGM 0, implicit [[S_PACK_LL_B32_B16_]]739 %0:sgpr(s32) = G_CONSTANT i32 0740 %1:sgpr(s32) = COPY $sgpr0741 %2:sgpr(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1742 S_ENDPGM 0, implicit %2743...744