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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7 %s3; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8 %s4; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11 %s5 6define amdgpu_kernel void @fcmp_uniform_select(float %a, i32 %b, i32 %c, ptr addrspace(1) %out) {7; GFX7-LABEL: fcmp_uniform_select:8; GFX7: ; %bb.0:9; GFX7-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x910; GFX7-NEXT: s_load_dword s3, s[4:5], 0xb11; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xd12; GFX7-NEXT: s_mov_b32 s2, -113; GFX7-NEXT: s_waitcnt lgkmcnt(0)14; GFX7-NEXT: v_cmp_eq_f32_e64 s[4:5], s6, 015; GFX7-NEXT: s_or_b64 s[4:5], s[4:5], s[4:5]16; GFX7-NEXT: s_cselect_b32 s4, 1, 017; GFX7-NEXT: s_and_b32 s4, s4, 118; GFX7-NEXT: s_cmp_lg_u32 s4, 019; GFX7-NEXT: s_cselect_b32 s3, s7, s320; GFX7-NEXT: v_mov_b32_e32 v0, s321; GFX7-NEXT: s_mov_b32 s3, 0xf00022; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 023; GFX7-NEXT: s_endpgm24;25; GFX8-LABEL: fcmp_uniform_select:26; GFX8: ; %bb.0:27; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2428; GFX8-NEXT: s_load_dword s6, s[4:5], 0x2c29; GFX8-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x3430; GFX8-NEXT: s_waitcnt lgkmcnt(0)31; GFX8-NEXT: v_cmp_eq_f32_e64 s[4:5], s0, 032; GFX8-NEXT: s_cmp_lg_u64 s[4:5], 033; GFX8-NEXT: s_cselect_b32 s0, 1, 034; GFX8-NEXT: s_and_b32 s0, s0, 135; GFX8-NEXT: s_cmp_lg_u32 s0, 036; GFX8-NEXT: s_cselect_b32 s0, s1, s637; GFX8-NEXT: v_mov_b32_e32 v0, s238; GFX8-NEXT: v_mov_b32_e32 v2, s039; GFX8-NEXT: v_mov_b32_e32 v1, s340; GFX8-NEXT: flat_store_dword v[0:1], v241; GFX8-NEXT: s_endpgm42;43; GFX11-LABEL: fcmp_uniform_select:44; GFX11: ; %bb.0:45; GFX11-NEXT: s_clause 0x246; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x2447; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x2c48; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x3449; GFX11-NEXT: v_mov_b32_e32 v1, 050; GFX11-NEXT: s_waitcnt lgkmcnt(0)51; GFX11-NEXT: v_cmp_eq_f32_e64 s0, s0, 052; GFX11-NEXT: s_cmp_lg_u32 s0, 053; GFX11-NEXT: s_cselect_b32 s0, 1, 054; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)55; GFX11-NEXT: s_and_b32 s0, s0, 156; GFX11-NEXT: s_cmp_lg_u32 s0, 057; GFX11-NEXT: s_cselect_b32 s0, s1, s658; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)59; GFX11-NEXT: v_mov_b32_e32 v0, s060; GFX11-NEXT: global_store_b32 v1, v0, s[2:3]61; GFX11-NEXT: s_endpgm62 %cmp = fcmp oeq float %a, 0.063 %sel = select i1 %cmp, i32 %b, i32 %c64 store i32 %sel, ptr addrspace(1) %out65 ret void66}67