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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3 4---5name: ctpop_s32_ss6legalized: true7regBankSelected: true8tracksRegLiveness: true9 10body: |11 bb.0:12 liveins: $sgpr013 14 ; CHECK-LABEL: name: ctpop_s32_ss15 ; CHECK: liveins: $sgpr016 ; CHECK-NEXT: {{ $}}17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr018 ; CHECK-NEXT: [[S_BCNT1_I32_B32_:%[0-9]+]]:sreg_32 = S_BCNT1_I32_B32 [[COPY]], implicit-def dead $scc19 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_BCNT1_I32_B32_]]20 %0:sgpr(s32) = COPY $sgpr021 %1:sgpr(s32) = G_CTPOP %022 S_ENDPGM 0, implicit %123...24 25---26name: ctpop_s32_vs27legalized: true28regBankSelected: true29tracksRegLiveness: true30 31body: |32 bb.0:33 liveins: $sgpr034 35 ; CHECK-LABEL: name: ctpop_s32_vs36 ; CHECK: liveins: $sgpr037 ; CHECK-NEXT: {{ $}}38 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr039 ; CHECK-NEXT: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], 0, implicit $exec40 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]41 %0:sgpr(s32) = COPY $sgpr042 %1:vgpr(s32) = G_CTPOP %043 S_ENDPGM 0, implicit %144...45 46---47name: ctpop_s32_vv48legalized: true49regBankSelected: true50tracksRegLiveness: true51 52body: |53 bb.0:54 liveins: $vgpr055 56 ; CHECK-LABEL: name: ctpop_s32_vv57 ; CHECK: liveins: $vgpr058 ; CHECK-NEXT: {{ $}}59 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr060 ; CHECK-NEXT: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], 0, implicit $exec61 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]62 %0:vgpr(s32) = COPY $vgpr063 %1:vgpr(s32) = G_CTPOP %064 S_ENDPGM 0, implicit %165...66 67---68name: add_ctpop_s32_v_vv_commute069legalized: true70regBankSelected: true71tracksRegLiveness: true72 73body: |74 bb.0:75 liveins: $vgpr0, $vgpr176 77 ; CHECK-LABEL: name: add_ctpop_s32_v_vv_commute078 ; CHECK: liveins: $vgpr0, $vgpr179 ; CHECK-NEXT: {{ $}}80 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr081 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr182 ; CHECK-NEXT: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec83 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]84 %0:vgpr(s32) = COPY $vgpr085 %1:vgpr(s32) = COPY $vgpr186 %2:vgpr(s32) = G_CTPOP %087 %3:vgpr(s32) = G_ADD %2, %188 S_ENDPGM 0, implicit %389...90 91---92name: add_ctpop_s32_v_vv_commute193legalized: true94regBankSelected: true95tracksRegLiveness: true96 97body: |98 bb.0:99 liveins: $vgpr0, $vgpr1100 101 ; CHECK-LABEL: name: add_ctpop_s32_v_vv_commute1102 ; CHECK: liveins: $vgpr0, $vgpr1103 ; CHECK-NEXT: {{ $}}104 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0105 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1106 ; CHECK-NEXT: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec107 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]108 %0:vgpr(s32) = COPY $vgpr0109 %1:vgpr(s32) = COPY $vgpr1110 %2:vgpr(s32) = G_CTPOP %0111 %3:vgpr(s32) = G_ADD %1, %2112 S_ENDPGM 0, implicit %3113...114 115# Test add+ctpop pattern with all scalars. This should stay scalar.116---117name: add_ctpop_s32_s_ss_commute0118legalized: true119regBankSelected: true120tracksRegLiveness: true121 122body: |123 bb.0:124 liveins: $sgpr0, $sgpr1125 126 ; CHECK-LABEL: name: add_ctpop_s32_s_ss_commute0127 ; CHECK: liveins: $sgpr0, $sgpr1128 ; CHECK-NEXT: {{ $}}129 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0130 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1131 ; CHECK-NEXT: [[S_BCNT1_I32_B32_:%[0-9]+]]:sreg_32 = S_BCNT1_I32_B32 [[COPY]], implicit-def dead $scc132 ; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BCNT1_I32_B32_]], [[COPY1]], implicit-def dead $scc133 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_ADD_I32_]]134 %0:sgpr(s32) = COPY $sgpr0135 %1:sgpr(s32) = COPY $sgpr1136 %2:sgpr(s32) = G_CTPOP %0137 %3:sgpr(s32) = G_ADD %2, %1138 S_ENDPGM 0, implicit %3139...140 141---142name: add_ctpop_s32_v_vs_commute0143legalized: true144regBankSelected: true145tracksRegLiveness: true146 147body: |148 bb.0:149 liveins: $vgpr0, $sgpr0150 151 ; CHECK-LABEL: name: add_ctpop_s32_v_vs_commute0152 ; CHECK: liveins: $vgpr0, $sgpr0153 ; CHECK-NEXT: {{ $}}154 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0155 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0156 ; CHECK-NEXT: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec157 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]158 %0:vgpr(s32) = COPY $vgpr0159 %1:sgpr(s32) = COPY $sgpr0160 %2:vgpr(s32) = G_CTPOP %0161 %3:vgpr(s32) = G_ADD %2, %1162 S_ENDPGM 0, implicit %3163...164 165# SGPR->VGPR ctpop with VALU add166---167name: add_ctpop_s32_v_sv_commute0168legalized: true169regBankSelected: true170tracksRegLiveness: true171 172body: |173 bb.0:174 liveins: $vgpr0, $sgpr0175 176 ; CHECK-LABEL: name: add_ctpop_s32_v_sv_commute0177 ; CHECK: liveins: $vgpr0, $sgpr0178 ; CHECK-NEXT: {{ $}}179 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0180 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0181 ; CHECK-NEXT: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY1]], [[COPY]], implicit $exec182 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]183 %0:vgpr(s32) = COPY $vgpr0184 %1:sgpr(s32) = COPY $sgpr0185 %2:vgpr(s32) = G_CTPOP %1186 %3:vgpr(s32) = G_ADD %2, %0187 S_ENDPGM 0, implicit %3188...189 190# Scalar ctpop with VALU add191---192name: add_ctpop_s32_s_sv_commute0193legalized: true194regBankSelected: true195tracksRegLiveness: true196 197body: |198 bb.0:199 liveins: $sgpr0, $vgpr0200 201 ; CHECK-LABEL: name: add_ctpop_s32_s_sv_commute0202 ; CHECK: liveins: $sgpr0, $vgpr0203 ; CHECK-NEXT: {{ $}}204 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0205 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0206 ; CHECK-NEXT: [[V_BCNT_U32_B32_e64_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e64 [[COPY]], [[COPY1]], implicit $exec207 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_BCNT_U32_B32_e64_]]208 %0:sgpr(s32) = COPY $sgpr0209 %1:vgpr(s32) = COPY $vgpr0210 %2:sgpr(s32) = G_CTPOP %0211 %3:vgpr(s32) = G_ADD %2, %1212 S_ENDPGM 0, implicit %3213...214 215---216name: ctpop_s64_ss217legalized: true218regBankSelected: true219tracksRegLiveness: true220 221body: |222 bb.0:223 liveins: $sgpr0_sgpr1224 225 ; CHECK-LABEL: name: ctpop_s64_ss226 ; CHECK: liveins: $sgpr0_sgpr1227 ; CHECK-NEXT: {{ $}}228 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1229 ; CHECK-NEXT: [[S_BCNT1_I32_B64_:%[0-9]+]]:sreg_32 = S_BCNT1_I32_B64 [[COPY]], implicit-def dead $scc230 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_BCNT1_I32_B64_]]231 %0:sgpr(s64) = COPY $sgpr0_sgpr1232 %1:sgpr(s32) = G_CTPOP %0233 S_ENDPGM 0, implicit %1234...235