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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=SI %s3# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=VI %s4# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s5# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX10 %s6# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GFX10 %s7 8---9name: fabs_s32_ss10legalized: true11regBankSelected: true12tracksRegLiveness: true13 14body: |15 bb.0:16 liveins: $sgpr017 ; SI-LABEL: name: fabs_s32_ss18 ; SI: liveins: $sgpr019 ; SI-NEXT: {{ $}}20 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr021 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364722 ; SI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc23 ; SI-NEXT: $sgpr0 = COPY [[S_AND_B32_]]24 ;25 ; VI-LABEL: name: fabs_s32_ss26 ; VI: liveins: $sgpr027 ; VI-NEXT: {{ $}}28 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr029 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364730 ; VI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc31 ; VI-NEXT: $sgpr0 = COPY [[S_AND_B32_]]32 ;33 ; GFX9-LABEL: name: fabs_s32_ss34 ; GFX9: liveins: $sgpr035 ; GFX9-NEXT: {{ $}}36 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr037 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364738 ; GFX9-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc39 ; GFX9-NEXT: $sgpr0 = COPY [[S_AND_B32_]]40 ;41 ; GFX10-LABEL: name: fabs_s32_ss42 ; GFX10: liveins: $sgpr043 ; GFX10-NEXT: {{ $}}44 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr045 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364746 ; GFX10-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc47 ; GFX10-NEXT: $sgpr0 = COPY [[S_AND_B32_]]48 %0:sgpr(s32) = COPY $sgpr049 %1:sgpr(s32) = G_FABS %050 $sgpr0 = COPY %151...52 53---54name: fabs_s32_vv55legalized: true56regBankSelected: true57tracksRegLiveness: true58 59body: |60 bb.0:61 liveins: $vgpr062 ; SI-LABEL: name: fabs_s32_vv63 ; SI: liveins: $vgpr064 ; SI-NEXT: {{ $}}65 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr066 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364767 ; SI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec68 ; SI-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]69 ;70 ; VI-LABEL: name: fabs_s32_vv71 ; VI: liveins: $vgpr072 ; VI-NEXT: {{ $}}73 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr074 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364775 ; VI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec76 ; VI-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]77 ;78 ; GFX9-LABEL: name: fabs_s32_vv79 ; GFX9: liveins: $vgpr080 ; GFX9-NEXT: {{ $}}81 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr082 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364783 ; GFX9-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec84 ; GFX9-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]85 ;86 ; GFX10-LABEL: name: fabs_s32_vv87 ; GFX10: liveins: $vgpr088 ; GFX10-NEXT: {{ $}}89 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr090 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364791 ; GFX10-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec92 ; GFX10-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]93 %0:vgpr(s32) = COPY $vgpr094 %1:vgpr(s32) = G_FABS %095 $vgpr0 = COPY %196...97 98---99name: fabs_s32_vs100legalized: true101regBankSelected: true102tracksRegLiveness: true103 104body: |105 bb.0:106 liveins: $sgpr0107 ; SI-LABEL: name: fabs_s32_vs108 ; SI: liveins: $sgpr0109 ; SI-NEXT: {{ $}}110 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0111 ; SI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]112 ; SI-NEXT: $vgpr0 = COPY [[FABS]](s32)113 ;114 ; VI-LABEL: name: fabs_s32_vs115 ; VI: liveins: $sgpr0116 ; VI-NEXT: {{ $}}117 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0118 ; VI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]119 ; VI-NEXT: $vgpr0 = COPY [[FABS]](s32)120 ;121 ; GFX9-LABEL: name: fabs_s32_vs122 ; GFX9: liveins: $sgpr0123 ; GFX9-NEXT: {{ $}}124 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0125 ; GFX9-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]126 ; GFX9-NEXT: $vgpr0 = COPY [[FABS]](s32)127 ;128 ; GFX10-LABEL: name: fabs_s32_vs129 ; GFX10: liveins: $sgpr0130 ; GFX10-NEXT: {{ $}}131 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0132 ; GFX10-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]133 ; GFX10-NEXT: $vgpr0 = COPY [[FABS]](s32)134 %0:sgpr(s32) = COPY $sgpr0135 %1:vgpr(s32) = G_FABS %0136 $vgpr0 = COPY %1137...138 139---140name: fabs_v2s16_ss141legalized: true142regBankSelected: true143tracksRegLiveness: true144 145body: |146 bb.0:147 liveins: $sgpr0_sgpr1148 ; SI-LABEL: name: fabs_v2s16_ss149 ; SI: liveins: $sgpr0_sgpr1150 ; SI-NEXT: {{ $}}151 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0152 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879153 ; SI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc154 ; SI-NEXT: $sgpr0 = COPY [[S_AND_B32_]]155 ;156 ; VI-LABEL: name: fabs_v2s16_ss157 ; VI: liveins: $sgpr0_sgpr1158 ; VI-NEXT: {{ $}}159 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0160 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879161 ; VI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc162 ; VI-NEXT: $sgpr0 = COPY [[S_AND_B32_]]163 ;164 ; GFX9-LABEL: name: fabs_v2s16_ss165 ; GFX9: liveins: $sgpr0_sgpr1166 ; GFX9-NEXT: {{ $}}167 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0168 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879169 ; GFX9-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc170 ; GFX9-NEXT: $sgpr0 = COPY [[S_AND_B32_]]171 ;172 ; GFX10-LABEL: name: fabs_v2s16_ss173 ; GFX10: liveins: $sgpr0_sgpr1174 ; GFX10-NEXT: {{ $}}175 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0176 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879177 ; GFX10-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc178 ; GFX10-NEXT: $sgpr0 = COPY [[S_AND_B32_]]179 %0:sgpr(<2 x s16>) = COPY $sgpr0180 %1:sgpr(<2 x s16>) = G_FABS %0181 $sgpr0 = COPY %1182...183 184---185name: fabs_s16_ss186legalized: true187regBankSelected: true188tracksRegLiveness: true189 190body: |191 bb.0:192 liveins: $sgpr0193 ; SI-LABEL: name: fabs_s16_ss194 ; SI: liveins: $sgpr0195 ; SI-NEXT: {{ $}}196 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0197 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767198 ; SI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc199 ; SI-NEXT: $sgpr0 = COPY [[S_AND_B32_]]200 ;201 ; VI-LABEL: name: fabs_s16_ss202 ; VI: liveins: $sgpr0203 ; VI-NEXT: {{ $}}204 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0205 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767206 ; VI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc207 ; VI-NEXT: $sgpr0 = COPY [[S_AND_B32_]]208 ;209 ; GFX9-LABEL: name: fabs_s16_ss210 ; GFX9: liveins: $sgpr0211 ; GFX9-NEXT: {{ $}}212 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0213 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767214 ; GFX9-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc215 ; GFX9-NEXT: $sgpr0 = COPY [[S_AND_B32_]]216 ;217 ; GFX10-LABEL: name: fabs_s16_ss218 ; GFX10: liveins: $sgpr0219 ; GFX10-NEXT: {{ $}}220 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0221 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767222 ; GFX10-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc223 ; GFX10-NEXT: $sgpr0 = COPY [[S_AND_B32_]]224 %0:sgpr(s32) = COPY $sgpr0225 %1:sgpr(s16) = G_TRUNC %0226 %2:sgpr(s16) = G_FABS %1227 %3:sgpr(s32) = G_ANYEXT %2228 $sgpr0 = COPY %3229...230 231---232name: fabs_s16_vv233legalized: true234regBankSelected: true235tracksRegLiveness: true236 237body: |238 bb.0:239 liveins: $vgpr0240 ; SI-LABEL: name: fabs_s16_vv241 ; SI: liveins: $vgpr0242 ; SI-NEXT: {{ $}}243 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0244 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767245 ; SI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec246 ; SI-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]247 ;248 ; VI-LABEL: name: fabs_s16_vv249 ; VI: liveins: $vgpr0250 ; VI-NEXT: {{ $}}251 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0252 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767253 ; VI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec254 ; VI-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]255 ;256 ; GFX9-LABEL: name: fabs_s16_vv257 ; GFX9: liveins: $vgpr0258 ; GFX9-NEXT: {{ $}}259 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0260 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767261 ; GFX9-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec262 ; GFX9-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]263 ;264 ; GFX10-LABEL: name: fabs_s16_vv265 ; GFX10: liveins: $vgpr0266 ; GFX10-NEXT: {{ $}}267 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0268 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767269 ; GFX10-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec270 ; GFX10-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]271 %0:vgpr(s32) = COPY $vgpr0272 %1:vgpr(s16) = G_TRUNC %0273 %2:vgpr(s16) = G_FABS %1274 %3:vgpr(s32) = G_ANYEXT %2275 $vgpr0 = COPY %3276...277 278---279name: fabs_s16_vs280legalized: true281regBankSelected: true282tracksRegLiveness: true283 284body: |285 bb.0:286 liveins: $sgpr0287 288 ; SI-LABEL: name: fabs_s16_vs289 ; SI: liveins: $sgpr0290 ; SI-NEXT: {{ $}}291 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0292 ; SI-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)293 ; SI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s16) = G_FABS [[TRUNC]]294 ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]](s16)295 ; SI-NEXT: $vgpr0 = COPY [[COPY1]](s32)296 ;297 ; VI-LABEL: name: fabs_s16_vs298 ; VI: liveins: $sgpr0299 ; VI-NEXT: {{ $}}300 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0301 ; VI-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)302 ; VI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s16) = G_FABS [[TRUNC]]303 ; VI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]](s16)304 ; VI-NEXT: $vgpr0 = COPY [[COPY1]](s32)305 ;306 ; GFX9-LABEL: name: fabs_s16_vs307 ; GFX9: liveins: $sgpr0308 ; GFX9-NEXT: {{ $}}309 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0310 ; GFX9-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)311 ; GFX9-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s16) = G_FABS [[TRUNC]]312 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]](s16)313 ; GFX9-NEXT: $vgpr0 = COPY [[COPY1]](s32)314 ;315 ; GFX10-LABEL: name: fabs_s16_vs316 ; GFX10: liveins: $sgpr0317 ; GFX10-NEXT: {{ $}}318 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0319 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)320 ; GFX10-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s16) = G_FABS [[TRUNC]]321 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]](s16)322 ; GFX10-NEXT: $vgpr0 = COPY [[COPY1]](s32)323 %0:sgpr(s32) = COPY $sgpr0324 %1:sgpr(s16) = G_TRUNC %0325 %2:vgpr(s16) = G_FABS %1326 %3:vgpr(s32) = G_ANYEXT %2327 $vgpr0 = COPY %3328...329 330---331name: fabs_v2s16_vv332legalized: true333regBankSelected: true334tracksRegLiveness: true335 336body: |337 bb.0:338 liveins: $vgpr0339 ; SI-LABEL: name: fabs_v2s16_vv340 ; SI: liveins: $vgpr0341 ; SI-NEXT: {{ $}}342 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0343 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879344 ; SI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec345 ; SI-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]346 ;347 ; VI-LABEL: name: fabs_v2s16_vv348 ; VI: liveins: $vgpr0349 ; VI-NEXT: {{ $}}350 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0351 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879352 ; VI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec353 ; VI-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]354 ;355 ; GFX9-LABEL: name: fabs_v2s16_vv356 ; GFX9: liveins: $vgpr0357 ; GFX9-NEXT: {{ $}}358 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0359 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879360 ; GFX9-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec361 ; GFX9-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]362 ;363 ; GFX10-LABEL: name: fabs_v2s16_vv364 ; GFX10: liveins: $vgpr0365 ; GFX10-NEXT: {{ $}}366 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0367 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879368 ; GFX10-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec369 ; GFX10-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]370 %0:vgpr(<2 x s16>) = COPY $vgpr0371 %1:vgpr(<2 x s16>) = G_FABS %0372 $vgpr0 = COPY %1373...374 375---376name: fabs_v2s16_vs377legalized: true378regBankSelected: true379tracksRegLiveness: true380 381body: |382 bb.0:383 liveins: $sgpr0384 ; SI-LABEL: name: fabs_v2s16_vs385 ; SI: liveins: $sgpr0386 ; SI-NEXT: {{ $}}387 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0388 ; SI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]389 ; SI-NEXT: $vgpr0 = COPY [[FABS]](<2 x s16>)390 ;391 ; VI-LABEL: name: fabs_v2s16_vs392 ; VI: liveins: $sgpr0393 ; VI-NEXT: {{ $}}394 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0395 ; VI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]396 ; VI-NEXT: $vgpr0 = COPY [[FABS]](<2 x s16>)397 ;398 ; GFX9-LABEL: name: fabs_v2s16_vs399 ; GFX9: liveins: $sgpr0400 ; GFX9-NEXT: {{ $}}401 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0402 ; GFX9-NEXT: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]403 ; GFX9-NEXT: $vgpr0 = COPY [[FABS]](<2 x s16>)404 ;405 ; GFX10-LABEL: name: fabs_v2s16_vs406 ; GFX10: liveins: $sgpr0407 ; GFX10-NEXT: {{ $}}408 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0409 ; GFX10-NEXT: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]410 ; GFX10-NEXT: $vgpr0 = COPY [[FABS]](<2 x s16>)411 %0:sgpr(<2 x s16>) = COPY $sgpr0412 %1:vgpr(<2 x s16>) = G_FABS %0413 $vgpr0 = COPY %1414...415 416---417name: fabs_s64_ss418legalized: true419regBankSelected: true420tracksRegLiveness: true421 422body: |423 bb.0:424 liveins: $sgpr0_sgpr1425 ; SI-LABEL: name: fabs_s64_ss426 ; SI: liveins: $sgpr0_sgpr1427 ; SI-NEXT: {{ $}}428 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1429 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647430 ; SI-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1431 ; SI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc432 ; SI-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_AND_B32_]]433 ; SI-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub0434 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1435 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]436 ;437 ; VI-LABEL: name: fabs_s64_ss438 ; VI: liveins: $sgpr0_sgpr1439 ; VI-NEXT: {{ $}}440 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1441 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647442 ; VI-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1443 ; VI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc444 ; VI-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_AND_B32_]]445 ; VI-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub0446 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1447 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]448 ;449 ; GFX9-LABEL: name: fabs_s64_ss450 ; GFX9: liveins: $sgpr0_sgpr1451 ; GFX9-NEXT: {{ $}}452 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1453 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647454 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1455 ; GFX9-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc456 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_AND_B32_]]457 ; GFX9-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub0458 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1459 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]460 ;461 ; GFX10-LABEL: name: fabs_s64_ss462 ; GFX10: liveins: $sgpr0_sgpr1463 ; GFX10-NEXT: {{ $}}464 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1465 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647466 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1467 ; GFX10-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc468 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_AND_B32_]]469 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub0470 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1471 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]472 %0:sgpr(s64) = COPY $sgpr0_sgpr1473 %1:sgpr(s64) = G_FABS %0474 S_ENDPGM 0, implicit %1475...476 477---478name: fabs_s64_vv479legalized: true480regBankSelected: true481tracksRegLiveness: true482 483body: |484 bb.0:485 liveins: $vgpr0_vgpr1486 ; SI-LABEL: name: fabs_s64_vv487 ; SI: liveins: $vgpr0_vgpr1488 ; SI-NEXT: {{ $}}489 ; SI-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1490 ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1491 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647492 ; SI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec493 ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0494 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_AND_B32_e64_]], %subreg.sub1495 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]496 ;497 ; VI-LABEL: name: fabs_s64_vv498 ; VI: liveins: $vgpr0_vgpr1499 ; VI-NEXT: {{ $}}500 ; VI-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1501 ; VI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1502 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647503 ; VI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec504 ; VI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0505 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_AND_B32_e64_]], %subreg.sub1506 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]507 ;508 ; GFX9-LABEL: name: fabs_s64_vv509 ; GFX9: liveins: $vgpr0_vgpr1510 ; GFX9-NEXT: {{ $}}511 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1512 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1513 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647514 ; GFX9-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec515 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0516 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_AND_B32_e64_]], %subreg.sub1517 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]518 ;519 ; GFX10-LABEL: name: fabs_s64_vv520 ; GFX10: liveins: $vgpr0_vgpr1521 ; GFX10-NEXT: {{ $}}522 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1523 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1524 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647525 ; GFX10-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec526 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0527 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_AND_B32_e64_]], %subreg.sub1528 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]529 %0:vgpr(s64) = COPY $vgpr0_vgpr1530 %1:vgpr(s64) = G_FABS %0531 S_ENDPGM 0, implicit %1532...533 534---535name: fabs_s64_vs536legalized: true537regBankSelected: true538tracksRegLiveness: true539 540body: |541 bb.0:542 liveins: $sgpr0_sgpr1543 ; SI-LABEL: name: fabs_s64_vs544 ; SI: liveins: $sgpr0_sgpr1545 ; SI-NEXT: {{ $}}546 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1547 ; SI-NEXT: [[FABS:%[0-9]+]]:vgpr(s64) = G_FABS [[COPY]]548 ; SI-NEXT: S_ENDPGM 0, implicit [[FABS]](s64)549 ;550 ; VI-LABEL: name: fabs_s64_vs551 ; VI: liveins: $sgpr0_sgpr1552 ; VI-NEXT: {{ $}}553 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1554 ; VI-NEXT: [[FABS:%[0-9]+]]:vgpr(s64) = G_FABS [[COPY]]555 ; VI-NEXT: S_ENDPGM 0, implicit [[FABS]](s64)556 ;557 ; GFX9-LABEL: name: fabs_s64_vs558 ; GFX9: liveins: $sgpr0_sgpr1559 ; GFX9-NEXT: {{ $}}560 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1561 ; GFX9-NEXT: [[FABS:%[0-9]+]]:vgpr(s64) = G_FABS [[COPY]]562 ; GFX9-NEXT: S_ENDPGM 0, implicit [[FABS]](s64)563 ;564 ; GFX10-LABEL: name: fabs_s64_vs565 ; GFX10: liveins: $sgpr0_sgpr1566 ; GFX10-NEXT: {{ $}}567 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1568 ; GFX10-NEXT: [[FABS:%[0-9]+]]:vgpr(s64) = G_FABS [[COPY]]569 ; GFX10-NEXT: S_ENDPGM 0, implicit [[FABS]](s64)570 %0:sgpr(s64) = COPY $sgpr0_sgpr1571 %1:vgpr(s64) = G_FABS %0572 S_ENDPGM 0, implicit %1573...574 575# Make sure the source register is constrained576---577name: fabs_s64_vv_no_src_constraint578legalized: true579regBankSelected: true580tracksRegLiveness: true581 582body: |583 bb.0:584 liveins: $vgpr0_vgpr1585 ; SI-LABEL: name: fabs_s64_vv_no_src_constraint586 ; SI: liveins: $vgpr0_vgpr1587 ; SI-NEXT: {{ $}}588 ; SI-NEXT: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF589 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub1590 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647591 ; SI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec592 ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub0593 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[V_AND_B32_e64_]], %subreg.sub1594 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]595 ;596 ; VI-LABEL: name: fabs_s64_vv_no_src_constraint597 ; VI: liveins: $vgpr0_vgpr1598 ; VI-NEXT: {{ $}}599 ; VI-NEXT: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF600 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub1601 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647602 ; VI-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec603 ; VI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub0604 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[V_AND_B32_e64_]], %subreg.sub1605 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]606 ;607 ; GFX9-LABEL: name: fabs_s64_vv_no_src_constraint608 ; GFX9: liveins: $vgpr0_vgpr1609 ; GFX9-NEXT: {{ $}}610 ; GFX9-NEXT: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF611 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub1612 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647613 ; GFX9-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec614 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub0615 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[V_AND_B32_e64_]], %subreg.sub1616 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]617 ;618 ; GFX10-LABEL: name: fabs_s64_vv_no_src_constraint619 ; GFX10: liveins: $vgpr0_vgpr1620 ; GFX10-NEXT: {{ $}}621 ; GFX10-NEXT: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF622 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub1623 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647624 ; GFX10-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec625 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF]].sub0626 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[V_AND_B32_e64_]], %subreg.sub1627 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]628 %0:vgpr(s64) = IMPLICIT_DEF629 %1:vgpr(s64) = G_FABS %0:vgpr(s64)630 S_ENDPGM 0, implicit %1631...632 633---634name: fabs_s64_ss_no_src_constraint635legalized: true636regBankSelected: true637tracksRegLiveness: true638 639body: |640 bb.0:641 liveins: $sgpr0_sgpr1642 ; SI-LABEL: name: fabs_s64_ss_no_src_constraint643 ; SI: liveins: $sgpr0_sgpr1644 ; SI-NEXT: {{ $}}645 ; SI-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF646 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647647 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY [[DEF]].sub1648 ; SI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc649 ; SI-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_AND_B32_]]650 ; SI-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[DEF]].sub0651 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1652 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]653 ;654 ; VI-LABEL: name: fabs_s64_ss_no_src_constraint655 ; VI: liveins: $sgpr0_sgpr1656 ; VI-NEXT: {{ $}}657 ; VI-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF658 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647659 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY [[DEF]].sub1660 ; VI-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc661 ; VI-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_AND_B32_]]662 ; VI-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[DEF]].sub0663 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1664 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]665 ;666 ; GFX9-LABEL: name: fabs_s64_ss_no_src_constraint667 ; GFX9: liveins: $sgpr0_sgpr1668 ; GFX9-NEXT: {{ $}}669 ; GFX9-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF670 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647671 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY [[DEF]].sub1672 ; GFX9-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc673 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_AND_B32_]]674 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[DEF]].sub0675 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1676 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]677 ;678 ; GFX10-LABEL: name: fabs_s64_ss_no_src_constraint679 ; GFX10: liveins: $sgpr0_sgpr1680 ; GFX10-NEXT: {{ $}}681 ; GFX10-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF682 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647683 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY [[DEF]].sub1684 ; GFX10-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc685 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_AND_B32_]]686 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[DEF]].sub0687 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY1]], %subreg.sub1688 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]689 %0:sgpr(s64) = IMPLICIT_DEF690 %1:sgpr(s64) = G_FABS %0:sgpr(s64)691 S_ENDPGM 0, implicit %1692...693