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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -mattr=+real-true16 -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX11 %s3 4---5name: fcmp_false_s16_vv6legalized: true7regBankSelected: true8 9body: |10 bb.0:11 liveins: $vgpr0, $vgpr112 ; GFX11-LABEL: name: fcmp_false_s16_vv13 ; GFX11: liveins: $vgpr0, $vgpr114 ; GFX11-NEXT: {{ $}}15 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr016 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr117 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)18 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)19 ; GFX11-NEXT: [[FCMP:%[0-9]+]]:vcc(s1) = G_FCMP floatpred(false), [[TRUNC]](s16), [[TRUNC1]]20 ; GFX11-NEXT: S_ENDPGM 0, implicit [[FCMP]](s1)21 %0:vgpr(s32) = COPY $vgpr022 %1:vgpr(s32) = COPY $vgpr123 %2:vgpr(s16) = G_TRUNC %024 %3:vgpr(s16) = G_TRUNC %125 %4:vcc(s1) = G_FCMP floatpred(false), %2, %326 S_ENDPGM 0, implicit %427...28 29---30name: fcmp_oeq_s16_vv31legalized: true32regBankSelected: true33 34body: |35 bb.0:36 liveins: $vgpr0, $vgpr137 ; GFX11-LABEL: name: fcmp_oeq_s16_vv38 ; GFX11: liveins: $vgpr0, $vgpr139 ; GFX11-NEXT: {{ $}}40 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr041 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr142 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo1643 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo1644 ; GFX11-NEXT: [[V_CMP_EQ_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_EQ_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec45 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_EQ_F16_t16_e64_]]46 %0:vgpr(s32) = COPY $vgpr047 %1:vgpr(s32) = COPY $vgpr148 %2:vgpr(s16) = G_TRUNC %049 %3:vgpr(s16) = G_TRUNC %150 %4:vcc(s1) = G_FCMP floatpred(oeq), %2, %351 S_ENDPGM 0, implicit %452...53 54---55name: fcmp_ogt_s16_vv56legalized: true57regBankSelected: true58 59body: |60 bb.0:61 liveins: $vgpr0, $vgpr162 ; GFX11-LABEL: name: fcmp_ogt_s16_vv63 ; GFX11: liveins: $vgpr0, $vgpr164 ; GFX11-NEXT: {{ $}}65 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr066 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr167 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo1668 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo1669 ; GFX11-NEXT: [[V_CMP_GT_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_GT_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec70 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_GT_F16_t16_e64_]]71 %0:vgpr(s32) = COPY $vgpr072 %1:vgpr(s32) = COPY $vgpr173 %2:vgpr(s16) = G_TRUNC %074 %3:vgpr(s16) = G_TRUNC %175 %4:vcc(s1) = G_FCMP floatpred(ogt), %2, %376 S_ENDPGM 0, implicit %477...78 79---80name: fcmp_oge_s16_vv81legalized: true82regBankSelected: true83 84body: |85 bb.0:86 liveins: $vgpr0, $vgpr187 ; GFX11-LABEL: name: fcmp_oge_s16_vv88 ; GFX11: liveins: $vgpr0, $vgpr189 ; GFX11-NEXT: {{ $}}90 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr091 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr192 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo1693 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo1694 ; GFX11-NEXT: [[V_CMP_GE_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_GE_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec95 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_GE_F16_t16_e64_]]96 %0:vgpr(s32) = COPY $vgpr097 %1:vgpr(s32) = COPY $vgpr198 %2:vgpr(s16) = G_TRUNC %099 %3:vgpr(s16) = G_TRUNC %1100 %4:vcc(s1) = G_FCMP floatpred(oge), %2, %3101 S_ENDPGM 0, implicit %4102...103 104---105name: fcmp_olt_s16_vv106legalized: true107regBankSelected: true108 109body: |110 bb.0:111 liveins: $vgpr0, $vgpr1112 ; GFX11-LABEL: name: fcmp_olt_s16_vv113 ; GFX11: liveins: $vgpr0, $vgpr1114 ; GFX11-NEXT: {{ $}}115 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0116 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1117 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16118 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16119 ; GFX11-NEXT: [[V_CMP_LT_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_LT_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec120 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_LT_F16_t16_e64_]]121 %0:vgpr(s32) = COPY $vgpr0122 %1:vgpr(s32) = COPY $vgpr1123 %2:vgpr(s16) = G_TRUNC %0124 %3:vgpr(s16) = G_TRUNC %1125 %4:vcc(s1) = G_FCMP floatpred(olt), %2, %3126 S_ENDPGM 0, implicit %4127...128 129---130name: fcmp_ole_s16_vv131legalized: true132regBankSelected: true133 134body: |135 bb.0:136 liveins: $vgpr0, $vgpr1137 ; GFX11-LABEL: name: fcmp_ole_s16_vv138 ; GFX11: liveins: $vgpr0, $vgpr1139 ; GFX11-NEXT: {{ $}}140 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0141 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1142 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16143 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16144 ; GFX11-NEXT: [[V_CMP_LE_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_LE_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec145 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_LE_F16_t16_e64_]]146 %0:vgpr(s32) = COPY $vgpr0147 %1:vgpr(s32) = COPY $vgpr1148 %2:vgpr(s16) = G_TRUNC %0149 %3:vgpr(s16) = G_TRUNC %1150 %4:vcc(s1) = G_FCMP floatpred(ole), %2, %3151 S_ENDPGM 0, implicit %4152...153---154name: fcmp_one_s16_vv155legalized: true156regBankSelected: true157 158body: |159 bb.0:160 liveins: $vgpr0, $vgpr1161 ; GFX11-LABEL: name: fcmp_one_s16_vv162 ; GFX11: liveins: $vgpr0, $vgpr1163 ; GFX11-NEXT: {{ $}}164 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0165 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1166 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16167 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16168 ; GFX11-NEXT: [[V_CMP_LG_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_LG_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec169 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_LG_F16_t16_e64_]]170 %0:vgpr(s32) = COPY $vgpr0171 %1:vgpr(s32) = COPY $vgpr1172 %2:vgpr(s16) = G_TRUNC %0173 %3:vgpr(s16) = G_TRUNC %1174 %4:vcc(s1) = G_FCMP floatpred(one), %2, %3175 S_ENDPGM 0, implicit %4176...177 178---179name: fcmp_ord_s16_vv180legalized: true181regBankSelected: true182 183body: |184 bb.0:185 liveins: $vgpr0, $vgpr1186 ; GFX11-LABEL: name: fcmp_ord_s16_vv187 ; GFX11: liveins: $vgpr0, $vgpr1188 ; GFX11-NEXT: {{ $}}189 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0190 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1191 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16192 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16193 ; GFX11-NEXT: [[V_CMP_LG_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_LG_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec194 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_LG_F16_t16_e64_]]195 %0:vgpr(s32) = COPY $vgpr0196 %1:vgpr(s32) = COPY $vgpr1197 %2:vgpr(s16) = G_TRUNC %0198 %3:vgpr(s16) = G_TRUNC %1199 %4:vcc(s1) = G_FCMP floatpred(one), %2, %3200 S_ENDPGM 0, implicit %4201...202 203---204name: fcmp_uno_s16_vv205legalized: true206regBankSelected: true207 208body: |209 bb.0:210 liveins: $vgpr0, $vgpr1211 ; GFX11-LABEL: name: fcmp_uno_s16_vv212 ; GFX11: liveins: $vgpr0, $vgpr1213 ; GFX11-NEXT: {{ $}}214 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0215 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1216 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16217 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16218 ; GFX11-NEXT: [[V_CMP_U_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_U_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec219 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_U_F16_t16_e64_]]220 %0:vgpr(s32) = COPY $vgpr0221 %1:vgpr(s32) = COPY $vgpr1222 %2:vgpr(s16) = G_TRUNC %0223 %3:vgpr(s16) = G_TRUNC %1224 %4:vcc(s1) = G_FCMP floatpred(uno), %2, %3225 S_ENDPGM 0, implicit %4226...227 228---229name: fcmp_ueq_s16_vv230legalized: true231regBankSelected: true232 233body: |234 bb.0:235 liveins: $vgpr0, $vgpr1236 ; GFX11-LABEL: name: fcmp_ueq_s16_vv237 ; GFX11: liveins: $vgpr0, $vgpr1238 ; GFX11-NEXT: {{ $}}239 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0240 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1241 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16242 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16243 ; GFX11-NEXT: [[V_CMP_NLG_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_NLG_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec244 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_NLG_F16_t16_e64_]]245 %0:vgpr(s32) = COPY $vgpr0246 %1:vgpr(s32) = COPY $vgpr1247 %2:vgpr(s16) = G_TRUNC %0248 %3:vgpr(s16) = G_TRUNC %1249 %4:vcc(s1) = G_FCMP floatpred(ueq), %2, %3250 S_ENDPGM 0, implicit %4251...252 253---254name: fcmp_ugt_s16_vv255legalized: true256regBankSelected: true257 258body: |259 bb.0:260 liveins: $vgpr0, $vgpr1261 ; GFX11-LABEL: name: fcmp_ugt_s16_vv262 ; GFX11: liveins: $vgpr0, $vgpr1263 ; GFX11-NEXT: {{ $}}264 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0265 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1266 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16267 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16268 ; GFX11-NEXT: [[V_CMP_NLE_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_NLE_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec269 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_NLE_F16_t16_e64_]]270 %0:vgpr(s32) = COPY $vgpr0271 %1:vgpr(s32) = COPY $vgpr1272 %2:vgpr(s16) = G_TRUNC %0273 %3:vgpr(s16) = G_TRUNC %1274 %4:vcc(s1) = G_FCMP floatpred(ugt), %2, %3275 S_ENDPGM 0, implicit %4276...277 278---279name: fcmp_uge_s16_vv280legalized: true281regBankSelected: true282 283body: |284 bb.0:285 liveins: $vgpr0, $vgpr1286 ; GFX11-LABEL: name: fcmp_uge_s16_vv287 ; GFX11: liveins: $vgpr0, $vgpr1288 ; GFX11-NEXT: {{ $}}289 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0290 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1291 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16292 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16293 ; GFX11-NEXT: [[V_CMP_NLT_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_NLT_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec294 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_NLT_F16_t16_e64_]]295 %0:vgpr(s32) = COPY $vgpr0296 %1:vgpr(s32) = COPY $vgpr1297 %2:vgpr(s16) = G_TRUNC %0298 %3:vgpr(s16) = G_TRUNC %1299 %4:vcc(s1) = G_FCMP floatpred(uge), %2, %3300 S_ENDPGM 0, implicit %4301...302 303---304name: fcmp_ult_s16_vv305legalized: true306regBankSelected: true307 308body: |309 bb.0:310 liveins: $vgpr0, $vgpr1311 ; GFX11-LABEL: name: fcmp_ult_s16_vv312 ; GFX11: liveins: $vgpr0, $vgpr1313 ; GFX11-NEXT: {{ $}}314 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0315 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1316 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16317 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16318 ; GFX11-NEXT: [[V_CMP_NGE_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_NGE_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec319 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_NGE_F16_t16_e64_]]320 %0:vgpr(s32) = COPY $vgpr0321 %1:vgpr(s32) = COPY $vgpr1322 %2:vgpr(s16) = G_TRUNC %0323 %3:vgpr(s16) = G_TRUNC %1324 %4:vcc(s1) = G_FCMP floatpred(ult), %2, %3325 S_ENDPGM 0, implicit %4326...327 328---329name: fcmp_ule_s16_vv330legalized: true331regBankSelected: true332 333body: |334 bb.0:335 liveins: $vgpr0, $vgpr1336 ; GFX11-LABEL: name: fcmp_ule_s16_vv337 ; GFX11: liveins: $vgpr0, $vgpr1338 ; GFX11-NEXT: {{ $}}339 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0340 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1341 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16342 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16343 ; GFX11-NEXT: [[V_CMP_NGT_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_NGT_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec344 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_NGT_F16_t16_e64_]]345 %0:vgpr(s32) = COPY $vgpr0346 %1:vgpr(s32) = COPY $vgpr1347 %2:vgpr(s16) = G_TRUNC %0348 %3:vgpr(s16) = G_TRUNC %1349 %4:vcc(s1) = G_FCMP floatpred(ule), %2, %3350 S_ENDPGM 0, implicit %4351...352 353---354name: fcmp_une_s16_vv355legalized: true356regBankSelected: true357 358body: |359 bb.0:360 liveins: $vgpr0, $vgpr1361 ; GFX11-LABEL: name: fcmp_une_s16_vv362 ; GFX11: liveins: $vgpr0, $vgpr1363 ; GFX11-NEXT: {{ $}}364 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0365 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1366 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16367 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16368 ; GFX11-NEXT: [[V_CMP_NEQ_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_NEQ_F16_t16_e64 0, [[COPY2]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec369 ; GFX11-NEXT: S_ENDPGM 0, implicit [[V_CMP_NEQ_F16_t16_e64_]]370 %0:vgpr(s32) = COPY $vgpr0371 %1:vgpr(s32) = COPY $vgpr1372 %2:vgpr(s16) = G_TRUNC %0373 %3:vgpr(s16) = G_TRUNC %1374 %4:vcc(s1) = G_FCMP floatpred(une), %2, %3375 S_ENDPGM 0, implicit %4376...377 378---379name: fcmp_true_s16_vv380legalized: true381regBankSelected: true382 383body: |384 bb.0:385 liveins: $vgpr0, $vgpr1386 ; GFX11-LABEL: name: fcmp_true_s16_vv387 ; GFX11: liveins: $vgpr0, $vgpr1388 ; GFX11-NEXT: {{ $}}389 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0390 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1391 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)392 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)393 ; GFX11-NEXT: [[FCMP:%[0-9]+]]:vcc(s1) = G_FCMP floatpred(true), [[TRUNC]](s16), [[TRUNC1]]394 ; GFX11-NEXT: S_ENDPGM 0, implicit [[FCMP]](s1)395 %0:vgpr(s32) = COPY $vgpr0396 %1:vgpr(s32) = COPY $vgpr1397 %2:vgpr(s16) = G_TRUNC %0398 %3:vgpr(s16) = G_TRUNC %1399 %4:vcc(s1) = G_FCMP floatpred(true), %2, %3400 S_ENDPGM 0, implicit %4401...402 403