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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s3 4---5name: fconstant_v_s326legalized: true7regBankSelected: true8tracksRegLiveness: true9 10body: |11 bb.0:12 ; GCN-LABEL: name: fconstant_v_s3213 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec14 ; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1090519040, implicit $exec15 ; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec16 ; GCN-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1090519040, implicit $exec17 ; GCN-NEXT: $vgpr0 = COPY [[V_MOV_B32_e32_]]18 ; GCN-NEXT: $vgpr1 = COPY [[V_MOV_B32_e32_1]]19 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_3]]20 %0:vgpr(s32) = G_FCONSTANT float 1.021 %1:vgpr(s32) = G_FCONSTANT float 8.022 %2:vgpr(s32) = G_FCONSTANT float 1.023 %3:vgpr(s32) = G_FCONSTANT float 8.024 $vgpr0 = COPY %025 $vgpr1 = COPY %126 S_ENDPGM 0, implicit %2 , implicit %327...28 29---30name: fconstant_s_s3231legalized: true32regBankSelected: true33tracksRegLiveness: true34 35body: |36 bb.0:37 ; GCN-LABEL: name: fconstant_s_s3238 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 106535321639 ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 109051904040 ; GCN-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 321283686441 ; GCN-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 323800268842 ; GCN-NEXT: $sgpr0 = COPY [[S_MOV_B32_]]43 ; GCN-NEXT: $sgpr1 = COPY [[S_MOV_B32_1]]44 ; GCN-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_2]], implicit [[S_MOV_B32_3]]45 %0:sgpr(s32) = G_FCONSTANT float 1.046 %1:sgpr(s32) = G_FCONSTANT float 8.047 %2:sgpr(s32) = G_FCONSTANT float -1.048 %3:sgpr(s32) = G_FCONSTANT float -8.049 $sgpr0 = COPY %050 $sgpr1 = COPY %151 S_ENDPGM 0, implicit %2 , implicit %352 53...54 55---56name: fconstant_v_s6457legalized: true58regBankSelected: true59tracksRegLiveness: true60 61body: |62 bb.0:63 ; GCN-LABEL: name: fconstant_v_s6464 ; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec65 ; GCN-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 4620693217682128896, implicit $exec66 ; GCN-NEXT: [[V_MOV_B2:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO -4611686018427387904, implicit $exec67 ; GCN-NEXT: [[V_MOV_B3:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 4621819117588971520, implicit $exec68 ; GCN-NEXT: $vgpr0_vgpr1 = COPY [[V_MOV_B]]69 ; GCN-NEXT: $vgpr2_vgpr3 = COPY [[V_MOV_B1]]70 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MOV_B2]], implicit [[V_MOV_B3]]71 %0:vgpr(s64) = G_FCONSTANT double 1.072 %1:vgpr(s64) = G_FCONSTANT double 8.073 %2:vgpr(s64) = G_FCONSTANT double -2.074 %3:vgpr(s64) = G_FCONSTANT double 10.075 $vgpr0_vgpr1 = COPY %076 $vgpr2_vgpr3 = COPY %177 S_ENDPGM 0, implicit %2 , implicit %378 79...80 81---82name: fconstant_s_s6483legalized: true84regBankSelected: true85tracksRegLiveness: true86 87body: |88 bb.0:89 ; GCN-LABEL: name: fconstant_s_s6490 ; GCN: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 460718241880001740891 ; GCN-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 462069321768212889692 ; GCN-NEXT: [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 -461168601842738790493 ; GCN-NEXT: [[S_MOV_B1:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO -460155291926580428894 ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[S_MOV_B64_]]95 ; GCN-NEXT: $sgpr2_sgpr3 = COPY [[S_MOV_B]]96 ; GCN-NEXT: S_ENDPGM 0, implicit [[S_MOV_B64_]], implicit [[S_MOV_B]], implicit [[S_MOV_B64_1]], implicit [[S_MOV_B1]]97 %0:sgpr(s64) = G_FCONSTANT double 1.098 %1:sgpr(s64) = G_FCONSTANT double 8.099 %2:sgpr(s64) = G_FCONSTANT double -2.0100 %3:sgpr(s64) = G_FCONSTANT double -10.0101 $sgpr0_sgpr1 = COPY %0102 $sgpr2_sgpr3 = COPY %1103 S_ENDPGM 0, implicit %0 , implicit %1 , implicit %2 , implicit %3104...105 106---107name: fconstant_v_s16108legalized: true109regBankSelected: true110tracksRegLiveness: true111 112body: |113 bb.0:114 ; GCN-LABEL: name: fconstant_v_s16115 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15360, implicit $exec116 ; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18432, implicit $exec117 ; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15360, implicit $exec118 ; GCN-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 18432, implicit $exec119 ; GCN-NEXT: $vgpr0 = COPY [[V_MOV_B32_e32_]]120 ; GCN-NEXT: $vgpr1 = COPY [[V_MOV_B32_e32_1]]121 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MOV_B32_e32_2]], implicit [[V_MOV_B32_e32_3]]122 %0:vgpr(s16) = G_FCONSTANT half 1.0123 %1:vgpr(s16) = G_FCONSTANT half 8.0124 %2:vgpr(s32) = G_ANYEXT %0125 %3:vgpr(s32) = G_ANYEXT %1126 127 %4:vgpr(s16) = G_FCONSTANT half 1.0128 %5:vgpr(s16) = G_FCONSTANT half 8.0129 $vgpr0 = COPY %2130 $vgpr1 = COPY %3131 S_ENDPGM 0, implicit %4, implicit %5132 133...134 135---136name: fconstant_s_s16137legalized: true138regBankSelected: true139tracksRegLiveness: true140 141body: |142 bb.0:143 ; GCN-LABEL: name: fconstant_s_s16144 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 15360145 ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 18432146 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]147 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_1]]148 ; GCN-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 15360149 ; GCN-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 18432150 ; GCN-NEXT: $sgpr0 = COPY [[COPY]]151 ; GCN-NEXT: $sgpr1 = COPY [[COPY1]]152 ; GCN-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_2]], implicit [[S_MOV_B32_3]]153 %0:sgpr(s16) = G_FCONSTANT half 1.0154 %1:sgpr(s16) = G_FCONSTANT half 8.0155 %2:vgpr(s32) = G_ANYEXT %0156 %3:vgpr(s32) = G_ANYEXT %1157 158 %4:sgpr(s16) = G_FCONSTANT half 1.0159 %5:sgpr(s16) = G_FCONSTANT half 8.0160 $sgpr0 = COPY %2161 $sgpr1 = COPY %3162 S_ENDPGM 0, implicit %4, implicit %5163 164...165