1198 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=SI %s3# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=VI %s4# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s5# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX10 %s6# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefixes=GFX10 %s7 8---9name: fneg_s32_ss10legalized: true11regBankSelected: true12tracksRegLiveness: true13 14body: |15 bb.0:16 liveins: $sgpr017 ; SI-LABEL: name: fneg_s32_ss18 ; SI: liveins: $sgpr019 ; SI-NEXT: {{ $}}20 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr021 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364822 ; SI-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc23 ; SI-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]24 ;25 ; VI-LABEL: name: fneg_s32_ss26 ; VI: liveins: $sgpr027 ; VI-NEXT: {{ $}}28 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr029 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364830 ; VI-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc31 ; VI-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]32 ;33 ; GFX9-LABEL: name: fneg_s32_ss34 ; GFX9: liveins: $sgpr035 ; GFX9-NEXT: {{ $}}36 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr037 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364838 ; GFX9-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc39 ; GFX9-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]40 ;41 ; GFX10-LABEL: name: fneg_s32_ss42 ; GFX10: liveins: $sgpr043 ; GFX10-NEXT: {{ $}}44 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr045 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364846 ; GFX10-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc47 ; GFX10-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]48 %0:sgpr(s32) = COPY $sgpr049 %1:sgpr(s32) = G_FNEG %050 $sgpr0 = COPY %151...52 53---54name: fneg_s32_vv55legalized: true56regBankSelected: true57tracksRegLiveness: true58 59body: |60 bb.0:61 liveins: $vgpr062 ; SI-LABEL: name: fneg_s32_vv63 ; SI: liveins: $vgpr064 ; SI-NEXT: {{ $}}65 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr066 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364867 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec68 ; SI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]69 ;70 ; VI-LABEL: name: fneg_s32_vv71 ; VI: liveins: $vgpr072 ; VI-NEXT: {{ $}}73 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr074 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364875 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec76 ; VI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]77 ;78 ; GFX9-LABEL: name: fneg_s32_vv79 ; GFX9: liveins: $vgpr080 ; GFX9-NEXT: {{ $}}81 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr082 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364883 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec84 ; GFX9-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]85 ;86 ; GFX10-LABEL: name: fneg_s32_vv87 ; GFX10: liveins: $vgpr088 ; GFX10-NEXT: {{ $}}89 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr090 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 214748364891 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec92 ; GFX10-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]93 %0:vgpr(s32) = COPY $vgpr094 %1:vgpr(s32) = G_FNEG %095 $vgpr0 = COPY %196...97 98---99name: fneg_s32_vs100legalized: true101regBankSelected: true102tracksRegLiveness: true103 104body: |105 bb.0:106 liveins: $sgpr0107 ; SI-LABEL: name: fneg_s32_vs108 ; SI: liveins: $sgpr0109 ; SI-NEXT: {{ $}}110 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0111 ; SI-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(s32) = G_FNEG [[COPY]]112 ; SI-NEXT: $vgpr0 = COPY [[FNEG]](s32)113 ;114 ; VI-LABEL: name: fneg_s32_vs115 ; VI: liveins: $sgpr0116 ; VI-NEXT: {{ $}}117 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0118 ; VI-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(s32) = G_FNEG [[COPY]]119 ; VI-NEXT: $vgpr0 = COPY [[FNEG]](s32)120 ;121 ; GFX9-LABEL: name: fneg_s32_vs122 ; GFX9: liveins: $sgpr0123 ; GFX9-NEXT: {{ $}}124 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0125 ; GFX9-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(s32) = G_FNEG [[COPY]]126 ; GFX9-NEXT: $vgpr0 = COPY [[FNEG]](s32)127 ;128 ; GFX10-LABEL: name: fneg_s32_vs129 ; GFX10: liveins: $sgpr0130 ; GFX10-NEXT: {{ $}}131 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0132 ; GFX10-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(s32) = G_FNEG [[COPY]]133 ; GFX10-NEXT: $vgpr0 = COPY [[FNEG]](s32)134 %0:sgpr(s32) = COPY $sgpr0135 %1:vgpr(s32) = G_FNEG %0136 $vgpr0 = COPY %1137...138 139---140name: fneg_s16_ss141legalized: true142regBankSelected: true143tracksRegLiveness: true144 145body: |146 bb.0:147 liveins: $sgpr0148 ; SI-LABEL: name: fneg_s16_ss149 ; SI: liveins: $sgpr0150 ; SI-NEXT: {{ $}}151 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0152 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768153 ; SI-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc154 ; SI-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]155 ;156 ; VI-LABEL: name: fneg_s16_ss157 ; VI: liveins: $sgpr0158 ; VI-NEXT: {{ $}}159 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0160 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768161 ; VI-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc162 ; VI-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]163 ;164 ; GFX9-LABEL: name: fneg_s16_ss165 ; GFX9: liveins: $sgpr0166 ; GFX9-NEXT: {{ $}}167 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0168 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768169 ; GFX9-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc170 ; GFX9-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]171 ;172 ; GFX10-LABEL: name: fneg_s16_ss173 ; GFX10: liveins: $sgpr0174 ; GFX10-NEXT: {{ $}}175 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0176 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768177 ; GFX10-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc178 ; GFX10-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]179 %0:sgpr(s32) = COPY $sgpr0180 %1:sgpr(s16) = G_TRUNC %0181 %2:sgpr(s16) = G_FNEG %1182 %3:sgpr(s32) = G_ANYEXT %2183 $sgpr0 = COPY %3184...185 186---187name: fneg_s16_vv188legalized: true189regBankSelected: true190tracksRegLiveness: true191 192body: |193 bb.0:194 liveins: $vgpr0195 ; SI-LABEL: name: fneg_s16_vv196 ; SI: liveins: $vgpr0197 ; SI-NEXT: {{ $}}198 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0199 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768200 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec201 ; SI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]202 ;203 ; VI-LABEL: name: fneg_s16_vv204 ; VI: liveins: $vgpr0205 ; VI-NEXT: {{ $}}206 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0207 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768208 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec209 ; VI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]210 ;211 ; GFX9-LABEL: name: fneg_s16_vv212 ; GFX9: liveins: $vgpr0213 ; GFX9-NEXT: {{ $}}214 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0215 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768216 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec217 ; GFX9-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]218 ;219 ; GFX10-LABEL: name: fneg_s16_vv220 ; GFX10: liveins: $vgpr0221 ; GFX10-NEXT: {{ $}}222 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0223 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768224 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec225 ; GFX10-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]226 %0:vgpr(s32) = COPY $vgpr0227 %1:vgpr(s16) = G_TRUNC %0228 %2:vgpr(s16) = G_FNEG %1229 %3:vgpr(s32) = G_ANYEXT %2230 $vgpr0 = COPY %3231...232 233---234name: fneg_s16_vs235legalized: true236regBankSelected: true237tracksRegLiveness: true238 239body: |240 bb.0:241 liveins: $sgpr0242 243 ; SI-LABEL: name: fneg_s16_vs244 ; SI: liveins: $sgpr0245 ; SI-NEXT: {{ $}}246 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0247 ; SI-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)248 ; SI-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[TRUNC]]249 ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FNEG]](s16)250 ; SI-NEXT: $vgpr0 = COPY [[COPY1]](s32)251 ;252 ; VI-LABEL: name: fneg_s16_vs253 ; VI: liveins: $sgpr0254 ; VI-NEXT: {{ $}}255 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0256 ; VI-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)257 ; VI-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[TRUNC]]258 ; VI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FNEG]](s16)259 ; VI-NEXT: $vgpr0 = COPY [[COPY1]](s32)260 ;261 ; GFX9-LABEL: name: fneg_s16_vs262 ; GFX9: liveins: $sgpr0263 ; GFX9-NEXT: {{ $}}264 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0265 ; GFX9-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)266 ; GFX9-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[TRUNC]]267 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FNEG]](s16)268 ; GFX9-NEXT: $vgpr0 = COPY [[COPY1]](s32)269 ;270 ; GFX10-LABEL: name: fneg_s16_vs271 ; GFX10: liveins: $sgpr0272 ; GFX10-NEXT: {{ $}}273 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0274 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)275 ; GFX10-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[TRUNC]]276 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FNEG]](s16)277 ; GFX10-NEXT: $vgpr0 = COPY [[COPY1]](s32)278 %0:sgpr(s32) = COPY $sgpr0279 %1:sgpr(s16) = G_TRUNC %0280 %2:vgpr(s16) = G_FNEG %1281 %3:vgpr(s32) = G_ANYEXT %2282 $vgpr0 = COPY %3283...284 285---286name: fneg_v2s16_ss287legalized: true288regBankSelected: true289tracksRegLiveness: true290 291body: |292 bb.0:293 liveins: $sgpr0_sgpr1294 ; SI-LABEL: name: fneg_v2s16_ss295 ; SI: liveins: $sgpr0_sgpr1296 ; SI-NEXT: {{ $}}297 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0298 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416299 ; SI-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc300 ; SI-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]301 ;302 ; VI-LABEL: name: fneg_v2s16_ss303 ; VI: liveins: $sgpr0_sgpr1304 ; VI-NEXT: {{ $}}305 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0306 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416307 ; VI-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc308 ; VI-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]309 ;310 ; GFX9-LABEL: name: fneg_v2s16_ss311 ; GFX9: liveins: $sgpr0_sgpr1312 ; GFX9-NEXT: {{ $}}313 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0314 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416315 ; GFX9-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc316 ; GFX9-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]317 ;318 ; GFX10-LABEL: name: fneg_v2s16_ss319 ; GFX10: liveins: $sgpr0_sgpr1320 ; GFX10-NEXT: {{ $}}321 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0322 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416323 ; GFX10-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc324 ; GFX10-NEXT: $sgpr0 = COPY [[S_XOR_B32_]]325 %0:sgpr(<2 x s16>) = COPY $sgpr0326 %1:sgpr(<2 x s16>) = G_FNEG %0327 $sgpr0 = COPY %1328...329 330---331name: fneg_v2s16_vv332legalized: true333regBankSelected: true334tracksRegLiveness: true335 336body: |337 bb.0:338 liveins: $vgpr0339 ; SI-LABEL: name: fneg_v2s16_vv340 ; SI: liveins: $vgpr0341 ; SI-NEXT: {{ $}}342 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0343 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416344 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec345 ; SI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]346 ;347 ; VI-LABEL: name: fneg_v2s16_vv348 ; VI: liveins: $vgpr0349 ; VI-NEXT: {{ $}}350 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0351 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416352 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec353 ; VI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]354 ;355 ; GFX9-LABEL: name: fneg_v2s16_vv356 ; GFX9: liveins: $vgpr0357 ; GFX9-NEXT: {{ $}}358 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0359 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416360 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec361 ; GFX9-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]362 ;363 ; GFX10-LABEL: name: fneg_v2s16_vv364 ; GFX10: liveins: $vgpr0365 ; GFX10-NEXT: {{ $}}366 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0367 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416368 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec369 ; GFX10-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]370 %0:vgpr(<2 x s16>) = COPY $vgpr0371 %1:vgpr(<2 x s16>) = G_FNEG %0372 $vgpr0 = COPY %1373...374 375---376name: fneg_v2s16_vs377legalized: true378regBankSelected: true379tracksRegLiveness: true380 381body: |382 bb.0:383 liveins: $sgpr0384 ; SI-LABEL: name: fneg_v2s16_vs385 ; SI: liveins: $sgpr0386 ; SI-NEXT: {{ $}}387 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0388 ; SI-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FNEG [[COPY]]389 ; SI-NEXT: $vgpr0 = COPY [[FNEG]](<2 x s16>)390 ;391 ; VI-LABEL: name: fneg_v2s16_vs392 ; VI: liveins: $sgpr0393 ; VI-NEXT: {{ $}}394 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0395 ; VI-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FNEG [[COPY]]396 ; VI-NEXT: $vgpr0 = COPY [[FNEG]](<2 x s16>)397 ;398 ; GFX9-LABEL: name: fneg_v2s16_vs399 ; GFX9: liveins: $sgpr0400 ; GFX9-NEXT: {{ $}}401 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0402 ; GFX9-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FNEG [[COPY]]403 ; GFX9-NEXT: $vgpr0 = COPY [[FNEG]](<2 x s16>)404 ;405 ; GFX10-LABEL: name: fneg_v2s16_vs406 ; GFX10: liveins: $sgpr0407 ; GFX10-NEXT: {{ $}}408 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0409 ; GFX10-NEXT: [[FNEG:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FNEG [[COPY]]410 ; GFX10-NEXT: $vgpr0 = COPY [[FNEG]](<2 x s16>)411 %0:sgpr(<2 x s16>) = COPY $sgpr0412 %1:vgpr(<2 x s16>) = G_FNEG %0413 $vgpr0 = COPY %1414...415 416---417name: fneg_s64_ss418legalized: true419regBankSelected: true420tracksRegLiveness: true421 422body: |423 bb.0:424 liveins: $sgpr0_sgpr1425 ; SI-LABEL: name: fneg_s64_ss426 ; SI: liveins: $sgpr0_sgpr1427 ; SI-NEXT: {{ $}}428 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1429 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648430 ; SI-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1431 ; SI-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc432 ; SI-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_XOR_B32_]]433 ; SI-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub0434 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1435 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]436 ;437 ; VI-LABEL: name: fneg_s64_ss438 ; VI: liveins: $sgpr0_sgpr1439 ; VI-NEXT: {{ $}}440 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1441 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648442 ; VI-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1443 ; VI-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc444 ; VI-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_XOR_B32_]]445 ; VI-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub0446 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1447 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]448 ;449 ; GFX9-LABEL: name: fneg_s64_ss450 ; GFX9: liveins: $sgpr0_sgpr1451 ; GFX9-NEXT: {{ $}}452 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1453 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648454 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1455 ; GFX9-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc456 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_XOR_B32_]]457 ; GFX9-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub0458 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1459 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]460 ;461 ; GFX10-LABEL: name: fneg_s64_ss462 ; GFX10: liveins: $sgpr0_sgpr1463 ; GFX10-NEXT: {{ $}}464 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1465 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648466 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub1467 ; GFX10-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc468 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_XOR_B32_]]469 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub0470 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub1471 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]472 %0:sgpr(s64) = COPY $sgpr0_sgpr1473 %1:sgpr(s64) = G_FNEG %0474 S_ENDPGM 0, implicit %1475...476 477---478name: fneg_s64_vv479legalized: true480regBankSelected: true481tracksRegLiveness: true482 483body: |484 bb.0:485 liveins: $vgpr0_vgpr1486 ; SI-LABEL: name: fneg_s64_vv487 ; SI: liveins: $vgpr0_vgpr1488 ; SI-NEXT: {{ $}}489 ; SI-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1490 ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1491 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648492 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec493 ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0494 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_XOR_B32_e64_]], %subreg.sub1495 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]496 ;497 ; VI-LABEL: name: fneg_s64_vv498 ; VI: liveins: $vgpr0_vgpr1499 ; VI-NEXT: {{ $}}500 ; VI-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1501 ; VI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1502 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648503 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec504 ; VI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0505 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_XOR_B32_e64_]], %subreg.sub1506 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]507 ;508 ; GFX9-LABEL: name: fneg_s64_vv509 ; GFX9: liveins: $vgpr0_vgpr1510 ; GFX9-NEXT: {{ $}}511 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1512 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1513 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648514 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec515 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0516 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_XOR_B32_e64_]], %subreg.sub1517 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]518 ;519 ; GFX10-LABEL: name: fneg_s64_vv520 ; GFX10: liveins: $vgpr0_vgpr1521 ; GFX10-NEXT: {{ $}}522 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1523 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1524 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648525 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec526 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0527 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_XOR_B32_e64_]], %subreg.sub1528 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]529 %0:vgpr(s64) = COPY $vgpr0_vgpr1530 %1:vgpr(s64) = G_FNEG %0531 S_ENDPGM 0, implicit %1532...533 534---535name: fneg_s64_vs536legalized: true537regBankSelected: true538tracksRegLiveness: true539 540body: |541 bb.0:542 liveins: $sgpr0_sgpr1543 ; SI-LABEL: name: fneg_s64_vs544 ; SI: liveins: $sgpr0_sgpr1545 ; SI-NEXT: {{ $}}546 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1547 ; SI-NEXT: [[FNEG:%[0-9]+]]:vgpr(s64) = G_FNEG [[COPY]]548 ; SI-NEXT: S_ENDPGM 0, implicit [[FNEG]](s64)549 ;550 ; VI-LABEL: name: fneg_s64_vs551 ; VI: liveins: $sgpr0_sgpr1552 ; VI-NEXT: {{ $}}553 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1554 ; VI-NEXT: [[FNEG:%[0-9]+]]:vgpr(s64) = G_FNEG [[COPY]]555 ; VI-NEXT: S_ENDPGM 0, implicit [[FNEG]](s64)556 ;557 ; GFX9-LABEL: name: fneg_s64_vs558 ; GFX9: liveins: $sgpr0_sgpr1559 ; GFX9-NEXT: {{ $}}560 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1561 ; GFX9-NEXT: [[FNEG:%[0-9]+]]:vgpr(s64) = G_FNEG [[COPY]]562 ; GFX9-NEXT: S_ENDPGM 0, implicit [[FNEG]](s64)563 ;564 ; GFX10-LABEL: name: fneg_s64_vs565 ; GFX10: liveins: $sgpr0_sgpr1566 ; GFX10-NEXT: {{ $}}567 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1568 ; GFX10-NEXT: [[FNEG:%[0-9]+]]:vgpr(s64) = G_FNEG [[COPY]]569 ; GFX10-NEXT: S_ENDPGM 0, implicit [[FNEG]](s64)570 %0:sgpr(s64) = COPY $sgpr0_sgpr1571 %1:vgpr(s64) = G_FNEG %0572 S_ENDPGM 0, implicit %1573 574...575 576---577name: fneg_fabs_s32_ss578legalized: true579regBankSelected: true580tracksRegLiveness: true581 582body: |583 bb.0:584 liveins: $sgpr0_sgpr1585 ; SI-LABEL: name: fneg_fabs_s32_ss586 ; SI: liveins: $sgpr0_sgpr1587 ; SI-NEXT: {{ $}}588 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0589 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648590 ; SI-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc591 ; SI-NEXT: S_ENDPGM 0, implicit [[S_OR_B32_]]592 ;593 ; VI-LABEL: name: fneg_fabs_s32_ss594 ; VI: liveins: $sgpr0_sgpr1595 ; VI-NEXT: {{ $}}596 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0597 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648598 ; VI-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc599 ; VI-NEXT: S_ENDPGM 0, implicit [[S_OR_B32_]]600 ;601 ; GFX9-LABEL: name: fneg_fabs_s32_ss602 ; GFX9: liveins: $sgpr0_sgpr1603 ; GFX9-NEXT: {{ $}}604 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0605 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648606 ; GFX9-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc607 ; GFX9-NEXT: S_ENDPGM 0, implicit [[S_OR_B32_]]608 ;609 ; GFX10-LABEL: name: fneg_fabs_s32_ss610 ; GFX10: liveins: $sgpr0_sgpr1611 ; GFX10-NEXT: {{ $}}612 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0613 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648614 ; GFX10-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc615 ; GFX10-NEXT: S_ENDPGM 0, implicit [[S_OR_B32_]]616 %0:sgpr(s32) = COPY $sgpr0617 %1:sgpr(s32) = G_FABS %0618 %2:sgpr(s32) = G_FNEG %1619 S_ENDPGM 0, implicit %2620...621 622---623name: fneg_fabs_s32_vv624legalized: true625regBankSelected: true626tracksRegLiveness: true627 628body: |629 bb.0:630 liveins: $vgpr0631 ; SI-LABEL: name: fneg_fabs_s32_vv632 ; SI: liveins: $vgpr0633 ; SI-NEXT: {{ $}}634 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0635 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648636 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec637 ; SI-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]638 ;639 ; VI-LABEL: name: fneg_fabs_s32_vv640 ; VI: liveins: $vgpr0641 ; VI-NEXT: {{ $}}642 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0643 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648644 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec645 ; VI-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]646 ;647 ; GFX9-LABEL: name: fneg_fabs_s32_vv648 ; GFX9: liveins: $vgpr0649 ; GFX9-NEXT: {{ $}}650 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0651 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648652 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec653 ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]654 ;655 ; GFX10-LABEL: name: fneg_fabs_s32_vv656 ; GFX10: liveins: $vgpr0657 ; GFX10-NEXT: {{ $}}658 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0659 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648660 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec661 ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]662 %0:vgpr(s32) = COPY $vgpr0663 %1:vgpr(s32) = G_FABS %0664 %2:vgpr(s32) = G_FNEG %0665 S_ENDPGM 0, implicit %2666...667 668---669name: fneg_fabs_s32_vs670legalized: true671regBankSelected: true672tracksRegLiveness: true673 674body: |675 bb.0:676 liveins: $sgpr0677 ; SI-LABEL: name: fneg_fabs_s32_vs678 ; SI: liveins: $sgpr0679 ; SI-NEXT: {{ $}}680 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0681 ; SI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]682 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 2147483648683 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(s32) = V_XOR_B32_e64 [[S_MOV_B32_]](s16), [[FABS]](s32), implicit $exec684 ; SI-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]](s32)685 ;686 ; VI-LABEL: name: fneg_fabs_s32_vs687 ; VI: liveins: $sgpr0688 ; VI-NEXT: {{ $}}689 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0690 ; VI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]691 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 2147483648692 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(s32) = V_XOR_B32_e64 [[S_MOV_B32_]](s16), [[FABS]](s32), implicit $exec693 ; VI-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]](s32)694 ;695 ; GFX9-LABEL: name: fneg_fabs_s32_vs696 ; GFX9: liveins: $sgpr0697 ; GFX9-NEXT: {{ $}}698 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0699 ; GFX9-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]700 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 2147483648701 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(s32) = V_XOR_B32_e64 [[S_MOV_B32_]](s16), [[FABS]](s32), implicit $exec702 ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]](s32)703 ;704 ; GFX10-LABEL: name: fneg_fabs_s32_vs705 ; GFX10: liveins: $sgpr0706 ; GFX10-NEXT: {{ $}}707 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0708 ; GFX10-NEXT: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]709 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 2147483648710 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(s32) = V_XOR_B32_e64 [[S_MOV_B32_]](s16), [[FABS]](s32), implicit $exec711 ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]](s32)712 %0:sgpr(s32) = COPY $sgpr0713 %1:vgpr(s32) = G_FABS %0714 %2:vgpr(s32) = G_FNEG %1715 S_ENDPGM 0, implicit %2716...717 718---719name: fneg_fabs_s16_ss720legalized: true721regBankSelected: true722tracksRegLiveness: true723 724body: |725 bb.0:726 liveins: $sgpr0727 ; SI-LABEL: name: fneg_fabs_s16_ss728 ; SI: liveins: $sgpr0729 ; SI-NEXT: {{ $}}730 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0731 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768732 ; SI-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc733 ; SI-NEXT: $sgpr0 = COPY [[S_OR_B32_]]734 ;735 ; VI-LABEL: name: fneg_fabs_s16_ss736 ; VI: liveins: $sgpr0737 ; VI-NEXT: {{ $}}738 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0739 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768740 ; VI-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc741 ; VI-NEXT: $sgpr0 = COPY [[S_OR_B32_]]742 ;743 ; GFX9-LABEL: name: fneg_fabs_s16_ss744 ; GFX9: liveins: $sgpr0745 ; GFX9-NEXT: {{ $}}746 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0747 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768748 ; GFX9-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc749 ; GFX9-NEXT: $sgpr0 = COPY [[S_OR_B32_]]750 ;751 ; GFX10-LABEL: name: fneg_fabs_s16_ss752 ; GFX10: liveins: $sgpr0753 ; GFX10-NEXT: {{ $}}754 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0755 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768756 ; GFX10-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc757 ; GFX10-NEXT: $sgpr0 = COPY [[S_OR_B32_]]758 %0:sgpr(s32) = COPY $sgpr0759 %1:sgpr(s16) = G_TRUNC %0760 %2:sgpr(s16) = G_FABS %1761 %3:sgpr(s16) = G_FNEG %2762 %4:sgpr(s32) = G_ANYEXT %3763 $sgpr0 = COPY %4764...765 766---767name: fneg_fabs_s16_vv768legalized: true769regBankSelected: true770tracksRegLiveness: true771 772body: |773 bb.0:774 liveins: $vgpr0775 ; SI-LABEL: name: fneg_fabs_s16_vv776 ; SI: liveins: $vgpr0777 ; SI-NEXT: {{ $}}778 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0779 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768780 ; SI-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec781 ; SI-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[V_OR_B32_e64_]]782 ; SI-NEXT: $vgpr0 = COPY [[COPY1]]783 ;784 ; VI-LABEL: name: fneg_fabs_s16_vv785 ; VI: liveins: $vgpr0786 ; VI-NEXT: {{ $}}787 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0788 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768789 ; VI-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec790 ; VI-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[V_OR_B32_e64_]]791 ; VI-NEXT: $vgpr0 = COPY [[COPY1]]792 ;793 ; GFX9-LABEL: name: fneg_fabs_s16_vv794 ; GFX9: liveins: $vgpr0795 ; GFX9-NEXT: {{ $}}796 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0797 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768798 ; GFX9-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec799 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[V_OR_B32_e64_]]800 ; GFX9-NEXT: $vgpr0 = COPY [[COPY1]]801 ;802 ; GFX10-LABEL: name: fneg_fabs_s16_vv803 ; GFX10: liveins: $vgpr0804 ; GFX10-NEXT: {{ $}}805 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0806 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768807 ; GFX10-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec808 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[V_OR_B32_e64_]]809 ; GFX10-NEXT: $vgpr0 = COPY [[COPY1]]810 %0:vgpr(s32) = COPY $vgpr0811 %1:vgpr(s16) = G_TRUNC %0812 %2:vgpr(s16) = G_FABS %1813 %3:vgpr(s16) = G_FNEG %2814 %4:sgpr(s32) = G_ANYEXT %3815 $vgpr0 = COPY %4816...817 818---819name: fneg_fabs_s16_vs820legalized: true821regBankSelected: true822tracksRegLiveness: true823 824body: |825 bb.0:826 liveins: $sgpr0827 828 ; SI-LABEL: name: fneg_fabs_s16_vs829 ; SI: liveins: $sgpr0830 ; SI-NEXT: {{ $}}831 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0832 ; SI-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)833 ; SI-NEXT: [[FNEG:%[0-9]+]]:sgpr(s16) = G_FNEG [[TRUNC]]834 ; SI-NEXT: [[FNEG1:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[FNEG]]835 ; SI-NEXT: [[COPY1:%[0-9]+]]:sreg_32(s32) = COPY [[FNEG1]](s16)836 ; SI-NEXT: $vgpr0 = COPY [[COPY1]](s32)837 ;838 ; VI-LABEL: name: fneg_fabs_s16_vs839 ; VI: liveins: $sgpr0840 ; VI-NEXT: {{ $}}841 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0842 ; VI-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)843 ; VI-NEXT: [[FNEG:%[0-9]+]]:sgpr(s16) = G_FNEG [[TRUNC]]844 ; VI-NEXT: [[FNEG1:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[FNEG]]845 ; VI-NEXT: [[COPY1:%[0-9]+]]:sreg_32(s32) = COPY [[FNEG1]](s16)846 ; VI-NEXT: $vgpr0 = COPY [[COPY1]](s32)847 ;848 ; GFX9-LABEL: name: fneg_fabs_s16_vs849 ; GFX9: liveins: $sgpr0850 ; GFX9-NEXT: {{ $}}851 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0852 ; GFX9-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)853 ; GFX9-NEXT: [[FNEG:%[0-9]+]]:sgpr(s16) = G_FNEG [[TRUNC]]854 ; GFX9-NEXT: [[FNEG1:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[FNEG]]855 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32(s32) = COPY [[FNEG1]](s16)856 ; GFX9-NEXT: $vgpr0 = COPY [[COPY1]](s32)857 ;858 ; GFX10-LABEL: name: fneg_fabs_s16_vs859 ; GFX10: liveins: $sgpr0860 ; GFX10-NEXT: {{ $}}861 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0862 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)863 ; GFX10-NEXT: [[FNEG:%[0-9]+]]:sgpr(s16) = G_FNEG [[TRUNC]]864 ; GFX10-NEXT: [[FNEG1:%[0-9]+]]:vgpr_32(s16) = G_FNEG [[FNEG]]865 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32(s32) = COPY [[FNEG1]](s16)866 ; GFX10-NEXT: $vgpr0 = COPY [[COPY1]](s32)867 %0:sgpr(s32) = COPY $sgpr0868 %1:sgpr(s16) = G_TRUNC %0869 %2:sgpr(s16) = G_FNEG %1870 %3:vgpr(s16) = G_FNEG %2871 %4:sgpr(s32) = G_ANYEXT %3872 $vgpr0 = COPY %4873...874 875---876name: fneg_fabs_v2s16_ss877legalized: true878regBankSelected: true879tracksRegLiveness: true880 881body: |882 bb.0:883 liveins: $sgpr0_sgpr1884 ; SI-LABEL: name: fneg_fabs_v2s16_ss885 ; SI: liveins: $sgpr0_sgpr1886 ; SI-NEXT: {{ $}}887 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0888 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416889 ; SI-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc890 ; SI-NEXT: $sgpr0 = COPY [[S_OR_B32_]]891 ;892 ; VI-LABEL: name: fneg_fabs_v2s16_ss893 ; VI: liveins: $sgpr0_sgpr1894 ; VI-NEXT: {{ $}}895 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0896 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416897 ; VI-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc898 ; VI-NEXT: $sgpr0 = COPY [[S_OR_B32_]]899 ;900 ; GFX9-LABEL: name: fneg_fabs_v2s16_ss901 ; GFX9: liveins: $sgpr0_sgpr1902 ; GFX9-NEXT: {{ $}}903 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0904 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416905 ; GFX9-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc906 ; GFX9-NEXT: $sgpr0 = COPY [[S_OR_B32_]]907 ;908 ; GFX10-LABEL: name: fneg_fabs_v2s16_ss909 ; GFX10: liveins: $sgpr0_sgpr1910 ; GFX10-NEXT: {{ $}}911 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0912 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416913 ; GFX10-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[S_MOV_B32_]], implicit-def dead $scc914 ; GFX10-NEXT: $sgpr0 = COPY [[S_OR_B32_]]915 %0:sgpr(<2 x s16>) = COPY $sgpr0916 %1:sgpr(<2 x s16>) = G_FABS %0917 %2:sgpr(<2 x s16>) = G_FNEG %1918 $sgpr0 = COPY %2919...920 921---922name: fneg_fabs_v2s16_vv923legalized: true924regBankSelected: true925tracksRegLiveness: true926 927body: |928 bb.0:929 liveins: $vgpr0930 ; SI-LABEL: name: fneg_fabs_v2s16_vv931 ; SI: liveins: $vgpr0932 ; SI-NEXT: {{ $}}933 ; SI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0934 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416935 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec936 ; SI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]937 ;938 ; VI-LABEL: name: fneg_fabs_v2s16_vv939 ; VI: liveins: $vgpr0940 ; VI-NEXT: {{ $}}941 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0942 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416943 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec944 ; VI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]945 ;946 ; GFX9-LABEL: name: fneg_fabs_v2s16_vv947 ; GFX9: liveins: $vgpr0948 ; GFX9-NEXT: {{ $}}949 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0950 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416951 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec952 ; GFX9-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]953 ;954 ; GFX10-LABEL: name: fneg_fabs_v2s16_vv955 ; GFX10: liveins: $vgpr0956 ; GFX10-NEXT: {{ $}}957 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0958 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416959 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec960 ; GFX10-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]]961 %0:vgpr(<2 x s16>) = COPY $vgpr0962 %1:vgpr(<2 x s16>) = G_FABS %0963 %2:vgpr(<2 x s16>) = G_FNEG %0964 $vgpr0 = COPY %2965...966 967---968name: fneg_fabs_v2s16_vs969legalized: true970regBankSelected: true971tracksRegLiveness: true972 973body: |974 bb.0:975 liveins: $sgpr0976 ; SI-LABEL: name: fneg_fabs_v2s16_vs977 ; SI: liveins: $sgpr0978 ; SI-NEXT: {{ $}}979 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0980 ; SI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]981 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 2147516416982 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(<2 x s16>) = V_XOR_B32_e64 [[S_MOV_B32_]](s16), [[FABS]](<2 x s16>), implicit $exec983 ; SI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]](<2 x s16>)984 ;985 ; VI-LABEL: name: fneg_fabs_v2s16_vs986 ; VI: liveins: $sgpr0987 ; VI-NEXT: {{ $}}988 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0989 ; VI-NEXT: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]990 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 2147516416991 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(<2 x s16>) = V_XOR_B32_e64 [[S_MOV_B32_]](s16), [[FABS]](<2 x s16>), implicit $exec992 ; VI-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]](<2 x s16>)993 ;994 ; GFX9-LABEL: name: fneg_fabs_v2s16_vs995 ; GFX9: liveins: $sgpr0996 ; GFX9-NEXT: {{ $}}997 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0998 ; GFX9-NEXT: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]999 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 21475164161000 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(<2 x s16>) = V_XOR_B32_e64 [[S_MOV_B32_]](s16), [[FABS]](<2 x s16>), implicit $exec1001 ; GFX9-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]](<2 x s16>)1002 ;1003 ; GFX10-LABEL: name: fneg_fabs_v2s16_vs1004 ; GFX10: liveins: $sgpr01005 ; GFX10-NEXT: {{ $}}1006 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr01007 ; GFX10-NEXT: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]1008 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s16) = S_MOV_B32 21475164161009 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(<2 x s16>) = V_XOR_B32_e64 [[S_MOV_B32_]](s16), [[FABS]](<2 x s16>), implicit $exec1010 ; GFX10-NEXT: $vgpr0 = COPY [[V_XOR_B32_e64_]](<2 x s16>)1011 %0:sgpr(<2 x s16>) = COPY $sgpr01012 %1:vgpr(<2 x s16>) = G_FABS %01013 %2:vgpr(<2 x s16>) = G_FNEG %11014 $vgpr0 = COPY %21015...1016 1017---1018name: fneg_fabs_s64_ss1019legalized: true1020regBankSelected: true1021tracksRegLiveness: true1022 1023body: |1024 bb.0:1025 liveins: $sgpr0_sgpr11026 ; SI-LABEL: name: fneg_fabs_s64_ss1027 ; SI: liveins: $sgpr0_sgpr11028 ; SI-NEXT: {{ $}}1029 ; SI-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr11030 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 21474836481031 ; SI-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub11032 ; SI-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc1033 ; SI-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_OR_B32_]]1034 ; SI-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub01035 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub11036 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]1037 ;1038 ; VI-LABEL: name: fneg_fabs_s64_ss1039 ; VI: liveins: $sgpr0_sgpr11040 ; VI-NEXT: {{ $}}1041 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr11042 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 21474836481043 ; VI-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub11044 ; VI-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc1045 ; VI-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_OR_B32_]]1046 ; VI-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub01047 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub11048 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]1049 ;1050 ; GFX9-LABEL: name: fneg_fabs_s64_ss1051 ; GFX9: liveins: $sgpr0_sgpr11052 ; GFX9-NEXT: {{ $}}1053 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr11054 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 21474836481055 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub11056 ; GFX9-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc1057 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_OR_B32_]]1058 ; GFX9-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub01059 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub11060 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]1061 ;1062 ; GFX10-LABEL: name: fneg_fabs_s64_ss1063 ; GFX10: liveins: $sgpr0_sgpr11064 ; GFX10-NEXT: {{ $}}1065 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr11066 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 21474836481067 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY]].sub11068 ; GFX10-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc1069 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_OR_B32_]]1070 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY [[COPY]].sub01071 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY2]], %subreg.sub11072 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]1073 %0:sgpr(s64) = COPY $sgpr0_sgpr11074 %1:sgpr(s64) = G_FABS %01075 %2:sgpr(s64) = G_FNEG %11076 S_ENDPGM 0, implicit %21077...1078 1079---1080name: fneg_fabs_s64_vv1081legalized: true1082regBankSelected: true1083tracksRegLiveness: true1084 1085body: |1086 bb.0:1087 liveins: $vgpr0_vgpr11088 ; SI-LABEL: name: fneg_fabs_s64_vv1089 ; SI: liveins: $vgpr0_vgpr11090 ; SI-NEXT: {{ $}}1091 ; SI-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr11092 ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub11093 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 21474836481094 ; SI-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec1095 ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub01096 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_OR_B32_e64_]], %subreg.sub11097 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]1098 ;1099 ; VI-LABEL: name: fneg_fabs_s64_vv1100 ; VI: liveins: $vgpr0_vgpr11101 ; VI-NEXT: {{ $}}1102 ; VI-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr11103 ; VI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub11104 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 21474836481105 ; VI-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec1106 ; VI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub01107 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_OR_B32_e64_]], %subreg.sub11108 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]1109 ;1110 ; GFX9-LABEL: name: fneg_fabs_s64_vv1111 ; GFX9: liveins: $vgpr0_vgpr11112 ; GFX9-NEXT: {{ $}}1113 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr11114 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub11115 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 21474836481116 ; GFX9-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec1117 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub01118 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_OR_B32_e64_]], %subreg.sub11119 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]1120 ;1121 ; GFX10-LABEL: name: fneg_fabs_s64_vv1122 ; GFX10: liveins: $vgpr0_vgpr11123 ; GFX10-NEXT: {{ $}}1124 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr11125 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub11126 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 21474836481127 ; GFX10-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[S_MOV_B32_]], [[COPY1]], implicit $exec1128 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub01129 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[V_OR_B32_e64_]], %subreg.sub11130 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]1131 %0:vgpr(s64) = COPY $vgpr0_vgpr11132 %1:vgpr(s64) = G_FABS %01133 %2:vgpr(s64) = G_FNEG %11134 S_ENDPGM 0, implicit %21135...1136 1137---1138name: fneg_fabs_s64_vs1139legalized: true1140regBankSelected: true1141tracksRegLiveness: true1142 1143body: |1144 bb.0:1145 liveins: $sgpr0_sgpr11146 ; SI-LABEL: name: fneg_fabs_s64_vs1147 ; SI: liveins: $sgpr0_sgpr11148 ; SI-NEXT: {{ $}}1149 ; SI-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr11150 ; SI-NEXT: [[FABS:%[0-9]+]]:vreg_64(s64) = G_FABS [[COPY]]1151 ; SI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub1(s64)1152 ; SI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 21474836481153 ; SI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(s16) = V_XOR_B32_e64 [[S_MOV_B32_]](s32), [[COPY1]](s32), implicit $exec1154 ; SI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub0(s64)1155 ; SI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64(s64) = REG_SEQUENCE [[COPY2]](s32), %subreg.sub0, [[V_XOR_B32_e64_]](s16), %subreg.sub11156 ; SI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]](s64)1157 ;1158 ; VI-LABEL: name: fneg_fabs_s64_vs1159 ; VI: liveins: $sgpr0_sgpr11160 ; VI-NEXT: {{ $}}1161 ; VI-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr11162 ; VI-NEXT: [[FABS:%[0-9]+]]:vreg_64(s64) = G_FABS [[COPY]]1163 ; VI-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub1(s64)1164 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 21474836481165 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(s16) = V_XOR_B32_e64 [[S_MOV_B32_]](s32), [[COPY1]](s32), implicit $exec1166 ; VI-NEXT: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub0(s64)1167 ; VI-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64(s64) = REG_SEQUENCE [[COPY2]](s32), %subreg.sub0, [[V_XOR_B32_e64_]](s16), %subreg.sub11168 ; VI-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]](s64)1169 ;1170 ; GFX9-LABEL: name: fneg_fabs_s64_vs1171 ; GFX9: liveins: $sgpr0_sgpr11172 ; GFX9-NEXT: {{ $}}1173 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr11174 ; GFX9-NEXT: [[FABS:%[0-9]+]]:vreg_64(s64) = G_FABS [[COPY]]1175 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub1(s64)1176 ; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 21474836481177 ; GFX9-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(s16) = V_XOR_B32_e64 [[S_MOV_B32_]](s32), [[COPY1]](s32), implicit $exec1178 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub0(s64)1179 ; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64(s64) = REG_SEQUENCE [[COPY2]](s32), %subreg.sub0, [[V_XOR_B32_e64_]](s16), %subreg.sub11180 ; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]](s64)1181 ;1182 ; GFX10-LABEL: name: fneg_fabs_s64_vs1183 ; GFX10: liveins: $sgpr0_sgpr11184 ; GFX10-NEXT: {{ $}}1185 ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr11186 ; GFX10-NEXT: [[FABS:%[0-9]+]]:vreg_64(s64) = G_FABS [[COPY]]1187 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub1(s64)1188 ; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 21474836481189 ; GFX10-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32(s16) = V_XOR_B32_e64 [[S_MOV_B32_]](s32), [[COPY1]](s32), implicit $exec1190 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]].sub0(s64)1191 ; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64(s64) = REG_SEQUENCE [[COPY2]](s32), %subreg.sub0, [[V_XOR_B32_e64_]](s16), %subreg.sub11192 ; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]](s64)1193 %0:sgpr(s64) = COPY $sgpr0_sgpr11194 %1:vgpr(s64) = G_FABS %01195 %2:vgpr(s64) = G_FNEG %11196 S_ENDPGM 0, implicit %21197...1198