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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=GCN3# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=VI4# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=GFX11,GFX11-TRUE165# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=GFX11,GFX11-FAKE166 7---8name: fptosi_s32_to_s32_vv9legalized: true10regBankSelected: true11tracksRegLiveness: true12 13body: |14 bb.0:15 liveins: $vgpr016 17 ; GCN-LABEL: name: fptosi_s32_to_s32_vv18 ; GCN: liveins: $vgpr019 ; GCN-NEXT: {{ $}}20 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr021 ; GCN-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec22 ; GCN-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]23 ;24 ; VI-LABEL: name: fptosi_s32_to_s32_vv25 ; VI: liveins: $vgpr026 ; VI-NEXT: {{ $}}27 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr028 ; VI-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec29 ; VI-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]30 ;31 ; GFX11-LABEL: name: fptosi_s32_to_s32_vv32 ; GFX11: liveins: $vgpr033 ; GFX11-NEXT: {{ $}}34 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr035 ; GFX11-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec36 ; GFX11-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]37 %0:vgpr(s32) = COPY $vgpr038 %1:vgpr(s32) = G_FPTOSI %039 $vgpr0 = COPY %140...41 42---43name: fptosi_s32_to_s32_vs44legalized: true45regBankSelected: true46tracksRegLiveness: true47 48body: |49 bb.0:50 liveins: $sgpr051 52 ; GCN-LABEL: name: fptosi_s32_to_s32_vs53 ; GCN: liveins: $sgpr054 ; GCN-NEXT: {{ $}}55 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr056 ; GCN-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec57 ; GCN-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]58 ;59 ; VI-LABEL: name: fptosi_s32_to_s32_vs60 ; VI: liveins: $sgpr061 ; VI-NEXT: {{ $}}62 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr063 ; VI-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec64 ; VI-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]65 ;66 ; GFX11-LABEL: name: fptosi_s32_to_s32_vs67 ; GFX11: liveins: $sgpr068 ; GFX11-NEXT: {{ $}}69 ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr070 ; GFX11-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec71 ; GFX11-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]72 %0:sgpr(s32) = COPY $sgpr073 %1:vgpr(s32) = G_FPTOSI %074 $vgpr0 = COPY %175...76 77---78name: fptosi_s32_to_s32_fneg_vv79legalized: true80regBankSelected: true81tracksRegLiveness: true82 83body: |84 bb.0:85 liveins: $vgpr086 87 ; GCN-LABEL: name: fptosi_s32_to_s32_fneg_vv88 ; GCN: liveins: $vgpr089 ; GCN-NEXT: {{ $}}90 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr091 ; GCN-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec92 ; GCN-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]93 ;94 ; VI-LABEL: name: fptosi_s32_to_s32_fneg_vv95 ; VI: liveins: $vgpr096 ; VI-NEXT: {{ $}}97 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr098 ; VI-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec99 ; VI-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]100 ;101 ; GFX11-LABEL: name: fptosi_s32_to_s32_fneg_vv102 ; GFX11: liveins: $vgpr0103 ; GFX11-NEXT: {{ $}}104 ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0105 ; GFX11-NEXT: [[V_CVT_I32_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec106 ; GFX11-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e64_]]107 %0:vgpr(s32) = COPY $vgpr0108 %1:vgpr(s32) = G_FNEG %0109 %2:vgpr(s32) = G_FPTOSI %1110 $vgpr0 = COPY %2111...112 113---114name: fptosi_s16_to_s32_vv115legalized: true116regBankSelected: true117tracksRegLiveness: true118 119body: |120 bb.0:121 liveins: $vgpr0122 123 ; GCN-LABEL: name: fptosi_s16_to_s32_vv124 ; GCN: liveins: $vgpr0125 ; GCN-NEXT: {{ $}}126 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0127 ; GCN-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec128 ; GCN-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec129 ; GCN-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]130 ;131 ; VI-LABEL: name: fptosi_s16_to_s32_vv132 ; VI: liveins: $vgpr0133 ; VI-NEXT: {{ $}}134 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0135 ; VI-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec136 ; VI-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec137 ; VI-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]138 ;139 ; GFX11-TRUE16-LABEL: name: fptosi_s16_to_s32_vv140 ; GFX11-TRUE16: liveins: $vgpr0141 ; GFX11-TRUE16-NEXT: {{ $}}142 ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0143 ; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16144 ; GFX11-TRUE16-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec145 ; GFX11-TRUE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_t16_e64_]], implicit $mode, implicit $exec146 ; GFX11-TRUE16-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]147 ;148 ; GFX11-FAKE16-LABEL: name: fptosi_s16_to_s32_vv149 ; GFX11-FAKE16: liveins: $vgpr0150 ; GFX11-FAKE16-NEXT: {{ $}}151 ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0152 ; GFX11-FAKE16-NEXT: [[V_CVT_F32_F16_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_fake16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec153 ; GFX11-FAKE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_fake16_e64_]], implicit $mode, implicit $exec154 ; GFX11-FAKE16-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]155 %0:vgpr(s32) = COPY $vgpr0156 %1:vgpr(s16) = G_TRUNC %0157 %2:vgpr(s32) = G_FPTOSI %1158 $vgpr0 = COPY %2159...160 161---162name: fptosi_s16_to_s32_vs163legalized: true164regBankSelected: true165tracksRegLiveness: true166 167body: |168 bb.0:169 liveins: $sgpr0170 171 ; GCN-LABEL: name: fptosi_s16_to_s32_vs172 ; GCN: liveins: $sgpr0173 ; GCN-NEXT: {{ $}}174 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0175 ; GCN-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec176 ; GCN-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec177 ; GCN-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]178 ;179 ; VI-LABEL: name: fptosi_s16_to_s32_vs180 ; VI: liveins: $sgpr0181 ; VI-NEXT: {{ $}}182 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0183 ; VI-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec184 ; VI-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec185 ; VI-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]186 ;187 ; GFX11-TRUE16-LABEL: name: fptosi_s16_to_s32_vs188 ; GFX11-TRUE16: liveins: $sgpr0189 ; GFX11-TRUE16-NEXT: {{ $}}190 ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0191 ; GFX11-TRUE16-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec192 ; GFX11-TRUE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_t16_e64_]], implicit $mode, implicit $exec193 ; GFX11-TRUE16-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]194 ;195 ; GFX11-FAKE16-LABEL: name: fptosi_s16_to_s32_vs196 ; GFX11-FAKE16: liveins: $sgpr0197 ; GFX11-FAKE16-NEXT: {{ $}}198 ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0199 ; GFX11-FAKE16-NEXT: [[V_CVT_F32_F16_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_fake16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec200 ; GFX11-FAKE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_fake16_e64_]], implicit $mode, implicit $exec201 ; GFX11-FAKE16-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]202 %0:sgpr(s32) = COPY $sgpr0203 %1:sgpr(s16) = G_TRUNC %0204 %2:vgpr(s32) = G_FPTOSI %1205 $vgpr0 = COPY %2206...207 208---209name: fptosi_s16_to_s32_fneg_vv210legalized: true211regBankSelected: true212tracksRegLiveness: true213 214body: |215 bb.0:216 liveins: $vgpr0217 218 ; GCN-LABEL: name: fptosi_s16_to_s32_fneg_vv219 ; GCN: liveins: $vgpr0220 ; GCN-NEXT: {{ $}}221 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0222 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768223 ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec224 ; GCN-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec225 ; GCN-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec226 ; GCN-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]227 ;228 ; VI-LABEL: name: fptosi_s16_to_s32_fneg_vv229 ; VI: liveins: $vgpr0230 ; VI-NEXT: {{ $}}231 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0232 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768233 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec234 ; VI-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec235 ; VI-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec236 ; VI-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]237 ;238 ; GFX11-TRUE16-LABEL: name: fptosi_s16_to_s32_fneg_vv239 ; GFX11-TRUE16: liveins: $vgpr0240 ; GFX11-TRUE16-NEXT: {{ $}}241 ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0242 ; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16243 ; GFX11-TRUE16-NEXT: [[V_XOR_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_XOR_B16_t16_e64 0, 32768, 0, [[COPY1]], 0, implicit $exec244 ; GFX11-TRUE16-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[V_XOR_B16_t16_e64_]], 0, 0, 0, implicit $mode, implicit $exec245 ; GFX11-TRUE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_t16_e64_]], implicit $mode, implicit $exec246 ; GFX11-TRUE16-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]247 ;248 ; GFX11-FAKE16-LABEL: name: fptosi_s16_to_s32_fneg_vv249 ; GFX11-FAKE16: liveins: $vgpr0250 ; GFX11-FAKE16-NEXT: {{ $}}251 ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0252 ; GFX11-FAKE16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768253 ; GFX11-FAKE16-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec254 ; GFX11-FAKE16-NEXT: [[V_CVT_F32_F16_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_fake16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec255 ; GFX11-FAKE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_fake16_e64_]], implicit $mode, implicit $exec256 ; GFX11-FAKE16-NEXT: $vgpr0 = COPY [[V_CVT_I32_F32_e32_]]257 %0:vgpr(s32) = COPY $vgpr0258 %1:vgpr(s16) = G_TRUNC %0259 %2:vgpr(s16) = G_FNEG %1260 %3:vgpr(s32) = G_FPTOSI %2261 $vgpr0 = COPY %3262...263 264---265name: fptosi_s16_to_s1_vv266legalized: true267regBankSelected: true268tracksRegLiveness: true269 270body: |271 bb.0:272 liveins: $vgpr0273 274 ; GCN-LABEL: name: fptosi_s16_to_s1_vv275 ; GCN: liveins: $vgpr0276 ; GCN-NEXT: {{ $}}277 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0278 ; GCN-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec279 ; GCN-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec280 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]281 ;282 ; VI-LABEL: name: fptosi_s16_to_s1_vv283 ; VI: liveins: $vgpr0284 ; VI-NEXT: {{ $}}285 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0286 ; VI-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec287 ; VI-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec288 ; VI-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]289 ;290 ; GFX11-TRUE16-LABEL: name: fptosi_s16_to_s1_vv291 ; GFX11-TRUE16: liveins: $vgpr0292 ; GFX11-TRUE16-NEXT: {{ $}}293 ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0294 ; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16295 ; GFX11-TRUE16-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec296 ; GFX11-TRUE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_t16_e64_]], implicit $mode, implicit $exec297 ; GFX11-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[V_CVT_I32_F32_e32_]].lo16298 ; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[COPY2]]299 ;300 ; GFX11-FAKE16-LABEL: name: fptosi_s16_to_s1_vv301 ; GFX11-FAKE16: liveins: $vgpr0302 ; GFX11-FAKE16-NEXT: {{ $}}303 ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0304 ; GFX11-FAKE16-NEXT: [[V_CVT_F32_F16_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_fake16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec305 ; GFX11-FAKE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_fake16_e64_]], implicit $mode, implicit $exec306 ; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]307 %0:vgpr(s32) = COPY $vgpr0308 %1:vgpr(s16) = G_TRUNC %0309 %2:vgpr(s32) = G_FPTOSI %1310 %3:vgpr(s1) = G_TRUNC %2311 S_ENDPGM 0, implicit %3312...313 314---315name: fptosi_s16_to_s1_vs316legalized: true317regBankSelected: true318tracksRegLiveness: true319 320body: |321 bb.0:322 liveins: $sgpr0323 324 ; GCN-LABEL: name: fptosi_s16_to_s1_vs325 ; GCN: liveins: $sgpr0326 ; GCN-NEXT: {{ $}}327 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0328 ; GCN-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec329 ; GCN-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec330 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]331 ;332 ; VI-LABEL: name: fptosi_s16_to_s1_vs333 ; VI: liveins: $sgpr0334 ; VI-NEXT: {{ $}}335 ; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0336 ; VI-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec337 ; VI-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec338 ; VI-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]339 ;340 ; GFX11-TRUE16-LABEL: name: fptosi_s16_to_s1_vs341 ; GFX11-TRUE16: liveins: $sgpr0342 ; GFX11-TRUE16-NEXT: {{ $}}343 ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0344 ; GFX11-TRUE16-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec345 ; GFX11-TRUE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_t16_e64_]], implicit $mode, implicit $exec346 ; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[V_CVT_I32_F32_e32_]].lo16347 ; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[COPY1]]348 ;349 ; GFX11-FAKE16-LABEL: name: fptosi_s16_to_s1_vs350 ; GFX11-FAKE16: liveins: $sgpr0351 ; GFX11-FAKE16-NEXT: {{ $}}352 ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0353 ; GFX11-FAKE16-NEXT: [[V_CVT_F32_F16_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_fake16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec354 ; GFX11-FAKE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_fake16_e64_]], implicit $mode, implicit $exec355 ; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]356 %0:sgpr(s32) = COPY $sgpr0357 %1:sgpr(s16) = G_TRUNC %0358 %2:vgpr(s32) = G_FPTOSI %1359 %3:vgpr(s1) = G_TRUNC %2360 S_ENDPGM 0, implicit %3361...362 363---364name: fptosi_s16_to_s1_fneg_vv365legalized: true366regBankSelected: true367tracksRegLiveness: true368 369body: |370 bb.0:371 liveins: $vgpr0372 373 ; GCN-LABEL: name: fptosi_s16_to_s1_fneg_vv374 ; GCN: liveins: $vgpr0375 ; GCN-NEXT: {{ $}}376 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0377 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768378 ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec379 ; GCN-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec380 ; GCN-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec381 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]382 ;383 ; VI-LABEL: name: fptosi_s16_to_s1_fneg_vv384 ; VI: liveins: $vgpr0385 ; VI-NEXT: {{ $}}386 ; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0387 ; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768388 ; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec389 ; VI-NEXT: [[V_CVT_F32_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec390 ; VI-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_e64_]], implicit $mode, implicit $exec391 ; VI-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]392 ;393 ; GFX11-TRUE16-LABEL: name: fptosi_s16_to_s1_fneg_vv394 ; GFX11-TRUE16: liveins: $vgpr0395 ; GFX11-TRUE16-NEXT: {{ $}}396 ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0397 ; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16398 ; GFX11-TRUE16-NEXT: [[V_XOR_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_XOR_B16_t16_e64 0, 32768, 0, [[COPY1]], 0, implicit $exec399 ; GFX11-TRUE16-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[V_XOR_B16_t16_e64_]], 0, 0, 0, implicit $mode, implicit $exec400 ; GFX11-TRUE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_t16_e64_]], implicit $mode, implicit $exec401 ; GFX11-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[V_CVT_I32_F32_e32_]].lo16402 ; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[COPY2]]403 ;404 ; GFX11-FAKE16-LABEL: name: fptosi_s16_to_s1_fneg_vv405 ; GFX11-FAKE16: liveins: $vgpr0406 ; GFX11-FAKE16-NEXT: {{ $}}407 ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0408 ; GFX11-FAKE16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768409 ; GFX11-FAKE16-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec410 ; GFX11-FAKE16-NEXT: [[V_CVT_F32_F16_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_fake16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec411 ; GFX11-FAKE16-NEXT: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 [[V_CVT_F32_F16_fake16_e64_]], implicit $mode, implicit $exec412 ; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_CVT_I32_F32_e32_]]413 %0:vgpr(s32) = COPY $vgpr0414 %1:vgpr(s16) = G_TRUNC %0415 %2:vgpr(s16) = G_FNEG %1416 %3:vgpr(s32) = G_FPTOSI %2417 %4:vgpr(s1) = G_TRUNC %3418 S_ENDPGM 0, implicit %4419...420