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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3 4---5 6name: insert_s512_s327legalized: true8regBankSelected: true9 10body: |11 bb.0:12 ; CHECK-LABEL: name: insert_s512_s3213 ; CHECK: [[DEF:%[0-9]+]]:sgpr_512 = IMPLICIT_DEF14 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF15 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[DEF]], [[DEF1]], %subreg.sub016 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG]], [[DEF1]], %subreg.sub117 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG1]], [[DEF1]], %subreg.sub218 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG2]], [[DEF1]], %subreg.sub319 ; CHECK-NEXT: [[INSERT_SUBREG4:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG3]], [[DEF1]], %subreg.sub420 ; CHECK-NEXT: [[INSERT_SUBREG5:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG4]], [[DEF1]], %subreg.sub521 ; CHECK-NEXT: [[INSERT_SUBREG6:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG5]], [[DEF1]], %subreg.sub622 ; CHECK-NEXT: [[INSERT_SUBREG7:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG6]], [[DEF1]], %subreg.sub723 ; CHECK-NEXT: [[INSERT_SUBREG8:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG7]], [[DEF1]], %subreg.sub824 ; CHECK-NEXT: [[INSERT_SUBREG9:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG8]], [[DEF1]], %subreg.sub925 ; CHECK-NEXT: [[INSERT_SUBREG10:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG9]], [[DEF1]], %subreg.sub1026 ; CHECK-NEXT: [[INSERT_SUBREG11:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG10]], [[DEF1]], %subreg.sub1127 ; CHECK-NEXT: [[INSERT_SUBREG12:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG11]], [[DEF1]], %subreg.sub1228 ; CHECK-NEXT: [[INSERT_SUBREG13:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG12]], [[DEF1]], %subreg.sub1329 ; CHECK-NEXT: [[INSERT_SUBREG14:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG13]], [[DEF1]], %subreg.sub1430 ; CHECK-NEXT: [[INSERT_SUBREG15:%[0-9]+]]:sgpr_512 = INSERT_SUBREG [[INSERT_SUBREG14]], [[DEF1]], %subreg.sub1531 ; CHECK-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY [[INSERT_SUBREG15]]32 ; CHECK-NEXT: SI_RETURN_TO_EPILOG $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1533 %0:sgpr(s512) = G_IMPLICIT_DEF34 %1:sgpr(s32) = G_IMPLICIT_DEF35 %2:sgpr(s512) = G_INSERT %0:sgpr, %1:sgpr(s32), 036 %3:sgpr(s512) = G_INSERT %2:sgpr, %1:sgpr(s32), 3237 %4:sgpr(s512) = G_INSERT %3:sgpr, %1:sgpr(s32), 6438 %5:sgpr(s512) = G_INSERT %4:sgpr, %1:sgpr(s32), 9639 %6:sgpr(s512) = G_INSERT %5:sgpr, %1:sgpr(s32), 12840 %7:sgpr(s512) = G_INSERT %6:sgpr, %1:sgpr(s32), 16041 %8:sgpr(s512) = G_INSERT %7:sgpr, %1:sgpr(s32), 19242 %9:sgpr(s512) = G_INSERT %8:sgpr, %1:sgpr(s32), 22443 %10:sgpr(s512) = G_INSERT %9:sgpr, %1:sgpr(s32), 25644 %11:sgpr(s512) = G_INSERT %10:sgpr, %1:sgpr(s32), 28845 %12:sgpr(s512) = G_INSERT %11:sgpr, %1:sgpr(s32), 32046 %13:sgpr(s512) = G_INSERT %12:sgpr, %1:sgpr(s32), 35247 %14:sgpr(s512) = G_INSERT %13:sgpr, %1:sgpr(s32), 38448 %15:sgpr(s512) = G_INSERT %14:sgpr, %1:sgpr(s32), 41649 %16:sgpr(s512) = G_INSERT %15:sgpr, %1:sgpr(s32), 44850 %17:sgpr(s512) = G_INSERT %16:sgpr, %1:sgpr(s32), 48051 $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY %17:sgpr(s512)52 SI_RETURN_TO_EPILOG $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1553...54 55---56 57name: insert_v_s64_v_s32_058legalized: true59regBankSelected: true60 61body: |62 bb.0:63 liveins: $vgpr0_vgpr1, $vgpr264 ; CHECK-LABEL: name: insert_v_s64_v_s32_065 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr266 ; CHECK-NEXT: {{ $}}67 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr168 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr269 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_64 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub070 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]71 %0:vgpr(s64) = COPY $vgpr0_vgpr172 %1:vgpr(s32) = COPY $vgpr273 %2:vgpr(s64) = G_INSERT %0, %1, 074 S_ENDPGM 0, implicit %275...76 77---78 79name: insert_v_s64_v_s32_3280legalized: true81regBankSelected: true82 83body: |84 bb.0:85 liveins: $vgpr0_vgpr1, $vgpr286 ; CHECK-LABEL: name: insert_v_s64_v_s32_3287 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr288 ; CHECK-NEXT: {{ $}}89 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr190 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr291 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_64 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub192 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]93 %0:vgpr(s64) = COPY $vgpr0_vgpr194 %1:vgpr(s32) = COPY $vgpr295 %2:vgpr(s64) = G_INSERT %0, %1, 3296 S_ENDPGM 0, implicit %297...98 99---100 101name: insert_s_s64_s_s32_0102legalized: true103regBankSelected: true104 105body: |106 bb.0:107 liveins: $sgpr0_sgpr1, $sgpr2108 ; CHECK-LABEL: name: insert_s_s64_s_s32_0109 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2110 ; CHECK-NEXT: {{ $}}111 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1112 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2113 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sreg_64 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub0114 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]115 %0:sgpr(s64) = COPY $sgpr0_sgpr1116 %1:sgpr(s32) = COPY $sgpr2117 %2:sgpr(s64) = G_INSERT %0, %1, 0118 S_ENDPGM 0, implicit %2119...120 121---122 123name: insert_s_s64_s_s32_32124legalized: true125regBankSelected: true126 127body: |128 bb.0:129 liveins: $sgpr0_sgpr1, $sgpr2130 ; CHECK-LABEL: name: insert_s_s64_s_s32_32131 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2132 ; CHECK-NEXT: {{ $}}133 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1134 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2135 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sreg_64 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub1136 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]137 %0:sgpr(s64) = COPY $sgpr0_sgpr1138 %1:sgpr(s32) = COPY $sgpr2139 %2:sgpr(s64) = G_INSERT %0, %1, 32140 S_ENDPGM 0, implicit %2141...142 143---144 145name: insert_s_s64_v_s32_32146legalized: true147regBankSelected: true148 149body: |150 bb.0:151 liveins: $sgpr0_sgpr1, $vgpr0152 ; CHECK-LABEL: name: insert_s_s64_v_s32_32153 ; CHECK: liveins: $sgpr0_sgpr1, $vgpr0154 ; CHECK-NEXT: {{ $}}155 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1156 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2157 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_64 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub1158 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]159 %0:sgpr(s64) = COPY $sgpr0_sgpr1160 %1:vgpr(s32) = COPY $vgpr2161 %2:vgpr(s64) = G_INSERT %0, %1, 32162 S_ENDPGM 0, implicit %2163...164 165---166 167name: insert_v_s64_s_s32_32168legalized: true169regBankSelected: true170 171body: |172 bb.0:173 liveins: $vgpr0_vgpr1, $sgpr0174 ; CHECK-LABEL: name: insert_v_s64_s_s32_32175 ; CHECK: liveins: $vgpr0_vgpr1, $sgpr0176 ; CHECK-NEXT: {{ $}}177 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1178 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0179 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_64 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub1180 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]181 %0:vgpr(s64) = COPY $vgpr0_vgpr1182 %1:sgpr(s32) = COPY $sgpr0183 %2:vgpr(s64) = G_INSERT %0, %1, 32184 S_ENDPGM 0, implicit %2185...186 187---188 189name: insert_v_s96_v_s64_0190legalized: true191regBankSelected: true192 193body: |194 bb.0:195 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4196 ; CHECK-LABEL: name: insert_v_s96_v_s64_0197 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4198 ; CHECK-NEXT: {{ $}}199 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2200 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4201 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_96 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub0_sub1202 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]203 %0:vgpr(s96) = COPY $vgpr0_vgpr1_vgpr2204 %1:vgpr(s64) = COPY $vgpr3_vgpr4205 %2:vgpr(s96) = G_INSERT %0, %1, 0206 S_ENDPGM 0, implicit %2207...208 209---210 211name: insert_v_s96_v_s64_32212legalized: true213regBankSelected: true214 215body: |216 bb.0:217 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4218 ; CHECK-LABEL: name: insert_v_s96_v_s64_32219 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4220 ; CHECK-NEXT: {{ $}}221 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2222 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4223 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_96 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub1_sub2224 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]225 %0:vgpr(s96) = COPY $vgpr0_vgpr1_vgpr2226 %1:vgpr(s64) = COPY $vgpr3_vgpr4227 %2:vgpr(s96) = G_INSERT %0, %1, 32228 S_ENDPGM 0, implicit %2229...230 231---232 233name: insert_s_s96_s_s64_0234legalized: true235regBankSelected: true236 237body: |238 bb.0:239 liveins: $sgpr0_sgpr1_sgpr2, $sgpr4_sgpr5240 ; CHECK-LABEL: name: insert_s_s96_s_s64_0241 ; CHECK: liveins: $sgpr0_sgpr1_sgpr2, $sgpr4_sgpr5242 ; CHECK-NEXT: {{ $}}243 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_96 = COPY $sgpr0_sgpr1_sgpr2244 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5245 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sgpr_96 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub0_sub1246 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]247 %0:sgpr(s96) = COPY $sgpr0_sgpr1_sgpr2248 %1:sgpr(s64) = COPY $sgpr4_sgpr5249 %2:sgpr(s96) = G_INSERT %0, %1, 0250 S_ENDPGM 0, implicit %2251...252 253---254 255name: insert_s_s128_s_s64_0256legalized: true257regBankSelected: true258 259body: |260 bb.0:261 liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4_sgpr5262 ; CHECK-LABEL: name: insert_s_s128_s_s64_0263 ; CHECK: liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4_sgpr5264 ; CHECK-NEXT: {{ $}}265 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3266 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5267 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sgpr_128 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub0_sub1268 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]269 %0:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3270 %1:sgpr(s64) = COPY $sgpr4_sgpr5271 %2:sgpr(s128) = G_INSERT %0, %1, 0272 S_ENDPGM 0, implicit %2273...274 275# ---276 277# name: insert_s_s128_s_s64_32278# legalized: true279# regBankSelected: true280 281# body: |282# bb.0:283# liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4_sgpr5284# %0:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3285# %1:sgpr(s64) = COPY $sgpr4_sgpr5286# %2:sgpr(s128) = G_INSERT %0, %1, 32287# S_ENDPGM 0, implicit %2288# ...289 290---291 292name: insert_s_s128_s_s64_64293legalized: true294regBankSelected: true295 296body: |297 bb.0:298 liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4_sgpr5299 ; CHECK-LABEL: name: insert_s_s128_s_s64_64300 ; CHECK: liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4_sgpr5301 ; CHECK-NEXT: {{ $}}302 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3303 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5304 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sgpr_128 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub2_sub3305 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]306 %0:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3307 %1:sgpr(s64) = COPY $sgpr4_sgpr5308 %2:sgpr(s128) = G_INSERT %0, %1, 64309 S_ENDPGM 0, implicit %2310...311 312---313 314name: insert_s_v256_v_s64_96315legalized: true316regBankSelected: true317 318body: |319 bb.0:320 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9321 ; CHECK-LABEL: name: insert_s_v256_v_s64_96322 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9323 ; CHECK-NEXT: {{ $}}324 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7325 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr8_vgpr9326 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_256 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub3_sub4327 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]328 %0:vgpr(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7329 %1:vgpr(s64) = COPY $vgpr8_vgpr9330 %2:vgpr(s256) = G_INSERT %0, %1, 96331 S_ENDPGM 0, implicit %2332...333 334---335 336name: insert_s_s256_s_s64_128337legalized: true338regBankSelected: true339 340body: |341 bb.0:342 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9343 ; CHECK-LABEL: name: insert_s_s256_s_s64_128344 ; CHECK: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9345 ; CHECK-NEXT: {{ $}}346 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7347 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5348 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sgpr_256 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub4_sub5349 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]350 %0:sgpr(s256) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7351 %1:sgpr(s64) = COPY $sgpr4_sgpr5352 %2:sgpr(s256) = G_INSERT %0, %1, 128353 S_ENDPGM 0, implicit %2354...355 356# ---357 358# name: insert_s_s256_s_s64_160359# legalized: true360# regBankSelected: true361 362# body: |363# bb.0:364# liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9365# %0:sgpr(s256) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7366# %1:sgpr(s64) = COPY $sgpr4_sgpr5367# %2:sgpr(s256) = G_INSERT %0, %1, 160368# S_ENDPGM 0, implicit %2369# ...370 371---372 373name: insert_s_s128_s_s96_0374legalized: true375regBankSelected: true376 377body: |378 bb.0:379 liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6380 ; CHECK-LABEL: name: insert_s_s128_s_s96_0381 ; CHECK: liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6382 ; CHECK-NEXT: {{ $}}383 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3384 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_96 = COPY $sgpr4_sgpr5_sgpr6385 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sgpr_128 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub0_sub1_sub2386 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]387 %0:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3388 %1:sgpr(s96) = COPY $sgpr4_sgpr5_sgpr6389 %2:sgpr(s128) = G_INSERT %0, %1, 0390 S_ENDPGM 0, implicit %2391...392 393---394 395name: insert_s_s160_s_s96_0396legalized: true397regBankSelected: true398 399body: |400 bb.0:401 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4, $sgpr8_sgpr9_sgpr10402 ; CHECK-LABEL: name: insert_s_s160_s_s96_0403 ; CHECK: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4, $sgpr8_sgpr9_sgpr10404 ; CHECK-NEXT: {{ $}}405 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_160 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4406 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_96 = COPY $sgpr8_sgpr9_sgpr10407 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sgpr_160 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub0_sub1_sub2408 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]409 %0:sgpr(s160) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4410 %1:sgpr(s96) = COPY $sgpr8_sgpr9_sgpr10411 %2:sgpr(s160) = G_INSERT %0, %1, 0412 S_ENDPGM 0, implicit %2413...414 415---416 417name: insert_s_s256_s_s128_0418legalized: true419regBankSelected: true420 421body: |422 bb.0:423 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9_sgpr10_sgpr11424 425 ; CHECK-LABEL: name: insert_s_s256_s_s128_0426 ; CHECK: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9_sgpr10_sgpr11427 ; CHECK-NEXT: {{ $}}428 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_256 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7429 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_128 = COPY $sgpr8_sgpr9_sgpr10_sgpr11430 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:sgpr_256 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub0_sub1_sub2_sub3431 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]432 %0:sgpr(s256) = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7433 %1:sgpr(s128) = COPY $sgpr8_sgpr9_sgpr10_sgpr11434 %2:sgpr(s256) = G_INSERT %0, %1, 0435 S_ENDPGM 0, implicit %2436...437 438---439 440name: insert_v_s256_v_s128_32441legalized: true442regBankSelected: true443 444body: |445 bb.0:446 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11447 448 ; CHECK-LABEL: name: insert_v_s256_v_s128_32449 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11450 ; CHECK-NEXT: {{ $}}451 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7452 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr8_vgpr9_vgpr10_vgpr11453 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_256 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub1_sub2_sub3_sub4454 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]455 %0:vgpr(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7456 %1:vgpr(s128) = COPY $vgpr8_vgpr9_vgpr10_vgpr11457 %2:vgpr(s256) = G_INSERT %0, %1, 32458 S_ENDPGM 0, implicit %2459...460 461---462 463name: insert_v_s256_v_s128_64464legalized: true465regBankSelected: true466 467body: |468 bb.0:469 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11470 471 ; CHECK-LABEL: name: insert_v_s256_v_s128_64472 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11473 ; CHECK-NEXT: {{ $}}474 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7475 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr8_vgpr9_vgpr10_vgpr11476 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_256 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub2_sub3_sub4_sub5477 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]478 %0:vgpr(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7479 %1:vgpr(s128) = COPY $vgpr8_vgpr9_vgpr10_vgpr11480 %2:vgpr(s256) = G_INSERT %0, %1, 64481 S_ENDPGM 0, implicit %2482...483 484---485 486name: insert_v_s256_v_s128_96487legalized: true488regBankSelected: true489 490body: |491 bb.0:492 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11493 494 ; CHECK-LABEL: name: insert_v_s256_v_s128_96495 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11496 ; CHECK-NEXT: {{ $}}497 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7498 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr8_vgpr9_vgpr10_vgpr11499 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_256 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub3_sub4_sub5_sub6500 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]501 %0:vgpr(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7502 %1:vgpr(s128) = COPY $vgpr8_vgpr9_vgpr10_vgpr11503 %2:vgpr(s256) = G_INSERT %0, %1, 96504 S_ENDPGM 0, implicit %2505...506 507---508 509name: insert_v_s256_v_s128_128510legalized: true511regBankSelected: true512 513body: |514 bb.0:515 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11516 517 ; CHECK-LABEL: name: insert_v_s256_v_s128_128518 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11519 ; CHECK-NEXT: {{ $}}520 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_256 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7521 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY $vgpr8_vgpr9_vgpr10_vgpr11522 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:vreg_256 = INSERT_SUBREG [[COPY]], [[COPY1]], %subreg.sub4_sub5_sub6_sub7523 ; CHECK-NEXT: S_ENDPGM 0, implicit [[INSERT_SUBREG]]524 %0:vgpr(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7525 %1:vgpr(s128) = COPY $vgpr8_vgpr9_vgpr10_vgpr11526 %2:vgpr(s256) = G_INSERT %0, %1, 128527 S_ENDPGM 0, implicit %2528...529