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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -amdgpu-global-isel-new-legality -mtriple=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s3# RUN: llc -amdgpu-global-isel-new-legality -mtriple=amdgcn -mcpu=hawaii -mattr=+flat-for-global -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7-FLAT %s4# RUN: llc -amdgpu-global-isel-new-legality -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX8 %s5# RUN: llc -amdgpu-global-isel-new-legality -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s6# RUN: llc -amdgpu-global-isel-new-legality -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s7# RUN: llc -amdgpu-global-isel-new-legality -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s8# RUN: llc -amdgpu-global-isel-new-legality -mtriple=amdgcn -mcpu=gfx1200 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX10 %s9 10---11 12name: load_global_v3s3213legalized: true14regBankSelected: true15tracksRegLiveness: true16 17body: |18 bb.0:19 liveins: $vgpr0_vgpr120 21 ; GFX7-LABEL: name: load_global_v3s3222 ; GFX7: liveins: $vgpr0_vgpr123 ; GFX7-NEXT: {{ $}}24 ; GFX7-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr125 ; GFX7-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 026 ; GFX7-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 6144027 ; GFX7-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub128 ; GFX7-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 029 ; GFX7-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[S_MOV_B64_]], %subreg.sub0_sub1, [[REG_SEQUENCE]], %subreg.sub2_sub330 ; GFX7-NEXT: [[BUFFER_LOAD_DWORDX3_ADDR64_:%[0-9]+]]:vreg_96 = BUFFER_LOAD_DWORDX3_ADDR64 [[COPY]], [[REG_SEQUENCE1]], 0, 0, 0, 0, implicit $exec :: (load (<3 x s32>), align 4, addrspace 1)31 ; GFX7-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUFFER_LOAD_DWORDX3_ADDR64_]]32 ;33 ; GFX7-FLAT-LABEL: name: load_global_v3s3234 ; GFX7-FLAT: liveins: $vgpr0_vgpr135 ; GFX7-FLAT-NEXT: {{ $}}36 ; GFX7-FLAT-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr137 ; GFX7-FLAT-NEXT: [[FLAT_LOAD_DWORDX3_:%[0-9]+]]:vreg_96 = FLAT_LOAD_DWORDX3 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load (<3 x s32>), align 4, addrspace 1)38 ; GFX7-FLAT-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[FLAT_LOAD_DWORDX3_]]39 ;40 ; GFX8-LABEL: name: load_global_v3s3241 ; GFX8: liveins: $vgpr0_vgpr142 ; GFX8-NEXT: {{ $}}43 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr144 ; GFX8-NEXT: [[FLAT_LOAD_DWORDX3_:%[0-9]+]]:vreg_96 = FLAT_LOAD_DWORDX3 [[COPY]], 0, 0, implicit $exec, implicit $flat_scr :: (load (<3 x s32>), align 4, addrspace 1)45 ; GFX8-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[FLAT_LOAD_DWORDX3_]]46 ;47 ; GFX9-LABEL: name: load_global_v3s3248 ; GFX9: liveins: $vgpr0_vgpr149 ; GFX9-NEXT: {{ $}}50 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr151 ; GFX9-NEXT: [[GLOBAL_LOAD_DWORDX3_:%[0-9]+]]:vreg_96 = GLOBAL_LOAD_DWORDX3 [[COPY]], 0, 0, implicit $exec :: (load (<3 x s32>), align 4, addrspace 1)52 ; GFX9-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[GLOBAL_LOAD_DWORDX3_]]53 ;54 ; GFX10-LABEL: name: load_global_v3s3255 ; GFX10: liveins: $vgpr0_vgpr156 ; GFX10-NEXT: {{ $}}57 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr158 ; GFX10-NEXT: [[GLOBAL_LOAD_DWORDX3_:%[0-9]+]]:vreg_96 = GLOBAL_LOAD_DWORDX3 [[COPY]], 0, 0, implicit $exec :: (load (<3 x s32>), align 4, addrspace 1)59 ; GFX10-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[GLOBAL_LOAD_DWORDX3_]]60 %0:vgpr(p1) = COPY $vgpr0_vgpr161 %1:vgpr(<3 x s32>) = G_LOAD %0 :: (load (<3 x s32>), align 4, addrspace 1)62 $vgpr0_vgpr1_vgpr2 = COPY %163 64...65 66---67 68name: load_global_s9669legalized: true70regBankSelected: true71tracksRegLiveness: true72 73body: |74 bb.0:75 liveins: $vgpr0_vgpr176 77 ; GFX7-LABEL: name: load_global_s9678 ; GFX7: liveins: $vgpr0_vgpr179 ; GFX7-NEXT: {{ $}}80 ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr181 ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load (s96), align 4, addrspace 1)82 ; GFX7-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)83 ;84 ; GFX7-FLAT-LABEL: name: load_global_s9685 ; GFX7-FLAT: liveins: $vgpr0_vgpr186 ; GFX7-FLAT-NEXT: {{ $}}87 ; GFX7-FLAT-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr188 ; GFX7-FLAT-NEXT: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load (s96), align 4, addrspace 1)89 ; GFX7-FLAT-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)90 ;91 ; GFX8-LABEL: name: load_global_s9692 ; GFX8: liveins: $vgpr0_vgpr193 ; GFX8-NEXT: {{ $}}94 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr195 ; GFX8-NEXT: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load (s96), align 4, addrspace 1)96 ; GFX8-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)97 ;98 ; GFX9-LABEL: name: load_global_s9699 ; GFX9: liveins: $vgpr0_vgpr1100 ; GFX9-NEXT: {{ $}}101 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1102 ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load (s96), align 4, addrspace 1)103 ; GFX9-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)104 ;105 ; GFX10-LABEL: name: load_global_s96106 ; GFX10: liveins: $vgpr0_vgpr1107 ; GFX10-NEXT: {{ $}}108 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1109 ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_96(s96) = G_LOAD [[COPY]](p1) :: (load (s96), align 4, addrspace 1)110 ; GFX10-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)111 %0:vgpr(p1) = COPY $vgpr0_vgpr1112 %1:vgpr(s96) = G_LOAD %0 :: (load (s96), align 4, addrspace 1)113 $vgpr0_vgpr1_vgpr2 = COPY %1114 115...116 117---118 119name: load_global_v6s16120legalized: true121regBankSelected: true122tracksRegLiveness: true123 124body: |125 bb.0:126 liveins: $vgpr0_vgpr1127 128 ; GFX7-LABEL: name: load_global_v6s16129 ; GFX7: liveins: $vgpr0_vgpr1130 ; GFX7-NEXT: {{ $}}131 ; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1132 ; GFX7-NEXT: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load (<6 x s16>), align 4, addrspace 1)133 ; GFX7-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)134 ;135 ; GFX7-FLAT-LABEL: name: load_global_v6s16136 ; GFX7-FLAT: liveins: $vgpr0_vgpr1137 ; GFX7-FLAT-NEXT: {{ $}}138 ; GFX7-FLAT-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1139 ; GFX7-FLAT-NEXT: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load (<6 x s16>), align 4, addrspace 1)140 ; GFX7-FLAT-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)141 ;142 ; GFX8-LABEL: name: load_global_v6s16143 ; GFX8: liveins: $vgpr0_vgpr1144 ; GFX8-NEXT: {{ $}}145 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1146 ; GFX8-NEXT: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load (<6 x s16>), align 4, addrspace 1)147 ; GFX8-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)148 ;149 ; GFX9-LABEL: name: load_global_v6s16150 ; GFX9: liveins: $vgpr0_vgpr1151 ; GFX9-NEXT: {{ $}}152 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1153 ; GFX9-NEXT: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load (<6 x s16>), align 4, addrspace 1)154 ; GFX9-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)155 ;156 ; GFX10-LABEL: name: load_global_v6s16157 ; GFX10: liveins: $vgpr0_vgpr1158 ; GFX10-NEXT: {{ $}}159 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1160 ; GFX10-NEXT: [[LOAD:%[0-9]+]]:vreg_96(<6 x s16>) = G_LOAD [[COPY]](p1) :: (load (<6 x s16>), align 4, addrspace 1)161 ; GFX10-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<6 x s16>)162 %0:vgpr(p1) = COPY $vgpr0_vgpr1163 %1:vgpr(<6 x s16>) = G_LOAD %0 :: (load (<6 x s16>), align 4, addrspace 1)164 $vgpr0_vgpr1_vgpr2 = COPY %1165 166...167