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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX8 %s3# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s4# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s5# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s6 7---8 9name: and_or_s32_sgpr_sgpr_sgpr10legalized: true11regBankSelected: true12tracksRegLiveness: true13 14body: |15 bb.0:16 liveins: $sgpr0, $sgpr1, $sgpr217 ; GFX8-LABEL: name: and_or_s32_sgpr_sgpr_sgpr18 ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr219 ; GFX8-NEXT: {{ $}}20 ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr021 ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr122 ; GFX8-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr223 ; GFX8-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc24 ; GFX8-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_AND_B32_]], [[COPY2]], implicit-def dead $scc25 ; GFX8-NEXT: S_ENDPGM 0, implicit [[S_OR_B32_]]26 ;27 ; GFX9-LABEL: name: and_or_s32_sgpr_sgpr_sgpr28 ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr229 ; GFX9-NEXT: {{ $}}30 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr031 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr132 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr233 ; GFX9-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc34 ; GFX9-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_AND_B32_]], [[COPY2]], implicit-def dead $scc35 ; GFX9-NEXT: S_ENDPGM 0, implicit [[S_OR_B32_]]36 %0:sgpr(s32) = COPY $sgpr037 %1:sgpr(s32) = COPY $sgpr138 %2:sgpr(s32) = COPY $sgpr239 %3:sgpr(s32) = G_AND %0, %140 %4:sgpr(s32) = G_OR %3, %241 S_ENDPGM 0, implicit %442...43 44---45 46name: and_or_s32_vgpr_vgpr_vgpr47legalized: true48regBankSelected: true49tracksRegLiveness: true50 51body: |52 bb.0:53 liveins: $vgpr0, $vgpr1, $vgpr254 ; GFX8-LABEL: name: and_or_s32_vgpr_vgpr_vgpr55 ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr256 ; GFX8-NEXT: {{ $}}57 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr058 ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr159 ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr260 ; GFX8-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], [[COPY1]], implicit $exec61 ; GFX8-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[V_AND_B32_e64_]], [[COPY2]], implicit $exec62 ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_OR_B32_e64_]]63 ;64 ; GFX9-LABEL: name: and_or_s32_vgpr_vgpr_vgpr65 ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr266 ; GFX9-NEXT: {{ $}}67 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr068 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr169 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr270 ; GFX9-NEXT: [[V_AND_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_OR_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec71 ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_AND_OR_B32_e64_]]72 %0:vgpr(s32) = COPY $vgpr073 %1:vgpr(s32) = COPY $vgpr174 %2:vgpr(s32) = COPY $vgpr275 %3:vgpr(s32) = G_AND %0, %176 %4:vgpr(s32) = G_OR %3, %277 S_ENDPGM 0, implicit %478...79 80---81 82name: and_or_s32_vgpr_vgpr_vgpr_commute83legalized: true84regBankSelected: true85tracksRegLiveness: true86 87body: |88 bb.0:89 liveins: $vgpr0, $vgpr1, $vgpr290 ; GFX8-LABEL: name: and_or_s32_vgpr_vgpr_vgpr_commute91 ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr292 ; GFX8-NEXT: {{ $}}93 ; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr094 ; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr195 ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr296 ; GFX8-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], [[COPY1]], implicit $exec97 ; GFX8-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY2]], [[V_AND_B32_e64_]], implicit $exec98 ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_OR_B32_e64_]]99 ;100 ; GFX9-LABEL: name: and_or_s32_vgpr_vgpr_vgpr_commute101 ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2102 ; GFX9-NEXT: {{ $}}103 ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0104 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1105 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2106 ; GFX9-NEXT: [[V_AND_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_OR_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec107 ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_AND_OR_B32_e64_]]108 %0:vgpr(s32) = COPY $vgpr0109 %1:vgpr(s32) = COPY $vgpr1110 %2:vgpr(s32) = COPY $vgpr2111 %3:vgpr(s32) = G_AND %0, %1112 %4:vgpr(s32) = G_OR %2, %3113 S_ENDPGM 0, implicit %4114...115 116---117 118name: and_or_s32_sgpr_sgpr_vgpr119legalized: true120regBankSelected: true121tracksRegLiveness: true122 123body: |124 bb.0:125 liveins: $sgpr0, $sgpr1, $vgpr0126 ; GFX8-LABEL: name: and_or_s32_sgpr_sgpr_vgpr127 ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0128 ; GFX8-NEXT: {{ $}}129 ; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0130 ; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1131 ; GFX8-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0132 ; GFX8-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc133 ; GFX8-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_AND_B32_]]134 ; GFX8-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec135 ; GFX8-NEXT: S_ENDPGM 0, implicit [[V_OR_B32_e64_]]136 ;137 ; GFX9-LABEL: name: and_or_s32_sgpr_sgpr_vgpr138 ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0139 ; GFX9-NEXT: {{ $}}140 ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0141 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1142 ; GFX9-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0143 ; GFX9-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc144 ; GFX9-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_AND_B32_]]145 ; GFX9-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec146 ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_OR_B32_e64_]]147 %0:sgpr(s32) = COPY $sgpr0148 %1:sgpr(s32) = COPY $sgpr1149 %2:vgpr(s32) = COPY $vgpr0150 %3:sgpr(s32) = G_AND %0, %1151 %4:vgpr(s32) = COPY %3152 %5:vgpr(s32) = G_OR %4, %2153 S_ENDPGM 0, implicit %5154...155