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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck %s3 4---5name: ptrmask_p3_s32_sgpr_sgpr_sgpr6legalized: true7regBankSelected: true8 9body: |10 bb.0:11 liveins: $sgpr0, $sgpr112 13 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_sgpr14 ; CHECK: liveins: $sgpr0, $sgpr115 ; CHECK-NEXT: {{ $}}16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr017 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr118 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc19 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]20 %0:sgpr(p3) = COPY $sgpr021 %1:sgpr(s32) = COPY $sgpr122 %2:sgpr(p3) = G_PTRMASK %0, %123 S_ENDPGM 0, implicit %224 25...26 27---28name: ptrmask_p3_s32_sgpr_sgpr_0xf0f0f0f029legalized: true30regBankSelected: true31 32body: |33 bb.0:34 liveins: $sgpr035 36 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0xf0f0f0f037 ; CHECK: liveins: $sgpr038 ; CHECK-NEXT: {{ $}}39 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr040 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -25264513641 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc42 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]43 %0:sgpr(p3) = COPY $sgpr044 %const:sgpr(s32) = G_CONSTANT i32 -25264513645 %1:sgpr(p3) = G_PTRMASK %0, %const46 S_ENDPGM 0, implicit %147 48...49 50---51name: ptrmask_p3_s32_sgpr_sgpr_0xffffffff52legalized: true53regBankSelected: true54 55body: |56 bb.0:57 liveins: $sgpr058 59 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0xffffffff60 ; CHECK: liveins: $sgpr061 ; CHECK-NEXT: {{ $}}62 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr063 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -164 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc65 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]66 %0:sgpr(p3) = COPY $sgpr067 %const:sgpr(s32) = G_CONSTANT i32 -168 %1:sgpr(p3) = G_PTRMASK %0, %const69 S_ENDPGM 0, implicit %170 71...72 73---74name: ptrmask_p3_s32_sgpr_sgpr_0x0000000075legalized: true76regBankSelected: true77 78body: |79 bb.0:80 liveins: $sgpr081 82 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0x0000000083 ; CHECK: liveins: $sgpr084 ; CHECK-NEXT: {{ $}}85 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr086 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 087 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc88 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]89 %0:sgpr(p3) = COPY $sgpr090 %const:sgpr(s32) = G_CONSTANT i32 091 %1:sgpr(p3) = G_PTRMASK %0, %const92 S_ENDPGM 0, implicit %193 94...95 96---97name: ptrmask_p3_s32_sgpr_sgpr_clearhi198legalized: true99regBankSelected: true100 101body: |102 bb.0:103 liveins: $sgpr0104 105 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearhi1106 ; CHECK: liveins: $sgpr0107 ; CHECK-NEXT: {{ $}}108 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0109 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -2147483648110 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc111 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]112 %0:sgpr(p3) = COPY $sgpr0113 %const:sgpr(s32) = G_CONSTANT i32 -2147483648114 %1:sgpr(p3) = G_PTRMASK %0, %const115 S_ENDPGM 0, implicit %1116 117...118 119---120name: ptrmask_p3_s32_sgpr_sgpr_clearhi2121legalized: true122regBankSelected: true123 124body: |125 bb.0:126 liveins: $sgpr0127 128 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearhi2129 ; CHECK: liveins: $sgpr0130 ; CHECK-NEXT: {{ $}}131 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0132 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -1073741824133 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc134 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]135 %0:sgpr(p3) = COPY $sgpr0136 %const:sgpr(s32) = G_CONSTANT i32 -1073741824137 %1:sgpr(p3) = G_PTRMASK %0, %const138 S_ENDPGM 0, implicit %1139 140...141 142---143name: ptrmask_p3_s32_sgpr_sgpr_clearlo1144legalized: true145regBankSelected: true146 147body: |148 bb.0:149 liveins: $sgpr0150 151 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo1152 ; CHECK: liveins: $sgpr0153 ; CHECK-NEXT: {{ $}}154 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0155 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -2156 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc157 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]158 %0:sgpr(p3) = COPY $sgpr0159 %const:sgpr(s32) = G_CONSTANT i32 -2160 %1:sgpr(p3) = G_PTRMASK %0, %const161 S_ENDPGM 0, implicit %1162 163...164 165---166name: ptrmask_p3_s32_sgpr_sgpr_clearlo2167legalized: true168regBankSelected: true169 170body: |171 bb.0:172 liveins: $sgpr0173 174 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo2175 ; CHECK: liveins: $sgpr0176 ; CHECK-NEXT: {{ $}}177 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0178 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -4179 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc180 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]181 %0:sgpr(p3) = COPY $sgpr0182 %const:sgpr(s32) = G_CONSTANT i32 -4183 %1:sgpr(p3) = G_PTRMASK %0, %const184 S_ENDPGM 0, implicit %1185 186...187 188---189name: ptrmask_p3_s32_sgpr_sgpr_clearlo3190legalized: true191regBankSelected: true192 193body: |194 bb.0:195 liveins: $sgpr0196 197 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo3198 ; CHECK: liveins: $sgpr0199 ; CHECK-NEXT: {{ $}}200 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0201 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -8202 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc203 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]204 %0:sgpr(p3) = COPY $sgpr0205 %const:sgpr(s32) = G_CONSTANT i32 -8206 %1:sgpr(p3) = G_PTRMASK %0, %const207 S_ENDPGM 0, implicit %1208 209...210 211---212name: ptrmask_p3_s32_sgpr_sgpr_clearlo4213legalized: true214regBankSelected: true215 216body: |217 bb.0:218 liveins: $sgpr0219 220 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo4221 ; CHECK: liveins: $sgpr0222 ; CHECK-NEXT: {{ $}}223 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0224 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -16225 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc226 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]227 %0:sgpr(p3) = COPY $sgpr0228 %const:sgpr(s32) = G_CONSTANT i32 -16229 %1:sgpr(p3) = G_PTRMASK %0, %const230 S_ENDPGM 0, implicit %1231 232...233 234---235name: ptrmask_p3_s32_sgpr_sgpr_clearlo29236legalized: true237regBankSelected: true238 239body: |240 bb.0:241 liveins: $sgpr0242 243 ; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo29244 ; CHECK: liveins: $sgpr0245 ; CHECK-NEXT: {{ $}}246 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0247 ; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -536870912248 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def dead $scc249 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]250 %0:sgpr(p3) = COPY $sgpr0251 %const:sgpr(s32) = G_CONSTANT i32 -536870912252 %1:sgpr(p3) = G_PTRMASK %0, %const253 S_ENDPGM 0, implicit %1254 255...256 257---258name: ptrmask_p0_s64_sgpr_sgpr_sgpr259legalized: true260regBankSelected: true261 262body: |263 bb.0:264 liveins: $sgpr0_sgpr1, $sgpr2_sgpr3265 266 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr267 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3268 ; CHECK-NEXT: {{ $}}269 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1270 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3271 ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def dead $scc272 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]273 %0:sgpr(p0) = COPY $sgpr0_sgpr1274 %1:sgpr(s64) = COPY $sgpr2_sgpr3275 %2:sgpr(p0) = G_PTRMASK %0, %1276 S_ENDPGM 0, implicit %2277 278...279 280---281name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xffffffffffffffff282legalized: true283regBankSelected: true284 285body: |286 bb.0:287 liveins: $sgpr0_sgpr1288 289 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xffffffffffffffff290 ; CHECK: liveins: $sgpr0_sgpr1291 ; CHECK-NEXT: {{ $}}292 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1293 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0294 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1295 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1296 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]297 %0:sgpr(p0) = COPY $sgpr0_sgpr1298 %1:sgpr(s64) = G_CONSTANT i64 -1299 %2:sgpr(p0) = G_PTRMASK %0, %1300 S_ENDPGM 0, implicit %2301 302...303 304---305name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0x0000000000000000306legalized: true307regBankSelected: true308 309body: |310 bb.0:311 liveins: $sgpr0_sgpr1312 313 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0x0000000000000000314 ; CHECK: liveins: $sgpr0_sgpr1315 ; CHECK-NEXT: {{ $}}316 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1317 ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0318 ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[S_MOV_B64_]], implicit-def dead $scc319 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]320 %0:sgpr(p0) = COPY $sgpr0_sgpr1321 %1:sgpr(s64) = G_CONSTANT i64 0322 %2:sgpr(p0) = G_PTRMASK %0, %1323 S_ENDPGM 0, implicit %2324 325...326 327---328name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xf0f0f0f0f0f0f0f0329legalized: true330regBankSelected: true331 332body: |333 bb.0:334 liveins: $sgpr0_sgpr1335 336 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xf0f0f0f0f0f0f0f0337 ; CHECK: liveins: $sgpr0_sgpr1338 ; CHECK-NEXT: {{ $}}339 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1340 ; CHECK-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO -1085102592571150096341 ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[S_MOV_B]], implicit-def dead $scc342 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]343 %0:sgpr(p0) = COPY $sgpr0_sgpr1344 %1:sgpr(s64) = G_CONSTANT i64 -1085102592571150096345 %2:sgpr(p0) = G_PTRMASK %0, %1346 S_ENDPGM 0, implicit %2347 348...349 350---351name: ptrmask_p0_s64_sgpr_sgpr_clearhi1352legalized: true353regBankSelected: true354 355body: |356 bb.0:357 liveins: $sgpr0_sgpr1358 359 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearhi1360 ; CHECK: liveins: $sgpr0_sgpr1361 ; CHECK-NEXT: {{ $}}362 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1363 ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64_IMM_PSEUDO -9223372036854775808364 ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], %const, implicit-def dead $scc365 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]366 %0:sgpr(p0) = COPY $sgpr0_sgpr1367 %const:sgpr(s64) = G_CONSTANT i64 -9223372036854775808368 %1:sgpr(p0) = G_PTRMASK %0, %const369 S_ENDPGM 0, implicit %1370 371...372 373---374name: ptrmask_p0_s64_sgpr_sgpr_clearhi32375legalized: true376regBankSelected: true377 378body: |379 bb.0:380 liveins: $sgpr0_sgpr1381 382 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearhi32383 ; CHECK: liveins: $sgpr0_sgpr1384 ; CHECK-NEXT: {{ $}}385 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1386 ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64_IMM_PSEUDO -4294967296387 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0388 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1389 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0390 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc391 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1392 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]393 %0:sgpr(p0) = COPY $sgpr0_sgpr1394 %const:sgpr(s64) = G_CONSTANT i64 -4294967296395 %1:sgpr(p0) = G_PTRMASK %0, %const396 S_ENDPGM 0, implicit %1397 398...399 400---401name: ptrmask_p0_s64_sgpr_sgpr_clear_32402legalized: true403regBankSelected: true404 405body: |406 bb.0:407 liveins: $sgpr0_sgpr1408 409 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clear_32410 ; CHECK: liveins: $sgpr0_sgpr1411 ; CHECK-NEXT: {{ $}}412 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1413 ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64_IMM_PSEUDO 4294967296414 ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], %const, implicit-def dead $scc415 ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]416 %0:sgpr(p0) = COPY $sgpr0_sgpr1417 %const:sgpr(s64) = G_CONSTANT i64 4294967296418 %1:sgpr(p0) = G_PTRMASK %0, %const419 S_ENDPGM 0, implicit %1420 421...422 423---424name: ptrmask_p0_s64_sgpr_sgpr_clearlo1425legalized: true426regBankSelected: true427 428body: |429 bb.0:430 liveins: $sgpr0_sgpr1431 432 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo1433 ; CHECK: liveins: $sgpr0_sgpr1434 ; CHECK-NEXT: {{ $}}435 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1436 ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -2437 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0438 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1439 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0440 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc441 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1442 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]443 %0:sgpr(p0) = COPY $sgpr0_sgpr1444 %const:sgpr(s64) = G_CONSTANT i64 -2445 %1:sgpr(p0) = G_PTRMASK %0, %const446 S_ENDPGM 0, implicit %1447 448...449 450---451name: ptrmask_p0_s64_sgpr_sgpr_clearlo2452legalized: true453regBankSelected: true454 455body: |456 bb.0:457 liveins: $sgpr0_sgpr1458 459 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo2460 ; CHECK: liveins: $sgpr0_sgpr1461 ; CHECK-NEXT: {{ $}}462 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1463 ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -4464 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0465 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1466 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0467 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc468 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1469 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]470 %0:sgpr(p0) = COPY $sgpr0_sgpr1471 %const:sgpr(s64) = G_CONSTANT i64 -4472 %1:sgpr(p0) = G_PTRMASK %0, %const473 S_ENDPGM 0, implicit %1474 475...476 477---478name: ptrmask_p0_s64_sgpr_sgpr_clearlo3479legalized: true480regBankSelected: true481 482body: |483 bb.0:484 liveins: $sgpr0_sgpr1485 486 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo3487 ; CHECK: liveins: $sgpr0_sgpr1488 ; CHECK-NEXT: {{ $}}489 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1490 ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -8491 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0492 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1493 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0494 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc495 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1496 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]497 %0:sgpr(p0) = COPY $sgpr0_sgpr1498 %const:sgpr(s64) = G_CONSTANT i64 -8499 %1:sgpr(p0) = G_PTRMASK %0, %const500 S_ENDPGM 0, implicit %1501 502...503 504---505name: ptrmask_p0_s64_sgpr_sgpr_clearlo4506legalized: true507regBankSelected: true508 509body: |510 bb.0:511 liveins: $sgpr0_sgpr1512 513 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo4514 ; CHECK: liveins: $sgpr0_sgpr1515 ; CHECK-NEXT: {{ $}}516 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1517 ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -16518 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0519 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1520 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0521 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc522 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1523 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]524 %0:sgpr(p0) = COPY $sgpr0_sgpr1525 %const:sgpr(s64) = G_CONSTANT i64 -16526 %1:sgpr(p0) = G_PTRMASK %0, %const527 S_ENDPGM 0, implicit %1528 529...530 531---532name: ptrmask_p0_s64_sgpr_sgpr_clearlo29533legalized: true534regBankSelected: true535 536body: |537 bb.0:538 liveins: $sgpr0_sgpr1539 540 ; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo29541 ; CHECK: liveins: $sgpr0_sgpr1542 ; CHECK-NEXT: {{ $}}543 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1544 ; CHECK-NEXT: %const:sreg_64 = S_MOV_B64_IMM_PSEUDO -536870912545 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0546 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1547 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0548 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc549 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1550 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]551 %0:sgpr(p0) = COPY $sgpr0_sgpr1552 %const:sgpr(s64) = G_CONSTANT i64 -536870912553 %1:sgpr(p0) = G_PTRMASK %0, %const554 S_ENDPGM 0, implicit %1555 556...557 558---559name: ptrmask_p3_vgpr_vgpr_0xf0f0f0f0560legalized: true561regBankSelected: true562 563body: |564 bb.0:565 liveins: $vgpr0566 567 ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_0xf0f0f0f0568 ; CHECK: liveins: $vgpr0569 ; CHECK-NEXT: {{ $}}570 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0571 ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -252645136, implicit $exec572 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec573 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]574 %0:vgpr(p3) = COPY $vgpr0575 %const:vgpr(s32) = G_CONSTANT i32 -252645136576 %1:vgpr(p3) = G_PTRMASK %0, %const577 S_ENDPGM 0, implicit %1578 579...580 581---582name: ptrmask_p3_vgpr_vgpr_clearlo1583legalized: true584regBankSelected: true585 586body: |587 bb.0:588 liveins: $vgpr0589 590 ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo1591 ; CHECK: liveins: $vgpr0592 ; CHECK-NEXT: {{ $}}593 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0594 ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -2, implicit $exec595 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec596 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]597 %0:vgpr(p3) = COPY $vgpr0598 %const:vgpr(s32) = G_CONSTANT i32 -2599 %1:vgpr(p3) = G_PTRMASK %0, %const600 S_ENDPGM 0, implicit %1601 602...603 604---605name: ptrmask_p3_vgpr_vgpr_clearlo2606legalized: true607regBankSelected: true608 609body: |610 bb.0:611 liveins: $vgpr0612 613 ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo2614 ; CHECK: liveins: $vgpr0615 ; CHECK-NEXT: {{ $}}616 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0617 ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -4, implicit $exec618 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec619 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]620 %0:vgpr(p3) = COPY $vgpr0621 %const:vgpr(s32) = G_CONSTANT i32 -4622 %1:vgpr(p3) = G_PTRMASK %0, %const623 S_ENDPGM 0, implicit %1624 625...626 627---628name: ptrmask_p3_vgpr_vgpr_clearlo3629legalized: true630regBankSelected: true631 632body: |633 bb.0:634 liveins: $vgpr0635 636 ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo3637 ; CHECK: liveins: $vgpr0638 ; CHECK-NEXT: {{ $}}639 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0640 ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec641 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec642 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]643 %0:vgpr(p3) = COPY $vgpr0644 %const:vgpr(s32) = G_CONSTANT i32 -8645 %1:vgpr(p3) = G_PTRMASK %0, %const646 S_ENDPGM 0, implicit %1647 648...649 650---651name: ptrmask_p3_vgpr_vgpr_clearlo4652legalized: true653regBankSelected: true654 655body: |656 bb.0:657 liveins: $vgpr0658 659 ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo4660 ; CHECK: liveins: $vgpr0661 ; CHECK-NEXT: {{ $}}662 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0663 ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -16, implicit $exec664 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec665 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]666 %0:vgpr(p3) = COPY $vgpr0667 %const:vgpr(s32) = G_CONSTANT i32 -16668 %1:vgpr(p3) = G_PTRMASK %0, %const669 S_ENDPGM 0, implicit %1670 671...672 673---674name: ptrmask_p3_vgpr_vgpr_clearlo29675legalized: true676regBankSelected: true677 678body: |679 bb.0:680 liveins: $vgpr0681 682 ; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo29683 ; CHECK: liveins: $vgpr0684 ; CHECK-NEXT: {{ $}}685 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0686 ; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -536870912, implicit $exec687 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec688 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]689 %0:vgpr(p3) = COPY $vgpr0690 %const:vgpr(s32) = G_CONSTANT i32 -536870912691 %1:vgpr(p3) = G_PTRMASK %0, %const692 S_ENDPGM 0, implicit %1693 694...695 696---697name: ptrmask_p0_s64_vgpr_vgpr_vgpr698legalized: true699regBankSelected: true700 701body: |702 bb.0:703 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3704 705 ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_vgpr706 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3707 ; CHECK-NEXT: {{ $}}708 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1709 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3710 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0711 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1712 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0713 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY2]], [[COPY4]], implicit $exec714 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1715 ; CHECK-NEXT: [[V_AND_B32_e64_1:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY3]], [[COPY5]], implicit $exec716 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[V_AND_B32_e64_1]], %subreg.sub1717 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]718 %0:vgpr(p0) = COPY $vgpr0_vgpr1719 %1:vgpr(s64) = COPY $vgpr2_vgpr3720 %2:vgpr(p0) = G_PTRMASK %0, %1721 S_ENDPGM 0, implicit %2722 723...724 725---726name: ptrmask_p0_s64_vgpr_vgpr_vgpr_0xf0f0f0f0f0f0f0f0727legalized: true728regBankSelected: true729 730body: |731 bb.0:732 liveins: $vgpr0_vgpr1733 734 ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_vgpr_0xf0f0f0f0f0f0f0f0735 ; CHECK: liveins: $vgpr0_vgpr1736 ; CHECK-NEXT: {{ $}}737 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1738 ; CHECK-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO -1085102592571150096, implicit $exec739 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0740 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1741 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B]].sub0742 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec743 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B]].sub1744 ; CHECK-NEXT: [[V_AND_B32_e64_1:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY2]], [[COPY4]], implicit $exec745 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[V_AND_B32_e64_1]], %subreg.sub1746 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]747 %0:vgpr(p0) = COPY $vgpr0_vgpr1748 %1:vgpr(s64) = G_CONSTANT i64 -1085102592571150096749 %2:vgpr(p0) = G_PTRMASK %0, %1750 S_ENDPGM 0, implicit %2751 752...753 754---755name: ptrmask_p0_s64_vgpr_vgpr_clearlo1756legalized: true757regBankSelected: true758 759body: |760 bb.0:761 liveins: $vgpr0_vgpr1762 763 ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo1764 ; CHECK: liveins: $vgpr0_vgpr1765 ; CHECK-NEXT: {{ $}}766 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1767 ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -2, implicit $exec768 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0769 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1770 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0771 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec772 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1773 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]774 %0:vgpr(p0) = COPY $vgpr0_vgpr1775 %const:vgpr(s64) = G_CONSTANT i64 -2776 %1:vgpr(p0) = G_PTRMASK %0, %const777 S_ENDPGM 0, implicit %1778 779...780 781---782name: ptrmask_p0_s64_vgpr_vgpr_clearlo2783legalized: true784regBankSelected: true785 786body: |787 bb.0:788 liveins: $vgpr0_vgpr1789 790 ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo2791 ; CHECK: liveins: $vgpr0_vgpr1792 ; CHECK-NEXT: {{ $}}793 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1794 ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -4, implicit $exec795 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0796 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1797 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0798 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec799 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1800 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]801 %0:vgpr(p0) = COPY $vgpr0_vgpr1802 %const:vgpr(s64) = G_CONSTANT i64 -4803 %1:vgpr(p0) = G_PTRMASK %0, %const804 S_ENDPGM 0, implicit %1805 806...807 808---809name: ptrmask_p0_s64_vgpr_vgpr_clearlo3810legalized: true811regBankSelected: true812 813body: |814 bb.0:815 liveins: $vgpr0_vgpr1816 817 ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo3818 ; CHECK: liveins: $vgpr0_vgpr1819 ; CHECK-NEXT: {{ $}}820 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1821 ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -4, implicit $exec822 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0823 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1824 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0825 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec826 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1827 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]828 %0:vgpr(p0) = COPY $vgpr0_vgpr1829 %const:vgpr(s64) = G_CONSTANT i64 -4830 %1:vgpr(p0) = G_PTRMASK %0, %const831 S_ENDPGM 0, implicit %1832 833...834 835---836name: ptrmask_p0_s64_vgpr_vgpr_clearlo4837legalized: true838regBankSelected: true839 840body: |841 bb.0:842 liveins: $vgpr0_vgpr1843 844 ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo4845 ; CHECK: liveins: $vgpr0_vgpr1846 ; CHECK-NEXT: {{ $}}847 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1848 ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -16, implicit $exec849 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0850 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1851 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0852 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec853 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1854 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]855 %0:vgpr(p0) = COPY $vgpr0_vgpr1856 %const:vgpr(s64) = G_CONSTANT i64 -16857 %1:vgpr(p0) = G_PTRMASK %0, %const858 S_ENDPGM 0, implicit %1859 860...861 862---863name: ptrmask_p0_s64_vgpr_vgpr_clearlo29864legalized: true865regBankSelected: true866 867body: |868 bb.0:869 liveins: $vgpr0_vgpr1870 871 ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo29872 ; CHECK: liveins: $vgpr0_vgpr1873 ; CHECK-NEXT: {{ $}}874 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1875 ; CHECK-NEXT: %const:vreg_64 = V_MOV_B64_PSEUDO -536870912, implicit $exec876 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0877 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1878 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0879 ; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec880 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1881 ; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]882 %0:vgpr(p0) = COPY $vgpr0_vgpr1883 %const:vgpr(s64) = G_CONSTANT i64 -536870912884 %1:vgpr(p0) = G_PTRMASK %0, %const885 S_ENDPGM 0, implicit %1886 887...888 889---890name: ptrmask_p3_vgpr_sgpr_clearlo2891legalized: true892regBankSelected: true893 894body: |895 bb.0:896 liveins: $sgpr0897 898 ; CHECK-LABEL: name: ptrmask_p3_vgpr_sgpr_clearlo2899 ; CHECK: liveins: $sgpr0900 ; CHECK-NEXT: {{ $}}901 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p3) = COPY $sgpr0902 ; CHECK-NEXT: %const:sgpr(s32) = G_CONSTANT i32 -4903 ; CHECK-NEXT: [[PTRMASK:%[0-9]+]]:vgpr(p3) = G_PTRMASK [[COPY]], %const(s32)904 ; CHECK-NEXT: S_ENDPGM 0, implicit [[PTRMASK]](p3)905 %0:sgpr(p3) = COPY $sgpr0906 %const:sgpr(s32) = G_CONSTANT i32 -4907 %1:vgpr(p3) = G_PTRMASK %0, %const908 S_ENDPGM 0, implicit %1909 910...911 912---913name: ptrmask_p0_s64_vgpr_sgpr_clearlo2914legalized: true915regBankSelected: true916 917body: |918 bb.0:919 liveins: $sgpr0_sgpr1920 921 ; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_sgpr_clearlo2922 ; CHECK: liveins: $sgpr0_sgpr1923 ; CHECK-NEXT: {{ $}}924 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr1925 ; CHECK-NEXT: %const:sgpr(s32) = G_CONSTANT i32 -4926 ; CHECK-NEXT: [[PTRMASK:%[0-9]+]]:vgpr(p0) = G_PTRMASK [[COPY]], %const(s32)927 ; CHECK-NEXT: S_ENDPGM 0, implicit [[PTRMASK]](p0)928 %0:sgpr(p0) = COPY $sgpr0_sgpr1929 %const:sgpr(s32) = G_CONSTANT i32 -4930 %1:vgpr(p0) = G_PTRMASK %0, %const931 S_ENDPGM 0, implicit %1932 933...934