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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE64 %s3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE32 %s4# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s5# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s6 7---8 9name:            sitofp10legalized:       true11regBankSelected: true12 13body: |14  bb.0:15    liveins: $sgpr0, $vgpr0, $vgpr3_vgpr416 17    ; WAVE64-LABEL: name: sitofp18    ; WAVE64: liveins: $sgpr0, $vgpr0, $vgpr3_vgpr419    ; WAVE64-NEXT: {{  $}}20    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr021    ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr022    ; WAVE64-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr423    ; WAVE64-NEXT: [[V_CVT_F32_I32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec24    ; WAVE64-NEXT: [[V_CVT_F32_I32_e64_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY1]], 0, 0, implicit $mode, implicit $exec25    ; WAVE64-NEXT: FLAT_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)26    ; WAVE64-NEXT: FLAT_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_1]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)27    ;28    ; WAVE32-LABEL: name: sitofp29    ; WAVE32: liveins: $sgpr0, $vgpr0, $vgpr3_vgpr430    ; WAVE32-NEXT: {{  $}}31    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr032    ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr033    ; WAVE32-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr434    ; WAVE32-NEXT: [[V_CVT_F32_I32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec35    ; WAVE32-NEXT: [[V_CVT_F32_I32_e64_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY1]], 0, 0, implicit $mode, implicit $exec36    ; WAVE32-NEXT: GLOBAL_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_]], 0, 0, implicit $exec :: (store (s32), addrspace 1)37    ; WAVE32-NEXT: GLOBAL_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_1]], 0, 0, implicit $exec :: (store (s32), addrspace 1)38    ;39    ; GFX11-LABEL: name: sitofp40    ; GFX11: liveins: $sgpr0, $vgpr0, $vgpr3_vgpr441    ; GFX11-NEXT: {{  $}}42    ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr043    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr044    ; GFX11-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr445    ; GFX11-NEXT: [[V_CVT_F32_I32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec46    ; GFX11-NEXT: [[V_CVT_F32_I32_e64_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY1]], 0, 0, implicit $mode, implicit $exec47    ; GFX11-NEXT: GLOBAL_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_]], 0, 0, implicit $exec :: (store (s32), addrspace 1)48    ; GFX11-NEXT: GLOBAL_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_1]], 0, 0, implicit $exec :: (store (s32), addrspace 1)49    %0:sgpr(s32) = COPY $sgpr050 51    %1:vgpr(s32) = COPY $vgpr052 53    %2:vgpr(p1) = COPY $vgpr3_vgpr454 55    %3:vgpr(s32) = G_SITOFP %056 57    %4:vgpr(s32) = G_SITOFP %158 59    G_STORE %3, %2 :: (store (s32), addrspace 1)60    G_STORE %4, %2 :: (store (s32), addrspace 1)61...62 63---64name: sitofp_s32_to_s16_vv65legalized: true66regBankSelected: true67tracksRegLiveness: true68 69body: |70  bb.0:71    liveins: $vgpr072 73    ; WAVE64-LABEL: name: sitofp_s32_to_s16_vv74    ; WAVE64: liveins: $vgpr075    ; WAVE64-NEXT: {{  $}}76    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr077    ; WAVE64-NEXT: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec78    ; WAVE64-NEXT: [[V_CVT_F16_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_e64 0, [[V_CVT_F32_I32_e32_]], 0, 0, implicit $mode, implicit $exec79    ; WAVE64-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_e64_]]80    ;81    ; WAVE32-LABEL: name: sitofp_s32_to_s16_vv82    ; WAVE32: liveins: $vgpr083    ; WAVE32-NEXT: {{  $}}84    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr085    ; WAVE32-NEXT: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec86    ; WAVE32-NEXT: [[V_CVT_F16_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_e64 0, [[V_CVT_F32_I32_e32_]], 0, 0, implicit $mode, implicit $exec87    ; WAVE32-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_e64_]]88    ;89    ; GFX11-TRUE16-LABEL: name: sitofp_s32_to_s16_vv90    ; GFX11-TRUE16: liveins: $vgpr091    ; GFX11-TRUE16-NEXT: {{  $}}92    ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr093    ; GFX11-TRUE16-NEXT: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec94    ; GFX11-TRUE16-NEXT: [[V_CVT_F16_F32_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, [[V_CVT_F32_I32_e32_]], 0, 0, 0, implicit $mode, implicit $exec95    ; GFX11-TRUE16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF96    ; GFX11-TRUE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_F32_t16_e64_]], %subreg.lo16, [[DEF]], %subreg.hi1697    ; GFX11-TRUE16-NEXT: $vgpr0 = COPY [[REG_SEQUENCE]]98    ;99    ; GFX11-FAKE16-LABEL: name: sitofp_s32_to_s16_vv100    ; GFX11-FAKE16: liveins: $vgpr0101    ; GFX11-FAKE16-NEXT: {{  $}}102    ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0103    ; GFX11-FAKE16-NEXT: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec104    ; GFX11-FAKE16-NEXT: [[V_CVT_F16_F32_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_fake16_e64 0, [[V_CVT_F32_I32_e32_]], 0, 0, implicit $mode, implicit $exec105    ; GFX11-FAKE16-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_fake16_e64_]]106    %0:vgpr(s32) = COPY $vgpr0107    %1:vgpr(s16) = G_SITOFP %0108    %2:vgpr(s32) = G_ANYEXT %1109    $vgpr0 = COPY %2110...111 112---113name: sitofp_s32_to_s16_vs114legalized: true115regBankSelected: true116tracksRegLiveness: true117 118body: |119  bb.0:120    liveins: $sgpr0121 122    ; WAVE64-LABEL: name: sitofp_s32_to_s16_vs123    ; WAVE64: liveins: $sgpr0124    ; WAVE64-NEXT: {{  $}}125    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0126    ; WAVE64-NEXT: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec127    ; WAVE64-NEXT: [[V_CVT_F16_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_e64 0, [[V_CVT_F32_I32_e32_]], 0, 0, implicit $mode, implicit $exec128    ; WAVE64-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_e64_]]129    ;130    ; WAVE32-LABEL: name: sitofp_s32_to_s16_vs131    ; WAVE32: liveins: $sgpr0132    ; WAVE32-NEXT: {{  $}}133    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0134    ; WAVE32-NEXT: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec135    ; WAVE32-NEXT: [[V_CVT_F16_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_e64 0, [[V_CVT_F32_I32_e32_]], 0, 0, implicit $mode, implicit $exec136    ; WAVE32-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_e64_]]137    ;138    ; GFX11-TRUE16-LABEL: name: sitofp_s32_to_s16_vs139    ; GFX11-TRUE16: liveins: $sgpr0140    ; GFX11-TRUE16-NEXT: {{  $}}141    ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0142    ; GFX11-TRUE16-NEXT: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec143    ; GFX11-TRUE16-NEXT: [[V_CVT_F16_F32_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, [[V_CVT_F32_I32_e32_]], 0, 0, 0, implicit $mode, implicit $exec144    ; GFX11-TRUE16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF145    ; GFX11-TRUE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_F32_t16_e64_]], %subreg.lo16, [[DEF]], %subreg.hi16146    ; GFX11-TRUE16-NEXT: $vgpr0 = COPY [[REG_SEQUENCE]]147    ;148    ; GFX11-FAKE16-LABEL: name: sitofp_s32_to_s16_vs149    ; GFX11-FAKE16: liveins: $sgpr0150    ; GFX11-FAKE16-NEXT: {{  $}}151    ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0152    ; GFX11-FAKE16-NEXT: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec153    ; GFX11-FAKE16-NEXT: [[V_CVT_F16_F32_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_fake16_e64 0, [[V_CVT_F32_I32_e32_]], 0, 0, implicit $mode, implicit $exec154    ; GFX11-FAKE16-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_fake16_e64_]]155    %0:sgpr(s32) = COPY $sgpr0156    %1:vgpr(s16) = G_SITOFP %0157    %2:vgpr(s32) = G_ANYEXT %1158    $vgpr0 = COPY %2159...160