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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s3# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s4# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s5# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -run-pass=instruction-select %s -o - | FileCheck -check-prefix=GCN %s6 7---8name: smin_s32_ss9legalized: true10regBankSelected: true11 12body: |13 bb.0:14 liveins: $sgpr0, $sgpr115 ; GCN-LABEL: name: smin_s32_ss16 ; GCN: liveins: $sgpr0, $sgpr117 ; GCN-NEXT: {{ $}}18 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr019 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr120 ; GCN-NEXT: [[S_MIN_I32_:%[0-9]+]]:sreg_32 = S_MIN_I32 [[COPY]], [[COPY1]], implicit-def dead $scc21 ; GCN-NEXT: S_ENDPGM 0, implicit [[S_MIN_I32_]]22 %0:sgpr(s32) = COPY $sgpr023 %1:sgpr(s32) = COPY $sgpr124 %2:sgpr(s32) = G_SMIN %0, %125 S_ENDPGM 0, implicit %226...27 28---29name: smin_s32_sv30legalized: true31regBankSelected: true32 33body: |34 bb.0:35 liveins: $sgpr0, $vgpr036 ; GCN-LABEL: name: smin_s32_sv37 ; GCN: liveins: $sgpr0, $vgpr038 ; GCN-NEXT: {{ $}}39 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr040 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr041 ; GCN-NEXT: [[V_MIN_I32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[COPY]], [[COPY1]], implicit $exec42 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MIN_I32_e64_]]43 %0:sgpr(s32) = COPY $sgpr044 %1:vgpr(s32) = COPY $vgpr045 %2:vgpr(s32) = G_SMIN %0, %146 S_ENDPGM 0, implicit %247...48 49---50name: smin_s32_vs51legalized: true52regBankSelected: true53 54body: |55 bb.0:56 liveins: $sgpr0, $vgpr057 ; GCN-LABEL: name: smin_s32_vs58 ; GCN: liveins: $sgpr0, $vgpr059 ; GCN-NEXT: {{ $}}60 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr061 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr062 ; GCN-NEXT: [[V_MIN_I32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[COPY]], [[COPY1]], implicit $exec63 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MIN_I32_e64_]]64 %0:vgpr(s32) = COPY $vgpr065 %1:sgpr(s32) = COPY $sgpr066 %2:vgpr(s32) = G_SMIN %0, %167 S_ENDPGM 0, implicit %268...69 70---71name: smin_s32_vv72legalized: true73regBankSelected: true74 75body: |76 bb.0:77 liveins: $vgpr0, $vgpr178 ; GCN-LABEL: name: smin_s32_vv79 ; GCN: liveins: $vgpr0, $vgpr180 ; GCN-NEXT: {{ $}}81 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr082 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr183 ; GCN-NEXT: [[V_MIN_I32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[COPY]], [[COPY1]], implicit $exec84 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MIN_I32_e64_]]85 %0:vgpr(s32) = COPY $vgpr086 %1:vgpr(s32) = COPY $vgpr187 %2:vgpr(s32) = G_SMIN %0, %188 S_ENDPGM 0, implicit %289...90