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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GCN %s3# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GCN %s4# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GCN %s5 6---7name: umin_s32_ss8legalized: true9regBankSelected: true10 11body: |12 bb.0:13 liveins: $sgpr0, $sgpr114 ; GCN-LABEL: name: umin_s32_ss15 ; GCN: liveins: $sgpr0, $sgpr116 ; GCN-NEXT: {{ $}}17 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr018 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr119 ; GCN-NEXT: [[S_MIN_U32_:%[0-9]+]]:sreg_32 = S_MIN_U32 [[COPY]], [[COPY1]], implicit-def dead $scc20 ; GCN-NEXT: S_ENDPGM 0, implicit [[S_MIN_U32_]]21 %0:sgpr(s32) = COPY $sgpr022 %1:sgpr(s32) = COPY $sgpr123 %2:sgpr(s32) = G_UMIN %0, %124 S_ENDPGM 0, implicit %225...26 27---28name: umin_s32_sv29legalized: true30regBankSelected: true31 32body: |33 bb.0:34 liveins: $sgpr0, $vgpr035 ; GCN-LABEL: name: umin_s32_sv36 ; GCN: liveins: $sgpr0, $vgpr037 ; GCN-NEXT: {{ $}}38 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr039 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr040 ; GCN-NEXT: [[V_MIN_U32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U32_e64 [[COPY]], [[COPY1]], implicit $exec41 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MIN_U32_e64_]]42 %0:sgpr(s32) = COPY $sgpr043 %1:vgpr(s32) = COPY $vgpr044 %2:vgpr(s32) = G_UMIN %0, %145 S_ENDPGM 0, implicit %246...47 48---49name: umin_s32_vs50legalized: true51regBankSelected: true52 53body: |54 bb.0:55 liveins: $sgpr0, $vgpr056 ; GCN-LABEL: name: umin_s32_vs57 ; GCN: liveins: $sgpr0, $vgpr058 ; GCN-NEXT: {{ $}}59 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr060 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr061 ; GCN-NEXT: [[V_MIN_U32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U32_e64 [[COPY]], [[COPY1]], implicit $exec62 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MIN_U32_e64_]]63 %0:vgpr(s32) = COPY $vgpr064 %1:sgpr(s32) = COPY $sgpr065 %2:vgpr(s32) = G_UMIN %0, %166 S_ENDPGM 0, implicit %267...68 69---70name: umin_s32_vv71legalized: true72regBankSelected: true73 74body: |75 bb.0:76 liveins: $vgpr0, $vgpr177 ; GCN-LABEL: name: umin_s32_vv78 ; GCN: liveins: $vgpr0, $vgpr179 ; GCN-NEXT: {{ $}}80 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr081 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr182 ; GCN-NEXT: [[V_MIN_U32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U32_e64 [[COPY]], [[COPY1]], implicit $exec83 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MIN_U32_e64_]]84 %0:vgpr(s32) = COPY $vgpr085 %1:vgpr(s32) = COPY $vgpr186 %2:vgpr(s32) = G_UMIN %0, %187 S_ENDPGM 0, implicit %288...89