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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -global-isel -stop-after=irtranslator -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - %s | FileCheck -enable-var-scope %s3 4; amdgpu_gfx calling convention5declare hidden amdgpu_gfx void @external_gfx_void_func_void() #06declare hidden amdgpu_gfx void @external_gfx_void_func_i32(i32) #07declare hidden amdgpu_gfx void @external_gfx_void_func_i32_inreg(i32 inreg) #08declare hidden amdgpu_gfx void @external_gfx_void_func_struct_i8_i32({ i8, i32 }) #09declare hidden amdgpu_gfx void @external_gfx_void_func_struct_i8_i32_inreg({ i8, i32 } inreg) #010 11define amdgpu_gfx void @test_gfx_call_external_void_func_void() #0 {12 ; CHECK-LABEL: name: test_gfx_call_external_void_func_void13 ; CHECK: bb.1 (%ir-block.0):14 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $scc15 ; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_gfx_void_func_void16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr317 ; CHECK-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY]](<4 x s32>)18 ; CHECK-NEXT: $sgpr30_sgpr31 = noconvergent G_SI_CALL [[GV]](p0), @external_gfx_void_func_void, csr_amdgpu_si_gfx, implicit $sgpr0_sgpr1_sgpr2_sgpr319 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc20 ; CHECK-NEXT: SI_RETURN21 call amdgpu_gfx void @external_gfx_void_func_void()22 ret void23}24 25define amdgpu_gfx void @test_gfx_call_external_void_func_i32_imm(i32) #0 {26 ; CHECK-LABEL: name: test_gfx_call_external_void_func_i32_imm27 ; CHECK: bb.1 (%ir-block.1):28 ; CHECK-NEXT: liveins: $vgpr029 ; CHECK-NEXT: {{ $}}30 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr031 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4232 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $scc33 ; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_gfx_void_func_i3234 ; CHECK-NEXT: $vgpr0 = COPY [[C]](s32)35 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr336 ; CHECK-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY1]](<4 x s32>)37 ; CHECK-NEXT: $sgpr30_sgpr31 = noconvergent G_SI_CALL [[GV]](p0), @external_gfx_void_func_i32, csr_amdgpu_si_gfx, implicit $vgpr0, implicit $sgpr0_sgpr1_sgpr2_sgpr338 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc39 ; CHECK-NEXT: SI_RETURN40 call amdgpu_gfx void @external_gfx_void_func_i32(i32 42)41 ret void42}43 44define amdgpu_gfx void @test_gfx_call_external_void_func_i32_imm_inreg(i32 inreg) #0 {45 ; CHECK-LABEL: name: test_gfx_call_external_void_func_i32_imm_inreg46 ; CHECK: bb.1 (%ir-block.1):47 ; CHECK-NEXT: liveins: $sgpr448 ; CHECK-NEXT: {{ $}}49 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr450 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4251 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $scc52 ; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_gfx_void_func_i32_inreg53 ; CHECK-NEXT: [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[C]](s32)54 ; CHECK-NEXT: $sgpr4 = COPY [[INTRINSIC_CONVERGENT]](s32)55 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr356 ; CHECK-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY1]](<4 x s32>)57 ; CHECK-NEXT: $sgpr30_sgpr31 = noconvergent G_SI_CALL [[GV]](p0), @external_gfx_void_func_i32_inreg, csr_amdgpu_si_gfx, implicit $sgpr4, implicit $sgpr0_sgpr1_sgpr2_sgpr358 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc59 ; CHECK-NEXT: SI_RETURN60 call amdgpu_gfx void @external_gfx_void_func_i32_inreg(i32 inreg 42)61 ret void62}63 64define amdgpu_gfx void @test_gfx_call_external_void_func_struct_i8_i32() #0 {65 ; CHECK-LABEL: name: test_gfx_call_external_void_func_struct_i8_i3266 ; CHECK: bb.1 (%ir-block.0):67 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF68 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (invariant load (p1) from `ptr addrspace(4) poison`, addrspace 4)69 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p1) :: (load (s8) from %ir.ptr0, align 4, addrspace 1)70 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 471 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[LOAD]], [[C]](s64)72 ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load (s32) from %ir.ptr0 + 4, addrspace 1)73 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $scc74 ; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_gfx_void_func_struct_i8_i3275 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[LOAD1]](s8)76 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT]](s16)77 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT1]](s32)78 ; CHECK-NEXT: $vgpr1 = COPY [[LOAD2]](s32)79 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr380 ; CHECK-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY]](<4 x s32>)81 ; CHECK-NEXT: $sgpr30_sgpr31 = noconvergent G_SI_CALL [[GV]](p0), @external_gfx_void_func_struct_i8_i32, csr_amdgpu_si_gfx, implicit $vgpr0, implicit $vgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr382 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc83 ; CHECK-NEXT: SI_RETURN84 %ptr0 = load ptr addrspace(1), ptr addrspace(4) poison85 %val = load { i8, i32 }, ptr addrspace(1) %ptr086 call amdgpu_gfx void @external_gfx_void_func_struct_i8_i32({ i8, i32 } %val)87 ret void88}89 90define amdgpu_gfx void @test_gfx_call_external_void_func_struct_i8_i32_inreg() #0 {91 ; CHECK-LABEL: name: test_gfx_call_external_void_func_struct_i8_i32_inreg92 ; CHECK: bb.1 (%ir-block.0):93 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF94 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[DEF]](p4) :: (invariant load (p1) from `ptr addrspace(4) poison`, addrspace 4)95 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[LOAD]](p1) :: (load (s8) from %ir.ptr0, align 4, addrspace 1)96 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 497 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[LOAD]], [[C]](s64)98 ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p1) :: (load (s32) from %ir.ptr0 + 4, addrspace 1)99 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $scc100 ; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @external_gfx_void_func_struct_i8_i32_inreg101 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[LOAD1]](s8)102 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[ANYEXT]](s16)103 ; CHECK-NEXT: [[INTRINSIC_CONVERGENT:%[0-9]+]]:_(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[ANYEXT1]](s32)104 ; CHECK-NEXT: $sgpr4 = COPY [[INTRINSIC_CONVERGENT]](s32)105 ; CHECK-NEXT: [[INTRINSIC_CONVERGENT1:%[0-9]+]]:_(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[LOAD2]](s32)106 ; CHECK-NEXT: $sgpr5 = COPY [[INTRINSIC_CONVERGENT1]](s32)107 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3108 ; CHECK-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY]](<4 x s32>)109 ; CHECK-NEXT: $sgpr30_sgpr31 = noconvergent G_SI_CALL [[GV]](p0), @external_gfx_void_func_struct_i8_i32_inreg, csr_amdgpu_si_gfx, implicit $sgpr4, implicit $sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3110 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc111 ; CHECK-NEXT: SI_RETURN112 %ptr0 = load ptr addrspace(1), ptr addrspace(4) poison113 %val = load { i8, i32 }, ptr addrspace(1) %ptr0114 call amdgpu_gfx void @external_gfx_void_func_struct_i8_i32_inreg({ i8, i32 } inreg %val)115 ret void116}117 118attributes #0 = { nounwind }119attributes #1 = { nounwind readnone }120attributes #2 = { nounwind noinline }121