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1; RUN: llc -mtriple=amdgcn -mcpu=fiji -O0 -stop-after=irtranslator -global-isel %s -o - | FileCheck %s2 3; Check flags are preserved for a regular instruction.4; CHECK-LABEL: name: fadd_nnan5; CHECK: nnan G_FADD6define amdgpu_kernel void @fadd_nnan(float %arg0, float %arg1) {7 %res = fadd nnan float %arg0, %arg18 store float %res, ptr addrspace(1) poison9 ret void10}11 12; Check flags are preserved for a specially handled intrinsic13; CHECK-LABEL: name: fma_fast14; CHECK: nnan ninf nsz arcp contract afn reassoc G_FMA15define amdgpu_kernel void @fma_fast(float %arg0, float %arg1, float %arg2) {16 %res = call fast float @llvm.fma.f32(float %arg0, float %arg1, float %arg2)17 store float %res, ptr addrspace(1) poison18 ret void19}20 21; Check flags are preserved for an arbitrarry target intrinsic22; CHECK-LABEL: name: rcp_nsz23; CHECK: = nsz G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %{{[0-9]+}}(s32)24define amdgpu_kernel void @rcp_nsz(float %arg0) {25 %res = call nsz float @llvm.amdgcn.rcp.f32 (float %arg0)26 store float %res, ptr addrspace(1) poison27 ret void28}29 30declare float @llvm.fma.f32(float, float, float)31declare float @llvm.amdgcn.rcp.f32(float)32