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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -simplify-mir -global-isel -mtriple=amdgcn -stop-after=irtranslator %s -o - | FileCheck %s3 4; Check the flags set on the memory operands for loads determined to5; be constants by alias analysis.6 7@const_gv0 = external addrspace(1) constant i32, align 48@const_gv1 = external addrspace(1) constant i32, align 49@const_struct_gv = external addrspace(1) constant { i32, i64 }, align 810 11define i32 @load_const_i32_gv() {12 ; CHECK-LABEL: name: load_const_i32_gv13 ; CHECK: bb.1 (%ir-block.0):14 ; CHECK-NEXT: [[GV:%[0-9]+]]:_(p1) = G_GLOBAL_VALUE @const_gv015 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GV]](p1) :: (dereferenceable invariant load (s32) from @const_gv0, addrspace 1)16 ; CHECK-NEXT: $vgpr0 = COPY [[LOAD]](s32)17 ; CHECK-NEXT: SI_RETURN implicit $vgpr018 %load = load i32, ptr addrspace(1) @const_gv0, align 419 ret i32 %load20}21 22define i32 @load_select_const_i32_gv(i1 %cond) {23 ; CHECK-LABEL: name: load_select_const_i32_gv24 ; CHECK: bb.1 (%ir-block.0):25 ; CHECK-NEXT: liveins: $vgpr026 ; CHECK-NEXT: {{ $}}27 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr028 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)29 ; CHECK-NEXT: [[GV:%[0-9]+]]:_(p1) = G_GLOBAL_VALUE @const_gv030 ; CHECK-NEXT: [[GV1:%[0-9]+]]:_(p1) = G_GLOBAL_VALUE @const_gv131 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(p1) = G_SELECT [[TRUNC]](s1), [[GV]], [[GV1]]32 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[SELECT]](p1) :: (dereferenceable invariant load (s32) from %ir.select, addrspace 1)33 ; CHECK-NEXT: $vgpr0 = COPY [[LOAD]](s32)34 ; CHECK-NEXT: SI_RETURN implicit $vgpr035 %select = select i1 %cond, ptr addrspace(1) @const_gv0, ptr addrspace(1) @const_gv136 %load = load i32, ptr addrspace(1) %select, align 437 ret i32 %load38}39 40define { i32, i64 } @load_const_struct_gv() {41 ; CHECK-LABEL: name: load_const_struct_gv42 ; CHECK: bb.1 (%ir-block.0):43 ; CHECK-NEXT: [[GV:%[0-9]+]]:_(p1) = G_GLOBAL_VALUE @const_struct_gv44 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GV]](p1) :: (dereferenceable invariant load (s32) from @const_struct_gv, align 8, addrspace 1)45 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 846 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[GV]], [[C]](s64)47 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p1) :: (dereferenceable invariant load (s64) from @const_struct_gv + 8, addrspace 1)48 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](s64)49 ; CHECK-NEXT: $vgpr0 = COPY [[LOAD]](s32)50 ; CHECK-NEXT: $vgpr1 = COPY [[UV]](s32)51 ; CHECK-NEXT: $vgpr2 = COPY [[UV1]](s32)52 ; CHECK-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1, implicit $vgpr253 %load = load { i32, i64 }, ptr addrspace(1) @const_struct_gv, align 854 ret { i32, i64 } %load55}56 57define void @test_memcpy_p1_constaddr_i64(ptr addrspace(1) %dst, ptr addrspace(4) %src) {58 ; CHECK-LABEL: name: test_memcpy_p1_constaddr_i6459 ; CHECK: bb.1 (%ir-block.0):60 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr361 ; CHECK-NEXT: {{ $}}62 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr063 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr164 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)65 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr266 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr367 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)68 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3269 ; CHECK-NEXT: G_MEMCPY [[MV]](p1), [[MV1]](p4), [[C]](s64), 0 :: (store (s8) into %ir.dst, addrspace 1), (dereferenceable invariant load (s8) from %ir.src, addrspace 4)70 ; CHECK-NEXT: SI_RETURN71 call void @llvm.memcpy.p1.p4.i64(ptr addrspace(1) %dst, ptr addrspace(4) %src, i64 32, i1 false)72 ret void73}74 75define void @test_memcpy_inline_p1_constaddr_i64(ptr addrspace(1) %dst, ptr addrspace(4) %src) {76 ; CHECK-LABEL: name: test_memcpy_inline_p1_constaddr_i6477 ; CHECK: bb.1 (%ir-block.0):78 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr379 ; CHECK-NEXT: {{ $}}80 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr081 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr182 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)83 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr284 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr385 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)86 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3287 ; CHECK-NEXT: G_MEMCPY_INLINE [[MV]](p1), [[MV1]](p4), [[C]](s64) :: (store (s8) into %ir.dst, addrspace 1), (dereferenceable invariant load (s8) from %ir.src, addrspace 4)88 ; CHECK-NEXT: SI_RETURN89 call void @llvm.memcpy.inline.p1.p4.i64(ptr addrspace(1) %dst, ptr addrspace(4) %src, i64 32, i1 false)90 ret void91}92 93define void @test_memmove_p1_constaddr_i64(ptr addrspace(1) %dst, ptr addrspace(4) %src) {94 ; CHECK-LABEL: name: test_memmove_p1_constaddr_i6495 ; CHECK: bb.1 (%ir-block.0):96 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr397 ; CHECK-NEXT: {{ $}}98 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr099 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1100 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)101 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2102 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3103 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)104 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 32105 ; CHECK-NEXT: G_MEMMOVE [[MV]](p1), [[MV1]](p4), [[C]](s64), 0 :: (store (s8) into %ir.dst, addrspace 1), (dereferenceable invariant load (s8) from %ir.src, addrspace 4)106 ; CHECK-NEXT: SI_RETURN107 call void @llvm.memmove.p1.p4.i64(ptr addrspace(1) %dst, ptr addrspace(4) %src, i64 32, i1 false)108 ret void109}110 111declare void @llvm.memcpy.p1.p4.i64(ptr addrspace(1) noalias nocapture writeonly, ptr addrspace(4) noalias nocapture readonly, i64, i1 immarg) #0112declare void @llvm.memcpy.inline.p1.p4.i64(ptr addrspace(1) noalias nocapture writeonly, ptr addrspace(4) noalias nocapture readonly, i64, i1 immarg) #0113declare void @llvm.memmove.p1.p4.i64(ptr addrspace(1) nocapture writeonly, ptr addrspace(4) nocapture readonly, i64, i1 immarg) #0114 115attributes #0 = { argmemonly nofree nounwind willreturn }116