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1; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -amdgpu-enable-lower-module-lds=0 -show-mc-encoding < %s | FileCheck -check-prefixes=GCN %s2; FIXME: Merge with DAG test3 4@lds.external = external unnamed_addr addrspace(3) global [0 x i32]5@lds.defined = unnamed_addr addrspace(3) global [8 x i32] poison, align 86 7; GCN-LABEL: {{^}}test_basic:8; GCN: s_add_u32 s0, lds.defined@abs32@lo, s0 ; encoding: [0xff,0x00,0x00,0x80,A,A,A,A]9; GCN: v_mov_b32_e32 v2, s0 ; encoding: [0x00,0x02,0x04,0x7e]10 11; GCN: .globl lds.external12; GCN: .amdgpu_lds lds.external, 0, 413; GCN: .globl lds.defined14; GCN: .amdgpu_lds lds.defined, 32, 815define amdgpu_gs float @test_basic(i32 inreg %wave, i32 %arg1) #0 {16main_body:17 %gep0 = getelementptr [0 x i32], ptr addrspace(3) @lds.external, i32 0, i32 %arg118 %tmp = load i32, ptr addrspace(3) %gep019 20 %gep1 = getelementptr [8 x i32], ptr addrspace(3) @lds.defined, i32 0, i32 %wave21 store i32 123, ptr addrspace(3) %gep122 23 %r = bitcast i32 %tmp to float24 ret float %r25}26 27attributes #0 = { "no-signed-zeros-fp-math"="true" }28attributes #4 = { convergent nounwind readnone }29