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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: test_and_s326body: |7 bb.0:8 liveins: $vgpr0, $vgpr19 10 ; CHECK-LABEL: name: test_and_s3211 ; CHECK: liveins: $vgpr0, $vgpr112 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr014 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr115 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]16 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)17 %0:_(s32) = COPY $vgpr018 %1:_(s32) = COPY $vgpr119 %2:_(s32) = G_AND %0, %120 $vgpr0 = COPY %221...22 23---24name: test_and_s125body: |26 bb.0:27 liveins: $vgpr0, $vgpr128 29 ; CHECK-LABEL: name: test_and_s130 ; CHECK: liveins: $vgpr0, $vgpr131 ; CHECK-NEXT: {{ $}}32 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr033 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr134 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]35 ; CHECK-NEXT: S_NOP 0, implicit [[AND]](s32)36 %0:_(s32) = COPY $vgpr037 %1:_(s32) = COPY $vgpr138 %2:_(s32) = G_CONSTANT i32 039 %3:_(s1) = G_ICMP intpred(ne), %0, %240 %4:_(s1) = G_ICMP intpred(ne), %1, %241 %5:_(s32) = G_AND %0, %142 S_NOP 0, implicit %543...44 45---46name: test_and_v2s147body: |48 bb.0:49 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr550 51 ; CHECK-LABEL: name: test_and_v2s152 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr553 ; CHECK-NEXT: {{ $}}54 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr155 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr356 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr557 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)58 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)59 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](s32), [[UV2]]60 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](s32), [[UV3]]61 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)62 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<2 x s32>)63 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV4]](s32), [[UV6]]64 ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV5]](s32), [[UV7]]65 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s1) = G_AND [[ICMP]], [[ICMP2]]66 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s1) = G_AND [[ICMP1]], [[ICMP3]]67 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s1)68 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[AND1]](s1)69 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32)70 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)71 %0:_(<2 x s32>) = COPY $vgpr0_vgpr172 %1:_(<2 x s32>) = COPY $vgpr2_vgpr373 %2:_(<2 x s32>) = COPY $vgpr4_vgpr574 %3:_(<2 x s1>) = G_ICMP intpred(ne), %0, %175 %4:_(<2 x s1>) = G_ICMP intpred(ne), %0, %276 %5:_(<2 x s1>) = G_AND %3, %477 %6:_(<2 x s32>) = G_ANYEXT %578 $vgpr0_vgpr1 = COPY %679...80 81---82name: test_and_v3s183body: |84 bb.0:85 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5, $vgpr6_vgpr7_vgpr886 87 ; CHECK-LABEL: name: test_and_v3s188 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5, $vgpr6_vgpr7_vgpr889 ; CHECK-NEXT: {{ $}}90 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr291 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr592 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr6_vgpr7_vgpr893 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)94 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)95 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](s32), [[UV3]]96 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](s32), [[UV4]]97 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV2]](s32), [[UV5]]98 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)99 ; CHECK-NEXT: [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<3 x s32>)100 ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV6]](s32), [[UV9]]101 ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV7]](s32), [[UV10]]102 ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV8]](s32), [[UV11]]103 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s1) = G_AND [[ICMP]], [[ICMP3]]104 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s1) = G_AND [[ICMP1]], [[ICMP4]]105 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s1) = G_AND [[ICMP2]], [[ICMP5]]106 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s1)107 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[AND1]](s1)108 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[AND2]](s1)109 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32)110 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)111 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2112 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5113 %2:_(<3 x s32>) = COPY $vgpr6_vgpr7_vgpr8114 %3:_(<3 x s1>) = G_ICMP intpred(ne), %0, %1115 %4:_(<3 x s1>) = G_ICMP intpred(ne), %0, %2116 %5:_(<3 x s1>) = G_AND %3, %4117 %6:_(<3 x s32>) = G_ANYEXT %5118 $vgpr0_vgpr1_vgpr2 = COPY %6119...120 121---122name: test_and_s64123body: |124 bb.0:125 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3126 127 ; CHECK-LABEL: name: test_and_s64128 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3129 ; CHECK-NEXT: {{ $}}130 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1131 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3132 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]133 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[AND]](s64)134 %0:_(s64) = COPY $vgpr0_vgpr1135 %1:_(s64) = COPY $vgpr2_vgpr3136 %2:_(s64) = G_AND %0, %1137 $vgpr0_vgpr1 = COPY %2138...139 140---141name: test_and_s96142body: |143 bb.0:144 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5145 146 ; CHECK-LABEL: name: test_and_s96147 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5148 ; CHECK-NEXT: {{ $}}149 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2150 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr3_vgpr4_vgpr5151 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT [[COPY]](s96), 0152 ; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s96), 64153 ; CHECK-NEXT: [[EXTRACT2:%[0-9]+]]:_(s64) = G_EXTRACT [[COPY1]](s96), 0154 ; CHECK-NEXT: [[EXTRACT3:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY1]](s96), 64155 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[EXTRACT]], [[EXTRACT2]]156 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[EXTRACT1]], [[EXTRACT3]]157 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AND]](s64)158 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32), [[AND1]](s32)159 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)160 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2161 %1:_(s96) = COPY $vgpr3_vgpr4_vgpr5162 %2:_(s96) = G_AND %0, %1163 $vgpr0_vgpr1_vgpr2 = COPY %2164...165 166---167name: test_and_128168body: |169 bb.0:170 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7171 172 ; CHECK-LABEL: name: test_and_128173 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7174 ; CHECK-NEXT: {{ $}}175 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3176 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7177 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)178 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](s128)179 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[UV2]]180 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[UV3]]181 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[AND]](s64), [[AND1]](s64)182 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)183 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3184 %1:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7185 %2:_(s128) = G_AND %0, %1186 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2187...188 189---190name: test_and_s7191body: |192 bb.0:193 liveins: $vgpr0, $vgpr1194 195 ; CHECK-LABEL: name: test_and_s7196 ; CHECK: liveins: $vgpr0, $vgpr1197 ; CHECK-NEXT: {{ $}}198 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0199 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1200 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]201 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)202 %0:_(s32) = COPY $vgpr0203 %1:_(s32) = COPY $vgpr1204 %2:_(s7) = G_TRUNC %0205 %3:_(s7) = G_TRUNC %1206 %4:_(s7) = G_AND %2, %3207 %5:_(s32) = G_ANYEXT %4208 $vgpr0 = COPY %5209...210 211---212name: test_and_s8213body: |214 bb.0:215 liveins: $vgpr0, $vgpr1216 217 ; CHECK-LABEL: name: test_and_s8218 ; CHECK: liveins: $vgpr0, $vgpr1219 ; CHECK-NEXT: {{ $}}220 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0221 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1222 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]223 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)224 %0:_(s32) = COPY $vgpr0225 %1:_(s32) = COPY $vgpr1226 %2:_(s8) = G_TRUNC %0227 %3:_(s8) = G_TRUNC %1228 %4:_(s8) = G_AND %2, %3229 %5:_(s32) = G_ANYEXT %4230 $vgpr0 = COPY %5231...232 233---234name: test_and_s16235body: |236 bb.0:237 liveins: $vgpr0, $vgpr1238 239 ; CHECK-LABEL: name: test_and_s16240 ; CHECK: liveins: $vgpr0, $vgpr1241 ; CHECK-NEXT: {{ $}}242 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0243 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1244 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)245 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)246 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[TRUNC1]]247 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s16)248 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)249 %0:_(s32) = COPY $vgpr0250 %1:_(s32) = COPY $vgpr1251 %2:_(s16) = G_TRUNC %0252 %3:_(s16) = G_TRUNC %1253 %4:_(s16) = G_AND %2, %3254 %5:_(s32) = G_ANYEXT %4255 $vgpr0 = COPY %5256...257 258---259name: test_and_s24260body: |261 bb.0:262 liveins: $vgpr0, $vgpr1263 264 ; CHECK-LABEL: name: test_and_s24265 ; CHECK: liveins: $vgpr0, $vgpr1266 ; CHECK-NEXT: {{ $}}267 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0268 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1269 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]270 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)271 %0:_(s32) = COPY $vgpr0272 %1:_(s32) = COPY $vgpr1273 %2:_(s24) = G_TRUNC %0274 %3:_(s24) = G_TRUNC %1275 %4:_(s24) = G_AND %2, %3276 %5:_(s32) = G_ANYEXT %4277 $vgpr0 = COPY %5278...279 280---281name: test_and_s48282body: |283 bb.0:284 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3285 286 ; CHECK-LABEL: name: test_and_s48287 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3288 ; CHECK-NEXT: {{ $}}289 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1290 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3291 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]292 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[AND]](s64)293 %0:_(s64) = COPY $vgpr0_vgpr1294 %1:_(s64) = COPY $vgpr2_vgpr3295 %2:_(s48) = G_TRUNC %0296 %3:_(s48) = G_TRUNC %1297 %4:_(s48) = G_AND %2, %3298 %5:_(s64) = G_ANYEXT %4299 $vgpr0_vgpr1 = COPY %5300...301 302---303name: test_and_v2s32304body: |305 bb.0:306 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3307 308 ; CHECK-LABEL: name: test_and_v2s32309 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3310 ; CHECK-NEXT: {{ $}}311 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1312 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3313 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[COPY1]]314 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[AND]](<2 x s32>)315 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1316 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3317 %2:_(<2 x s32>) = G_AND %0, %1318 $vgpr0_vgpr1 = COPY %2319...320 321---322name: test_and_v3s32323body: |324 bb.0:325 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5326 327 ; CHECK-LABEL: name: test_and_v3s32328 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5329 ; CHECK-NEXT: {{ $}}330 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2331 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5332 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)333 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32)334 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)335 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV3]](s32), [[UV4]](s32)336 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[BUILD_VECTOR]], [[BUILD_VECTOR1]]337 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UV2]], [[UV5]]338 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AND]](<2 x s32>)339 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UV6]](s32), [[UV7]](s32), [[AND1]](s32)340 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR2]](<3 x s32>)341 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2342 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5343 %2:_(<3 x s32>) = G_AND %0, %1344 $vgpr0_vgpr1_vgpr2 = COPY %2345...346 347---348name: test_and_v4s32349body: |350 bb.0:351 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7352 353 ; CHECK-LABEL: name: test_and_v4s32354 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7355 ; CHECK-NEXT: {{ $}}356 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3357 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7358 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s32>), [[UV1:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)359 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s32>), [[UV3:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY1]](<4 x s32>)360 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[UV]], [[UV2]]361 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[UV1]], [[UV3]]362 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[AND]](<2 x s32>), [[AND1]](<2 x s32>)363 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>)364 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3365 %1:_(<4 x s32>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7366 %2:_(<4 x s32>) = G_AND %0, %1367 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2368...369 370---371name: test_and_v5s32372body: |373 bb.0:374 375 ; CHECK-LABEL: name: test_and_v5s32376 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF377 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)378 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)379 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)380 ; CHECK-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)381 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[BUILD_VECTOR]], [[BUILD_VECTOR2]]382 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[BUILD_VECTOR1]], [[BUILD_VECTOR3]]383 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]384 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AND]](<2 x s32>)385 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AND1]](<2 x s32>)386 ; CHECK-NEXT: [[BUILD_VECTOR4:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[UV3]](s32), [[AND2]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32)387 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR4]](<8 x s32>)388 %0:_(<5 x s32>) = G_IMPLICIT_DEF389 %1:_(<5 x s32>) = G_IMPLICIT_DEF390 %2:_(<5 x s32>) = G_AND %0, %1391 %3:_(<8 x s32>) = G_IMPLICIT_DEF392 %4:_(<8 x s32>) = G_INSERT %3, %2, 0393 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %4394...395 396---397name: test_and_v2s64398body: |399 bb.0:400 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7401 402 ; CHECK-LABEL: name: test_and_v2s64403 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7404 ; CHECK-NEXT: {{ $}}405 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3406 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7407 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)408 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)409 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[UV2]]410 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[UV3]]411 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[AND]](s64), [[AND1]](s64)412 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)413 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3414 %1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7415 %2:_(<2 x s64>) = G_AND %0, %1416 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2417...418 419---420name: test_and_v2s16421body: |422 bb.0:423 liveins: $vgpr0, $vgpr1424 425 ; CHECK-LABEL: name: test_and_v2s16426 ; CHECK: liveins: $vgpr0, $vgpr1427 ; CHECK-NEXT: {{ $}}428 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0429 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1430 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[COPY]], [[COPY1]]431 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](<2 x s16>)432 %0:_(<2 x s16>) = COPY $vgpr0433 %1:_(<2 x s16>) = COPY $vgpr1434 %2:_(<2 x s16>) = G_AND %0, %1435 $vgpr0 = COPY %2436...437 438---439name: test_and_v3s16440body: |441 bb.0:442 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5443 ; CHECK-LABEL: name: test_and_v3s16444 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5445 ; CHECK-NEXT: {{ $}}446 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2447 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr3_vgpr4_vgpr5448 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<6 x s16>)449 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[UV1]](<2 x s16>)450 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(<2 x s16>), [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<6 x s16>)451 ; CHECK-NEXT: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV3]](<2 x s16>), [[UV4]](<2 x s16>)452 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[CONCAT_VECTORS]], [[CONCAT_VECTORS1]]453 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[AND]](<4 x s16>)454 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0455 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16456 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)457 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]458 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)459 ; CHECK-NEXT: [[CONCAT_VECTORS2:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[UV6]](<2 x s16>), [[UV7]](<2 x s16>), [[BITCAST]](<2 x s16>)460 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[CONCAT_VECTORS2]](<6 x s16>)461 %0:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2462 %1:_(<6 x s16>) = COPY $vgpr3_vgpr4_vgpr5463 %2:_(<3 x s16>), %3:_(<3 x s16>) = G_UNMERGE_VALUES %0464 %4:_(<3 x s16>), %5:_(<3 x s16>) = G_UNMERGE_VALUES %1465 %6:_(<3 x s16>) = G_AND %2, %4466 %7:_(<3 x s16>) = G_IMPLICIT_DEF467 %8:_(<6 x s16>) = G_CONCAT_VECTORS %6, %7468 $vgpr0_vgpr1_vgpr2 = COPY %8469 470...471 472---473name: test_and_v4s16474body: |475 bb.0:476 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3477 478 ; CHECK-LABEL: name: test_and_v4s16479 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3480 ; CHECK-NEXT: {{ $}}481 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1482 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3483 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[COPY]], [[COPY1]]484 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[AND]](<4 x s16>)485 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1486 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3487 %2:_(<4 x s16>) = G_AND %0, %1488 $vgpr0_vgpr1 = COPY %2489...490 491---492name: test_and_v5s16493body: |494 bb.0:495 496 ; CHECK-LABEL: name: test_and_v5s16497 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0498 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16499 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)500 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]501 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)502 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)503 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL1]]504 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)505 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>)506 ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)507 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL2]]508 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32)509 ; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)510 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL3]]511 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR3]](s32)512 ; CHECK-NEXT: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)513 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[CONCAT_VECTORS]], [[CONCAT_VECTORS1]]514 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[AND]](<4 x s16>)515 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)516 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST4]], [[C1]](s32)517 ; CHECK-NEXT: [[BITCAST5:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)518 ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)519 ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL4]]520 ; CHECK-NEXT: [[BITCAST6:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR4]](s32)521 ; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)522 ; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL5]]523 ; CHECK-NEXT: [[BITCAST7:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32)524 ; CHECK-NEXT: [[CONCAT_VECTORS2:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST6]](<2 x s16>), [[BITCAST7]](<2 x s16>)525 ; CHECK-NEXT: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)526 ; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL6]]527 ; CHECK-NEXT: [[BITCAST8:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR6]](s32)528 ; CHECK-NEXT: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)529 ; CHECK-NEXT: [[OR7:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL7]]530 ; CHECK-NEXT: [[BITCAST9:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR7]](s32)531 ; CHECK-NEXT: [[CONCAT_VECTORS3:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST8]](<2 x s16>), [[BITCAST9]](<2 x s16>)532 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<4 x s16>) = G_AND [[CONCAT_VECTORS2]], [[CONCAT_VECTORS3]]533 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[AND1]](<4 x s16>)534 ; CHECK-NEXT: [[BITCAST10:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>)535 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST10]], [[C1]](s32)536 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535537 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[BITCAST4]], [[C2]]538 ; CHECK-NEXT: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C1]](s32)539 ; CHECK-NEXT: [[OR8:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL8]]540 ; CHECK-NEXT: [[BITCAST11:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR8]](s32)541 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[BITCAST5]], [[C2]]542 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s32) = G_AND [[BITCAST10]], [[C2]]543 ; CHECK-NEXT: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND4]], [[C1]](s32)544 ; CHECK-NEXT: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND3]], [[SHL9]]545 ; CHECK-NEXT: [[BITCAST12:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR9]](s32)546 ; CHECK-NEXT: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)547 ; CHECK-NEXT: [[OR10:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL10]]548 ; CHECK-NEXT: [[BITCAST13:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR10]](s32)549 ; CHECK-NEXT: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)550 ; CHECK-NEXT: [[OR11:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL11]]551 ; CHECK-NEXT: [[BITCAST14:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR11]](s32)552 ; CHECK-NEXT: [[CONCAT_VECTORS4:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[BITCAST11]](<2 x s16>), [[BITCAST12]](<2 x s16>), [[BITCAST13]](<2 x s16>), [[BITCAST14]](<2 x s16>)553 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS4]](<8 x s16>)554 %0:_(<5 x s16>) = G_IMPLICIT_DEF555 %1:_(<5 x s16>) = G_IMPLICIT_DEF556 %2:_(<5 x s16>) = G_AND %0, %1557 %3:_(<8 x s16>) = G_IMPLICIT_DEF558 %4:_(<8 x s16>) = G_INSERT %3, %2, 0559 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %4560...561 562---563name: test_and_v3s8564body: |565 bb.0:566 567 ; CHECK-LABEL: name: test_and_v3s8568 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF569 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]570 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]571 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]572 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32), [[AND2]](s32)573 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)574 %0:_(<3 x s8>) = G_IMPLICIT_DEF575 %1:_(<3 x s8>) = G_IMPLICIT_DEF576 %2:_(<3 x s8>) = G_AND %0, %1577 %3:_(<3 x s32>) = G_ANYEXT %2578 $vgpr0_vgpr1_vgpr2 = COPY %3579...580 581---582name: test_and_v4s8583body: |584 bb.0:585 586 ; CHECK-LABEL: name: test_and_v4s8587 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF588 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]589 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]590 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]591 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]592 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32), [[AND2]](s32), [[AND3]](s32)593 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)594 %0:_(<4 x s8>) = G_IMPLICIT_DEF595 %1:_(<4 x s8>) = G_IMPLICIT_DEF596 %2:_(<4 x s8>) = G_AND %0, %1597 %3:_(<4 x s32>) = G_ANYEXT %2598 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3599...600 601---602name: test_and_v8s8603body: |604 bb.0:605 606 ; CHECK-LABEL: name: test_and_v8s8607 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF608 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]609 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]610 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]611 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]612 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]613 ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]614 ; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]615 ; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]616 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32), [[AND2]](s32), [[AND3]](s32), [[AND4]](s32), [[AND5]](s32), [[AND6]](s32), [[AND7]](s32)617 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<8 x s32>)618 %0:_(<8 x s8>) = G_IMPLICIT_DEF619 %1:_(<8 x s8>) = G_IMPLICIT_DEF620 %2:_(<8 x s8>) = G_AND %0, %1621 %3:_(<8 x s32>) = G_ANYEXT %2622 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %3623...624 625---626name: test_and_v16s8627body: |628 bb.0:629 630 ; CHECK-LABEL: name: test_and_v16s8631 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF632 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]633 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]634 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]635 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]636 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]637 ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]638 ; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]639 ; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]640 ; CHECK-NEXT: [[AND8:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]641 ; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]642 ; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]643 ; CHECK-NEXT: [[AND11:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]644 ; CHECK-NEXT: [[AND12:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]645 ; CHECK-NEXT: [[AND13:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]646 ; CHECK-NEXT: [[AND14:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]647 ; CHECK-NEXT: [[AND15:%[0-9]+]]:_(s32) = G_AND [[DEF]], [[DEF]]648 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[AND1]](s32), [[AND2]](s32), [[AND3]](s32), [[AND4]](s32), [[AND5]](s32), [[AND6]](s32), [[AND7]](s32), [[AND8]](s32), [[AND9]](s32), [[AND10]](s32), [[AND11]](s32), [[AND12]](s32), [[AND13]](s32), [[AND14]](s32), [[AND15]](s32)649 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[BUILD_VECTOR]](<16 x s32>)650 %0:_(<16 x s8>) = G_IMPLICIT_DEF651 %1:_(<16 x s8>) = G_IMPLICIT_DEF652 %2:_(<16 x s8>) = G_AND %0, %1653 %3:_(<16 x s32>) = G_ANYEXT %2654 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %3655...656