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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: extract_vector_elt_0_v2i326 7body: |8 bb.0:9 liveins: $vgpr0_vgpr110 ; CHECK-LABEL: name: extract_vector_elt_0_v2i3211 ; CHECK: liveins: $vgpr0_vgpr112 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr114 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)15 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)16 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)17 %0:_(<2 x s32>) = COPY $vgpr0_vgpr118 %1:_(s32) = G_CONSTANT i32 019 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %120 $vgpr0 = COPY %221...22---23name: extract_vector_elt_1_v2i3224 25body: |26 bb.0:27 liveins: $vgpr0_vgpr128 ; CHECK-LABEL: name: extract_vector_elt_1_v2i3229 ; CHECK: liveins: $vgpr0_vgpr130 ; CHECK-NEXT: {{ $}}31 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr132 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)33 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)34 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)35 %0:_(<2 x s32>) = COPY $vgpr0_vgpr136 %1:_(s32) = G_CONSTANT i32 137 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %138 $vgpr0 = COPY %239...40---41name: extract_vector_elt_2_v2i3242 43body: |44 bb.0:45 liveins: $vgpr0_vgpr146 ; CHECK-LABEL: name: extract_vector_elt_2_v2i3247 ; CHECK: liveins: $vgpr0_vgpr148 ; CHECK-NEXT: {{ $}}49 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr150 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)51 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)52 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)53 %0:_(<2 x s32>) = COPY $vgpr0_vgpr154 %1:_(s32) = G_CONSTANT i32 155 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %156 $vgpr0 = COPY %257...58---59name: extract_vector_elt_0_v3i3260 61body: |62 bb.0:63 liveins: $vgpr0_vgpr1_vgpr264 ; CHECK-LABEL: name: extract_vector_elt_0_v3i3265 ; CHECK: liveins: $vgpr0_vgpr1_vgpr266 ; CHECK-NEXT: {{ $}}67 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr268 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)69 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)70 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)71 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr272 %1:_(s32) = G_CONSTANT i32 073 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %174 $vgpr0 = COPY %275...76---77name: extract_vector_elt_0_v4i3278 79body: |80 bb.0:81 liveins: $vgpr0_vgpr1_vgpr2_vgpr382 ; CHECK-LABEL: name: extract_vector_elt_0_v4i3283 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr384 ; CHECK-NEXT: {{ $}}85 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr386 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)87 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)88 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)89 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr390 %1:_(s32) = G_CONSTANT i32 091 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %192 $vgpr0 = COPY %293...94 95---96name: extract_vector_elt_0_v5i3297 98body: |99 bb.0:100 liveins: $vgpr0101 ; CHECK-LABEL: name: extract_vector_elt_0_v5i32102 ; CHECK: liveins: $vgpr0103 ; CHECK-NEXT: {{ $}}104 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0105 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)106 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)107 %0:_(s32) = COPY $vgpr0108 %1:_(<5 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0109 %2:_(s32) = G_CONSTANT i32 0110 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2111 $vgpr0 = COPY %3112...113 114---115name: extract_vector_elt_0_v6i32116 117body: |118 bb.0:119 liveins: $vgpr0120 ; CHECK-LABEL: name: extract_vector_elt_0_v6i32121 ; CHECK: liveins: $vgpr0122 ; CHECK-NEXT: {{ $}}123 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0124 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)125 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)126 %0:_(s32) = COPY $vgpr0127 %1:_(<6 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0, %0128 %2:_(s32) = G_CONSTANT i32 0129 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2130 $vgpr0 = COPY %3131...132 133---134name: extract_vector_elt_0_v7i32135 136body: |137 bb.0:138 liveins: $vgpr0139 ; CHECK-LABEL: name: extract_vector_elt_0_v7i32140 ; CHECK: liveins: $vgpr0141 ; CHECK-NEXT: {{ $}}142 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0143 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)144 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)145 %0:_(s32) = COPY $vgpr0146 %1:_(<7 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0, %0, %0147 %2:_(s32) = G_CONSTANT i32 0148 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2149 $vgpr0 = COPY %3150...151 152---153name: extract_vector_elt_0_v8i32154 155body: |156 bb.0:157 liveins: $vgpr0158 ; CHECK-LABEL: name: extract_vector_elt_0_v8i32159 ; CHECK: liveins: $vgpr0160 ; CHECK-NEXT: {{ $}}161 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0162 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)163 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)164 %0:_(s32) = COPY $vgpr0165 %1:_(<8 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0, %0, %0, %0166 %2:_(s32) = G_CONSTANT i32 0167 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2168 $vgpr0 = COPY %3169...170 171---172name: extract_vector_elt_0_v16i32173 174body: |175 bb.0:176 liveins: $vgpr0177 ; CHECK-LABEL: name: extract_vector_elt_0_v16i32178 ; CHECK: liveins: $vgpr0179 ; CHECK-NEXT: {{ $}}180 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0181 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)182 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)183 %0:_(s32) = COPY $vgpr0184 %1:_(<16 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0185 %2:_(s32) = G_CONSTANT i32 0186 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2187 $vgpr0 = COPY %3188...189 190---191name: extract_vector_elt_var_v2i32192 193body: |194 bb.0:195 liveins: $vgpr0_vgpr1, $vgpr2196 ; CHECK-LABEL: name: extract_vector_elt_var_v2i32197 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2198 ; CHECK-NEXT: {{ $}}199 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1200 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2201 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[COPY1]](s32)202 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)203 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1204 %1:_(s32) = COPY $vgpr2205 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1206 $vgpr0 = COPY %2207...208 209---210name: extract_vector_elt_var_v8i32211 212body: |213 bb.0:214 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7215 ; CHECK-LABEL: name: extract_vector_elt_var_v8i32216 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7217 ; CHECK-NEXT: {{ $}}218 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7219 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2220 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<8 x s32>), [[COPY1]](s32)221 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)222 %0:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7223 %1:_(s32) = COPY $vgpr2224 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1225 $vgpr0 = COPY %2226...227 228 229---230name: extract_vector_elt_0_v2i8_i32231 232body: |233 bb.0:234 235 ; CHECK-LABEL: name: extract_vector_elt_0_v2i8_i32236 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF237 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)238 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)239 %0:_(<2 x s8>) = G_IMPLICIT_DEF240 %1:_(s32) = G_CONSTANT i32 0241 %2:_(s8) = G_EXTRACT_VECTOR_ELT %0, %1242 %3:_(s32) = G_ANYEXT %2243 $vgpr0 = COPY %3244...245 246---247name: extract_vector_elt_0_v2i16_i32248 249body: |250 bb.0:251 252 ; CHECK-LABEL: name: extract_vector_elt_0_v2i16_i32253 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF254 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0255 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[DEF]](<2 x s16>)256 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)257 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)258 %0:_(<2 x s16>) = G_IMPLICIT_DEF259 %1:_(s32) = G_CONSTANT i32 0260 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1261 %3:_(s32) = G_ANYEXT %2262 $vgpr0 = COPY %3263...264 265---266name: extract_vector_elt_0_v2i1_i32267 268body: |269 bb.0:270 271 ; CHECK-LABEL: name: extract_vector_elt_0_v2i1_i32272 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF273 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)274 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)275 %0:_(<2 x s1>) = G_IMPLICIT_DEF276 %1:_(s32) = G_CONSTANT i32 0277 %2:_(s1) = G_EXTRACT_VECTOR_ELT %0, %1278 %3:_(s32) = G_ANYEXT %2279 $vgpr0 = COPY %3280...281 282---283name: extract_vector_elt_0_v2i1_i1284 285body: |286 bb.0:287 288 ; CHECK-LABEL: name: extract_vector_elt_0_v2i1_i1289 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF290 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)291 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)292 %0:_(<2 x s1>) = G_IMPLICIT_DEF293 %1:_(s1) = G_CONSTANT i1 false294 %4:_(s32) = G_ZEXT %1295 %2:_(s1) = G_EXTRACT_VECTOR_ELT %0, %4296 %3:_(s32) = G_ANYEXT %2297 $vgpr0 = COPY %3298...299 300---301name: extract_vector_elt_v2s8_varidx_i32302 303body: |304 bb.0:305 liveins: $vgpr0, $vgpr1306 307 ; CHECK-LABEL: name: extract_vector_elt_v2s8_varidx_i32308 ; CHECK: liveins: $vgpr0, $vgpr1309 ; CHECK-NEXT: {{ $}}310 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0311 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1312 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8313 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)314 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[LSHR]](s32)315 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<2 x s32>), [[COPY1]](s32)316 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)317 %0:_(s32) = COPY $vgpr0318 %1:_(s32) = COPY $vgpr1319 %2:_(s16) = G_TRUNC %0320 %3:_(<2 x s8>) = G_BITCAST %2321 %4:_(s8) = G_EXTRACT_VECTOR_ELT %3, %1322 %5:_(s32) = G_ANYEXT %4323 $vgpr0 = COPY %5324...325 326---327name: extract_vector_elt_v2s8_constidx_0_i32328 329body: |330 bb.0:331 liveins: $vgpr0332 333 ; CHECK-LABEL: name: extract_vector_elt_v2s8_constidx_0_i32334 ; CHECK: liveins: $vgpr0335 ; CHECK-NEXT: {{ $}}336 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0337 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1338 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)339 %0:_(s32) = COPY $vgpr0340 %1:_(s32) = COPY $vgpr1341 %2:_(s16) = G_TRUNC %0342 %3:_(<2 x s8>) = G_BITCAST %2343 %4:_(s32) = G_CONSTANT i32 0344 %5:_(s8) = G_EXTRACT_VECTOR_ELT %3, %4345 %6:_(s32) = G_ANYEXT %5346 $vgpr0 = COPY %6347...348 349---350name: extract_vector_elt_v2s8_constidx_1_i32351 352body: |353 bb.0:354 liveins: $vgpr0355 356 ; CHECK-LABEL: name: extract_vector_elt_v2s8_constidx_1_i32357 ; CHECK: liveins: $vgpr0358 ; CHECK-NEXT: {{ $}}359 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0360 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1361 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8362 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)363 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)364 %0:_(s32) = COPY $vgpr0365 %1:_(s32) = COPY $vgpr1366 %2:_(s16) = G_TRUNC %0367 %3:_(<2 x s8>) = G_BITCAST %2368 %4:_(s32) = G_CONSTANT i32 1369 %5:_(s8) = G_EXTRACT_VECTOR_ELT %3, %4370 %6:_(s32) = G_ANYEXT %5371 $vgpr0 = COPY %6372...373 374---375name: extract_vector_elt_v4s4_varidx_i32376 377body: |378 bb.0:379 liveins: $vgpr0, $vgpr1380 381 ; CHECK-LABEL: name: extract_vector_elt_v4s4_varidx_i32382 ; CHECK: liveins: $vgpr0, $vgpr1383 ; CHECK-NEXT: {{ $}}384 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0385 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1386 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4387 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)388 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8389 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C1]](s32)390 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12391 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s32)392 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[LSHR]](s32), [[LSHR1]](s32), [[LSHR2]](s32)393 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<4 x s32>), [[COPY1]](s32)394 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)395 %0:_(s32) = COPY $vgpr0396 %1:_(s32) = COPY $vgpr1397 %2:_(s16) = G_TRUNC %0398 %3:_(<4 x s4>) = G_BITCAST %2399 %4:_(s4) = G_EXTRACT_VECTOR_ELT %3, %1400 %5:_(s32) = G_ANYEXT %4401 $vgpr0 = COPY %5402...403 404---405name: extract_vector_elt_v3s8_varidx_i32406 407body: |408 bb.0:409 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3410 411 ; CHECK-LABEL: name: extract_vector_elt_v3s8_varidx_i32412 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3413 ; CHECK-NEXT: {{ $}}414 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2415 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3416 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<3 x s32>), [[COPY1]](s32)417 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)418 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2419 %1:_(s32) = COPY $vgpr3420 %2:_(<3 x s8>) = G_TRUNC %0421 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1422 %4:_(s32) = G_ANYEXT %3423 $vgpr0 = COPY %4424...425 426---427name: extract_vector_elt_v4s8_varidx_i32428 429body: |430 bb.0:431 liveins: $vgpr0, $vgpr1432 433 ; CHECK-LABEL: name: extract_vector_elt_v4s8_varidx_i32434 ; CHECK: liveins: $vgpr0, $vgpr1435 ; CHECK-NEXT: {{ $}}436 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0437 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1438 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3439 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]440 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C]](s32)441 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SHL]](s32)442 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)443 %0:_(s32) = COPY $vgpr0444 %1:_(s32) = COPY $vgpr1445 %2:_(<4 x s8>) = G_BITCAST %0446 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1447 %4:_(s32) = G_ANYEXT %3448 $vgpr0 = COPY %4449...450 451---452name: extract_vector_elt_v4s8_constidx_0_i32453 454body: |455 bb.0:456 liveins: $vgpr0457 458 ; CHECK-LABEL: name: extract_vector_elt_v4s8_constidx_0_i32459 ; CHECK: liveins: $vgpr0460 ; CHECK-NEXT: {{ $}}461 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0462 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0463 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)464 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)465 %0:_(s32) = COPY $vgpr0466 %1:_(<4 x s8>) = G_BITCAST %0467 %2:_(s32) = G_CONSTANT i32 0468 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2469 %4:_(s32) = G_ANYEXT %3470 $vgpr0 = COPY %4471...472 473---474name: extract_vector_elt_v4s8_constidx_1_i32475 476body: |477 bb.0:478 liveins: $vgpr0479 480 ; CHECK-LABEL: name: extract_vector_elt_v4s8_constidx_1_i32481 ; CHECK: liveins: $vgpr0482 ; CHECK-NEXT: {{ $}}483 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0484 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8485 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)486 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)487 %0:_(s32) = COPY $vgpr0488 %1:_(<4 x s8>) = G_BITCAST %0489 %2:_(s32) = G_CONSTANT i32 1490 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2491 %4:_(s32) = G_ANYEXT %3492 $vgpr0 = COPY %4493...494 495---496name: extract_vector_elt_v4s8_constidx_2_i32497 498body: |499 bb.0:500 liveins: $vgpr0501 502 ; CHECK-LABEL: name: extract_vector_elt_v4s8_constidx_2_i32503 ; CHECK: liveins: $vgpr0504 ; CHECK-NEXT: {{ $}}505 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0506 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16507 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)508 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)509 %0:_(s32) = COPY $vgpr0510 %1:_(<4 x s8>) = G_BITCAST %0511 %2:_(s32) = G_CONSTANT i32 2512 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2513 %4:_(s32) = G_ANYEXT %3514 $vgpr0 = COPY %4515...516 517---518name: extract_vector_elt_v4s8_constidx_3_i32519 520body: |521 bb.0:522 liveins: $vgpr0523 524 ; CHECK-LABEL: name: extract_vector_elt_v4s8_constidx_3_i32525 ; CHECK: liveins: $vgpr0526 ; CHECK-NEXT: {{ $}}527 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0528 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24529 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)530 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)531 %0:_(s32) = COPY $vgpr0532 %1:_(<4 x s8>) = G_BITCAST %0533 %2:_(s32) = G_CONSTANT i32 3534 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2535 %4:_(s32) = G_ANYEXT %3536 $vgpr0 = COPY %4537...538 539 540 541---542name: extract_vector_elt_v8s8_varidx_i32543 544body: |545 bb.0:546 liveins: $vgpr0_vgpr1, $vgpr2547 548 ; CHECK-LABEL: name: extract_vector_elt_v8s8_varidx_i32549 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2550 ; CHECK-NEXT: {{ $}}551 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1552 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2553 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)554 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32)555 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2556 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)557 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<2 x s32>), [[LSHR]](s32)558 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 3559 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]560 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)561 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[EVEC]], [[SHL]](s32)562 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR1]](s32)563 %0:_(s64) = COPY $vgpr0_vgpr1564 %1:_(s32) = COPY $vgpr2565 %2:_(<8 x s8>) = G_BITCAST %0566 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1567 %4:_(s32) = G_ANYEXT %3568 $vgpr0 = COPY %4569...570 571 572---573name: extract_vector_elt_v8s8_constidx_0_i32574 575body: |576 bb.0:577 liveins: $vgpr0_vgpr1578 579 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_0_i32580 ; CHECK: liveins: $vgpr0_vgpr1581 ; CHECK-NEXT: {{ $}}582 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1583 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0584 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)585 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)586 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)587 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)588 %0:_(s64) = COPY $vgpr0_vgpr1589 %1:_(s32) = G_CONSTANT i32 0590 %2:_(<8 x s8>) = G_BITCAST %0591 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1592 %4:_(s32) = G_ANYEXT %3593 $vgpr0 = COPY %4594...595 596---597name: extract_vector_elt_v8s8_constidx_1_i32598 599body: |600 bb.0:601 liveins: $vgpr0_vgpr1602 603 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_1_i32604 ; CHECK: liveins: $vgpr0_vgpr1605 ; CHECK-NEXT: {{ $}}606 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1607 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)608 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)609 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8610 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)611 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)612 %0:_(s64) = COPY $vgpr0_vgpr1613 %1:_(s32) = G_CONSTANT i32 1614 %2:_(<8 x s8>) = G_BITCAST %0615 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1616 %4:_(s32) = G_ANYEXT %3617 $vgpr0 = COPY %4618...619 620---621name: extract_vector_elt_v8s8_constidx_3_i32622 623body: |624 bb.0:625 liveins: $vgpr0_vgpr1626 627 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_3_i32628 ; CHECK: liveins: $vgpr0_vgpr1629 ; CHECK-NEXT: {{ $}}630 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1631 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)632 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)633 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24634 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)635 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)636 %0:_(s64) = COPY $vgpr0_vgpr1637 %1:_(s32) = G_CONSTANT i32 3638 %2:_(<8 x s8>) = G_BITCAST %0639 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1640 %4:_(s32) = G_ANYEXT %3641 $vgpr0 = COPY %4642...643 644---645name: extract_vector_elt_v8s8_constidx_4_i32646 647body: |648 bb.0:649 liveins: $vgpr0_vgpr1650 651 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_4_i32652 ; CHECK: liveins: $vgpr0_vgpr1653 ; CHECK-NEXT: {{ $}}654 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1655 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)656 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)657 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0658 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)659 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)660 %0:_(s64) = COPY $vgpr0_vgpr1661 %1:_(s32) = G_CONSTANT i32 4662 %2:_(<8 x s8>) = G_BITCAST %0663 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1664 %4:_(s32) = G_ANYEXT %3665 $vgpr0 = COPY %4666...667 668---669name: extract_vector_elt_v8s8_constidx_5_i32670 671body: |672 bb.0:673 liveins: $vgpr0_vgpr1674 675 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_5_i32676 ; CHECK: liveins: $vgpr0_vgpr1677 ; CHECK-NEXT: {{ $}}678 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1679 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)680 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)681 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8682 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)683 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)684 %0:_(s64) = COPY $vgpr0_vgpr1685 %1:_(s32) = G_CONSTANT i32 5686 %2:_(<8 x s8>) = G_BITCAST %0687 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1688 %4:_(s32) = G_ANYEXT %3689 $vgpr0 = COPY %4690...691 692---693name: extract_vector_elt_v8s8_constidx_7_i32694 695body: |696 bb.0:697 liveins: $vgpr0_vgpr1698 699 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_7_i32700 ; CHECK: liveins: $vgpr0_vgpr1701 ; CHECK-NEXT: {{ $}}702 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1703 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)704 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)705 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24706 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)707 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)708 %0:_(s64) = COPY $vgpr0_vgpr1709 %1:_(s32) = G_CONSTANT i32 7710 %2:_(<8 x s8>) = G_BITCAST %0711 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1712 %4:_(s32) = G_ANYEXT %3713 $vgpr0 = COPY %4714...715 716---717name: extract_vector_elt_v2s16_varidx_i32718 719body: |720 bb.0:721 liveins: $vgpr0, $vgpr1722 723 ; CHECK-LABEL: name: extract_vector_elt_v2s16_varidx_i32724 ; CHECK: liveins: $vgpr0, $vgpr1725 ; CHECK-NEXT: {{ $}}726 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0727 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1728 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)729 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1730 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]731 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4732 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)733 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[SHL]](s32)734 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)735 %0:_(<2 x s16>) = COPY $vgpr0736 %1:_(s32) = COPY $vgpr1737 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1738 %3:_(s32) = G_ANYEXT %2739 $vgpr0 = COPY %3740...741 742---743name: extract_vector_elt_v2s16_idx0_i32744 745body: |746 bb.0:747 liveins: $vgpr0748 749 ; CHECK-LABEL: name: extract_vector_elt_v2s16_idx0_i32750 ; CHECK: liveins: $vgpr0751 ; CHECK-NEXT: {{ $}}752 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0753 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0754 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)755 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)756 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)757 %0:_(<2 x s16>) = COPY $vgpr0758 %1:_(s32) = G_CONSTANT i32 0759 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1760 %3:_(s32) = G_ANYEXT %2761 $vgpr0 = COPY %3762...763 764---765name: extract_vector_elt_v2s16_idx1_i32766 767body: |768 bb.0:769 liveins: $vgpr0770 771 ; CHECK-LABEL: name: extract_vector_elt_v2s16_idx1_i32772 ; CHECK: liveins: $vgpr0773 ; CHECK-NEXT: {{ $}}774 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0775 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)776 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16777 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)778 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)779 %0:_(<2 x s16>) = COPY $vgpr0780 %1:_(s32) = G_CONSTANT i32 1781 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1782 %3:_(s32) = G_ANYEXT %2783 $vgpr0 = COPY %3784...785 786---787name: extract_vector_elt_v3s16_varidx_i32788 789body: |790 bb.0:791 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3792 793 ; CHECK-LABEL: name: extract_vector_elt_v3s16_varidx_i32794 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3795 ; CHECK-NEXT: {{ $}}796 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2797 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3798 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<3 x s32>), [[COPY1]](s32)799 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)800 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2801 %1:_(s32) = COPY $vgpr3802 %2:_(<3 x s16>) = G_TRUNC %0803 %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %1804 %4:_(s32) = G_ANYEXT %3805 $vgpr0 = COPY %4806...807 808---809name: extract_vector_elt_v3s16_idx0_i32810 811body: |812 bb.0:813 liveins: $vgpr0_vgpr1_vgpr2814 815 ; CHECK-LABEL: name: extract_vector_elt_v3s16_idx0_i32816 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2817 ; CHECK-NEXT: {{ $}}818 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2819 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)820 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)821 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)822 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2823 %1:_(s32) = G_CONSTANT i32 0824 %2:_(<3 x s16>) = G_TRUNC %0825 %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %1826 %4:_(s32) = G_ANYEXT %3827 $vgpr0 = COPY %4828...829 830---831name: extract_vector_elt_v3s16_idx1_i32832 833body: |834 bb.0:835 liveins: $vgpr0_vgpr1_vgpr2836 837 ; CHECK-LABEL: name: extract_vector_elt_v3s16_idx1_i32838 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2839 ; CHECK-NEXT: {{ $}}840 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2841 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)842 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)843 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)844 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2845 %1:_(s32) = G_CONSTANT i32 1846 %2:_(<3 x s16>) = G_TRUNC %0847 %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %1848 %4:_(s32) = G_ANYEXT %3849 $vgpr0 = COPY %4850...851 852---853name: extract_vector_elt_v3s16_idx2_i32854 855body: |856 bb.0:857 liveins: $vgpr0_vgpr1_vgpr2858 859 ; CHECK-LABEL: name: extract_vector_elt_v3s16_idx2_i32860 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2861 ; CHECK-NEXT: {{ $}}862 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2863 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)864 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV2]](s32)865 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)866 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2867 %1:_(s32) = G_CONSTANT i32 2868 %2:_(<3 x s16>) = G_TRUNC %0869 %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %1870 %4:_(s32) = G_ANYEXT %3871 $vgpr0 = COPY %4872...873 874---875name: extract_vector_elt_v4s16_varidx_i32876 877body: |878 bb.0:879 liveins: $vgpr0_vgpr1, $vgpr2880 881 ; CHECK-LABEL: name: extract_vector_elt_v4s16_varidx_i32882 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2883 ; CHECK-NEXT: {{ $}}884 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1885 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2886 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s32>) = G_BITCAST [[COPY]](<4 x s16>)887 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1888 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)889 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BITCAST]](<2 x s32>), [[LSHR]](s32)890 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]891 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4892 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)893 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[EVEC]], [[SHL]](s32)894 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR1]](s32)895 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1896 %1:_(s32) = COPY $vgpr2897 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1898 %3:_(s32) = G_ANYEXT %2899 $vgpr0 = COPY %3900...901 902---903name: extract_vector_elt_v2s128_varidx_i32904 905body: |906 bb.0:907 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8908 909 ; CHECK-LABEL: name: extract_vector_elt_v2s128_varidx_i32910 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8911 ; CHECK-NEXT: {{ $}}912 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s128>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7913 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr8914 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x s64>) = G_BITCAST [[COPY]](<2 x s128>)915 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2916 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY1]], [[C]]917 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0918 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[MUL]], [[C1]]919 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[BITCAST]](<4 x s64>), [[ADD]](s32)920 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1921 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[MUL]], [[C2]]922 ; CHECK-NEXT: [[EVEC1:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[BITCAST]](<4 x s64>), [[ADD1]](s32)923 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[EVEC]](s64), [[EVEC1]](s64)924 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<2 x s64>)925 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST1]](s128)926 %0:_(<2 x s128>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7927 %1:_(s32) = COPY $vgpr8928 %2:_(s128) = G_EXTRACT_VECTOR_ELT %0, %1929 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2930...931 932---933name: extract_vector_elt_v2i32_varidx_i64934 935body: |936 bb.0:937 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3938 939 ; CHECK-LABEL: name: extract_vector_elt_v2i32_varidx_i64940 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3941 ; CHECK-NEXT: {{ $}}942 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1943 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3944 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)945 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[TRUNC]](s32)946 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)947 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1948 %1:_(s64) = COPY $vgpr2_vgpr3949 %3:_(s32) = G_TRUNC %1950 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %3951 $vgpr0 = COPY %2952...953---954name: extract_vector_elt_0_v2i64955 956body: |957 bb.0:958 liveins: $vgpr0_vgpr1_vgpr2_vgpr3959 960 ; CHECK-LABEL: name: extract_vector_elt_0_v2i64961 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3962 ; CHECK-NEXT: {{ $}}963 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3964 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)965 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[UV]](s64)966 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY1]](s64)967 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3968 %1:_(s32) = G_CONSTANT i32 0969 %2:_(s64) = G_EXTRACT_VECTOR_ELT %0, %1970 $vgpr0_vgpr1 = COPY %2971...972 973---974name: extract_vector_elt_0_v8i64975 976body: |977 bb.0:978 liveins: $vgpr0_vgpr1_vgpr2_vgpr3979 980 ; CHECK-LABEL: name: extract_vector_elt_0_v8i64981 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3982 ; CHECK-NEXT: {{ $}}983 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF984 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[DEF]](s64)985 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](s64)986 %0:_(<8 x s64>) = G_IMPLICIT_DEF987 %1:_(s32) = G_CONSTANT i32 0988 %2:_(s64) = G_EXTRACT_VECTOR_ELT %0, %1989 $vgpr0_vgpr1 = COPY %2990...991 992---993name: extract_vector_elt_0_v16i64994 995body: |996 bb.0:997 liveins: $vgpr0_vgpr1_vgpr2_vgpr3998 999 ; CHECK-LABEL: name: extract_vector_elt_0_v16i641000 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr31001 ; CHECK-NEXT: {{ $}}1002 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF1003 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[DEF]](s64)1004 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](s64)1005 %0:_(<16 x s64>) = G_IMPLICIT_DEF1006 %1:_(s32) = G_CONSTANT i32 01007 %2:_(s64) = G_EXTRACT_VECTOR_ELT %0, %11008 $vgpr0_vgpr1 = COPY %21009...1010 1011# Make sure we look through casts looking for a constant index.1012---1013name: extract_vector_elt_look_through_trunc_0_v4i321014 1015body: |1016 bb.0:1017 liveins: $vgpr0_vgpr1_vgpr2_vgpr31018 ; CHECK-LABEL: name: extract_vector_elt_look_through_trunc_0_v4i321019 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr31020 ; CHECK-NEXT: {{ $}}1021 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr31022 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)1023 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)1024 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)1025 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr31026 %1:_(s64) = G_CONSTANT i64 01027 %2:_(s32) = G_TRUNC %11028 %3:_(s32) = G_EXTRACT_VECTOR_ELT %0, %21029 $vgpr0 = COPY %31030...1031 1032---1033name: extract_vector_elt_7_v64s321034 1035body: |1036 bb.0:1037 liveins: $sgpr0_sgpr11038 1039 ; CHECK-LABEL: name: extract_vector_elt_7_v64s321040 ; CHECK: liveins: $sgpr0_sgpr11041 ; CHECK-NEXT: {{ $}}1042 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr11043 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p1) :: (load (<16 x s32>), align 4, addrspace 4)1044 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>)1045 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV7]](s32)1046 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY1]](s32)1047 %0:_(p1) = COPY $sgpr0_sgpr11048 %1:_(s32) = G_CONSTANT i32 71049 %2:_(<64 x s32>) = G_LOAD %0 :: (load (<64 x s32>), align 4, addrspace 4)1050 %3:_(s32) = G_EXTRACT_VECTOR_ELT %2, %11051 S_ENDPGM 0, implicit %31052...1053 1054---1055name: extract_vector_elt_33_v64s321056 1057body: |1058 bb.0:1059 liveins: $sgpr0_sgpr11060 1061 ; CHECK-LABEL: name: extract_vector_elt_33_v64s321062 ; CHECK: liveins: $sgpr0_sgpr11063 ; CHECK-NEXT: {{ $}}1064 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr11065 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1281066 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](s64)1067 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load (<16 x s32>) from unknown-address + 128, align 4, addrspace 4)1068 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>)1069 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)1070 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY1]](s32)1071 %0:_(p1) = COPY $sgpr0_sgpr11072 %1:_(s32) = G_CONSTANT i32 331073 %2:_(<64 x s32>) = G_LOAD %0 :: (load (<64 x s32>), align 4, addrspace 4)1074 %3:_(s32) = G_EXTRACT_VECTOR_ELT %2, %11075 S_ENDPGM 0, implicit %31076...1077 1078# Test handling of out of bounds indexes1079---1080name: extract_vector_elt_64_65_v64s321081 1082body: |1083 bb.0:1084 liveins: $sgpr0_sgpr11085 1086 ; CHECK-LABEL: name: extract_vector_elt_64_65_v64s321087 ; CHECK: liveins: $sgpr0_sgpr11088 ; CHECK-NEXT: {{ $}}1089 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF1090 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)1091 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]](s32), implicit [[DEF]](s32)1092 %0:_(p1) = COPY $sgpr0_sgpr11093 %1:_(s32) = G_CONSTANT i32 641094 %2:_(<64 x s32>) = G_LOAD %0 :: (load (<64 x s32>), align 4, addrspace 4)1095 %3:_(s32) = G_EXTRACT_VECTOR_ELT %2, %11096 %4:_(s32) = G_CONSTANT i32 651097 %5:_(s32) = G_EXTRACT_VECTOR_ELT %2, %41098 S_ENDPGM 0, implicit %3, implicit %51099...1100 1101---1102name: extract_vector_elt_33_v64p31103 1104body: |1105 bb.0:1106 liveins: $sgpr0_sgpr11107 1108 ; CHECK-LABEL: name: extract_vector_elt_33_v64p31109 ; CHECK: liveins: $sgpr0_sgpr11110 ; CHECK-NEXT: {{ $}}1111 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr11112 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1281113 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](s64)1114 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load (<16 x s32>) from unknown-address + 128, align 4, addrspace 4)1115 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<16 x p3>) = G_BITCAST [[LOAD]](<16 x s32>)1116 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3), [[UV2:%[0-9]+]]:_(p3), [[UV3:%[0-9]+]]:_(p3), [[UV4:%[0-9]+]]:_(p3), [[UV5:%[0-9]+]]:_(p3), [[UV6:%[0-9]+]]:_(p3), [[UV7:%[0-9]+]]:_(p3), [[UV8:%[0-9]+]]:_(p3), [[UV9:%[0-9]+]]:_(p3), [[UV10:%[0-9]+]]:_(p3), [[UV11:%[0-9]+]]:_(p3), [[UV12:%[0-9]+]]:_(p3), [[UV13:%[0-9]+]]:_(p3), [[UV14:%[0-9]+]]:_(p3), [[UV15:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[BITCAST]](<16 x p3>)1117 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p3) = COPY [[UV1]](p3)1118 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY1]](p3)1119 %0:_(p1) = COPY $sgpr0_sgpr11120 %1:_(s32) = G_CONSTANT i32 331121 %2:_(<64 x p3>) = G_LOAD %0 :: (load (<64 x p3>), align 4, addrspace 4)1122 %3:_(p3) = G_EXTRACT_VECTOR_ELT %2, %11123 S_ENDPGM 0, implicit %31124...1125 1126---1127name: extract_vector_elt_varidx_v64s321128 1129body: |1130 bb.0:1131 liveins: $sgpr0_sgpr1, $sgpr21132 1133 ; CHECK-LABEL: name: extract_vector_elt_varidx_v64s321134 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr21135 ; CHECK-NEXT: {{ $}}1136 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr11137 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr21138 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p1) :: (load (<16 x s32>), align 4, addrspace 4)1139 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 641140 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](s64)1141 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load (<16 x s32>) from unknown-address + 64, align 4, addrspace 4)1142 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1281143 ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](s64)1144 ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load (<16 x s32>) from unknown-address + 128, align 4, addrspace 4)1145 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1921146 ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p1) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](s64)1147 ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load (<16 x s32>) from unknown-address + 192, align 4, addrspace 4)1148 ; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.01149 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>)1150 ; CHECK-NEXT: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<16 x s32>)1151 ; CHECK-NEXT: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32), [[UV40:%[0-9]+]]:_(s32), [[UV41:%[0-9]+]]:_(s32), [[UV42:%[0-9]+]]:_(s32), [[UV43:%[0-9]+]]:_(s32), [[UV44:%[0-9]+]]:_(s32), [[UV45:%[0-9]+]]:_(s32), [[UV46:%[0-9]+]]:_(s32), [[UV47:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD2]](<16 x s32>)1152 ; CHECK-NEXT: [[UV48:%[0-9]+]]:_(s32), [[UV49:%[0-9]+]]:_(s32), [[UV50:%[0-9]+]]:_(s32), [[UV51:%[0-9]+]]:_(s32), [[UV52:%[0-9]+]]:_(s32), [[UV53:%[0-9]+]]:_(s32), [[UV54:%[0-9]+]]:_(s32), [[UV55:%[0-9]+]]:_(s32), [[UV56:%[0-9]+]]:_(s32), [[UV57:%[0-9]+]]:_(s32), [[UV58:%[0-9]+]]:_(s32), [[UV59:%[0-9]+]]:_(s32), [[UV60:%[0-9]+]]:_(s32), [[UV61:%[0-9]+]]:_(s32), [[UV62:%[0-9]+]]:_(s32), [[UV63:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD3]](<16 x s32>)1153 ; CHECK-NEXT: G_STORE [[UV]](s32), [[FRAME_INDEX]](p5) :: (store (s32) into %stack.0, align 256, addrspace 5)1154 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 41155 ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C3]](s32)1156 ; CHECK-NEXT: G_STORE [[UV1]](s32), [[PTR_ADD3]](p5) :: (store (s32) into %stack.0 + 4, basealign 256, addrspace 5)1157 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 81158 ; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C4]](s32)1159 ; CHECK-NEXT: G_STORE [[UV2]](s32), [[PTR_ADD4]](p5) :: (store (s32) into %stack.0 + 8, align 8, basealign 256, addrspace 5)1160 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 121161 ; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C5]](s32)1162 ; CHECK-NEXT: G_STORE [[UV3]](s32), [[PTR_ADD5]](p5) :: (store (s32) into %stack.0 + 12, basealign 256, addrspace 5)1163 ; CHECK-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 161164 ; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C6]](s32)1165 ; CHECK-NEXT: G_STORE [[UV4]](s32), [[PTR_ADD6]](p5) :: (store (s32) into %stack.0 + 16, align 16, basealign 256, addrspace 5)1166 ; CHECK-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 201167 ; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C7]](s32)1168 ; CHECK-NEXT: G_STORE [[UV5]](s32), [[PTR_ADD7]](p5) :: (store (s32) into %stack.0 + 20, basealign 256, addrspace 5)1169 ; CHECK-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 241170 ; CHECK-NEXT: [[PTR_ADD8:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C8]](s32)1171 ; CHECK-NEXT: G_STORE [[UV6]](s32), [[PTR_ADD8]](p5) :: (store (s32) into %stack.0 + 24, align 8, basealign 256, addrspace 5)1172 ; CHECK-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 281173 ; CHECK-NEXT: [[PTR_ADD9:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C9]](s32)1174 ; CHECK-NEXT: G_STORE [[UV7]](s32), [[PTR_ADD9]](p5) :: (store (s32) into %stack.0 + 28, basealign 256, addrspace 5)1175 ; CHECK-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 321176 ; CHECK-NEXT: [[PTR_ADD10:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C10]](s32)1177 ; CHECK-NEXT: G_STORE [[UV8]](s32), [[PTR_ADD10]](p5) :: (store (s32) into %stack.0 + 32, align 32, basealign 256, addrspace 5)1178 ; CHECK-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 361179 ; CHECK-NEXT: [[PTR_ADD11:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C11]](s32)1180 ; CHECK-NEXT: G_STORE [[UV9]](s32), [[PTR_ADD11]](p5) :: (store (s32) into %stack.0 + 36, basealign 256, addrspace 5)1181 ; CHECK-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 401182 ; CHECK-NEXT: [[PTR_ADD12:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C12]](s32)1183 ; CHECK-NEXT: G_STORE [[UV10]](s32), [[PTR_ADD12]](p5) :: (store (s32) into %stack.0 + 40, align 8, basealign 256, addrspace 5)1184 ; CHECK-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 441185 ; CHECK-NEXT: [[PTR_ADD13:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C13]](s32)1186 ; CHECK-NEXT: G_STORE [[UV11]](s32), [[PTR_ADD13]](p5) :: (store (s32) into %stack.0 + 44, basealign 256, addrspace 5)1187 ; CHECK-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 481188 ; CHECK-NEXT: [[PTR_ADD14:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C14]](s32)1189 ; CHECK-NEXT: G_STORE [[UV12]](s32), [[PTR_ADD14]](p5) :: (store (s32) into %stack.0 + 48, align 16, basealign 256, addrspace 5)1190 ; CHECK-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 521191 ; CHECK-NEXT: [[PTR_ADD15:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C15]](s32)1192 ; CHECK-NEXT: G_STORE [[UV13]](s32), [[PTR_ADD15]](p5) :: (store (s32) into %stack.0 + 52, basealign 256, addrspace 5)1193 ; CHECK-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 561194 ; CHECK-NEXT: [[PTR_ADD16:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C16]](s32)1195 ; CHECK-NEXT: G_STORE [[UV14]](s32), [[PTR_ADD16]](p5) :: (store (s32) into %stack.0 + 56, align 8, basealign 256, addrspace 5)1196 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 601197 ; CHECK-NEXT: [[PTR_ADD17:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C17]](s32)1198 ; CHECK-NEXT: G_STORE [[UV15]](s32), [[PTR_ADD17]](p5) :: (store (s32) into %stack.0 + 60, basealign 256, addrspace 5)1199 ; CHECK-NEXT: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 641200 ; CHECK-NEXT: [[PTR_ADD18:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C18]](s32)1201 ; CHECK-NEXT: G_STORE [[UV16]](s32), [[PTR_ADD18]](p5) :: (store (s32) into %stack.0 + 64, align 64, basealign 256, addrspace 5)1202 ; CHECK-NEXT: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 681203 ; CHECK-NEXT: [[PTR_ADD19:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C19]](s32)1204 ; CHECK-NEXT: G_STORE [[UV17]](s32), [[PTR_ADD19]](p5) :: (store (s32) into %stack.0 + 68, basealign 256, addrspace 5)1205 ; CHECK-NEXT: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 721206 ; CHECK-NEXT: [[PTR_ADD20:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C20]](s32)1207 ; CHECK-NEXT: G_STORE [[UV18]](s32), [[PTR_ADD20]](p5) :: (store (s32) into %stack.0 + 72, align 8, basealign 256, addrspace 5)1208 ; CHECK-NEXT: [[C21:%[0-9]+]]:_(s32) = G_CONSTANT i32 761209 ; CHECK-NEXT: [[PTR_ADD21:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C21]](s32)1210 ; CHECK-NEXT: G_STORE [[UV19]](s32), [[PTR_ADD21]](p5) :: (store (s32) into %stack.0 + 76, basealign 256, addrspace 5)1211 ; CHECK-NEXT: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 801212 ; CHECK-NEXT: [[PTR_ADD22:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C22]](s32)1213 ; CHECK-NEXT: G_STORE [[UV20]](s32), [[PTR_ADD22]](p5) :: (store (s32) into %stack.0 + 80, align 16, basealign 256, addrspace 5)1214 ; CHECK-NEXT: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 841215 ; CHECK-NEXT: [[PTR_ADD23:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C23]](s32)1216 ; CHECK-NEXT: G_STORE [[UV21]](s32), [[PTR_ADD23]](p5) :: (store (s32) into %stack.0 + 84, basealign 256, addrspace 5)1217 ; CHECK-NEXT: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 881218 ; CHECK-NEXT: [[PTR_ADD24:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C24]](s32)1219 ; CHECK-NEXT: G_STORE [[UV22]](s32), [[PTR_ADD24]](p5) :: (store (s32) into %stack.0 + 88, align 8, basealign 256, addrspace 5)1220 ; CHECK-NEXT: [[C25:%[0-9]+]]:_(s32) = G_CONSTANT i32 921221 ; CHECK-NEXT: [[PTR_ADD25:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C25]](s32)1222 ; CHECK-NEXT: G_STORE [[UV23]](s32), [[PTR_ADD25]](p5) :: (store (s32) into %stack.0 + 92, basealign 256, addrspace 5)1223 ; CHECK-NEXT: [[C26:%[0-9]+]]:_(s32) = G_CONSTANT i32 961224 ; CHECK-NEXT: [[PTR_ADD26:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C26]](s32)1225 ; CHECK-NEXT: G_STORE [[UV24]](s32), [[PTR_ADD26]](p5) :: (store (s32) into %stack.0 + 96, align 32, basealign 256, addrspace 5)1226 ; CHECK-NEXT: [[C27:%[0-9]+]]:_(s32) = G_CONSTANT i32 1001227 ; CHECK-NEXT: [[PTR_ADD27:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C27]](s32)1228 ; CHECK-NEXT: G_STORE [[UV25]](s32), [[PTR_ADD27]](p5) :: (store (s32) into %stack.0 + 100, basealign 256, addrspace 5)1229 ; CHECK-NEXT: [[C28:%[0-9]+]]:_(s32) = G_CONSTANT i32 1041230 ; CHECK-NEXT: [[PTR_ADD28:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C28]](s32)1231 ; CHECK-NEXT: G_STORE [[UV26]](s32), [[PTR_ADD28]](p5) :: (store (s32) into %stack.0 + 104, align 8, basealign 256, addrspace 5)1232 ; CHECK-NEXT: [[C29:%[0-9]+]]:_(s32) = G_CONSTANT i32 1081233 ; CHECK-NEXT: [[PTR_ADD29:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C29]](s32)1234 ; CHECK-NEXT: G_STORE [[UV27]](s32), [[PTR_ADD29]](p5) :: (store (s32) into %stack.0 + 108, basealign 256, addrspace 5)1235 ; CHECK-NEXT: [[C30:%[0-9]+]]:_(s32) = G_CONSTANT i32 1121236 ; CHECK-NEXT: [[PTR_ADD30:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C30]](s32)1237 ; CHECK-NEXT: G_STORE [[UV28]](s32), [[PTR_ADD30]](p5) :: (store (s32) into %stack.0 + 112, align 16, basealign 256, addrspace 5)1238 ; CHECK-NEXT: [[C31:%[0-9]+]]:_(s32) = G_CONSTANT i32 1161239 ; CHECK-NEXT: [[PTR_ADD31:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C31]](s32)1240 ; CHECK-NEXT: G_STORE [[UV29]](s32), [[PTR_ADD31]](p5) :: (store (s32) into %stack.0 + 116, basealign 256, addrspace 5)1241 ; CHECK-NEXT: [[C32:%[0-9]+]]:_(s32) = G_CONSTANT i32 1201242 ; CHECK-NEXT: [[PTR_ADD32:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C32]](s32)1243 ; CHECK-NEXT: G_STORE [[UV30]](s32), [[PTR_ADD32]](p5) :: (store (s32) into %stack.0 + 120, align 8, basealign 256, addrspace 5)1244 ; CHECK-NEXT: [[C33:%[0-9]+]]:_(s32) = G_CONSTANT i32 1241245 ; CHECK-NEXT: [[PTR_ADD33:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C33]](s32)1246 ; CHECK-NEXT: G_STORE [[UV31]](s32), [[PTR_ADD33]](p5) :: (store (s32) into %stack.0 + 124, basealign 256, addrspace 5)1247 ; CHECK-NEXT: [[C34:%[0-9]+]]:_(s32) = G_CONSTANT i32 1281248 ; CHECK-NEXT: [[PTR_ADD34:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C34]](s32)1249 ; CHECK-NEXT: G_STORE [[UV32]](s32), [[PTR_ADD34]](p5) :: (store (s32) into %stack.0 + 128, align 128, basealign 256, addrspace 5)1250 ; CHECK-NEXT: [[C35:%[0-9]+]]:_(s32) = G_CONSTANT i32 1321251 ; CHECK-NEXT: [[PTR_ADD35:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C35]](s32)1252 ; CHECK-NEXT: G_STORE [[UV33]](s32), [[PTR_ADD35]](p5) :: (store (s32) into %stack.0 + 132, basealign 256, addrspace 5)1253 ; CHECK-NEXT: [[C36:%[0-9]+]]:_(s32) = G_CONSTANT i32 1361254 ; CHECK-NEXT: [[PTR_ADD36:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C36]](s32)1255 ; CHECK-NEXT: G_STORE [[UV34]](s32), [[PTR_ADD36]](p5) :: (store (s32) into %stack.0 + 136, align 8, basealign 256, addrspace 5)1256 ; CHECK-NEXT: [[C37:%[0-9]+]]:_(s32) = G_CONSTANT i32 1401257 ; CHECK-NEXT: [[PTR_ADD37:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C37]](s32)1258 ; CHECK-NEXT: G_STORE [[UV35]](s32), [[PTR_ADD37]](p5) :: (store (s32) into %stack.0 + 140, basealign 256, addrspace 5)1259 ; CHECK-NEXT: [[C38:%[0-9]+]]:_(s32) = G_CONSTANT i32 1441260 ; CHECK-NEXT: [[PTR_ADD38:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C38]](s32)1261 ; CHECK-NEXT: G_STORE [[UV36]](s32), [[PTR_ADD38]](p5) :: (store (s32) into %stack.0 + 144, align 16, basealign 256, addrspace 5)1262 ; CHECK-NEXT: [[C39:%[0-9]+]]:_(s32) = G_CONSTANT i32 1481263 ; CHECK-NEXT: [[PTR_ADD39:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C39]](s32)1264 ; CHECK-NEXT: G_STORE [[UV37]](s32), [[PTR_ADD39]](p5) :: (store (s32) into %stack.0 + 148, basealign 256, addrspace 5)1265 ; CHECK-NEXT: [[C40:%[0-9]+]]:_(s32) = G_CONSTANT i32 1521266 ; CHECK-NEXT: [[PTR_ADD40:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C40]](s32)1267 ; CHECK-NEXT: G_STORE [[UV38]](s32), [[PTR_ADD40]](p5) :: (store (s32) into %stack.0 + 152, align 8, basealign 256, addrspace 5)1268 ; CHECK-NEXT: [[C41:%[0-9]+]]:_(s32) = G_CONSTANT i32 1561269 ; CHECK-NEXT: [[PTR_ADD41:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C41]](s32)1270 ; CHECK-NEXT: G_STORE [[UV39]](s32), [[PTR_ADD41]](p5) :: (store (s32) into %stack.0 + 156, basealign 256, addrspace 5)1271 ; CHECK-NEXT: [[C42:%[0-9]+]]:_(s32) = G_CONSTANT i32 1601272 ; CHECK-NEXT: [[PTR_ADD42:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C42]](s32)1273 ; CHECK-NEXT: G_STORE [[UV40]](s32), [[PTR_ADD42]](p5) :: (store (s32) into %stack.0 + 160, align 32, basealign 256, addrspace 5)1274 ; CHECK-NEXT: [[C43:%[0-9]+]]:_(s32) = G_CONSTANT i32 1641275 ; CHECK-NEXT: [[PTR_ADD43:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C43]](s32)1276 ; CHECK-NEXT: G_STORE [[UV41]](s32), [[PTR_ADD43]](p5) :: (store (s32) into %stack.0 + 164, basealign 256, addrspace 5)1277 ; CHECK-NEXT: [[C44:%[0-9]+]]:_(s32) = G_CONSTANT i32 1681278 ; CHECK-NEXT: [[PTR_ADD44:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C44]](s32)1279 ; CHECK-NEXT: G_STORE [[UV42]](s32), [[PTR_ADD44]](p5) :: (store (s32) into %stack.0 + 168, align 8, basealign 256, addrspace 5)1280 ; CHECK-NEXT: [[C45:%[0-9]+]]:_(s32) = G_CONSTANT i32 1721281 ; CHECK-NEXT: [[PTR_ADD45:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C45]](s32)1282 ; CHECK-NEXT: G_STORE [[UV43]](s32), [[PTR_ADD45]](p5) :: (store (s32) into %stack.0 + 172, basealign 256, addrspace 5)1283 ; CHECK-NEXT: [[C46:%[0-9]+]]:_(s32) = G_CONSTANT i32 1761284 ; CHECK-NEXT: [[PTR_ADD46:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C46]](s32)1285 ; CHECK-NEXT: G_STORE [[UV44]](s32), [[PTR_ADD46]](p5) :: (store (s32) into %stack.0 + 176, align 16, basealign 256, addrspace 5)1286 ; CHECK-NEXT: [[C47:%[0-9]+]]:_(s32) = G_CONSTANT i32 1801287 ; CHECK-NEXT: [[PTR_ADD47:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C47]](s32)1288 ; CHECK-NEXT: G_STORE [[UV45]](s32), [[PTR_ADD47]](p5) :: (store (s32) into %stack.0 + 180, basealign 256, addrspace 5)1289 ; CHECK-NEXT: [[C48:%[0-9]+]]:_(s32) = G_CONSTANT i32 1841290 ; CHECK-NEXT: [[PTR_ADD48:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C48]](s32)1291 ; CHECK-NEXT: G_STORE [[UV46]](s32), [[PTR_ADD48]](p5) :: (store (s32) into %stack.0 + 184, align 8, basealign 256, addrspace 5)1292 ; CHECK-NEXT: [[C49:%[0-9]+]]:_(s32) = G_CONSTANT i32 1881293 ; CHECK-NEXT: [[PTR_ADD49:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C49]](s32)1294 ; CHECK-NEXT: G_STORE [[UV47]](s32), [[PTR_ADD49]](p5) :: (store (s32) into %stack.0 + 188, basealign 256, addrspace 5)1295 ; CHECK-NEXT: [[C50:%[0-9]+]]:_(s32) = G_CONSTANT i32 1921296 ; CHECK-NEXT: [[PTR_ADD50:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C50]](s32)1297 ; CHECK-NEXT: G_STORE [[UV48]](s32), [[PTR_ADD50]](p5) :: (store (s32) into %stack.0 + 192, align 64, basealign 256, addrspace 5)1298 ; CHECK-NEXT: [[C51:%[0-9]+]]:_(s32) = G_CONSTANT i32 1961299 ; CHECK-NEXT: [[PTR_ADD51:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C51]](s32)1300 ; CHECK-NEXT: G_STORE [[UV49]](s32), [[PTR_ADD51]](p5) :: (store (s32) into %stack.0 + 196, basealign 256, addrspace 5)1301 ; CHECK-NEXT: [[C52:%[0-9]+]]:_(s32) = G_CONSTANT i32 2001302 ; CHECK-NEXT: [[PTR_ADD52:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C52]](s32)1303 ; CHECK-NEXT: G_STORE [[UV50]](s32), [[PTR_ADD52]](p5) :: (store (s32) into %stack.0 + 200, align 8, basealign 256, addrspace 5)1304 ; CHECK-NEXT: [[C53:%[0-9]+]]:_(s32) = G_CONSTANT i32 2041305 ; CHECK-NEXT: [[PTR_ADD53:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C53]](s32)1306 ; CHECK-NEXT: G_STORE [[UV51]](s32), [[PTR_ADD53]](p5) :: (store (s32) into %stack.0 + 204, basealign 256, addrspace 5)1307 ; CHECK-NEXT: [[C54:%[0-9]+]]:_(s32) = G_CONSTANT i32 2081308 ; CHECK-NEXT: [[PTR_ADD54:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C54]](s32)1309 ; CHECK-NEXT: G_STORE [[UV52]](s32), [[PTR_ADD54]](p5) :: (store (s32) into %stack.0 + 208, align 16, basealign 256, addrspace 5)1310 ; CHECK-NEXT: [[C55:%[0-9]+]]:_(s32) = G_CONSTANT i32 2121311 ; CHECK-NEXT: [[PTR_ADD55:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C55]](s32)1312 ; CHECK-NEXT: G_STORE [[UV53]](s32), [[PTR_ADD55]](p5) :: (store (s32) into %stack.0 + 212, basealign 256, addrspace 5)1313 ; CHECK-NEXT: [[C56:%[0-9]+]]:_(s32) = G_CONSTANT i32 2161314 ; CHECK-NEXT: [[PTR_ADD56:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C56]](s32)1315 ; CHECK-NEXT: G_STORE [[UV54]](s32), [[PTR_ADD56]](p5) :: (store (s32) into %stack.0 + 216, align 8, basealign 256, addrspace 5)1316 ; CHECK-NEXT: [[C57:%[0-9]+]]:_(s32) = G_CONSTANT i32 2201317 ; CHECK-NEXT: [[PTR_ADD57:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C57]](s32)1318 ; CHECK-NEXT: G_STORE [[UV55]](s32), [[PTR_ADD57]](p5) :: (store (s32) into %stack.0 + 220, basealign 256, addrspace 5)1319 ; CHECK-NEXT: [[C58:%[0-9]+]]:_(s32) = G_CONSTANT i32 2241320 ; CHECK-NEXT: [[PTR_ADD58:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C58]](s32)1321 ; CHECK-NEXT: G_STORE [[UV56]](s32), [[PTR_ADD58]](p5) :: (store (s32) into %stack.0 + 224, align 32, basealign 256, addrspace 5)1322 ; CHECK-NEXT: [[C59:%[0-9]+]]:_(s32) = G_CONSTANT i32 2281323 ; CHECK-NEXT: [[PTR_ADD59:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C59]](s32)1324 ; CHECK-NEXT: G_STORE [[UV57]](s32), [[PTR_ADD59]](p5) :: (store (s32) into %stack.0 + 228, basealign 256, addrspace 5)1325 ; CHECK-NEXT: [[C60:%[0-9]+]]:_(s32) = G_CONSTANT i32 2321326 ; CHECK-NEXT: [[PTR_ADD60:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C60]](s32)1327 ; CHECK-NEXT: G_STORE [[UV58]](s32), [[PTR_ADD60]](p5) :: (store (s32) into %stack.0 + 232, align 8, basealign 256, addrspace 5)1328 ; CHECK-NEXT: [[C61:%[0-9]+]]:_(s32) = G_CONSTANT i32 2361329 ; CHECK-NEXT: [[PTR_ADD61:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C61]](s32)1330 ; CHECK-NEXT: G_STORE [[UV59]](s32), [[PTR_ADD61]](p5) :: (store (s32) into %stack.0 + 236, basealign 256, addrspace 5)1331 ; CHECK-NEXT: [[C62:%[0-9]+]]:_(s32) = G_CONSTANT i32 2401332 ; CHECK-NEXT: [[PTR_ADD62:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C62]](s32)1333 ; CHECK-NEXT: G_STORE [[UV60]](s32), [[PTR_ADD62]](p5) :: (store (s32) into %stack.0 + 240, align 16, basealign 256, addrspace 5)1334 ; CHECK-NEXT: [[C63:%[0-9]+]]:_(s32) = G_CONSTANT i32 2441335 ; CHECK-NEXT: [[PTR_ADD63:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C63]](s32)1336 ; CHECK-NEXT: G_STORE [[UV61]](s32), [[PTR_ADD63]](p5) :: (store (s32) into %stack.0 + 244, basealign 256, addrspace 5)1337 ; CHECK-NEXT: [[C64:%[0-9]+]]:_(s32) = G_CONSTANT i32 2481338 ; CHECK-NEXT: [[PTR_ADD64:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C64]](s32)1339 ; CHECK-NEXT: G_STORE [[UV62]](s32), [[PTR_ADD64]](p5) :: (store (s32) into %stack.0 + 248, align 8, basealign 256, addrspace 5)1340 ; CHECK-NEXT: [[C65:%[0-9]+]]:_(s32) = G_CONSTANT i32 2521341 ; CHECK-NEXT: [[PTR_ADD65:%[0-9]+]]:_(p5) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C65]](s32)1342 ; CHECK-NEXT: G_STORE [[UV63]](s32), [[PTR_ADD65]](p5) :: (store (s32) into %stack.0 + 252, basealign 256, addrspace 5)1343 ; CHECK-NEXT: [[C66:%[0-9]+]]:_(s32) = G_CONSTANT i32 631344 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C66]]1345 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[AND]], [[C3]]1346 ; CHECK-NEXT: [[PTR_ADD66:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[MUL]](s32)1347 ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD66]](p5) :: (load (s32), addrspace 5)1348 ; CHECK-NEXT: S_ENDPGM 0, implicit [[LOAD4]](s32)1349 %0:_(p1) = COPY $sgpr0_sgpr11350 %1:_(s32) = COPY $sgpr21351 %2:_(<64 x s32>) = G_LOAD %0 :: (load (<64 x s32>), align 4, addrspace 4)1352 %3:_(s32) = G_EXTRACT_VECTOR_ELT %2, %11353 S_ENDPGM 0, implicit %31354...1355 1356---1357name: extract_vector_elt_v32s1_varidx_i321358 1359body: |1360 bb.0:1361 liveins: $vgpr0, $vgpr11362 1363 ; CHECK-LABEL: name: extract_vector_elt_v32s1_varidx_i321364 ; CHECK: liveins: $vgpr0, $vgpr11365 ; CHECK-NEXT: {{ $}}1366 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr01367 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr11368 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 311369 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]1370 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01371 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)1372 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SHL]](s32)1373 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32)1374 %0:_(s32) = COPY $vgpr01375 %1:_(s32) = COPY $vgpr11376 %2:_(<32 x s1>) = G_BITCAST %01377 %3:_(s1) = G_EXTRACT_VECTOR_ELT %2, %11378 %4:_(s32) = G_ANYEXT %31379 $vgpr0 = COPY %41380...1381 1382---1383name: extract_vector_elt_v12s8_varidx_s321384 1385body: |1386 bb.0:1387 liveins: $vgpr0_vgpr1_vgpr2, $vgpr31388 ; CHECK-LABEL: name: extract_vector_elt_v12s8_varidx_s321389 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr31390 ; CHECK-NEXT: {{ $}}1391 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr21392 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr31393 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 21394 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32)1395 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<3 x s32>), [[LSHR]](s32)1396 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 31397 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]1398 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)1399 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[EVEC]], [[SHL]](s32)1400 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR1]](s32)1401 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr21402 %1:_(<12 x s8>) = G_BITCAST %01403 %2:_(s32) = COPY $vgpr31404 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %21405 %4:_(s32) = G_ANYEXT %31406 $vgpr0 = COPY %41407...1408 1409---1410name: extract_vector_elt_v3s8_varidx_s321411 1412body: |1413 bb.0:1414 liveins: $vgpr0, $vgpr11415 ; CHECK-LABEL: name: extract_vector_elt_v3s8_varidx_s321416 ; CHECK: liveins: $vgpr0, $vgpr11417 ; CHECK-NEXT: {{ $}}1418 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr01419 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr11420 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 81421 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)1422 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 161423 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C1]](s32)1424 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[LSHR]](s32), [[LSHR1]](s32)1425 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x s32>), [[COPY1]](s32)1426 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)1427 %0:_(s32) = COPY $vgpr01428 %1:_(s32) = COPY $vgpr11429 %2:_(s24) = G_TRUNC %01430 %3:_(<3 x s8>) = G_BITCAST %21431 %4:_(s8) = G_EXTRACT_VECTOR_ELT %3, %11432 %5:_(s32) = G_ANYEXT %41433 $vgpr0 = COPY %51434...1435