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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s4 5---6name: test_fptosi_s32_to_s327body: |8 bb.0:9 liveins: $vgpr010 11 ; SI-LABEL: name: test_fptosi_s32_to_s3212 ; SI: liveins: $vgpr013 ; SI-NEXT: {{ $}}14 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr015 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)16 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)17 ; VI-LABEL: name: test_fptosi_s32_to_s3218 ; VI: liveins: $vgpr019 ; VI-NEXT: {{ $}}20 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr021 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)22 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)23 %0:_(s32) = COPY $vgpr024 %1:_(s32) = G_FPTOSI %025 $vgpr0 = COPY %126...27 28---29name: test_fptosi_s64_to_s3230body: |31 bb.0:32 liveins: $vgpr0_vgpr133 34 ; SI-LABEL: name: test_fptosi_s64_to_s3235 ; SI: liveins: $vgpr0_vgpr136 ; SI-NEXT: {{ $}}37 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr138 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)39 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)40 ; VI-LABEL: name: test_fptosi_s64_to_s3241 ; VI: liveins: $vgpr0_vgpr142 ; VI-NEXT: {{ $}}43 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr144 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)45 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)46 %0:_(s64) = COPY $vgpr0_vgpr147 %1:_(s32) = G_FPTOSI %048 $vgpr0 = COPY %149...50 51---52name: test_fptosi_v2s32_to_v2s3253body: |54 bb.0:55 liveins: $vgpr0_vgpr156 57 ; SI-LABEL: name: test_fptosi_v2s32_to_v2s3258 ; SI: liveins: $vgpr0_vgpr159 ; SI-NEXT: {{ $}}60 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr161 ; SI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)62 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[UV]](s32)63 ; SI-NEXT: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[UV1]](s32)64 ; SI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPTOSI]](s32), [[FPTOSI1]](s32)65 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)66 ; VI-LABEL: name: test_fptosi_v2s32_to_v2s3267 ; VI: liveins: $vgpr0_vgpr168 ; VI-NEXT: {{ $}}69 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr170 ; VI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)71 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[UV]](s32)72 ; VI-NEXT: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[UV1]](s32)73 ; VI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPTOSI]](s32), [[FPTOSI1]](s32)74 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)75 %0:_(<2 x s32>) = COPY $vgpr0_vgpr176 %1:_(<2 x s32>) = G_FPTOSI %077 $vgpr0_vgpr1 = COPY %178...79 80---81name: test_fptosi_v2s64_to_v2s3282body: |83 bb.0:84 liveins: $vgpr0_vgpr1_vgpr2_vgpr385 86 ; SI-LABEL: name: test_fptosi_v2s64_to_v2s3287 ; SI: liveins: $vgpr0_vgpr1_vgpr2_vgpr388 ; SI-NEXT: {{ $}}89 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr390 ; SI-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)91 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[UV]](s64)92 ; SI-NEXT: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[UV1]](s64)93 ; SI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPTOSI]](s32), [[FPTOSI1]](s32)94 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)95 ; VI-LABEL: name: test_fptosi_v2s64_to_v2s3296 ; VI: liveins: $vgpr0_vgpr1_vgpr2_vgpr397 ; VI-NEXT: {{ $}}98 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr399 ; VI-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)100 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[UV]](s64)101 ; VI-NEXT: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[UV1]](s64)102 ; VI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[FPTOSI]](s32), [[FPTOSI1]](s32)103 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)104 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3105 %1:_(<2 x s32>) = G_FPTOSI %0106 $vgpr0_vgpr1 = COPY %1107...108 109---110name: test_fptosi_s16_to_s16111body: |112 bb.0:113 liveins: $vgpr0114 115 ; SI-LABEL: name: test_fptosi_s16_to_s16116 ; SI: liveins: $vgpr0117 ; SI-NEXT: {{ $}}118 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0119 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)120 ; SI-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)121 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FPEXT]](s32)122 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)123 ; VI-LABEL: name: test_fptosi_s16_to_s16124 ; VI: liveins: $vgpr0125 ; VI-NEXT: {{ $}}126 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0127 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)128 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s16) = G_FPTOSI [[TRUNC]](s16)129 ; VI-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTOSI]](s16)130 ; VI-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)131 %0:_(s32) = COPY $vgpr0132 %1:_(s16) = G_TRUNC %0133 %2:_(s16) = G_FPTOSI %1134 %3:_(s32) = G_ANYEXT %2135 $vgpr0 = COPY %3136...137 138---139name: test_fptosi_s32_to_s16140body: |141 bb.0:142 liveins: $vgpr0143 144 ; SI-LABEL: name: test_fptosi_s32_to_s16145 ; SI: liveins: $vgpr0146 ; SI-NEXT: {{ $}}147 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0148 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)149 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)150 ; VI-LABEL: name: test_fptosi_s32_to_s16151 ; VI: liveins: $vgpr0152 ; VI-NEXT: {{ $}}153 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0154 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)155 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)156 %0:_(s32) = COPY $vgpr0157 %1:_(s16) = G_FPTOSI %0158 %2:_(s32) = G_ANYEXT %1159 $vgpr0 = COPY %2160...161 162---163name: test_fptosi_s64_to_s16164body: |165 bb.0:166 liveins: $vgpr0_vgpr1167 168 ; SI-LABEL: name: test_fptosi_s64_to_s16169 ; SI: liveins: $vgpr0_vgpr1170 ; SI-NEXT: {{ $}}171 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1172 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)173 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)174 ; VI-LABEL: name: test_fptosi_s64_to_s16175 ; VI: liveins: $vgpr0_vgpr1176 ; VI-NEXT: {{ $}}177 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1178 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)179 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)180 %0:_(s64) = COPY $vgpr0_vgpr1181 %1:_(s16) = G_FPTOSI %0182 %2:_(s32) = G_ANYEXT %1183 $vgpr0 = COPY %2184...185 186---187name: test_fptosi_s64_s64188body: |189 bb.0:190 liveins: $vgpr0_vgpr1191 192 ; SI-LABEL: name: test_fptosi_s64_s64193 ; SI: liveins: $vgpr0_vgpr1194 ; SI-NEXT: {{ $}}195 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1196 ; SI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)197 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20198 ; SI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11199 ; SI-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV1]](s32), [[C]](s32), [[C1]](s32)200 ; SI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023201 ; SI-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C2]]202 ; SI-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648203 ; SI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C3]]204 ; SI-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4503599627370495205 ; SI-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0206 ; SI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND]](s32)207 ; SI-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB]](s32)208 ; SI-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1209 ; SI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ASHR]], [[C6]]210 ; SI-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[XOR]]211 ; SI-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 51212 ; SI-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C5]]213 ; SI-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C7]]214 ; SI-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[MV]], [[AND1]]215 ; SI-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[COPY]], [[SELECT]]216 ; SI-NEXT: [[C8:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000217 ; SI-NEXT: [[C9:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000218 ; SI-NEXT: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[SELECT1]], [[C8]]219 ; SI-NEXT: [[INT1:%[0-9]+]]:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.fract), [[FMUL]](s64)220 ; SI-NEXT: [[C10:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3FEFFFFFFFFFFFFF221 ; SI-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[INT1]], [[C10]]222 ; SI-NEXT: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ord), [[FMUL]](s64), [[FMUL]]223 ; SI-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[FMUL]], [[FMINNUM_IEEE]]224 ; SI-NEXT: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[SELECT2]]225 ; SI-NEXT: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[FMUL]], [[FNEG]]226 ; SI-NEXT: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[FADD]], [[C9]], [[SELECT1]]227 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FADD]](s64)228 ; SI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)229 ; SI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)230 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[MV1]](s64)231 ; VI-LABEL: name: test_fptosi_s64_s64232 ; VI: liveins: $vgpr0_vgpr1233 ; VI-NEXT: {{ $}}234 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1235 ; VI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[COPY]]236 ; VI-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000237 ; VI-NEXT: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000238 ; VI-NEXT: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[INTRINSIC_TRUNC]], [[C]]239 ; VI-NEXT: [[FFLOOR:%[0-9]+]]:_(s64) = G_FFLOOR [[FMUL]]240 ; VI-NEXT: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[FFLOOR]], [[C1]], [[INTRINSIC_TRUNC]]241 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FFLOOR]](s64)242 ; VI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)243 ; VI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)244 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)245 %0:_(s64) = COPY $vgpr0_vgpr1246 %1:_(s64) = G_FPTOSI %0247 $vgpr0_vgpr1 = COPY %1248...249 250---251name: test_fptosi_s64_s64_flags252body: |253 bb.0:254 liveins: $vgpr0_vgpr1255 256 ; SI-LABEL: name: test_fptosi_s64_s64_flags257 ; SI: liveins: $vgpr0_vgpr1258 ; SI-NEXT: {{ $}}259 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1260 ; SI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)261 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20262 ; SI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11263 ; SI-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV1]](s32), [[C]](s32), [[C1]](s32)264 ; SI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023265 ; SI-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C2]]266 ; SI-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648267 ; SI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV1]], [[C3]]268 ; SI-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4503599627370495269 ; SI-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0270 ; SI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND]](s32)271 ; SI-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB]](s32)272 ; SI-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1273 ; SI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ASHR]], [[C6]]274 ; SI-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[XOR]]275 ; SI-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 51276 ; SI-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C5]]277 ; SI-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C7]]278 ; SI-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[MV]], [[AND1]]279 ; SI-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[COPY]], [[SELECT]]280 ; SI-NEXT: [[C8:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000281 ; SI-NEXT: [[C9:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000282 ; SI-NEXT: [[FMUL:%[0-9]+]]:_(s64) = nnan G_FMUL [[SELECT1]], [[C8]]283 ; SI-NEXT: [[INT1:%[0-9]+]]:_(s64) = nnan G_INTRINSIC intrinsic(@llvm.amdgcn.fract), [[FMUL]](s64)284 ; SI-NEXT: [[C10:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3FEFFFFFFFFFFFFF285 ; SI-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = nnan G_FMINNUM_IEEE [[INT1]], [[C10]]286 ; SI-NEXT: [[FNEG:%[0-9]+]]:_(s64) = nnan G_FNEG [[FMINNUM_IEEE]]287 ; SI-NEXT: [[FADD:%[0-9]+]]:_(s64) = nnan G_FADD [[FMUL]], [[FNEG]]288 ; SI-NEXT: [[FMA:%[0-9]+]]:_(s64) = nnan G_FMA [[FADD]], [[C9]], [[SELECT1]]289 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FADD]](s64)290 ; SI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)291 ; SI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)292 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[MV1]](s64)293 ; VI-LABEL: name: test_fptosi_s64_s64_flags294 ; VI: liveins: $vgpr0_vgpr1295 ; VI-NEXT: {{ $}}296 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1297 ; VI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = nnan G_INTRINSIC_TRUNC [[COPY]]298 ; VI-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000299 ; VI-NEXT: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000300 ; VI-NEXT: [[FMUL:%[0-9]+]]:_(s64) = nnan G_FMUL [[INTRINSIC_TRUNC]], [[C]]301 ; VI-NEXT: [[FFLOOR:%[0-9]+]]:_(s64) = nnan G_FFLOOR [[FMUL]]302 ; VI-NEXT: [[FMA:%[0-9]+]]:_(s64) = nnan G_FMA [[FFLOOR]], [[C1]], [[INTRINSIC_TRUNC]]303 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FFLOOR]](s64)304 ; VI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)305 ; VI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)306 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)307 %0:_(s64) = COPY $vgpr0_vgpr1308 %1:_(s64) = nnan G_FPTOSI %0309 $vgpr0_vgpr1 = COPY %1310...311 312---313name: test_fptosi_v2s64_to_v2s64314body: |315 bb.0:316 liveins: $vgpr0_vgpr1_vgpr2_vgpr3317 318 ; SI-LABEL: name: test_fptosi_v2s64_to_v2s64319 ; SI: liveins: $vgpr0_vgpr1_vgpr2_vgpr3320 ; SI-NEXT: {{ $}}321 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3322 ; SI-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)323 ; SI-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64)324 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20325 ; SI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11326 ; SI-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV3]](s32), [[C]](s32), [[C1]](s32)327 ; SI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1023328 ; SI-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C2]]329 ; SI-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648330 ; SI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UV3]], [[C3]]331 ; SI-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4503599627370495332 ; SI-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0333 ; SI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND]](s32)334 ; SI-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB]](s32)335 ; SI-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1336 ; SI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ASHR]], [[C6]]337 ; SI-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV]], [[XOR]]338 ; SI-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 51339 ; SI-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C5]]340 ; SI-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C7]]341 ; SI-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[MV]], [[AND1]]342 ; SI-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV]], [[SELECT]]343 ; SI-NEXT: [[C8:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000344 ; SI-NEXT: [[C9:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000345 ; SI-NEXT: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[SELECT1]], [[C8]]346 ; SI-NEXT: [[INT1:%[0-9]+]]:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.fract), [[FMUL]](s64)347 ; SI-NEXT: [[C10:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3FEFFFFFFFFFFFFF348 ; SI-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[INT1]], [[C10]]349 ; SI-NEXT: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ord), [[FMUL]](s64), [[FMUL]]350 ; SI-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[FMUL]], [[FMINNUM_IEEE]]351 ; SI-NEXT: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG [[SELECT2]]352 ; SI-NEXT: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[FMUL]], [[FNEG]]353 ; SI-NEXT: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[FADD]], [[C9]], [[SELECT1]]354 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FADD]](s64)355 ; SI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)356 ; SI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)357 ; SI-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64)358 ; SI-NEXT: [[INT2:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ubfe), [[UV5]](s32), [[C]](s32), [[C1]](s32)359 ; SI-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[INT2]], [[C2]]360 ; SI-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UV5]], [[C3]]361 ; SI-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C5]](s32), [[AND2]](s32)362 ; SI-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[C4]], [[SUB1]](s32)363 ; SI-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[ASHR1]], [[C6]]364 ; SI-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[XOR1]]365 ; SI-NEXT: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB1]](s32), [[C5]]366 ; SI-NEXT: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB1]](s32), [[C7]]367 ; SI-NEXT: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[MV2]], [[AND3]]368 ; SI-NEXT: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV1]], [[SELECT3]]369 ; SI-NEXT: [[FMUL1:%[0-9]+]]:_(s64) = G_FMUL [[SELECT4]], [[C8]]370 ; SI-NEXT: [[INT3:%[0-9]+]]:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.fract), [[FMUL1]](s64)371 ; SI-NEXT: [[FMINNUM_IEEE1:%[0-9]+]]:_(s64) = G_FMINNUM_IEEE [[INT3]], [[C10]]372 ; SI-NEXT: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ord), [[FMUL1]](s64), [[FMUL1]]373 ; SI-NEXT: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[FMUL1]], [[FMINNUM_IEEE1]]374 ; SI-NEXT: [[FNEG1:%[0-9]+]]:_(s64) = G_FNEG [[SELECT5]]375 ; SI-NEXT: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[FMUL1]], [[FNEG1]]376 ; SI-NEXT: [[FMA1:%[0-9]+]]:_(s64) = G_FMA [[FADD1]], [[C9]], [[SELECT4]]377 ; SI-NEXT: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FADD1]](s64)378 ; SI-NEXT: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA1]](s64)379 ; SI-NEXT: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOSI1]](s32)380 ; SI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV1]](s64), [[MV3]](s64)381 ; SI-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)382 ; VI-LABEL: name: test_fptosi_v2s64_to_v2s64383 ; VI: liveins: $vgpr0_vgpr1_vgpr2_vgpr3384 ; VI-NEXT: {{ $}}385 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3386 ; VI-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)387 ; VI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV]]388 ; VI-NEXT: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x3DF0000000000000389 ; VI-NEXT: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0xC1F0000000000000390 ; VI-NEXT: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[INTRINSIC_TRUNC]], [[C]]391 ; VI-NEXT: [[FFLOOR:%[0-9]+]]:_(s64) = G_FFLOOR [[FMUL]]392 ; VI-NEXT: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[FFLOOR]], [[C1]], [[INTRINSIC_TRUNC]]393 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FFLOOR]](s64)394 ; VI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s64)395 ; VI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI]](s32), [[FPTOSI]](s32)396 ; VI-NEXT: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s64) = G_INTRINSIC_TRUNC [[UV1]]397 ; VI-NEXT: [[FMUL1:%[0-9]+]]:_(s64) = G_FMUL [[INTRINSIC_TRUNC1]], [[C]]398 ; VI-NEXT: [[FFLOOR1:%[0-9]+]]:_(s64) = G_FFLOOR [[FMUL1]]399 ; VI-NEXT: [[FMA1:%[0-9]+]]:_(s64) = G_FMA [[FFLOOR1]], [[C1]], [[INTRINSIC_TRUNC1]]400 ; VI-NEXT: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FFLOOR1]](s64)401 ; VI-NEXT: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA1]](s64)402 ; VI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOSI1]](s32)403 ; VI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64)404 ; VI-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)405 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3406 %1:_(<2 x s64>) = G_FPTOSI %0407 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1408...409 410---411name: test_fptosi_s32_to_s64412body: |413 bb.0:414 liveins: $vgpr0415 416 ; SI-LABEL: name: test_fptosi_s32_to_s64417 ; SI: liveins: $vgpr0418 ; SI-NEXT: {{ $}}419 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0420 ; SI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[COPY]]421 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31422 ; SI-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)423 ; SI-NEXT: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[INTRINSIC_TRUNC]]424 ; SI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3DF0000000000000425 ; SI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 0xC1F0000000000000426 ; SI-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FABS]], [[C1]]427 ; SI-NEXT: [[FFLOOR:%[0-9]+]]:_(s32) = G_FFLOOR [[FMUL]]428 ; SI-NEXT: [[FMA:%[0-9]+]]:_(s32) = G_FMA [[FFLOOR]], [[C2]], [[FABS]]429 ; SI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FFLOOR]](s32)430 ; SI-NEXT: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s32)431 ; SI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)432 ; SI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOUI]](s32)433 ; SI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV]]434 ; SI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)435 ; SI-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[ASHR]]436 ; SI-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[ASHR]], [[USUBO1]]437 ; SI-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)438 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](s64)439 ; VI-LABEL: name: test_fptosi_s32_to_s64440 ; VI: liveins: $vgpr0441 ; VI-NEXT: {{ $}}442 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0443 ; VI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[COPY]]444 ; VI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31445 ; VI-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)446 ; VI-NEXT: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[INTRINSIC_TRUNC]]447 ; VI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3DF0000000000000448 ; VI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 0xC1F0000000000000449 ; VI-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FABS]], [[C1]]450 ; VI-NEXT: [[FFLOOR:%[0-9]+]]:_(s32) = G_FFLOOR [[FMUL]]451 ; VI-NEXT: [[FMA:%[0-9]+]]:_(s32) = G_FMA [[FFLOOR]], [[C2]], [[FABS]]452 ; VI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FFLOOR]](s32)453 ; VI-NEXT: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s32)454 ; VI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)455 ; VI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOUI]](s32)456 ; VI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV]]457 ; VI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)458 ; VI-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[ASHR]]459 ; VI-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[ASHR]], [[USUBO1]]460 ; VI-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)461 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](s64)462 %0:_(s32) = COPY $vgpr0463 %1:_(s64) = G_FPTOSI %0464 $vgpr0_vgpr1 = COPY %1465...466 467---468name: test_fptosi_v2s32_to_v2s64469body: |470 bb.0:471 liveins: $vgpr0_vgpr1472 473 ; SI-LABEL: name: test_fptosi_v2s32_to_v2s64474 ; SI: liveins: $vgpr0_vgpr1475 ; SI-NEXT: {{ $}}476 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1477 ; SI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)478 ; SI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV]]479 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31480 ; SI-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[UV]], [[C]](s32)481 ; SI-NEXT: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[INTRINSIC_TRUNC]]482 ; SI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3DF0000000000000483 ; SI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 0xC1F0000000000000484 ; SI-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FABS]], [[C1]]485 ; SI-NEXT: [[FFLOOR:%[0-9]+]]:_(s32) = G_FFLOOR [[FMUL]]486 ; SI-NEXT: [[FMA:%[0-9]+]]:_(s32) = G_FMA [[FFLOOR]], [[C2]], [[FABS]]487 ; SI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FFLOOR]](s32)488 ; SI-NEXT: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s32)489 ; SI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)490 ; SI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOUI]](s32)491 ; SI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV]]492 ; SI-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)493 ; SI-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV2]], [[ASHR]]494 ; SI-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV3]], [[ASHR]], [[USUBO1]]495 ; SI-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)496 ; SI-NEXT: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV1]]497 ; SI-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[UV1]], [[C]](s32)498 ; SI-NEXT: [[FABS1:%[0-9]+]]:_(s32) = G_FABS [[INTRINSIC_TRUNC1]]499 ; SI-NEXT: [[FMUL1:%[0-9]+]]:_(s32) = G_FMUL [[FABS1]], [[C1]]500 ; SI-NEXT: [[FFLOOR1:%[0-9]+]]:_(s32) = G_FFLOOR [[FMUL1]]501 ; SI-NEXT: [[FMA1:%[0-9]+]]:_(s32) = G_FMA [[FFLOOR1]], [[C2]], [[FABS1]]502 ; SI-NEXT: [[FPTOUI2:%[0-9]+]]:_(s32) = G_FPTOUI [[FFLOOR1]](s32)503 ; SI-NEXT: [[FPTOUI3:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA1]](s32)504 ; SI-NEXT: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR1]](s32), [[ASHR1]](s32)505 ; SI-NEXT: [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI3]](s32), [[FPTOUI2]](s32)506 ; SI-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[MV4]], [[MV3]]507 ; SI-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64)508 ; SI-NEXT: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV4]], [[ASHR1]]509 ; SI-NEXT: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV5]], [[ASHR1]], [[USUBO3]]510 ; SI-NEXT: [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32)511 ; SI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV2]](s64), [[MV5]](s64)512 ; SI-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)513 ; VI-LABEL: name: test_fptosi_v2s32_to_v2s64514 ; VI: liveins: $vgpr0_vgpr1515 ; VI-NEXT: {{ $}}516 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1517 ; VI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)518 ; VI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV]]519 ; VI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31520 ; VI-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[UV]], [[C]](s32)521 ; VI-NEXT: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[INTRINSIC_TRUNC]]522 ; VI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3DF0000000000000523 ; VI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 0xC1F0000000000000524 ; VI-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FABS]], [[C1]]525 ; VI-NEXT: [[FFLOOR:%[0-9]+]]:_(s32) = G_FFLOOR [[FMUL]]526 ; VI-NEXT: [[FMA:%[0-9]+]]:_(s32) = G_FMA [[FFLOOR]], [[C2]], [[FABS]]527 ; VI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FFLOOR]](s32)528 ; VI-NEXT: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s32)529 ; VI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)530 ; VI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOUI]](s32)531 ; VI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV]]532 ; VI-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)533 ; VI-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV2]], [[ASHR]]534 ; VI-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV3]], [[ASHR]], [[USUBO1]]535 ; VI-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)536 ; VI-NEXT: [[INTRINSIC_TRUNC1:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[UV1]]537 ; VI-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[UV1]], [[C]](s32)538 ; VI-NEXT: [[FABS1:%[0-9]+]]:_(s32) = G_FABS [[INTRINSIC_TRUNC1]]539 ; VI-NEXT: [[FMUL1:%[0-9]+]]:_(s32) = G_FMUL [[FABS1]], [[C1]]540 ; VI-NEXT: [[FFLOOR1:%[0-9]+]]:_(s32) = G_FFLOOR [[FMUL1]]541 ; VI-NEXT: [[FMA1:%[0-9]+]]:_(s32) = G_FMA [[FFLOOR1]], [[C2]], [[FABS1]]542 ; VI-NEXT: [[FPTOUI2:%[0-9]+]]:_(s32) = G_FPTOUI [[FFLOOR1]](s32)543 ; VI-NEXT: [[FPTOUI3:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA1]](s32)544 ; VI-NEXT: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR1]](s32), [[ASHR1]](s32)545 ; VI-NEXT: [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI3]](s32), [[FPTOUI2]](s32)546 ; VI-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[MV4]], [[MV3]]547 ; VI-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64)548 ; VI-NEXT: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV4]], [[ASHR1]]549 ; VI-NEXT: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV5]], [[ASHR1]], [[USUBO3]]550 ; VI-NEXT: [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32)551 ; VI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV2]](s64), [[MV5]](s64)552 ; VI-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)553 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1554 %1:_(<2 x s64>) = G_FPTOSI %0555 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1556...557 558---559name: test_fptosi_s16_to_s64560body: |561 bb.0:562 liveins: $vgpr0563 564 ; SI-LABEL: name: test_fptosi_s16_to_s64565 ; SI: liveins: $vgpr0566 ; SI-NEXT: {{ $}}567 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0568 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)569 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)570 ; SI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI]](s32)571 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)572 ; VI-LABEL: name: test_fptosi_s16_to_s64573 ; VI: liveins: $vgpr0574 ; VI-NEXT: {{ $}}575 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0576 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)577 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)578 ; VI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI]](s32)579 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)580 %0:_(s32) = COPY $vgpr0581 %1:_(s16) = G_TRUNC %0582 %2:_(s64) = G_FPTOSI %1583 $vgpr0_vgpr1 = COPY %2584...585 586---587name: test_fptosi_v2s16_to_v2s64588body: |589 bb.0:590 liveins: $vgpr0591 592 ; SI-LABEL: name: test_fptosi_v2s16_to_v2s64593 ; SI: liveins: $vgpr0594 ; SI-NEXT: {{ $}}595 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0596 ; SI-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)597 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)598 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16599 ; SI-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)600 ; SI-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)601 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)602 ; SI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI]](s32)603 ; SI-NEXT: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC1]](s16)604 ; SI-NEXT: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI1]](s32)605 ; SI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SEXT]](s64), [[SEXT1]](s64)606 ; SI-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)607 ; VI-LABEL: name: test_fptosi_v2s16_to_v2s64608 ; VI: liveins: $vgpr0609 ; VI-NEXT: {{ $}}610 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0611 ; VI-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)612 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)613 ; VI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16614 ; VI-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)615 ; VI-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)616 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)617 ; VI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI]](s32)618 ; VI-NEXT: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC1]](s16)619 ; VI-NEXT: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[FPTOSI1]](s32)620 ; VI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SEXT]](s64), [[SEXT1]](s64)621 ; VI-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)622 %0:_(<2 x s16>) = COPY $vgpr0623 %1:_(<2 x s64>) = G_FPTOSI %0624 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1625...626 627---628name: test_fptosi_s16_to_s1629body: |630 bb.0:631 liveins: $vgpr0632 ; SI-LABEL: name: test_fptosi_s16_to_s1633 ; SI: liveins: $vgpr0634 ; SI-NEXT: {{ $}}635 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0636 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)637 ; SI-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)638 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FPEXT]](s32)639 ; SI-NEXT: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[FPTOSI]](s32)640 ; SI-NEXT: S_ENDPGM 0, implicit [[TRUNC1]](s1)641 ; VI-LABEL: name: test_fptosi_s16_to_s1642 ; VI: liveins: $vgpr0643 ; VI-NEXT: {{ $}}644 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0645 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)646 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)647 ; VI-NEXT: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[FPTOSI]](s32)648 ; VI-NEXT: S_ENDPGM 0, implicit [[TRUNC1]](s1)649 %0:_(s32) = COPY $vgpr0650 %1:_(s16) = G_TRUNC %0651 %2:_(s1) = G_FPTOSI %1652 S_ENDPGM 0, implicit %2653...654 655---656name: test_fptosi_s16_to_s15657body: |658 bb.0:659 liveins: $vgpr0660 661 ; SI-LABEL: name: test_fptosi_s16_to_s15662 ; SI: liveins: $vgpr0663 ; SI-NEXT: {{ $}}664 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0665 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)666 ; SI-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)667 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FPEXT]](s32)668 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)669 ; VI-LABEL: name: test_fptosi_s16_to_s15670 ; VI: liveins: $vgpr0671 ; VI-NEXT: {{ $}}672 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0673 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)674 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)675 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)676 %0:_(s32) = COPY $vgpr0677 %1:_(s16) = G_TRUNC %0678 %2:_(s15) = G_FPTOSI %1679 %3:_(s32) = G_ANYEXT %2680 $vgpr0 = COPY %3681...682 683---684name: test_fptosi_s16_to_s17685body: |686 bb.0:687 liveins: $vgpr0688 689 ; SI-LABEL: name: test_fptosi_s16_to_s17690 ; SI: liveins: $vgpr0691 ; SI-NEXT: {{ $}}692 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0693 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)694 ; SI-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)695 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FPEXT]](s32)696 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)697 ; VI-LABEL: name: test_fptosi_s16_to_s17698 ; VI: liveins: $vgpr0699 ; VI-NEXT: {{ $}}700 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0701 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)702 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)703 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)704 %0:_(s32) = COPY $vgpr0705 %1:_(s16) = G_TRUNC %0706 %2:_(s17) = G_FPTOSI %1707 %3:_(s32) = G_ANYEXT %2708 $vgpr0 = COPY %3709...710 711---712name: test_fptosi_s32_to_s33713body: |714 bb.0:715 liveins: $vgpr0716 717 ; SI-LABEL: name: test_fptosi_s32_to_s33718 ; SI: liveins: $vgpr0719 ; SI-NEXT: {{ $}}720 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0721 ; SI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[COPY]]722 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31723 ; SI-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)724 ; SI-NEXT: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[INTRINSIC_TRUNC]]725 ; SI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3DF0000000000000726 ; SI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 0xC1F0000000000000727 ; SI-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FABS]], [[C1]]728 ; SI-NEXT: [[FFLOOR:%[0-9]+]]:_(s32) = G_FFLOOR [[FMUL]]729 ; SI-NEXT: [[FMA:%[0-9]+]]:_(s32) = G_FMA [[FFLOOR]], [[C2]], [[FABS]]730 ; SI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FFLOOR]](s32)731 ; SI-NEXT: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s32)732 ; SI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)733 ; SI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOUI]](s32)734 ; SI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV]]735 ; SI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)736 ; SI-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[ASHR]]737 ; SI-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[ASHR]], [[USUBO1]]738 ; SI-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)739 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](s64)740 ; VI-LABEL: name: test_fptosi_s32_to_s33741 ; VI: liveins: $vgpr0742 ; VI-NEXT: {{ $}}743 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0744 ; VI-NEXT: [[INTRINSIC_TRUNC:%[0-9]+]]:_(s32) = G_INTRINSIC_TRUNC [[COPY]]745 ; VI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31746 ; VI-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)747 ; VI-NEXT: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[INTRINSIC_TRUNC]]748 ; VI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3DF0000000000000749 ; VI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 0xC1F0000000000000750 ; VI-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FABS]], [[C1]]751 ; VI-NEXT: [[FFLOOR:%[0-9]+]]:_(s32) = G_FFLOOR [[FMUL]]752 ; VI-NEXT: [[FMA:%[0-9]+]]:_(s32) = G_FMA [[FFLOOR]], [[C2]], [[FABS]]753 ; VI-NEXT: [[FPTOUI:%[0-9]+]]:_(s32) = G_FPTOUI [[FFLOOR]](s32)754 ; VI-NEXT: [[FPTOUI1:%[0-9]+]]:_(s32) = G_FPTOUI [[FMA]](s32)755 ; VI-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)756 ; VI-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[FPTOUI1]](s32), [[FPTOUI]](s32)757 ; VI-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[MV1]], [[MV]]758 ; VI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)759 ; VI-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[ASHR]]760 ; VI-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[ASHR]], [[USUBO1]]761 ; VI-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)762 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[MV2]](s64)763 %0:_(s32) = COPY $vgpr0764 %1:_(s33) = G_FPTOSI %0765 %2:_(s64) = G_ANYEXT %1766 $vgpr0_vgpr1 = COPY %2767...768 769---770name: test_fptosi_s16_to_s7771body: |772 bb.0:773 liveins: $vgpr0774 775 ; SI-LABEL: name: test_fptosi_s16_to_s7776 ; SI: liveins: $vgpr0777 ; SI-NEXT: {{ $}}778 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0779 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)780 ; SI-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)781 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FPEXT]](s32)782 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)783 ; VI-LABEL: name: test_fptosi_s16_to_s7784 ; VI: liveins: $vgpr0785 ; VI-NEXT: {{ $}}786 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0787 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)788 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)789 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)790 %0:_(s32) = COPY $vgpr0791 %1:_(s16) = G_TRUNC %0792 %2:_(s7) = G_FPTOSI %1793 %3:_(s32) = G_ANYEXT %2794 $vgpr0 = COPY %3795...796 797---798name: test_fptosi_s16_to_s8799body: |800 bb.0:801 liveins: $vgpr0802 803 ; SI-LABEL: name: test_fptosi_s16_to_s8804 ; SI: liveins: $vgpr0805 ; SI-NEXT: {{ $}}806 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0807 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)808 ; SI-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)809 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FPEXT]](s32)810 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)811 ; VI-LABEL: name: test_fptosi_s16_to_s8812 ; VI: liveins: $vgpr0813 ; VI-NEXT: {{ $}}814 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0815 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)816 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)817 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)818 %0:_(s32) = COPY $vgpr0819 %1:_(s16) = G_TRUNC %0820 %2:_(s8) = G_FPTOSI %1821 %3:_(s32) = G_ANYEXT %2822 $vgpr0 = COPY %3823...824 825---826name: test_fptosi_s16_to_s9827body: |828 bb.0:829 liveins: $vgpr0830 831 ; SI-LABEL: name: test_fptosi_s16_to_s9832 ; SI: liveins: $vgpr0833 ; SI-NEXT: {{ $}}834 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0835 ; SI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)836 ; SI-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)837 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[FPEXT]](s32)838 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)839 ; VI-LABEL: name: test_fptosi_s16_to_s9840 ; VI: liveins: $vgpr0841 ; VI-NEXT: {{ $}}842 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0843 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)844 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s16)845 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)846 %0:_(s32) = COPY $vgpr0847 %1:_(s16) = G_TRUNC %0848 %2:_(s9) = G_FPTOSI %1849 %3:_(s32) = G_ANYEXT %2850 $vgpr0 = COPY %3851...852 853---854name: test_fptosi_s32_to_s15855body: |856 bb.0:857 liveins: $vgpr0858 859 ; SI-LABEL: name: test_fptosi_s32_to_s15860 ; SI: liveins: $vgpr0861 ; SI-NEXT: {{ $}}862 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0863 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)864 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)865 ; VI-LABEL: name: test_fptosi_s32_to_s15866 ; VI: liveins: $vgpr0867 ; VI-NEXT: {{ $}}868 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0869 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)870 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)871 %0:_(s32) = COPY $vgpr0872 %1:_(s15) = G_FPTOSI %0873 %2:_(s32) = G_ANYEXT %1874 $vgpr0 = COPY %2875...876 877---878name: test_fptosi_s32_to_s17879body: |880 bb.0:881 liveins: $vgpr0882 883 ; SI-LABEL: name: test_fptosi_s32_to_s17884 ; SI: liveins: $vgpr0885 ; SI-NEXT: {{ $}}886 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0887 ; SI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)888 ; SI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)889 ; VI-LABEL: name: test_fptosi_s32_to_s17890 ; VI: liveins: $vgpr0891 ; VI-NEXT: {{ $}}892 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0893 ; VI-NEXT: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)894 ; VI-NEXT: $vgpr0 = COPY [[FPTOSI]](s32)895 %0:_(s32) = COPY $vgpr0896 %1:_(s17) = G_FPTOSI %0897 %2:_(s32) = G_ANYEXT %1898 $vgpr0 = COPY %2899...900