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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -stop-after=legalizer -o - %s | FileCheck -check-prefix=GFX10 %s3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -stop-after=legalizer -o - %s | FileCheck -check-prefix=GFX11 %s4; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -stop-after=legalizer -o - %s | FileCheck -check-prefix=GFX12 %s5 6define amdgpu_ps <4 x float> @sample_d_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, float %s) {7 ; GFX10-LABEL: name: sample_d_1d8 ; GFX10: bb.1.main_body:9 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr210 ; GFX10-NEXT: {{ $}}11 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr212 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr313 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr414 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr515 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr616 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr717 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr818 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr919 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)20 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr1021 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr1122 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr1223 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr1324 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)25 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr026 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)27 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr128 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)29 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr230 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF31 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)32 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)33 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)34 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)35 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)36 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)37 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)38 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)39 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)40 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr341 ;42 ; GFX11-LABEL: name: sample_d_1d43 ; GFX11: bb.1.main_body:44 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr245 ; GFX11-NEXT: {{ $}}46 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr247 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr348 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr449 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr550 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr651 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr752 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr853 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr954 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)55 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr1056 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr1157 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr1258 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr1359 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)60 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr061 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)62 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr163 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)64 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr265 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF66 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)67 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)68 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)69 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)70 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)71 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)72 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)73 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)74 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)75 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr376 ;77 ; GFX12-LABEL: name: sample_d_1d78 ; GFX12: bb.1.main_body:79 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr280 ; GFX12-NEXT: {{ $}}81 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr282 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr383 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr484 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr585 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr686 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr787 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr888 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr989 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)90 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr1091 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr1192 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr1293 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr1394 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)95 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr096 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)97 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr198 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)99 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2100 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF101 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)102 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)103 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)104 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)105 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)106 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)107 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)108 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)109 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)110 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3111main_body:112 %v = call <4 x float> @llvm.amdgcn.image.sample.d.1d.v4f32.f16.f32(i32 15, half %dsdh, half %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)113 ret <4 x float> %v114}115 116define amdgpu_ps <4 x float> @sample_d_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t) {117 ; GFX10-LABEL: name: sample_d_2d118 ; GFX10: bb.1.main_body:119 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5120 ; GFX10-NEXT: {{ $}}121 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2122 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3123 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4124 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5125 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6126 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7127 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8128 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9129 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)130 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10131 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11132 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12133 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13134 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)135 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0136 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)137 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1138 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)139 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2140 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)141 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3142 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)143 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4144 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5145 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)146 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)147 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)148 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)149 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)150 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)151 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)152 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)153 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)154 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)155 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3156 ;157 ; GFX11-LABEL: name: sample_d_2d158 ; GFX11: bb.1.main_body:159 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5160 ; GFX11-NEXT: {{ $}}161 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2162 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3163 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4164 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5165 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6166 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7167 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8168 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9169 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)170 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10171 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11172 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12173 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13174 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)175 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0176 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)177 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1178 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)179 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2180 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)181 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3182 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)183 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4184 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5185 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)186 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)187 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)188 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)189 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)190 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)191 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)192 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)193 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)194 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)195 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3196 ;197 ; GFX12-LABEL: name: sample_d_2d198 ; GFX12: bb.1.main_body:199 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5200 ; GFX12-NEXT: {{ $}}201 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2202 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3203 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4204 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5205 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6206 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7207 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8208 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9209 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)210 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10211 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11212 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12213 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13214 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)215 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0216 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)217 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1218 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)219 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2220 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)221 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3222 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)223 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4224 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5225 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)226 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)227 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)228 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)229 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)230 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)231 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)232 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)233 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)234 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)235 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3236main_body:237 %v = call <4 x float> @llvm.amdgcn.image.sample.d.2d.v4f32.f16.f32(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)238 ret <4 x float> %v239}240 241define amdgpu_ps <4 x float> @sample_d_3d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %drdh, half %dsdv, half %dtdv, half %drdv, float %s, float %t, float %r) {242 ; GFX10-LABEL: name: sample_d_3d243 ; GFX10: bb.1.main_body:244 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8245 ; GFX10-NEXT: {{ $}}246 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2247 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3248 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4249 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5250 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6251 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7252 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8253 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9254 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)255 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10256 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11257 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12258 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13259 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)260 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0261 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)262 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1263 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)264 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2265 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)266 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3267 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)268 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4269 ; GFX10-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)270 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5271 ; GFX10-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)272 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6273 ; GFX10-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr7274 ; GFX10-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr8275 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)276 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF277 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[DEF]](s16)278 ; GFX10-NEXT: [[BUILD_VECTOR4:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC3]](s16), [[TRUNC4]](s16)279 ; GFX10-NEXT: [[BUILD_VECTOR5:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC5]](s16), [[DEF]](s16)280 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)281 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)282 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)283 ; GFX10-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<14 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BUILD_VECTOR4]](<2 x s16>), [[BUILD_VECTOR5]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)284 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.3d), 15, [[CONCAT_VECTORS]](<14 x s16>), $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)285 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)286 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)287 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)288 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)289 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)290 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3291 ;292 ; GFX11-LABEL: name: sample_d_3d293 ; GFX11: bb.1.main_body:294 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8295 ; GFX11-NEXT: {{ $}}296 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2297 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3298 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4299 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5300 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6301 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7302 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8303 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9304 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)305 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10306 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11307 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12308 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13309 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)310 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0311 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)312 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1313 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)314 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2315 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)316 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3317 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)318 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4319 ; GFX11-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)320 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5321 ; GFX11-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)322 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6323 ; GFX11-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr7324 ; GFX11-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr8325 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)326 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF327 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[DEF]](s16)328 ; GFX11-NEXT: [[BUILD_VECTOR4:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC3]](s16), [[TRUNC4]](s16)329 ; GFX11-NEXT: [[BUILD_VECTOR5:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC5]](s16), [[DEF]](s16)330 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)331 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)332 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)333 ; GFX11-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)334 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.3d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BUILD_VECTOR4]](<2 x s16>), [[BUILD_VECTOR5]](<2 x s16>), [[CONCAT_VECTORS]](<6 x s16>), $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)335 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)336 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)337 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)338 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)339 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)340 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3341 ;342 ; GFX12-LABEL: name: sample_d_3d343 ; GFX12: bb.1.main_body:344 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8345 ; GFX12-NEXT: {{ $}}346 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2347 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3348 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4349 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5350 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6351 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7352 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8353 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9354 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)355 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10356 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11357 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12358 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13359 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)360 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0361 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)362 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1363 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)364 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2365 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)366 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3367 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)368 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4369 ; GFX12-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)370 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5371 ; GFX12-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)372 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6373 ; GFX12-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr7374 ; GFX12-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr8375 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)376 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF377 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[DEF]](s16)378 ; GFX12-NEXT: [[BUILD_VECTOR4:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC3]](s16), [[TRUNC4]](s16)379 ; GFX12-NEXT: [[BUILD_VECTOR5:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC5]](s16), [[DEF]](s16)380 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)381 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)382 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)383 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR5]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)384 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.3d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BUILD_VECTOR4]](<2 x s16>), [[CONCAT_VECTORS]](<8 x s16>), $noreg, $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)385 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)386 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)387 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)388 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)389 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)390 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3391main_body:392 %v = call <4 x float> @llvm.amdgcn.image.sample.d.3d.v4f32.f16.f32(i32 15, half %dsdh, half %dtdh, half %drdh, half %dsdv, half %dtdv, half %drdv, float %s, float %t, float %r, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)393 ret <4 x float> %v394}395 396define amdgpu_ps <4 x float> @sample_c_d_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, float %s) {397 ; GFX10-LABEL: name: sample_c_d_1d398 ; GFX10: bb.1.main_body:399 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3400 ; GFX10-NEXT: {{ $}}401 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2402 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3403 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4404 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5405 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6406 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7407 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8408 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9409 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)410 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10411 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11412 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12413 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13414 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)415 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0416 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1417 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)418 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2419 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)420 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3421 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)422 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF423 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)424 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)425 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)426 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)427 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)428 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)429 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)430 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)431 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)432 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3433 ;434 ; GFX11-LABEL: name: sample_c_d_1d435 ; GFX11: bb.1.main_body:436 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3437 ; GFX11-NEXT: {{ $}}438 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2439 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3440 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4441 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5442 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6443 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7444 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8445 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9446 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)447 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10448 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11449 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12450 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13451 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)452 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0453 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1454 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)455 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2456 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)457 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3458 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)459 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF460 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)461 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)462 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)463 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)464 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)465 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)466 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)467 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)468 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)469 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3470 ;471 ; GFX12-LABEL: name: sample_c_d_1d472 ; GFX12: bb.1.main_body:473 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3474 ; GFX12-NEXT: {{ $}}475 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2476 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3477 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4478 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5479 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6480 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7481 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8482 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9483 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)484 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10485 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11486 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12487 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13488 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)489 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0490 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1491 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)492 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2493 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)494 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3495 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)496 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF497 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)498 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)499 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)500 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)501 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)502 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)503 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)504 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)505 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)506 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3507main_body:508 %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.1d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)509 ret <4 x float> %v510}511 512define amdgpu_ps <4 x float> @sample_c_d_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t) {513 ; GFX10-LABEL: name: sample_c_d_2d514 ; GFX10: bb.1.main_body:515 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6516 ; GFX10-NEXT: {{ $}}517 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2518 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3519 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4520 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5521 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6522 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7523 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8524 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9525 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)526 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10527 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11528 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12529 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13530 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)531 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0532 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1533 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)534 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2535 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)536 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3537 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)538 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4539 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)540 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5541 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6542 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)543 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)544 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)545 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)546 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)547 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)548 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)549 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)550 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)551 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)552 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)553 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3554 ;555 ; GFX11-LABEL: name: sample_c_d_2d556 ; GFX11: bb.1.main_body:557 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6558 ; GFX11-NEXT: {{ $}}559 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2560 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3561 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4562 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5563 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6564 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7565 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8566 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9567 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)568 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10569 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11570 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12571 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13572 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)573 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0574 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1575 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)576 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2577 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)578 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3579 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)580 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4581 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)582 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5583 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6584 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)585 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)586 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)587 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)588 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)589 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)590 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)591 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)592 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)593 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)594 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)595 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3596 ;597 ; GFX12-LABEL: name: sample_c_d_2d598 ; GFX12: bb.1.main_body:599 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6600 ; GFX12-NEXT: {{ $}}601 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2602 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3603 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4604 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5605 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6606 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7607 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8608 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9609 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)610 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10611 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11612 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12613 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13614 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)615 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0616 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1617 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)618 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2619 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)620 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3621 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)622 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4623 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)624 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5625 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6626 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)627 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)628 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)629 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)630 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)631 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)632 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[CONCAT_VECTORS]](<4 x s16>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)633 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)634 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)635 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)636 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)637 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)638 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3639main_body:640 %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.2d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)641 ret <4 x float> %v642}643 644define amdgpu_ps <4 x float> @sample_d_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, float %s, float %clamp) {645 ; GFX10-LABEL: name: sample_d_cl_1d646 ; GFX10: bb.1.main_body:647 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3648 ; GFX10-NEXT: {{ $}}649 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2650 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3651 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4652 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5653 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6654 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7655 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8656 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9657 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)658 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10659 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11660 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12661 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13662 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)663 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0664 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)665 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1666 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)667 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2668 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3669 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF670 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)671 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)672 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)673 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)674 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.cl.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)675 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)676 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)677 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)678 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)679 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)680 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3681 ;682 ; GFX11-LABEL: name: sample_d_cl_1d683 ; GFX11: bb.1.main_body:684 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3685 ; GFX11-NEXT: {{ $}}686 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2687 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3688 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4689 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5690 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6691 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7692 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8693 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9694 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)695 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10696 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11697 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12698 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13699 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)700 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0701 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)702 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1703 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)704 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2705 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3706 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF707 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)708 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)709 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)710 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)711 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.cl.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)712 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)713 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)714 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)715 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)716 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)717 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3718 ;719 ; GFX12-LABEL: name: sample_d_cl_1d720 ; GFX12: bb.1.main_body:721 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3722 ; GFX12-NEXT: {{ $}}723 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2724 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3725 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4726 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5727 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6728 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7729 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8730 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9731 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)732 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10733 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11734 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12735 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13736 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)737 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0738 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)739 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1740 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)741 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2742 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3743 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF744 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)745 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)746 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)747 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)748 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.cl.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)749 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)750 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)751 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)752 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)753 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)754 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3755main_body:756 %v = call <4 x float> @llvm.amdgcn.image.sample.d.cl.1d.v4f32.f16.f32(i32 15, half %dsdh, half %dsdv, float %s, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)757 ret <4 x float> %v758}759 760define amdgpu_ps <4 x float> @sample_d_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp) {761 ; GFX10-LABEL: name: sample_d_cl_2d762 ; GFX10: bb.1.main_body:763 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6764 ; GFX10-NEXT: {{ $}}765 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2766 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3767 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4768 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5769 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6770 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7771 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8772 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9773 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)774 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10775 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11776 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12777 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13778 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)779 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0780 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)781 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1782 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)783 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2784 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)785 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3786 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)787 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4788 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5789 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6790 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)791 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)792 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)793 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)794 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)795 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.cl.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)796 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)797 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)798 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)799 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)800 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)801 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3802 ;803 ; GFX11-LABEL: name: sample_d_cl_2d804 ; GFX11: bb.1.main_body:805 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6806 ; GFX11-NEXT: {{ $}}807 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2808 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3809 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4810 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5811 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6812 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7813 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8814 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9815 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)816 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10817 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11818 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12819 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13820 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)821 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0822 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)823 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1824 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)825 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2826 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)827 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3828 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)829 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4830 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5831 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6832 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)833 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)834 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)835 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)836 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)837 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.cl.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)838 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)839 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)840 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)841 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)842 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)843 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3844 ;845 ; GFX12-LABEL: name: sample_d_cl_2d846 ; GFX12: bb.1.main_body:847 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6848 ; GFX12-NEXT: {{ $}}849 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2850 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3851 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4852 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5853 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6854 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7855 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8856 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9857 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)858 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10859 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11860 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12861 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13862 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)863 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0864 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)865 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1866 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)867 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2868 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)869 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3870 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)871 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4872 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr5873 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr6874 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)875 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)876 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)877 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)878 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)879 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)880 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.d.cl.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[CONCAT_VECTORS]](<4 x s16>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)881 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)882 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)883 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)884 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)885 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)886 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3887main_body:888 %v = call <4 x float> @llvm.amdgcn.image.sample.d.cl.2d.v4f32.f16.f32(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)889 ret <4 x float> %v890}891 892define amdgpu_ps <4 x float> @sample_c_d_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, float %s, float %clamp) {893 ; GFX10-LABEL: name: sample_c_d_cl_1d894 ; GFX10: bb.1.main_body:895 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4896 ; GFX10-NEXT: {{ $}}897 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2898 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3899 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4900 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5901 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6902 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7903 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8904 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9905 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)906 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10907 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11908 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12909 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13910 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)911 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0912 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1913 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)914 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2915 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)916 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3917 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4918 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)919 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF920 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)921 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)922 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)923 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)924 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.cl.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)925 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)926 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)927 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)928 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)929 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)930 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3931 ;932 ; GFX11-LABEL: name: sample_c_d_cl_1d933 ; GFX11: bb.1.main_body:934 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4935 ; GFX11-NEXT: {{ $}}936 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2937 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3938 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4939 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5940 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6941 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7942 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8943 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9944 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)945 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10946 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11947 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12948 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13949 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)950 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0951 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1952 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)953 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2954 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)955 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3956 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4957 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)958 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF959 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)960 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)961 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)962 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)963 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.cl.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)964 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)965 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)966 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)967 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)968 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)969 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3970 ;971 ; GFX12-LABEL: name: sample_c_d_cl_1d972 ; GFX12: bb.1.main_body:973 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4974 ; GFX12-NEXT: {{ $}}975 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr2976 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr3977 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr4978 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr5979 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr6980 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr7981 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr8982 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr9983 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)984 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr10985 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr11986 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr12987 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr13988 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)989 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr0990 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr1991 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)992 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr2993 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)994 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr3995 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr4996 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)997 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF998 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)999 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1000 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1001 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1002 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)1003 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.cl.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[CONCAT_VECTORS]](<4 x s16>), $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1004 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1005 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)1006 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)1007 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)1008 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)1009 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31010main_body:1011 %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.1d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dsdv, float %s, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)1012 ret <4 x float> %v1013}1014 1015define amdgpu_ps <4 x float> @sample_c_d_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp) {1016 ; GFX10-LABEL: name: sample_c_d_cl_2d1017 ; GFX10: bb.1.main_body:1018 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr71019 ; GFX10-NEXT: {{ $}}1020 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21021 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31022 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41023 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51024 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61025 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71026 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81027 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91028 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1029 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101030 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111031 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121032 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131033 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1034 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01035 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11036 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1037 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21038 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1039 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31040 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1041 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41042 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)1043 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51044 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61045 ; GFX10-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr71046 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1047 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1048 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1049 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1050 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1051 ; GFX10-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)1052 ; GFX10-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)1053 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.cl.2d), 15, [[CONCAT_VECTORS]](<12 x s16>), $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1054 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1055 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)1056 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)1057 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)1058 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)1059 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31060 ;1061 ; GFX11-LABEL: name: sample_c_d_cl_2d1062 ; GFX11: bb.1.main_body:1063 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr71064 ; GFX11-NEXT: {{ $}}1065 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21066 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31067 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41068 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51069 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61070 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71071 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81072 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91073 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1074 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101075 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111076 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121077 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131078 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1079 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01080 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11081 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1082 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21083 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1084 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31085 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1086 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41087 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)1088 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51089 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61090 ; GFX11-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr71091 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1092 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1093 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1094 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1095 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1096 ; GFX11-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)1097 ; GFX11-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)1098 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.cl.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[CONCAT_VECTORS]](<4 x s16>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1099 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1100 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)1101 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)1102 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)1103 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)1104 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31105 ;1106 ; GFX12-LABEL: name: sample_c_d_cl_2d1107 ; GFX12: bb.1.main_body:1108 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr71109 ; GFX12-NEXT: {{ $}}1110 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21111 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31112 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41113 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51114 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61115 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71116 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81117 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91118 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1119 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101120 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111121 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121122 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131123 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1124 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01125 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11126 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1127 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21128 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1129 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31130 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1131 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41132 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)1133 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51134 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61135 ; GFX12-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr71136 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1137 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1138 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1139 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1140 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1141 ; GFX12-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)1142 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)1143 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.cl.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[CONCAT_VECTORS]](<6 x s16>), $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1144 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1145 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)1146 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)1147 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)1148 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)1149 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31150main_body:1151 %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.2d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)1152 ret <4 x float> %v1153}1154 1155define amdgpu_ps <4 x float> @sample_cd_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, float %s) {1156 ; GFX10-LABEL: name: sample_cd_1d1157 ; GFX10: bb.1.main_body:1158 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr21159 ; GFX10-NEXT: {{ $}}1160 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21161 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31162 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41163 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51164 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61165 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71166 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81167 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91168 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1169 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101170 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111171 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121172 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131173 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1174 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01175 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1176 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11177 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1178 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21179 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1180 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1181 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1182 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)1183 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1184 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1185 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)1186 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)1187 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)1188 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)1189 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31190 ;1191 ; GFX11-LABEL: name: sample_cd_1d1192 ; GFX11: bb.1.main_body:1193 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr21194 ; GFX11-NEXT: {{ $}}1195 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21196 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31197 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41198 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51199 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61200 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71201 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81202 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91203 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1204 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101205 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111206 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121207 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131208 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1209 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01210 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1211 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11212 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1213 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21214 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1215 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1216 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1217 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)1218 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1219 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1220 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)1221 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)1222 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)1223 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)1224 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31225 ;1226 ; GFX12-LABEL: name: sample_cd_1d1227 ; GFX12: bb.1.main_body:1228 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr21229 ; GFX12-NEXT: {{ $}}1230 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21231 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31232 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41233 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51234 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61235 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71236 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81237 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91238 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1239 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101240 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111241 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121242 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131243 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1244 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01245 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1246 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11247 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1248 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21249 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1250 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1251 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1252 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)1253 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1254 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1255 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)1256 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)1257 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)1258 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)1259 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31260main_body:1261 %v = call <4 x float> @llvm.amdgcn.image.sample.cd.1d.v4f32.f16.f32(i32 15, half %dsdh, half %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)1262 ret <4 x float> %v1263}1264 1265define amdgpu_ps <4 x float> @sample_cd_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t) {1266 ; GFX10-LABEL: name: sample_cd_2d1267 ; GFX10: bb.1.main_body:1268 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr51269 ; GFX10-NEXT: {{ $}}1270 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21271 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31272 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41273 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51274 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61275 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71276 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81277 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91278 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1279 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101280 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111281 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121282 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131283 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1284 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01285 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1286 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11287 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1288 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21289 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1290 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31291 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1292 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41293 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51294 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1295 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1296 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1297 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1298 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1299 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1300 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)1301 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)1302 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)1303 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)1304 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31305 ;1306 ; GFX11-LABEL: name: sample_cd_2d1307 ; GFX11: bb.1.main_body:1308 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr51309 ; GFX11-NEXT: {{ $}}1310 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21311 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31312 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41313 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51314 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61315 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71316 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81317 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91318 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1319 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101320 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111321 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121322 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131323 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1324 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01325 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1326 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11327 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1328 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21329 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1330 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31331 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1332 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41333 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51334 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1335 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1336 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1337 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1338 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1339 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1340 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)1341 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)1342 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)1343 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)1344 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31345 ;1346 ; GFX12-LABEL: name: sample_cd_2d1347 ; GFX12: bb.1.main_body:1348 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr51349 ; GFX12-NEXT: {{ $}}1350 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21351 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31352 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41353 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51354 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61355 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71356 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81357 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91358 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1359 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101360 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111361 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121362 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131363 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1364 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01365 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1366 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11367 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1368 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21369 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1370 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31371 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1372 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41373 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51374 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1375 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1376 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1377 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1378 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1379 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1380 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)1381 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)1382 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)1383 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)1384 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31385main_body:1386 %v = call <4 x float> @llvm.amdgcn.image.sample.cd.2d.v4f32.f16.f32(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)1387 ret <4 x float> %v1388}1389 1390define amdgpu_ps <4 x float> @sample_c_cd_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, float %s) {1391 ; GFX10-LABEL: name: sample_c_cd_1d1392 ; GFX10: bb.1.main_body:1393 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr31394 ; GFX10-NEXT: {{ $}}1395 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21396 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31397 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41398 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51399 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61400 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71401 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81402 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91403 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1404 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101405 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111406 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121407 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131408 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1409 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01410 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11411 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1412 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21413 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1414 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31415 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1416 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1417 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1418 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1419 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1420 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1421 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1422 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)1423 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)1424 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)1425 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)1426 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31427 ;1428 ; GFX11-LABEL: name: sample_c_cd_1d1429 ; GFX11: bb.1.main_body:1430 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr31431 ; GFX11-NEXT: {{ $}}1432 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21433 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31434 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41435 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51436 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61437 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71438 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81439 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91440 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1441 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101442 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111443 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121444 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131445 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1446 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01447 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11448 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1449 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21450 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1451 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31452 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1453 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1454 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1455 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1456 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1457 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1458 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1459 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)1460 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)1461 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)1462 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)1463 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31464 ;1465 ; GFX12-LABEL: name: sample_c_cd_1d1466 ; GFX12: bb.1.main_body:1467 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr31468 ; GFX12-NEXT: {{ $}}1469 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21470 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31471 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41472 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51473 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61474 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71475 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81476 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91477 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1478 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101479 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111480 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121481 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131482 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1483 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01484 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11485 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1486 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21487 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1488 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31489 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1490 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1491 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1492 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1493 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1494 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1495 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1496 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)1497 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)1498 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)1499 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)1500 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31501main_body:1502 %v = call <4 x float> @llvm.amdgcn.image.sample.c.cd.1d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)1503 ret <4 x float> %v1504}1505 1506define amdgpu_ps <4 x float> @sample_c_cd_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t) {1507 ; GFX10-LABEL: name: sample_c_cd_2d1508 ; GFX10: bb.1.main_body:1509 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr61510 ; GFX10-NEXT: {{ $}}1511 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21512 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31513 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41514 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51515 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61516 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71517 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81518 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91519 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1520 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101521 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111522 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121523 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131524 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1525 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01526 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11527 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1528 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21529 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1530 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31531 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1532 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41533 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)1534 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51535 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61536 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1537 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1538 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1539 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1540 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1541 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1542 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1543 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)1544 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)1545 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)1546 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)1547 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31548 ;1549 ; GFX11-LABEL: name: sample_c_cd_2d1550 ; GFX11: bb.1.main_body:1551 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr61552 ; GFX11-NEXT: {{ $}}1553 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21554 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31555 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41556 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51557 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61558 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71559 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81560 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91561 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1562 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101563 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111564 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121565 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131566 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1567 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01568 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11569 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1570 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21571 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1572 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31573 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1574 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41575 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)1576 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51577 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61578 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1579 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1580 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1581 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1582 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1583 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1584 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1585 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)1586 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)1587 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)1588 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)1589 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31590 ;1591 ; GFX12-LABEL: name: sample_c_cd_2d1592 ; GFX12: bb.1.main_body:1593 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr61594 ; GFX12-NEXT: {{ $}}1595 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21596 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31597 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41598 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51599 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61600 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71601 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81602 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91603 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1604 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101605 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111606 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121607 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131608 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1609 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01610 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11611 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1612 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21613 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1614 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31615 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1616 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41617 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)1618 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51619 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61620 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1621 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1622 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1623 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1624 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1625 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)1626 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[CONCAT_VECTORS]](<4 x s16>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1627 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1628 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)1629 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)1630 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)1631 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)1632 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31633main_body:1634 %v = call <4 x float> @llvm.amdgcn.image.sample.c.cd.2d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)1635 ret <4 x float> %v1636}1637 1638define amdgpu_ps <4 x float> @sample_cd_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, float %s, float %clamp) {1639 ; GFX10-LABEL: name: sample_cd_cl_1d1640 ; GFX10: bb.1.main_body:1641 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr31642 ; GFX10-NEXT: {{ $}}1643 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21644 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31645 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41646 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51647 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61648 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71649 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81650 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91651 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1652 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101653 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111654 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121655 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131656 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1657 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01658 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1659 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11660 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1661 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21662 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31663 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1664 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1665 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1666 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)1667 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1668 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.cl.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1669 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1670 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)1671 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)1672 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)1673 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)1674 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31675 ;1676 ; GFX11-LABEL: name: sample_cd_cl_1d1677 ; GFX11: bb.1.main_body:1678 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr31679 ; GFX11-NEXT: {{ $}}1680 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21681 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31682 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41683 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51684 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61685 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71686 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81687 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91688 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1689 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101690 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111691 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121692 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131693 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1694 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01695 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1696 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11697 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1698 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21699 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31700 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1701 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1702 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1703 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)1704 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1705 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.cl.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1706 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1707 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)1708 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)1709 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)1710 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)1711 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31712 ;1713 ; GFX12-LABEL: name: sample_cd_cl_1d1714 ; GFX12: bb.1.main_body:1715 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr31716 ; GFX12-NEXT: {{ $}}1717 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21718 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31719 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41720 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51721 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61722 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71723 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81724 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91725 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1726 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101727 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111728 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121729 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131730 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1731 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01732 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1733 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11734 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1735 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21736 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31737 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1738 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1739 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1740 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY14]](s32)1741 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1742 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.cl.1d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1743 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1744 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)1745 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)1746 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)1747 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)1748 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31749main_body:1750 %v = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.1d.v4f32.f16.f32(i32 15, half %dsdh, half %dsdv, float %s, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)1751 ret <4 x float> %v1752}1753 1754define amdgpu_ps <4 x float> @sample_cd_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp) {1755 ; GFX10-LABEL: name: sample_cd_cl_2d1756 ; GFX10: bb.1.main_body:1757 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr61758 ; GFX10-NEXT: {{ $}}1759 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21760 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31761 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41762 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51763 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61764 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71765 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81766 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91767 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1768 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101769 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111770 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121771 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131772 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1773 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01774 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1775 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11776 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1777 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21778 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1779 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31780 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1781 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41782 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51783 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61784 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1785 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1786 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1787 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1788 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1789 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.cl.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1790 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1791 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)1792 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)1793 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)1794 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)1795 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31796 ;1797 ; GFX11-LABEL: name: sample_cd_cl_2d1798 ; GFX11: bb.1.main_body:1799 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr61800 ; GFX11-NEXT: {{ $}}1801 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21802 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31803 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41804 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51805 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61806 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71807 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81808 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91809 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1810 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101811 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111812 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121813 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131814 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1815 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01816 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1817 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11818 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1819 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21820 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1821 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31822 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1823 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41824 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51825 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61826 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1827 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1828 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1829 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1830 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1831 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.cl.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1832 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1833 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)1834 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)1835 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)1836 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)1837 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31838 ;1839 ; GFX12-LABEL: name: sample_cd_cl_2d1840 ; GFX12: bb.1.main_body:1841 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr61842 ; GFX12-NEXT: {{ $}}1843 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21844 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31845 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41846 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51847 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61848 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71849 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81850 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91851 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1852 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101853 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111854 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121855 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131856 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1857 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01858 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY12]](s32)1859 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11860 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1861 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21862 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1863 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31864 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)1865 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41866 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr51867 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr61868 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)1869 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)1870 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1871 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)1872 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)1873 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)1874 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.cd.cl.2d), 15, [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST]](<2 x s16>), [[CONCAT_VECTORS]](<4 x s16>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1875 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1876 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)1877 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)1878 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)1879 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)1880 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31881main_body:1882 %v = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.2d.v4f32.f16.f32(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)1883 ret <4 x float> %v1884}1885 1886define amdgpu_ps <4 x float> @sample_c_cd_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, float %s, float %clamp) {1887 ; GFX10-LABEL: name: sample_c_cd_cl_1d1888 ; GFX10: bb.1.main_body:1889 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr41890 ; GFX10-NEXT: {{ $}}1891 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21892 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31893 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41894 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51895 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61896 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71897 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81898 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91899 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1900 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101901 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111902 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121903 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131904 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1905 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01906 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11907 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1908 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21909 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1910 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31911 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41912 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1913 ; GFX10-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1914 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1915 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1916 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1917 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1918 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.cl.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1919 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1920 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)1921 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)1922 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)1923 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)1924 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31925 ;1926 ; GFX11-LABEL: name: sample_c_cd_cl_1d1927 ; GFX11: bb.1.main_body:1928 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr41929 ; GFX11-NEXT: {{ $}}1930 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21931 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31932 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41933 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51934 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61935 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71936 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81937 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91938 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1939 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101940 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111941 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121942 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131943 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1944 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01945 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11946 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1947 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21948 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1949 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31950 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41951 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1952 ; GFX11-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1953 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1954 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1955 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1956 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1957 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.cl.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1958 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1959 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)1960 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)1961 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)1962 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)1963 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr31964 ;1965 ; GFX12-LABEL: name: sample_c_cd_cl_1d1966 ; GFX12: bb.1.main_body:1967 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr41968 ; GFX12-NEXT: {{ $}}1969 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr21970 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr31971 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr41972 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr51973 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr61974 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr71975 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr81976 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr91977 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)1978 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr101979 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr111980 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr121981 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr131982 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)1983 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr01984 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr11985 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)1986 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr21987 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)1988 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr31989 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr41990 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)1991 ; GFX12-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1992 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[DEF]](s16)1993 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC1]](s16), [[DEF]](s16)1994 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY15]](s32)1995 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY16]](s32)1996 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>)1997 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.cl.1d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[CONCAT_VECTORS]](<4 x s16>), $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)1998 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)1999 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)2000 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)2001 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)2002 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)2003 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr32004main_body:2005 %v = call <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.1d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dsdv, float %s, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)2006 ret <4 x float> %v2007}2008 2009define amdgpu_ps <4 x float> @sample_c_cd_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp) {2010 ; GFX10-LABEL: name: sample_c_cd_cl_2d2011 ; GFX10: bb.1.main_body:2012 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr72013 ; GFX10-NEXT: {{ $}}2014 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22015 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32016 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42017 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52018 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62019 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72020 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82021 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92022 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2023 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102024 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112025 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122026 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132027 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2028 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02029 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12030 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)2031 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22032 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2033 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32034 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2035 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42036 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2037 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52038 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62039 ; GFX10-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72040 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2041 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2042 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2043 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)2044 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2045 ; GFX10-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2046 ; GFX10-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<12 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)2047 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.cl.2d), 15, [[CONCAT_VECTORS]](<12 x s16>), $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)2048 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)2049 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)2050 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)2051 ; GFX10-NEXT: $vgpr2 = COPY [[UV2]](s32)2052 ; GFX10-NEXT: $vgpr3 = COPY [[UV3]](s32)2053 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr32054 ;2055 ; GFX11-LABEL: name: sample_c_cd_cl_2d2056 ; GFX11: bb.1.main_body:2057 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr72058 ; GFX11-NEXT: {{ $}}2059 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22060 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32061 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42062 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52063 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62064 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72065 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82066 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92067 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2068 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102069 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112070 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122071 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132072 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2073 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02074 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12075 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)2076 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22077 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2078 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32079 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2080 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42081 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2082 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52083 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62084 ; GFX11-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72085 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2086 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2087 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2088 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)2089 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2090 ; GFX11-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2091 ; GFX11-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)2092 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.cl.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[CONCAT_VECTORS]](<4 x s16>), $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)2093 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)2094 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)2095 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)2096 ; GFX11-NEXT: $vgpr2 = COPY [[UV2]](s32)2097 ; GFX11-NEXT: $vgpr3 = COPY [[UV3]](s32)2098 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr32099 ;2100 ; GFX12-LABEL: name: sample_c_cd_cl_2d2101 ; GFX12: bb.1.main_body:2102 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr72103 ; GFX12-NEXT: {{ $}}2104 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22105 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32106 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42107 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52108 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62109 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72110 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82111 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92112 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2113 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102114 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112115 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122116 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132117 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2118 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02119 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12120 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY13]](s32)2121 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22122 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2123 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32124 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2125 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42126 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2127 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52128 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62129 ; GFX12-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72130 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2131 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2132 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2133 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY17]](s32)2134 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2135 ; GFX12-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2136 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)2137 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<4 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.cd.cl.2d), 15, [[BITCAST]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[CONCAT_VECTORS]](<6 x s16>), $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<4 x s32>), addrspace 8)2138 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<4 x s32>)2139 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)2140 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)2141 ; GFX12-NEXT: $vgpr2 = COPY [[UV2]](s32)2142 ; GFX12-NEXT: $vgpr3 = COPY [[UV3]](s32)2143 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr32144main_body:2145 %v = call <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.2d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)2146 ret <4 x float> %v2147}2148 2149define amdgpu_ps float @sample_c_d_o_2darray_V1(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %slice) {2150 ; GFX10-LABEL: name: sample_c_d_o_2darray_V12151 ; GFX10: bb.1.main_body:2152 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr82153 ; GFX10-NEXT: {{ $}}2154 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22155 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32156 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42157 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52158 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62159 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72160 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82161 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92162 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2163 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102164 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112165 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122166 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132167 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2168 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02169 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12170 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22171 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2172 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32173 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2174 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42175 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2176 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52177 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)2178 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62179 ; GFX10-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72180 ; GFX10-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr82181 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2182 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY13]](s32)2183 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2184 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2185 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2186 ; GFX10-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2187 ; GFX10-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)2188 ; GFX10-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<14 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)2189 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(s32) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.o.2darray), 4, [[CONCAT_VECTORS]](<14 x s16>), $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (s32), addrspace 8)2190 ; GFX10-NEXT: $vgpr0 = COPY [[AMDGPU_INTRIN_IMAGE_LOAD]](s32)2191 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr02192 ;2193 ; GFX11-LABEL: name: sample_c_d_o_2darray_V12194 ; GFX11: bb.1.main_body:2195 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr82196 ; GFX11-NEXT: {{ $}}2197 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22198 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32199 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42200 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52201 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62202 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72203 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82204 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92205 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2206 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102207 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112208 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122209 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132210 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2211 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02212 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12213 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22214 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2215 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32216 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2217 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42218 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2219 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52220 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)2221 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62222 ; GFX11-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72223 ; GFX11-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr82224 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2225 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY13]](s32)2226 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2227 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2228 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2229 ; GFX11-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2230 ; GFX11-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)2231 ; GFX11-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)2232 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(s32) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.o.2darray), 4, [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[CONCAT_VECTORS]](<6 x s16>), $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (s32), addrspace 8)2233 ; GFX11-NEXT: $vgpr0 = COPY [[AMDGPU_INTRIN_IMAGE_LOAD]](s32)2234 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr02235 ;2236 ; GFX12-LABEL: name: sample_c_d_o_2darray_V12237 ; GFX12: bb.1.main_body:2238 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr82239 ; GFX12-NEXT: {{ $}}2240 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22241 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32242 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42243 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52244 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62245 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72246 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82247 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92248 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2249 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102250 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112251 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122252 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132253 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2254 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02255 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12256 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22257 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2258 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32259 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2260 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42261 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2262 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52263 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)2264 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62265 ; GFX12-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72266 ; GFX12-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr82267 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2268 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY13]](s32)2269 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2270 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2271 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2272 ; GFX12-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2273 ; GFX12-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)2274 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)2275 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(s32) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.o.2darray), 4, [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[CONCAT_VECTORS]](<8 x s16>), $noreg, $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (s32), addrspace 8)2276 ; GFX12-NEXT: $vgpr0 = COPY [[AMDGPU_INTRIN_IMAGE_LOAD]](s32)2277 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr02278main_body:2279 %v = call float @llvm.amdgcn.image.sample.c.d.o.2darray.f16.f32.f32(i32 4, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %slice, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)2280 ret float %v2281}2282 2283define amdgpu_ps <2 x float> @sample_c_d_o_2darray_V2(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %slice) {2284 ; GFX10-LABEL: name: sample_c_d_o_2darray_V22285 ; GFX10: bb.1.main_body:2286 ; GFX10-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr82287 ; GFX10-NEXT: {{ $}}2288 ; GFX10-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22289 ; GFX10-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32290 ; GFX10-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42291 ; GFX10-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52292 ; GFX10-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62293 ; GFX10-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72294 ; GFX10-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82295 ; GFX10-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92296 ; GFX10-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2297 ; GFX10-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102298 ; GFX10-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112299 ; GFX10-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122300 ; GFX10-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132301 ; GFX10-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2302 ; GFX10-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02303 ; GFX10-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12304 ; GFX10-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22305 ; GFX10-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2306 ; GFX10-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32307 ; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2308 ; GFX10-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42309 ; GFX10-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2310 ; GFX10-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52311 ; GFX10-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)2312 ; GFX10-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62313 ; GFX10-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72314 ; GFX10-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr82315 ; GFX10-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2316 ; GFX10-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY13]](s32)2317 ; GFX10-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2318 ; GFX10-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2319 ; GFX10-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2320 ; GFX10-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2321 ; GFX10-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)2322 ; GFX10-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<14 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)2323 ; GFX10-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<2 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.o.2darray), 6, [[CONCAT_VECTORS]](<14 x s16>), $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<2 x s32>), addrspace 8)2324 ; GFX10-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<2 x s32>)2325 ; GFX10-NEXT: $vgpr0 = COPY [[UV]](s32)2326 ; GFX10-NEXT: $vgpr1 = COPY [[UV1]](s32)2327 ; GFX10-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr12328 ;2329 ; GFX11-LABEL: name: sample_c_d_o_2darray_V22330 ; GFX11: bb.1.main_body:2331 ; GFX11-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr82332 ; GFX11-NEXT: {{ $}}2333 ; GFX11-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22334 ; GFX11-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32335 ; GFX11-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42336 ; GFX11-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52337 ; GFX11-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62338 ; GFX11-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72339 ; GFX11-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82340 ; GFX11-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92341 ; GFX11-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2342 ; GFX11-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102343 ; GFX11-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112344 ; GFX11-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122345 ; GFX11-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132346 ; GFX11-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2347 ; GFX11-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02348 ; GFX11-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12349 ; GFX11-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22350 ; GFX11-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2351 ; GFX11-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32352 ; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2353 ; GFX11-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42354 ; GFX11-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2355 ; GFX11-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52356 ; GFX11-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)2357 ; GFX11-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62358 ; GFX11-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72359 ; GFX11-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr82360 ; GFX11-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2361 ; GFX11-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY13]](s32)2362 ; GFX11-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2363 ; GFX11-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2364 ; GFX11-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2365 ; GFX11-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2366 ; GFX11-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)2367 ; GFX11-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)2368 ; GFX11-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<2 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.o.2darray), 6, [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[BUILD_VECTOR3]](<2 x s16>), [[CONCAT_VECTORS]](<6 x s16>), $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<2 x s32>), addrspace 8)2369 ; GFX11-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<2 x s32>)2370 ; GFX11-NEXT: $vgpr0 = COPY [[UV]](s32)2371 ; GFX11-NEXT: $vgpr1 = COPY [[UV1]](s32)2372 ; GFX11-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr12373 ;2374 ; GFX12-LABEL: name: sample_c_d_o_2darray_V22375 ; GFX12: bb.1.main_body:2376 ; GFX12-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr82377 ; GFX12-NEXT: {{ $}}2378 ; GFX12-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr22379 ; GFX12-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr32380 ; GFX12-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $sgpr42381 ; GFX12-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $sgpr52382 ; GFX12-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $sgpr62383 ; GFX12-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $sgpr72384 ; GFX12-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $sgpr82385 ; GFX12-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $sgpr92386 ; GFX12-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)2387 ; GFX12-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $sgpr102388 ; GFX12-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $sgpr112389 ; GFX12-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $sgpr122390 ; GFX12-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $sgpr132391 ; GFX12-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY8]](s32), [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32)2392 ; GFX12-NEXT: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr02393 ; GFX12-NEXT: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr12394 ; GFX12-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr22395 ; GFX12-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY14]](s32)2396 ; GFX12-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr32397 ; GFX12-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY15]](s32)2398 ; GFX12-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr42399 ; GFX12-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY16]](s32)2400 ; GFX12-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr52401 ; GFX12-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY17]](s32)2402 ; GFX12-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr62403 ; GFX12-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr72404 ; GFX12-NEXT: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr82405 ; GFX12-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY12]](s32)2406 ; GFX12-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY13]](s32)2407 ; GFX12-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16)2408 ; GFX12-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC2]](s16), [[TRUNC3]](s16)2409 ; GFX12-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY18]](s32)2410 ; GFX12-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY19]](s32)2411 ; GFX12-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY20]](s32)2412 ; GFX12-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR3]](<2 x s16>), [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)2413 ; GFX12-NEXT: [[AMDGPU_INTRIN_IMAGE_LOAD:%[0-9]+]]:_(<2 x s32>) = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.sample.c.d.o.2darray), 6, [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>), [[BUILD_VECTOR2]](<2 x s16>), [[CONCAT_VECTORS]](<8 x s16>), $noreg, $noreg, $noreg, $noreg, $noreg, [[BUILD_VECTOR]](<8 x s32>), [[BUILD_VECTOR1]](<4 x s32>), 0, 0, 0, 2 :: (dereferenceable load (<2 x s32>), addrspace 8)2414 ; GFX12-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AMDGPU_INTRIN_IMAGE_LOAD]](<2 x s32>)2415 ; GFX12-NEXT: $vgpr0 = COPY [[UV]](s32)2416 ; GFX12-NEXT: $vgpr1 = COPY [[UV1]](s32)2417 ; GFX12-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr12418main_body:2419 %v = call <2 x float> @llvm.amdgcn.image.sample.c.d.o.2darray.v2f32.f16.f32(i32 6, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %slice, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)2420 ret <2 x float> %v2421}2422 2423declare <4 x float> @llvm.amdgcn.image.sample.d.1d.v4f32.f16.f32(i32, half, half, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12424declare <4 x float> @llvm.amdgcn.image.sample.d.2d.v4f32.f16.f32(i32, half, half, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12425declare <4 x float> @llvm.amdgcn.image.sample.d.3d.v4f32.f16.f32(i32, half, half, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12426declare <4 x float> @llvm.amdgcn.image.sample.c.d.1d.v4f32.f16.f32(i32, float, half, half, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12427declare <4 x float> @llvm.amdgcn.image.sample.c.d.2d.v4f32.f16.f32(i32, float, half, half, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12428declare <4 x float> @llvm.amdgcn.image.sample.d.cl.1d.v4f32.f16.f32(i32, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12429declare <4 x float> @llvm.amdgcn.image.sample.d.cl.2d.v4f32.f16.f32(i32, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12430declare <4 x float> @llvm.amdgcn.image.sample.c.d.cl.1d.v4f32.f16.f32(i32, float, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12431declare <4 x float> @llvm.amdgcn.image.sample.c.d.cl.2d.v4f32.f16.f32(i32, float, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12432 2433declare <4 x float> @llvm.amdgcn.image.sample.cd.1d.v4f32.f16.f32(i32, half, half, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12434declare <4 x float> @llvm.amdgcn.image.sample.cd.2d.v4f32.f16.f32(i32, half, half, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12435declare <4 x float> @llvm.amdgcn.image.sample.c.cd.1d.v4f32.f16.f32(i32, float, half, half, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12436declare <4 x float> @llvm.amdgcn.image.sample.c.cd.2d.v4f32.f16.f32(i32, float, half, half, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12437declare <4 x float> @llvm.amdgcn.image.sample.cd.cl.1d.v4f32.f16.f32(i32, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12438declare <4 x float> @llvm.amdgcn.image.sample.cd.cl.2d.v4f32.f16.f32(i32, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12439declare <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.1d.v4f32.f16.f32(i32, float, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12440declare <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.2d.v4f32.f16.f32(i32, float, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12441 2442declare float @llvm.amdgcn.image.sample.c.d.o.2darray.f16.f32.f32(i32, i32, float, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12443declare <2 x float> @llvm.amdgcn.image.sample.c.d.o.2darray.v2f32.f16.f32(i32, i32, float, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #12444 2445attributes #0 = { nounwind }2446attributes #1 = { nounwind readonly }2447attributes #2 = { nounwind readnone }2448