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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s | FileCheck %s3 4---5name: test_merge_s32_s32_s646body: |7 bb.0:8 ; CHECK-LABEL: name: test_merge_s32_s32_s649 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 010 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 111 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C1]](s32)12 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[MV]](s64)13 %0:_(s32) = G_CONSTANT i32 014 %1:_(s32) = G_CONSTANT i32 115 %2:_(s64) = G_MERGE_VALUES %0:_(s32), %1:_(s32)16 $vgpr0_vgpr1 = COPY %2(s64)17...18 19---20name: test_merge_s32_s32_v2s3221body: |22 bb.0:23 ; CHECK-LABEL: name: test_merge_s32_s32_v2s3224 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 025 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 126 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32)27 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)28 %0:_(s32) = G_CONSTANT i32 029 %1:_(s32) = G_CONSTANT i32 130 %2:_(<2 x s32>) = G_BUILD_VECTOR %0:_(s32), %1:_(s32)31 $vgpr0_vgpr1 = COPY %2(<2 x s32>)32...33 34---35name: test_merge_s32_s32_s32_v3s3236body: |37 bb.0:38 ; CHECK-LABEL: name: test_merge_s32_s32_s32_v3s3239 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 040 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 141 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 242 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C2]](s32)43 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)44 %0:_(s32) = G_CONSTANT i32 045 %1:_(s32) = G_CONSTANT i32 146 %2:_(s32) = G_CONSTANT i32 247 %3:_(<3 x s32>) = G_BUILD_VECTOR %0:_(s32), %1:_(s32), %2:_(s32)48 $vgpr0_vgpr1_vgpr2 = COPY %3(<3 x s32>)49...50 51---52name: test_merge_s64_s64_s12853body: |54 bb.0:55 ; CHECK-LABEL: name: test_merge_s64_s64_s12856 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 057 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 158 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C1]](s64)59 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)60 %0:_(s64) = G_CONSTANT i64 061 %1:_(s64) = G_CONSTANT i64 162 %2:_(<2 x s64>) = G_BUILD_VECTOR %0(s64), %1(s64)63 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2(<2 x s64>)64...65 66---67name: test_merge_s64_s64_s64_s64_v4s6468body: |69 bb.0:70 ; CHECK-LABEL: name: test_merge_s64_s64_s64_s64_v4s6471 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 072 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 173 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 274 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 375 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C1]](s64), [[C2]](s64), [[C3]](s64)76 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>)77 %0:_(s64) = G_CONSTANT i64 078 %1:_(s64) = G_CONSTANT i64 179 %2:_(s64) = G_CONSTANT i64 280 %3:_(s64) = G_CONSTANT i64 381 %4:_(<4 x s64>) = G_BUILD_VECTOR %0(s64), %1(s64), %2(s64), %3(s64)82 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %4(<4 x s64>)83...84 85# FIXME: Should be split up86# ---87# name: test_merge_17_x_i3288# body: |89# bb.0:90# %0:_(s32) = G_CONSTANT i32 091# %1:_(s32) = G_CONSTANT i32 192# %2:_(s32) = G_CONSTANT i32 293# %3:_(s32) = G_CONSTANT i32 394 95# %4:_(s32) = G_CONSTANT i32 496# %5:_(s32) = G_CONSTANT i32 597# %6:_(s32) = G_CONSTANT i32 698# %7:_(s32) = G_CONSTANT i32 799 100# %8:_(s32) = G_CONSTANT i32 8101# %9:_(s32) = G_CONSTANT i32 9102# %10:_(s32) = G_CONSTANT i32 10103# %11:_(s32) = G_CONSTANT i32 11104 105# %12:_(s32) = G_CONSTANT i32 12106# %13:_(s32) = G_CONSTANT i32 13107# %14:_(s32) = G_CONSTANT i32 14108# %15:_(s32) = G_CONSTANT i32 15109 110# %16:_(s32) = G_CONSTANT i32 16111 112# %17:_(<17 x s32>) = G_BUILD_VECTOR %0:_(s32), %1:_(s32), %2:_(s32), %3:_(s32), %4:_(s32), %5:_(s32), %6:_(s32), %7:_(s32), %8:_(s32), %9:_(s32), %10:_(s32), %11:_(s32), %12:_(s32), %13:_(s32), %14:_(s32), %15:_(s32), %16:_(s32)113# S_ENDPGM implicit %17(<17 x s32>)114# ...115