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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -verify-machineinstrs -global-isel-abort=2 %s -o - | FileCheck %s3 4---5name: test_phi_s326tracksRegLiveness: true7 8body: |9 ; CHECK-LABEL: name: test_phi_s3210 ; CHECK: bb.0:11 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)12 ; CHECK-NEXT: liveins: $vgpr0, $vgpr113 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr015 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr116 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 017 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]18 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.119 ; CHECK-NEXT: G_BR %bb.220 ; CHECK-NEXT: {{ $}}21 ; CHECK-NEXT: bb.1:22 ; CHECK-NEXT: successors: %bb.2(0x80000000)23 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY]]25 ; CHECK-NEXT: G_BR %bb.226 ; CHECK-NEXT: {{ $}}27 ; CHECK-NEXT: bb.2:28 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY]](s32), %bb.0, [[ADD]](s32), %bb.129 ; CHECK-NEXT: $vgpr0 = COPY [[PHI]](s32)30 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr3131 bb.0:32 successors: %bb.1, %bb.233 liveins: $vgpr0, $vgpr134 35 %0:_(s32) = COPY $vgpr036 %1:_(s32) = COPY $vgpr137 %2:_(s32) = G_CONSTANT i32 038 %3:_(s1) = G_ICMP intpred(eq), %1, %239 G_BRCOND %3, %bb.140 G_BR %bb.241 42 bb.1:43 successors: %bb.244 45 %4:_(s32) = G_ADD %0, %046 G_BR %bb.247 48 bb.2:49 %5:_(s32) = G_PHI %0, %bb.0, %4, %bb.150 $vgpr0 = COPY %551 S_SETPC_B64 undef $sgpr30_sgpr3152 53...54---55name: test_phi_v2s1656tracksRegLiveness: true57 58body: |59 ; CHECK-LABEL: name: test_phi_v2s1660 ; CHECK: bb.0:61 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)62 ; CHECK-NEXT: liveins: $vgpr0, $vgpr163 ; CHECK-NEXT: {{ $}}64 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr065 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr166 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 067 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]68 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.169 ; CHECK-NEXT: G_BR %bb.270 ; CHECK-NEXT: {{ $}}71 ; CHECK-NEXT: bb.1:72 ; CHECK-NEXT: successors: %bb.2(0x80000000)73 ; CHECK-NEXT: {{ $}}74 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)75 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1676 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32)77 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)78 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32)79 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[BITCAST]], [[BITCAST1]]80 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LSHR]], [[LSHR1]]81 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 6553582 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C2]]83 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ADD1]], [[C2]]84 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)85 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]86 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)87 ; CHECK-NEXT: G_BR %bb.288 ; CHECK-NEXT: {{ $}}89 ; CHECK-NEXT: bb.2:90 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<2 x s16>) = G_PHI [[COPY]](<2 x s16>), %bb.0, [[BITCAST2]](<2 x s16>), %bb.191 ; CHECK-NEXT: $vgpr0 = COPY [[PHI]](<2 x s16>)92 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr3193 bb.0:94 successors: %bb.1, %bb.295 liveins: $vgpr0, $vgpr196 97 %0:_(<2 x s16>) = COPY $vgpr098 %1:_(s32) = COPY $vgpr199 %2:_(s32) = G_CONSTANT i32 0100 %3:_(s1) = G_ICMP intpred(eq), %1, %2101 G_BRCOND %3, %bb.1102 G_BR %bb.2103 104 bb.1:105 successors: %bb.2106 107 %5:_(<2 x s16>) = G_ADD %0, %0108 G_BR %bb.2109 110 bb.2:111 %6:_(<2 x s16>) = G_PHI %0, %bb.0, %5, %bb.1112 $vgpr0 = COPY %6113 S_SETPC_B64 undef $sgpr30_sgpr31114...115 116---117name: test_phi_v3s16118tracksRegLiveness: true119 120body: |121 ; CHECK-LABEL: name: test_phi_v3s16122 ; CHECK: bb.0:123 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)124 ; CHECK-NEXT: liveins: $vgpr0_vgpr1, $vgpr2125 ; CHECK-NEXT: {{ $}}126 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1127 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2128 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0129 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]130 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)131 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)132 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16133 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32)134 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)135 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535136 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C2]]137 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)138 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]139 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)140 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST2]](<2 x s16>)141 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1142 ; CHECK-NEXT: G_BR %bb.2143 ; CHECK-NEXT: {{ $}}144 ; CHECK-NEXT: bb.1:145 ; CHECK-NEXT: successors: %bb.2(0x80000000)146 ; CHECK-NEXT: {{ $}}147 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[BITCAST]], [[BITCAST]]148 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LSHR]], [[LSHR]]149 ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[BITCAST1]], [[BITCAST1]]150 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535151 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C3]]152 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ADD1]], [[C3]]153 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16154 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C4]](s32)155 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL1]]156 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)157 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ADD2]], [[C3]]158 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 0159 ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C5]], [[C4]](s32)160 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND3]], [[SHL2]]161 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32)162 ; CHECK-NEXT: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>)163 ; CHECK-NEXT: G_BR %bb.2164 ; CHECK-NEXT: {{ $}}165 ; CHECK-NEXT: bb.2:166 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<4 x s16>) = G_PHI [[CONCAT_VECTORS]](<4 x s16>), %bb.0, [[CONCAT_VECTORS1]](<4 x s16>), %bb.1167 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[PHI]](<4 x s16>)168 ; CHECK-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 0169 ; CHECK-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 16170 ; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C6]], [[C7]](s32)171 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[C6]], [[SHL3]]172 ; CHECK-NEXT: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR3]](s32)173 ; CHECK-NEXT: [[CONCAT_VECTORS2:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[UV2]](<2 x s16>), [[UV3]](<2 x s16>), [[BITCAST5]](<2 x s16>)174 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[CONCAT_VECTORS2]](<6 x s16>)175 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31176 bb.0:177 successors: %bb.1, %bb.2178 liveins: $vgpr0_vgpr1, $vgpr2179 180 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1181 %1:_(s32) = COPY $vgpr2182 %2:_(s32) = G_CONSTANT i32 0183 %3:_(s1) = G_ICMP intpred(eq), %1, %2184 %4:_(<3 x s16>) = G_EXTRACT %0, 0185 G_BRCOND %3, %bb.1186 G_BR %bb.2187 188 bb.1:189 successors: %bb.2190 191 %5:_(<3 x s16>) = G_ADD %4, %4192 G_BR %bb.2193 194 bb.2:195 %6:_(<3 x s16>) = G_PHI %4, %bb.0, %5, %bb.1196 %7:_(<3 x s16>) = G_IMPLICIT_DEF197 %8:_(<6 x s16>) = G_CONCAT_VECTORS %6, %7198 $vgpr0_vgpr1_vgpr2 = COPY %8199 S_SETPC_B64 undef $sgpr30_sgpr31200...201 202---203 204name: test_phi_v4s16205tracksRegLiveness: true206 207body: |208 ; CHECK-LABEL: name: test_phi_v4s16209 ; CHECK: bb.0:210 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)211 ; CHECK-NEXT: liveins: $vgpr0_vgpr1, $vgpr2212 ; CHECK-NEXT: {{ $}}213 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1214 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2215 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0216 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]217 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1218 ; CHECK-NEXT: G_BR %bb.2219 ; CHECK-NEXT: {{ $}}220 ; CHECK-NEXT: bb.1:221 ; CHECK-NEXT: successors: %bb.2(0x80000000)222 ; CHECK-NEXT: {{ $}}223 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)224 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)225 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16226 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32)227 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)228 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32)229 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)230 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C1]](s32)231 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)232 ; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C1]](s32)233 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[BITCAST]], [[BITCAST2]]234 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[LSHR]], [[LSHR2]]235 ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[BITCAST1]], [[BITCAST3]]236 ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[LSHR1]], [[LSHR3]]237 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535238 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C2]]239 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ADD1]], [[C2]]240 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32)241 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]242 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)243 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ADD2]], [[C2]]244 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ADD3]], [[C2]]245 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C1]](s32)246 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]]247 ; CHECK-NEXT: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)248 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>)249 ; CHECK-NEXT: G_BR %bb.2250 ; CHECK-NEXT: {{ $}}251 ; CHECK-NEXT: bb.2:252 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<4 x s16>) = G_PHI [[COPY]](<4 x s16>), %bb.0, [[CONCAT_VECTORS]](<4 x s16>), %bb.1253 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[PHI]](<4 x s16>)254 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31255 bb.0:256 successors: %bb.1, %bb.2257 liveins: $vgpr0_vgpr1, $vgpr2258 259 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1260 %1:_(s32) = COPY $vgpr2261 %2:_(s32) = G_CONSTANT i32 0262 %3:_(s1) = G_ICMP intpred(eq), %1, %2263 G_BRCOND %3, %bb.1264 G_BR %bb.2265 266 bb.1:267 successors: %bb.2268 269 %4:_(<4 x s16>) = G_ADD %0, %0270 G_BR %bb.2271 272 bb.2:273 %5:_(<4 x s16>) = G_PHI %0, %bb.0, %4, %bb.1274 $vgpr0_vgpr1 = COPY %5275 S_SETPC_B64 undef $sgpr30_sgpr31276 277...278---279name: test_phi_v2s32280tracksRegLiveness: true281 282body: |283 ; CHECK-LABEL: name: test_phi_v2s32284 ; CHECK: bb.0:285 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)286 ; CHECK-NEXT: liveins: $vgpr0_vgpr1, $vgpr2287 ; CHECK-NEXT: {{ $}}288 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1289 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2290 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0291 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]292 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1293 ; CHECK-NEXT: G_BR %bb.2294 ; CHECK-NEXT: {{ $}}295 ; CHECK-NEXT: bb.1:296 ; CHECK-NEXT: successors: %bb.2(0x80000000)297 ; CHECK-NEXT: {{ $}}298 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)299 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)300 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV2]]301 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV3]]302 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32)303 ; CHECK-NEXT: G_BR %bb.2304 ; CHECK-NEXT: {{ $}}305 ; CHECK-NEXT: bb.2:306 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<2 x s32>) = G_PHI [[COPY]](<2 x s32>), %bb.0, [[BUILD_VECTOR]](<2 x s32>), %bb.1307 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[PHI]](<2 x s32>)308 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31309 bb.0:310 successors: %bb.1, %bb.2311 liveins: $vgpr0_vgpr1, $vgpr2312 313 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1314 %1:_(s32) = COPY $vgpr2315 %2:_(s32) = G_CONSTANT i32 0316 %3:_(s1) = G_ICMP intpred(eq), %1, %2317 G_BRCOND %3, %bb.1318 G_BR %bb.2319 320 bb.1:321 successors: %bb.2322 323 %4:_(<2 x s32>) = G_ADD %0, %0324 G_BR %bb.2325 326 bb.2:327 %5:_(<2 x s32>) = G_PHI %0, %bb.0, %4, %bb.1328 $vgpr0_vgpr1 = COPY %5329 S_SETPC_B64 undef $sgpr30_sgpr31330 331...332---333name: test_phi_v3s32334tracksRegLiveness: true335 336body: |337 ; CHECK-LABEL: name: test_phi_v3s32338 ; CHECK: bb.0:339 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)340 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3341 ; CHECK-NEXT: {{ $}}342 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2343 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3344 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0345 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]346 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1347 ; CHECK-NEXT: G_BR %bb.2348 ; CHECK-NEXT: {{ $}}349 ; CHECK-NEXT: bb.1:350 ; CHECK-NEXT: successors: %bb.2(0x80000000)351 ; CHECK-NEXT: {{ $}}352 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)353 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)354 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV3]]355 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV4]]356 ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV5]]357 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32)358 ; CHECK-NEXT: G_BR %bb.2359 ; CHECK-NEXT: {{ $}}360 ; CHECK-NEXT: bb.2:361 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<3 x s32>) = G_PHI [[COPY]](<3 x s32>), %bb.0, [[BUILD_VECTOR]](<3 x s32>), %bb.1362 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[PHI]](<3 x s32>)363 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31364 bb.0:365 successors: %bb.1, %bb.2366 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3367 368 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2369 %1:_(s32) = COPY $vgpr3370 %2:_(s32) = G_CONSTANT i32 0371 %3:_(s1) = G_ICMP intpred(eq), %1, %2372 G_BRCOND %3, %bb.1373 G_BR %bb.2374 375 bb.1:376 successors: %bb.2377 378 %4:_(<3 x s32>) = G_ADD %0, %0379 G_BR %bb.2380 381 bb.2:382 %5:_(<3 x s32>) = G_PHI %0, %bb.0, %4, %bb.1383 $vgpr0_vgpr1_vgpr2 = COPY %5384 S_SETPC_B64 undef $sgpr30_sgpr31385 386...387---388name: test_phi_v4s32389tracksRegLiveness: true390 391body: |392 ; CHECK-LABEL: name: test_phi_v4s32393 ; CHECK: bb.0:394 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)395 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4396 ; CHECK-NEXT: {{ $}}397 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3398 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4399 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0400 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]401 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1402 ; CHECK-NEXT: G_BR %bb.2403 ; CHECK-NEXT: {{ $}}404 ; CHECK-NEXT: bb.1:405 ; CHECK-NEXT: successors: %bb.2(0x80000000)406 ; CHECK-NEXT: {{ $}}407 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)408 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)409 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV4]]410 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV5]]411 ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV6]]412 ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV7]]413 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32)414 ; CHECK-NEXT: G_BR %bb.2415 ; CHECK-NEXT: {{ $}}416 ; CHECK-NEXT: bb.2:417 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<4 x s32>) = G_PHI [[COPY]](<4 x s32>), %bb.0, [[BUILD_VECTOR]](<4 x s32>), %bb.1418 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[PHI]](<4 x s32>)419 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31420 bb.0:421 successors: %bb.1, %bb.2422 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4423 424 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3425 %1:_(s32) = COPY $vgpr4426 %2:_(s32) = G_CONSTANT i32 0427 %3:_(s1) = G_ICMP intpred(eq), %1, %2428 G_BRCOND %3, %bb.1429 G_BR %bb.2430 431 bb.1:432 successors: %bb.2433 434 %4:_(<4 x s32>) = G_ADD %0, %0435 G_BR %bb.2436 437 bb.2:438 %5:_(<4 x s32>) = G_PHI %0, %bb.0, %4, %bb.1439 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %5440 S_SETPC_B64 undef $sgpr30_sgpr31441 442...443---444name: test_phi_v8s32445tracksRegLiveness: true446 447body: |448 ; CHECK-LABEL: name: test_phi_v8s32449 ; CHECK: bb.0:450 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)451 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8452 ; CHECK-NEXT: {{ $}}453 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7454 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr8455 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0456 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]457 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1458 ; CHECK-NEXT: G_BR %bb.2459 ; CHECK-NEXT: {{ $}}460 ; CHECK-NEXT: bb.1:461 ; CHECK-NEXT: successors: %bb.2(0x80000000)462 ; CHECK-NEXT: {{ $}}463 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<8 x s32>)464 ; CHECK-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<8 x s32>)465 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV8]]466 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV9]]467 ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV10]]468 ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV11]]469 ; CHECK-NEXT: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[UV4]], [[UV12]]470 ; CHECK-NEXT: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[UV5]], [[UV13]]471 ; CHECK-NEXT: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[UV6]], [[UV14]]472 ; CHECK-NEXT: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[UV7]], [[UV15]]473 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32)474 ; CHECK-NEXT: G_BR %bb.2475 ; CHECK-NEXT: {{ $}}476 ; CHECK-NEXT: bb.2:477 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<8 x s32>) = G_PHI [[COPY]](<8 x s32>), %bb.0, [[BUILD_VECTOR]](<8 x s32>), %bb.1478 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[PHI]](<8 x s32>)479 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31480 bb.0:481 successors: %bb.1, %bb.2482 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8483 484 %0:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7485 %1:_(s32) = COPY $vgpr8486 %2:_(s32) = G_CONSTANT i32 0487 %3:_(s1) = G_ICMP intpred(eq), %1, %2488 G_BRCOND %3, %bb.1489 G_BR %bb.2490 491 bb.1:492 successors: %bb.2493 494 %4:_(<8 x s32>) = G_ADD %0, %0495 G_BR %bb.2496 497 bb.2:498 %5:_(<8 x s32>) = G_PHI %0, %bb.0, %4, %bb.1499 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %5500 S_SETPC_B64 undef $sgpr30_sgpr31501 502...503---504name: test_phi_v16s32505tracksRegLiveness: true506 507body: |508 ; CHECK-LABEL: name: test_phi_v16s32509 ; CHECK: bb.0:510 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)511 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4512 ; CHECK-NEXT: {{ $}}513 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF514 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF515 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr4516 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0517 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]518 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1519 ; CHECK-NEXT: G_BR %bb.2520 ; CHECK-NEXT: {{ $}}521 ; CHECK-NEXT: bb.1:522 ; CHECK-NEXT: successors: %bb.2(0x80000000)523 ; CHECK-NEXT: {{ $}}524 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]525 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]526 ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]527 ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]528 ; CHECK-NEXT: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]529 ; CHECK-NEXT: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]530 ; CHECK-NEXT: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]531 ; CHECK-NEXT: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]532 ; CHECK-NEXT: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]533 ; CHECK-NEXT: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]534 ; CHECK-NEXT: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]535 ; CHECK-NEXT: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]536 ; CHECK-NEXT: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]537 ; CHECK-NEXT: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]538 ; CHECK-NEXT: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]539 ; CHECK-NEXT: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]540 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32), [[ADD8]](s32), [[ADD9]](s32), [[ADD10]](s32), [[ADD11]](s32), [[ADD12]](s32), [[ADD13]](s32), [[ADD14]](s32), [[ADD15]](s32)541 ; CHECK-NEXT: G_BR %bb.2542 ; CHECK-NEXT: {{ $}}543 ; CHECK-NEXT: bb.2:544 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF1]](<16 x s32>), %bb.0, [[BUILD_VECTOR]](<16 x s32>), %bb.1545 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[PHI]](<16 x s32>)546 bb.0:547 successors: %bb.1, %bb.2548 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4549 550 %0:_(<16 x s32>) = G_IMPLICIT_DEF551 %1:_(s32) = COPY $vgpr4552 %2:_(s32) = G_CONSTANT i32 0553 %3:_(s1) = G_ICMP intpred(eq), %1, %2554 G_BRCOND %3, %bb.1555 G_BR %bb.2556 557 bb.1:558 successors: %bb.2559 560 %4:_(<16 x s32>) = G_ADD %0, %0561 G_BR %bb.2562 563 bb.2:564 %5:_(<16 x s32>) = G_PHI %0, %bb.0, %4, %bb.1565 S_SETPC_B64 undef $sgpr30_sgpr31, implicit %5566 567...568 569---570name: test_phi_v32s32571tracksRegLiveness: true572 573body: |574 ; CHECK-LABEL: name: test_phi_v32s32575 ; CHECK: bb.0:576 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)577 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4578 ; CHECK-NEXT: {{ $}}579 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF580 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<32 x s32>) = G_IMPLICIT_DEF581 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr4582 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0583 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]584 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1585 ; CHECK-NEXT: G_BR %bb.2586 ; CHECK-NEXT: {{ $}}587 ; CHECK-NEXT: bb.1:588 ; CHECK-NEXT: successors: %bb.2(0x80000000)589 ; CHECK-NEXT: {{ $}}590 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]591 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]592 ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]593 ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]594 ; CHECK-NEXT: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]595 ; CHECK-NEXT: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]596 ; CHECK-NEXT: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]597 ; CHECK-NEXT: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]598 ; CHECK-NEXT: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]599 ; CHECK-NEXT: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]600 ; CHECK-NEXT: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]601 ; CHECK-NEXT: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]602 ; CHECK-NEXT: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]603 ; CHECK-NEXT: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]604 ; CHECK-NEXT: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]605 ; CHECK-NEXT: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]606 ; CHECK-NEXT: [[ADD16:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]607 ; CHECK-NEXT: [[ADD17:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]608 ; CHECK-NEXT: [[ADD18:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]609 ; CHECK-NEXT: [[ADD19:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]610 ; CHECK-NEXT: [[ADD20:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]611 ; CHECK-NEXT: [[ADD21:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]612 ; CHECK-NEXT: [[ADD22:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]613 ; CHECK-NEXT: [[ADD23:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]614 ; CHECK-NEXT: [[ADD24:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]615 ; CHECK-NEXT: [[ADD25:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]616 ; CHECK-NEXT: [[ADD26:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]617 ; CHECK-NEXT: [[ADD27:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]618 ; CHECK-NEXT: [[ADD28:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]619 ; CHECK-NEXT: [[ADD29:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]620 ; CHECK-NEXT: [[ADD30:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]621 ; CHECK-NEXT: [[ADD31:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]622 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32), [[ADD8]](s32), [[ADD9]](s32), [[ADD10]](s32), [[ADD11]](s32), [[ADD12]](s32), [[ADD13]](s32), [[ADD14]](s32), [[ADD15]](s32), [[ADD16]](s32), [[ADD17]](s32), [[ADD18]](s32), [[ADD19]](s32), [[ADD20]](s32), [[ADD21]](s32), [[ADD22]](s32), [[ADD23]](s32), [[ADD24]](s32), [[ADD25]](s32), [[ADD26]](s32), [[ADD27]](s32), [[ADD28]](s32), [[ADD29]](s32), [[ADD30]](s32), [[ADD31]](s32)623 ; CHECK-NEXT: G_BR %bb.2624 ; CHECK-NEXT: {{ $}}625 ; CHECK-NEXT: bb.2:626 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<32 x s32>) = G_PHI [[DEF1]](<32 x s32>), %bb.0, [[BUILD_VECTOR]](<32 x s32>), %bb.1627 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[PHI]](<32 x s32>)628 bb.0:629 successors: %bb.1, %bb.2630 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4631 632 %0:_(<32 x s32>) = G_IMPLICIT_DEF633 %1:_(s32) = COPY $vgpr4634 %2:_(s32) = G_CONSTANT i32 0635 %3:_(s1) = G_ICMP intpred(eq), %1, %2636 G_BRCOND %3, %bb.1637 G_BR %bb.2638 639 bb.1:640 successors: %bb.2641 642 %4:_(<32 x s32>) = G_ADD %0, %0643 G_BR %bb.2644 645 bb.2:646 %5:_(<32 x s32>) = G_PHI %0, %bb.0, %4, %bb.1647 S_SETPC_B64 undef $sgpr30_sgpr31, implicit %5648 649...650 651---652name: test_phi_v64s32653tracksRegLiveness: true654 655body: |656 ; CHECK-LABEL: name: test_phi_v64s32657 ; CHECK: bb.0:658 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)659 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4660 ; CHECK-NEXT: {{ $}}661 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF662 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF663 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr4664 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0665 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]666 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1667 ; CHECK-NEXT: G_BR %bb.2668 ; CHECK-NEXT: {{ $}}669 ; CHECK-NEXT: bb.1:670 ; CHECK-NEXT: successors: %bb.2(0x80000000)671 ; CHECK-NEXT: {{ $}}672 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]673 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]674 ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]675 ; CHECK-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]676 ; CHECK-NEXT: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]677 ; CHECK-NEXT: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]678 ; CHECK-NEXT: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]679 ; CHECK-NEXT: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]680 ; CHECK-NEXT: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]681 ; CHECK-NEXT: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]682 ; CHECK-NEXT: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]683 ; CHECK-NEXT: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]684 ; CHECK-NEXT: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]685 ; CHECK-NEXT: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]686 ; CHECK-NEXT: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]687 ; CHECK-NEXT: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]688 ; CHECK-NEXT: [[ADD16:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]689 ; CHECK-NEXT: [[ADD17:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]690 ; CHECK-NEXT: [[ADD18:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]691 ; CHECK-NEXT: [[ADD19:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]692 ; CHECK-NEXT: [[ADD20:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]693 ; CHECK-NEXT: [[ADD21:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]694 ; CHECK-NEXT: [[ADD22:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]695 ; CHECK-NEXT: [[ADD23:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]696 ; CHECK-NEXT: [[ADD24:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]697 ; CHECK-NEXT: [[ADD25:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]698 ; CHECK-NEXT: [[ADD26:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]699 ; CHECK-NEXT: [[ADD27:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]700 ; CHECK-NEXT: [[ADD28:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]701 ; CHECK-NEXT: [[ADD29:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]702 ; CHECK-NEXT: [[ADD30:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]703 ; CHECK-NEXT: [[ADD31:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]704 ; CHECK-NEXT: [[ADD32:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]705 ; CHECK-NEXT: [[ADD33:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]706 ; CHECK-NEXT: [[ADD34:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]707 ; CHECK-NEXT: [[ADD35:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]708 ; CHECK-NEXT: [[ADD36:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]709 ; CHECK-NEXT: [[ADD37:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]710 ; CHECK-NEXT: [[ADD38:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]711 ; CHECK-NEXT: [[ADD39:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]712 ; CHECK-NEXT: [[ADD40:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]713 ; CHECK-NEXT: [[ADD41:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]714 ; CHECK-NEXT: [[ADD42:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]715 ; CHECK-NEXT: [[ADD43:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]716 ; CHECK-NEXT: [[ADD44:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]717 ; CHECK-NEXT: [[ADD45:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]718 ; CHECK-NEXT: [[ADD46:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]719 ; CHECK-NEXT: [[ADD47:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]720 ; CHECK-NEXT: [[ADD48:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]721 ; CHECK-NEXT: [[ADD49:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]722 ; CHECK-NEXT: [[ADD50:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]723 ; CHECK-NEXT: [[ADD51:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]724 ; CHECK-NEXT: [[ADD52:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]725 ; CHECK-NEXT: [[ADD53:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]726 ; CHECK-NEXT: [[ADD54:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]727 ; CHECK-NEXT: [[ADD55:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]728 ; CHECK-NEXT: [[ADD56:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]729 ; CHECK-NEXT: [[ADD57:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]730 ; CHECK-NEXT: [[ADD58:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]731 ; CHECK-NEXT: [[ADD59:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]732 ; CHECK-NEXT: [[ADD60:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]733 ; CHECK-NEXT: [[ADD61:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]734 ; CHECK-NEXT: [[ADD62:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]735 ; CHECK-NEXT: [[ADD63:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF]]736 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32), [[ADD8]](s32), [[ADD9]](s32), [[ADD10]](s32), [[ADD11]](s32), [[ADD12]](s32), [[ADD13]](s32), [[ADD14]](s32), [[ADD15]](s32)737 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD16]](s32), [[ADD17]](s32), [[ADD18]](s32), [[ADD19]](s32), [[ADD20]](s32), [[ADD21]](s32), [[ADD22]](s32), [[ADD23]](s32), [[ADD24]](s32), [[ADD25]](s32), [[ADD26]](s32), [[ADD27]](s32), [[ADD28]](s32), [[ADD29]](s32), [[ADD30]](s32), [[ADD31]](s32)738 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD32]](s32), [[ADD33]](s32), [[ADD34]](s32), [[ADD35]](s32), [[ADD36]](s32), [[ADD37]](s32), [[ADD38]](s32), [[ADD39]](s32), [[ADD40]](s32), [[ADD41]](s32), [[ADD42]](s32), [[ADD43]](s32), [[ADD44]](s32), [[ADD45]](s32), [[ADD46]](s32), [[ADD47]](s32)739 ; CHECK-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD48]](s32), [[ADD49]](s32), [[ADD50]](s32), [[ADD51]](s32), [[ADD52]](s32), [[ADD53]](s32), [[ADD54]](s32), [[ADD55]](s32), [[ADD56]](s32), [[ADD57]](s32), [[ADD58]](s32), [[ADD59]](s32), [[ADD60]](s32), [[ADD61]](s32), [[ADD62]](s32), [[ADD63]](s32)740 ; CHECK-NEXT: G_BR %bb.2741 ; CHECK-NEXT: {{ $}}742 ; CHECK-NEXT: bb.2:743 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF1]](<16 x s32>), %bb.0, [[BUILD_VECTOR]](<16 x s32>), %bb.1744 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF1]](<16 x s32>), %bb.0, [[BUILD_VECTOR1]](<16 x s32>), %bb.1745 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF1]](<16 x s32>), %bb.0, [[BUILD_VECTOR2]](<16 x s32>), %bb.1746 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF1]](<16 x s32>), %bb.0, [[BUILD_VECTOR3]](<16 x s32>), %bb.1747 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<64 x s32>) = G_CONCAT_VECTORS [[PHI]](<16 x s32>), [[PHI1]](<16 x s32>), [[PHI2]](<16 x s32>), [[PHI3]](<16 x s32>)748 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[CONCAT_VECTORS]](<64 x s32>)749 bb.0:750 successors: %bb.1, %bb.2751 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4752 753 %0:_(<64 x s32>) = G_IMPLICIT_DEF754 %1:_(s32) = COPY $vgpr4755 %2:_(s32) = G_CONSTANT i32 0756 %3:_(s1) = G_ICMP intpred(eq), %1, %2757 G_BRCOND %3, %bb.1758 G_BR %bb.2759 760 bb.1:761 successors: %bb.2762 763 %4:_(<64 x s32>) = G_ADD %0, %0764 G_BR %bb.2765 766 bb.2:767 %5:_(<64 x s32>) = G_PHI %0, %bb.0, %4, %bb.1768 S_SETPC_B64 undef $sgpr30_sgpr31, implicit %5769 770...771 772---773name: test_phi_s64774tracksRegLiveness: true775 776body: |777 ; CHECK-LABEL: name: test_phi_s64778 ; CHECK: bb.0:779 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)780 ; CHECK-NEXT: liveins: $vgpr0_vgpr1, $vgpr2781 ; CHECK-NEXT: {{ $}}782 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1783 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2784 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0785 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]786 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1787 ; CHECK-NEXT: G_BR %bb.2788 ; CHECK-NEXT: {{ $}}789 ; CHECK-NEXT: bb.1:790 ; CHECK-NEXT: successors: %bb.2(0x80000000)791 ; CHECK-NEXT: {{ $}}792 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)793 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)794 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV2]]795 ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]796 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32)797 ; CHECK-NEXT: G_BR %bb.2798 ; CHECK-NEXT: {{ $}}799 ; CHECK-NEXT: bb.2:800 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY]](s64), %bb.0, [[MV]](s64), %bb.1801 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[PHI]](s64)802 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31803 bb.0:804 successors: %bb.1, %bb.2805 liveins: $vgpr0_vgpr1, $vgpr2806 807 %0:_(s64) = COPY $vgpr0_vgpr1808 %1:_(s32) = COPY $vgpr2809 %2:_(s32) = G_CONSTANT i32 0810 %3:_(s1) = G_ICMP intpred(eq), %1, %2811 G_BRCOND %3, %bb.1812 G_BR %bb.2813 814 bb.1:815 successors: %bb.2816 817 %4:_(s64) = G_ADD %0, %0818 G_BR %bb.2819 820 bb.2:821 %5:_(s64) = G_PHI %0, %bb.0, %4, %bb.1822 $vgpr0_vgpr1 = COPY %5823 S_SETPC_B64 undef $sgpr30_sgpr31824 825...826---827name: test_phi_v2s64828tracksRegLiveness: true829 830body: |831 ; CHECK-LABEL: name: test_phi_v2s64832 ; CHECK: bb.0:833 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)834 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4835 ; CHECK-NEXT: {{ $}}836 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3837 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4838 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0839 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]840 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1841 ; CHECK-NEXT: G_BR %bb.2842 ; CHECK-NEXT: {{ $}}843 ; CHECK-NEXT: bb.1:844 ; CHECK-NEXT: successors: %bb.2(0x80000000)845 ; CHECK-NEXT: {{ $}}846 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)847 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)848 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64)849 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](s64)850 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV4]], [[UV6]]851 ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV5]], [[UV7]], [[UADDO1]]852 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32)853 ; CHECK-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64)854 ; CHECK-NEXT: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](s64)855 ; CHECK-NEXT: [[UADDO2:%[0-9]+]]:_(s32), [[UADDO3:%[0-9]+]]:_(s1) = G_UADDO [[UV8]], [[UV10]]856 ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV9]], [[UV11]], [[UADDO3]]857 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO2]](s32), [[UADDE2]](s32)858 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64)859 ; CHECK-NEXT: G_BR %bb.2860 ; CHECK-NEXT: {{ $}}861 ; CHECK-NEXT: bb.2:862 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<2 x s64>) = G_PHI [[COPY]](<2 x s64>), %bb.0, [[BUILD_VECTOR]](<2 x s64>), %bb.1863 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[PHI]](<2 x s64>)864 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31865 bb.0:866 successors: %bb.1, %bb.2867 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4868 869 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3870 %1:_(s32) = COPY $vgpr4871 %2:_(s32) = G_CONSTANT i32 0872 %3:_(s1) = G_ICMP intpred(eq), %1, %2873 G_BRCOND %3, %bb.1874 G_BR %bb.2875 876 bb.1:877 successors: %bb.2878 879 %4:_(<2 x s64>) = G_ADD %0, %0880 G_BR %bb.2881 882 bb.2:883 %5:_(<2 x s64>) = G_PHI %0, %bb.0, %4, %bb.1884 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %5885 S_SETPC_B64 undef $sgpr30_sgpr31886 887...888---889name: test_phi_v3s64890tracksRegLiveness: true891 892body: |893 ; CHECK-LABEL: name: test_phi_v3s64894 ; CHECK: bb.0:895 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)896 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8897 ; CHECK-NEXT: {{ $}}898 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7899 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr8900 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0901 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]902 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<4 x s64>)903 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[UV]](s64), [[UV1]](s64), [[UV2]](s64)904 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1905 ; CHECK-NEXT: G_BR %bb.2906 ; CHECK-NEXT: {{ $}}907 ; CHECK-NEXT: bb.1:908 ; CHECK-NEXT: successors: %bb.2(0x80000000)909 ; CHECK-NEXT: {{ $}}910 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64)911 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64)912 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV4]], [[UV6]]913 ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV5]], [[UV7]], [[UADDO1]]914 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32)915 ; CHECK-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64)916 ; CHECK-NEXT: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64)917 ; CHECK-NEXT: [[UADDO2:%[0-9]+]]:_(s32), [[UADDO3:%[0-9]+]]:_(s1) = G_UADDO [[UV8]], [[UV10]]918 ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV9]], [[UV11]], [[UADDO3]]919 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO2]](s32), [[UADDE2]](s32)920 ; CHECK-NEXT: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](s64)921 ; CHECK-NEXT: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](s64)922 ; CHECK-NEXT: [[UADDO4:%[0-9]+]]:_(s32), [[UADDO5:%[0-9]+]]:_(s1) = G_UADDO [[UV12]], [[UV14]]923 ; CHECK-NEXT: [[UADDE4:%[0-9]+]]:_(s32), [[UADDE5:%[0-9]+]]:_(s1) = G_UADDE [[UV13]], [[UV15]], [[UADDO5]]924 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO4]](s32), [[UADDE4]](s32)925 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64)926 ; CHECK-NEXT: G_BR %bb.2927 ; CHECK-NEXT: {{ $}}928 ; CHECK-NEXT: bb.2:929 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(<3 x s64>) = G_PHI [[BUILD_VECTOR]](<3 x s64>), %bb.0, [[BUILD_VECTOR1]](<3 x s64>), %bb.1930 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF931 ; CHECK-NEXT: [[UV16:%[0-9]+]]:_(s64), [[UV17:%[0-9]+]]:_(s64), [[UV18:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[PHI]](<3 x s64>)932 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[UV16]](s64), [[UV17]](s64), [[UV18]](s64), [[DEF]](s64)933 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR2]](<4 x s64>)934 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31935 bb.0:936 successors: %bb.1, %bb.2937 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8938 939 %0:_(<4 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7940 %1:_(s32) = COPY $vgpr8941 %2:_(s32) = G_CONSTANT i32 0942 %3:_(s1) = G_ICMP intpred(eq), %1, %2943 %4:_(<3 x s64>) = G_EXTRACT %0, 0944 G_BRCOND %3, %bb.1945 G_BR %bb.2946 947 bb.1:948 successors: %bb.2949 950 %5:_(<3 x s64>) = G_ADD %4, %4951 G_BR %bb.2952 953 bb.2:954 %6:_(<3 x s64>) = G_PHI %4, %bb.0, %5, %bb.1955 %7:_(<4 x s64>) = G_IMPLICIT_DEF956 %8:_(<4 x s64>) = G_INSERT %7, %6, 0957 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %8958 S_SETPC_B64 undef $sgpr30_sgpr31959 960...961---962name: test_phi_p3963tracksRegLiveness: true964 965body: |966 ; CHECK-LABEL: name: test_phi_p3967 ; CHECK: bb.0:968 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)969 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1970 ; CHECK-NEXT: {{ $}}971 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0972 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1973 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0974 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]975 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.1976 ; CHECK-NEXT: G_BR %bb.2977 ; CHECK-NEXT: {{ $}}978 ; CHECK-NEXT: bb.1:979 ; CHECK-NEXT: successors: %bb.2(0x80000000)980 ; CHECK-NEXT: {{ $}}981 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8982 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p3) = G_PTR_ADD [[COPY]], [[C1]](s32)983 ; CHECK-NEXT: G_BR %bb.2984 ; CHECK-NEXT: {{ $}}985 ; CHECK-NEXT: bb.2:986 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p3) = G_PHI [[COPY]](p3), %bb.0, [[PTR_ADD]](p3), %bb.1987 ; CHECK-NEXT: $vgpr0 = COPY [[PHI]](p3)988 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31989 bb.0:990 successors: %bb.1, %bb.2991 liveins: $vgpr0, $vgpr1992 993 %0:_(p3) = COPY $vgpr0994 %1:_(s32) = COPY $vgpr1995 %2:_(s32) = G_CONSTANT i32 0996 %3:_(s1) = G_ICMP intpred(eq), %1, %2997 G_BRCOND %3, %bb.1998 G_BR %bb.2999 1000 bb.1:1001 successors: %bb.21002 1003 %4:_(s32) = G_CONSTANT i32 81004 %5:_(p3) = G_PTR_ADD %0, %41005 G_BR %bb.21006 1007 bb.2:1008 %6:_(p3) = G_PHI %0, %bb.0, %5, %bb.11009 $vgpr0 = COPY %61010 S_SETPC_B64 undef $sgpr30_sgpr311011 1012...1013---1014name: test_phi_p51015tracksRegLiveness: true1016 1017body: |1018 ; CHECK-LABEL: name: test_phi_p51019 ; CHECK: bb.0:1020 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1021 ; CHECK-NEXT: liveins: $vgpr0, $vgpr11022 ; CHECK-NEXT: {{ $}}1023 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr01024 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr11025 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01026 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1027 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11028 ; CHECK-NEXT: G_BR %bb.21029 ; CHECK-NEXT: {{ $}}1030 ; CHECK-NEXT: bb.1:1031 ; CHECK-NEXT: successors: %bb.2(0x80000000)1032 ; CHECK-NEXT: {{ $}}1033 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 81034 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32)1035 ; CHECK-NEXT: G_BR %bb.21036 ; CHECK-NEXT: {{ $}}1037 ; CHECK-NEXT: bb.2:1038 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p5) = G_PHI [[COPY]](p5), %bb.0, [[PTR_ADD]](p5), %bb.11039 ; CHECK-NEXT: $vgpr0 = COPY [[PHI]](p5)1040 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311041 bb.0:1042 successors: %bb.1, %bb.21043 liveins: $vgpr0, $vgpr11044 1045 %0:_(p5) = COPY $vgpr01046 %1:_(s32) = COPY $vgpr11047 %2:_(s32) = G_CONSTANT i32 01048 %3:_(s1) = G_ICMP intpred(eq), %1, %21049 G_BRCOND %3, %bb.11050 G_BR %bb.21051 1052 bb.1:1053 successors: %bb.21054 1055 %4:_(s32) = G_CONSTANT i32 81056 %5:_(p5) = G_PTR_ADD %0, %41057 G_BR %bb.21058 1059 bb.2:1060 %6:_(p5) = G_PHI %0, %bb.0, %5, %bb.11061 $vgpr0 = COPY %61062 S_SETPC_B64 undef $sgpr30_sgpr311063 1064...1065---1066name: test_phi_p01067tracksRegLiveness: true1068 1069body: |1070 ; CHECK-LABEL: name: test_phi_p01071 ; CHECK: bb.0:1072 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1073 ; CHECK-NEXT: liveins: $vgpr0_vgpr1, $vgpr21074 ; CHECK-NEXT: {{ $}}1075 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr11076 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr21077 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01078 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1079 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11080 ; CHECK-NEXT: G_BR %bb.21081 ; CHECK-NEXT: {{ $}}1082 ; CHECK-NEXT: bb.1:1083 ; CHECK-NEXT: successors: %bb.2(0x80000000)1084 ; CHECK-NEXT: {{ $}}1085 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 81086 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)1087 ; CHECK-NEXT: G_BR %bb.21088 ; CHECK-NEXT: {{ $}}1089 ; CHECK-NEXT: bb.2:1090 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[COPY]](p0), %bb.0, [[PTR_ADD]](p0), %bb.11091 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[PHI]](p0)1092 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311093 bb.0:1094 successors: %bb.1, %bb.21095 liveins: $vgpr0_vgpr1, $vgpr21096 1097 %0:_(p0) = COPY $vgpr0_vgpr11098 %1:_(s32) = COPY $vgpr21099 %2:_(s32) = G_CONSTANT i32 01100 %3:_(s1) = G_ICMP intpred(eq), %1, %21101 G_BRCOND %3, %bb.11102 G_BR %bb.21103 1104 bb.1:1105 successors: %bb.21106 1107 %4:_(s64) = G_CONSTANT i64 81108 %5:_(p0) = G_PTR_ADD %0, %41109 G_BR %bb.21110 1111 bb.2:1112 %6:_(p0) = G_PHI %0, %bb.0, %5, %bb.11113 $vgpr0_vgpr1 = COPY %61114 S_SETPC_B64 undef $sgpr30_sgpr311115 1116...1117---1118name: test_phi_p11119tracksRegLiveness: true1120 1121body: |1122 ; CHECK-LABEL: name: test_phi_p11123 ; CHECK: bb.0:1124 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1125 ; CHECK-NEXT: liveins: $vgpr0_vgpr1, $vgpr21126 ; CHECK-NEXT: {{ $}}1127 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr11128 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr21129 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01130 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1131 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11132 ; CHECK-NEXT: G_BR %bb.21133 ; CHECK-NEXT: {{ $}}1134 ; CHECK-NEXT: bb.1:1135 ; CHECK-NEXT: successors: %bb.2(0x80000000)1136 ; CHECK-NEXT: {{ $}}1137 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 81138 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64)1139 ; CHECK-NEXT: G_BR %bb.21140 ; CHECK-NEXT: {{ $}}1141 ; CHECK-NEXT: bb.2:1142 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p1) = G_PHI [[COPY]](p1), %bb.0, [[PTR_ADD]](p1), %bb.11143 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[PHI]](p1)1144 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311145 bb.0:1146 successors: %bb.1, %bb.21147 liveins: $vgpr0_vgpr1, $vgpr21148 1149 %0:_(p1) = COPY $vgpr0_vgpr11150 %1:_(s32) = COPY $vgpr21151 %2:_(s32) = G_CONSTANT i32 01152 %3:_(s1) = G_ICMP intpred(eq), %1, %21153 G_BRCOND %3, %bb.11154 G_BR %bb.21155 1156 bb.1:1157 successors: %bb.21158 1159 %4:_(s64) = G_CONSTANT i64 81160 %5:_(p1) = G_PTR_ADD %0, %41161 G_BR %bb.21162 1163 bb.2:1164 %6:_(p1) = G_PHI %0, %bb.0, %5, %bb.11165 $vgpr0_vgpr1 = COPY %61166 S_SETPC_B64 undef $sgpr30_sgpr311167 1168...1169---1170name: test_phi_p41171tracksRegLiveness: true1172 1173body: |1174 ; CHECK-LABEL: name: test_phi_p41175 ; CHECK: bb.0:1176 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1177 ; CHECK-NEXT: liveins: $vgpr0_vgpr1, $vgpr21178 ; CHECK-NEXT: {{ $}}1179 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr11180 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr21181 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01182 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1183 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11184 ; CHECK-NEXT: G_BR %bb.21185 ; CHECK-NEXT: {{ $}}1186 ; CHECK-NEXT: bb.1:1187 ; CHECK-NEXT: successors: %bb.2(0x80000000)1188 ; CHECK-NEXT: {{ $}}1189 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 81190 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY]], [[C1]](s64)1191 ; CHECK-NEXT: G_BR %bb.21192 ; CHECK-NEXT: {{ $}}1193 ; CHECK-NEXT: bb.2:1194 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p4) = G_PHI [[COPY]](p4), %bb.0, [[PTR_ADD]](p4), %bb.11195 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[PHI]](p4)1196 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311197 bb.0:1198 successors: %bb.1, %bb.21199 liveins: $vgpr0_vgpr1, $vgpr21200 1201 %0:_(p4) = COPY $vgpr0_vgpr11202 %1:_(s32) = COPY $vgpr21203 %2:_(s32) = G_CONSTANT i32 01204 %3:_(s1) = G_ICMP intpred(eq), %1, %21205 G_BRCOND %3, %bb.11206 G_BR %bb.21207 1208 bb.1:1209 successors: %bb.21210 1211 %4:_(s64) = G_CONSTANT i64 81212 %5:_(p4) = G_PTR_ADD %0, %41213 G_BR %bb.21214 1215 bb.2:1216 %6:_(p4) = G_PHI %0, %bb.0, %5, %bb.11217 $vgpr0_vgpr1 = COPY %61218 S_SETPC_B64 undef $sgpr30_sgpr311219 1220...1221---1222name: test_phi_p99991223tracksRegLiveness: true1224 1225body: |1226 ; CHECK-LABEL: name: test_phi_p99991227 ; CHECK: bb.0:1228 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1229 ; CHECK-NEXT: liveins: $vgpr0_vgpr1, $vgpr21230 ; CHECK-NEXT: {{ $}}1231 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p9999) = COPY $vgpr0_vgpr11232 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr21233 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01234 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1235 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11236 ; CHECK-NEXT: G_BR %bb.21237 ; CHECK-NEXT: {{ $}}1238 ; CHECK-NEXT: bb.1:1239 ; CHECK-NEXT: successors: %bb.2(0x80000000)1240 ; CHECK-NEXT: {{ $}}1241 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p9999) = G_IMPLICIT_DEF1242 ; CHECK-NEXT: G_BR %bb.21243 ; CHECK-NEXT: {{ $}}1244 ; CHECK-NEXT: bb.2:1245 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p9999) = G_PHI [[COPY]](p9999), %bb.0, [[DEF]](p9999), %bb.11246 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[PHI]](p9999)1247 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311248 bb.0:1249 successors: %bb.1, %bb.21250 liveins: $vgpr0_vgpr1, $vgpr21251 1252 %0:_(p9999) = COPY $vgpr0_vgpr11253 %1:_(s32) = COPY $vgpr21254 %2:_(s32) = G_CONSTANT i32 01255 %3:_(s1) = G_ICMP intpred(eq), %1, %21256 G_BRCOND %3, %bb.11257 G_BR %bb.21258 1259 bb.1:1260 successors: %bb.21261 1262 %4:_(p9999) = G_IMPLICIT_DEF1263 G_BR %bb.21264 1265 bb.2:1266 %5:_(p9999) = G_PHI %0, %bb.0, %4, %bb.11267 $vgpr0_vgpr1 = COPY %51268 S_SETPC_B64 undef $sgpr30_sgpr311269 1270...1271---1272name: test_phi_s11273tracksRegLiveness: true1274 1275body: |1276 ; CHECK-LABEL: name: test_phi_s11277 ; CHECK: bb.0:1278 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1279 ; CHECK-NEXT: liveins: $vgpr0, $vgpr11280 ; CHECK-NEXT: {{ $}}1281 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr01282 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr11283 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01284 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1285 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY1]](s32)1286 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11287 ; CHECK-NEXT: G_BR %bb.21288 ; CHECK-NEXT: {{ $}}1289 ; CHECK-NEXT: bb.1:1290 ; CHECK-NEXT: successors: %bb.2(0x80000000)1291 ; CHECK-NEXT: {{ $}}1292 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s1) = G_IMPLICIT_DEF1293 ; CHECK-NEXT: G_BR %bb.21294 ; CHECK-NEXT: {{ $}}1295 ; CHECK-NEXT: bb.2:1296 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s1) = G_PHI [[TRUNC]](s1), %bb.0, [[DEF]](s1), %bb.11297 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[PHI]](s1)1298 ; CHECK-NEXT: $vgpr0 = COPY [[ZEXT]](s32)1299 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311300 bb.0:1301 successors: %bb.1, %bb.21302 liveins: $vgpr0, $vgpr11303 1304 %0:_(s32) = COPY $vgpr01305 %1:_(s32) = COPY $vgpr11306 %2:_(s32) = G_CONSTANT i32 01307 %3:_(s1) = G_ICMP intpred(eq), %1, %21308 %4:_(s1) = G_TRUNC %11309 G_BRCOND %3, %bb.11310 G_BR %bb.21311 1312 bb.1:1313 successors: %bb.21314 1315 %5:_(s1) = G_IMPLICIT_DEF1316 G_BR %bb.21317 1318 bb.2:1319 %6:_(s1) = G_PHI %4, %bb.0, %5, %bb.11320 %7:_(s32) = G_ZEXT %61321 $vgpr0 = COPY %71322 S_SETPC_B64 undef $sgpr30_sgpr311323 1324...1325---1326name: test_phi_s71327tracksRegLiveness: true1328 1329body: |1330 ; CHECK-LABEL: name: test_phi_s71331 ; CHECK: bb.0:1332 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1333 ; CHECK-NEXT: liveins: $vgpr0, $vgpr11334 ; CHECK-NEXT: {{ $}}1335 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr01336 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr11337 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01338 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1339 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)1340 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11341 ; CHECK-NEXT: G_BR %bb.21342 ; CHECK-NEXT: {{ $}}1343 ; CHECK-NEXT: bb.1:1344 ; CHECK-NEXT: successors: %bb.2(0x80000000)1345 ; CHECK-NEXT: {{ $}}1346 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF1347 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)1348 ; CHECK-NEXT: G_BR %bb.21349 ; CHECK-NEXT: {{ $}}1350 ; CHECK-NEXT: bb.2:1351 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC]](s16), %bb.0, [[TRUNC1]](s16), %bb.11352 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)1353 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1271354 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C1]]1355 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)1356 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311357 bb.0:1358 successors: %bb.1, %bb.21359 liveins: $vgpr0, $vgpr11360 1361 %0:_(s32) = COPY $vgpr01362 %1:_(s32) = COPY $vgpr11363 %2:_(s32) = G_CONSTANT i32 01364 %3:_(s1) = G_ICMP intpred(eq), %1, %21365 %4:_(s7) = G_TRUNC %11366 G_BRCOND %3, %bb.11367 G_BR %bb.21368 1369 bb.1:1370 successors: %bb.21371 1372 %5:_(s7) = G_IMPLICIT_DEF1373 G_BR %bb.21374 1375 bb.2:1376 %6:_(s7) = G_PHI %4, %bb.0, %5, %bb.11377 %7:_(s32) = G_ZEXT %61378 $vgpr0 = COPY %71379 S_SETPC_B64 undef $sgpr30_sgpr311380 1381...1382---1383name: test_phi_s81384tracksRegLiveness: true1385 1386body: |1387 ; CHECK-LABEL: name: test_phi_s81388 ; CHECK: bb.0:1389 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1390 ; CHECK-NEXT: liveins: $vgpr0, $vgpr11391 ; CHECK-NEXT: {{ $}}1392 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr01393 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr11394 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01395 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1396 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)1397 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11398 ; CHECK-NEXT: G_BR %bb.21399 ; CHECK-NEXT: {{ $}}1400 ; CHECK-NEXT: bb.1:1401 ; CHECK-NEXT: successors: %bb.2(0x80000000)1402 ; CHECK-NEXT: {{ $}}1403 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF1404 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32)1405 ; CHECK-NEXT: G_BR %bb.21406 ; CHECK-NEXT: {{ $}}1407 ; CHECK-NEXT: bb.2:1408 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC]](s16), %bb.0, [[TRUNC1]](s16), %bb.11409 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)1410 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2551411 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C1]]1412 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)1413 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311414 bb.0:1415 successors: %bb.1, %bb.21416 liveins: $vgpr0, $vgpr11417 1418 %0:_(s32) = COPY $vgpr01419 %1:_(s32) = COPY $vgpr11420 %2:_(s32) = G_CONSTANT i32 01421 %3:_(s1) = G_ICMP intpred(eq), %1, %21422 %4:_(s8) = G_TRUNC %11423 G_BRCOND %3, %bb.11424 G_BR %bb.21425 1426 bb.1:1427 successors: %bb.21428 1429 %5:_(s8) = G_IMPLICIT_DEF1430 G_BR %bb.21431 1432 bb.2:1433 %6:_(s8) = G_PHI %4, %bb.0, %5, %bb.11434 %7:_(s32) = G_ZEXT %61435 $vgpr0 = COPY %71436 S_SETPC_B64 undef $sgpr30_sgpr311437 1438...1439---1440name: test_phi_s161441tracksRegLiveness: true1442 1443body: |1444 ; CHECK-LABEL: name: test_phi_s161445 ; CHECK: bb.0:1446 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1447 ; CHECK-NEXT: liveins: $vgpr0, $vgpr11448 ; CHECK-NEXT: {{ $}}1449 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr01450 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr11451 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01452 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1453 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)1454 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11455 ; CHECK-NEXT: G_BR %bb.21456 ; CHECK-NEXT: {{ $}}1457 ; CHECK-NEXT: bb.1:1458 ; CHECK-NEXT: successors: %bb.2(0x80000000)1459 ; CHECK-NEXT: {{ $}}1460 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1461 ; CHECK-NEXT: G_BR %bb.21462 ; CHECK-NEXT: {{ $}}1463 ; CHECK-NEXT: bb.2:1464 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s16) = G_PHI [[TRUNC]](s16), %bb.0, [[DEF]](s16), %bb.11465 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[PHI]](s16)1466 ; CHECK-NEXT: $vgpr0 = COPY [[ZEXT]](s32)1467 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311468 bb.0:1469 successors: %bb.1, %bb.21470 liveins: $vgpr0, $vgpr11471 1472 %0:_(s32) = COPY $vgpr01473 %1:_(s32) = COPY $vgpr11474 %2:_(s32) = G_CONSTANT i32 01475 %3:_(s1) = G_ICMP intpred(eq), %1, %21476 %4:_(s16) = G_TRUNC %11477 G_BRCOND %3, %bb.11478 G_BR %bb.21479 1480 bb.1:1481 successors: %bb.21482 1483 %5:_(s16) = G_IMPLICIT_DEF1484 G_BR %bb.21485 1486 bb.2:1487 %6:_(s16) = G_PHI %4, %bb.0, %5, %bb.11488 %7:_(s32) = G_ZEXT %61489 $vgpr0 = COPY %71490 S_SETPC_B64 undef $sgpr30_sgpr311491 1492...1493---1494name: test_phi_s1281495tracksRegLiveness: true1496 1497body: |1498 ; CHECK-LABEL: name: test_phi_s1281499 ; CHECK: bb.0:1500 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1501 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr41502 ; CHECK-NEXT: {{ $}}1503 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr31504 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr41505 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01506 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1507 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11508 ; CHECK-NEXT: G_BR %bb.21509 ; CHECK-NEXT: {{ $}}1510 ; CHECK-NEXT: bb.1:1511 ; CHECK-NEXT: successors: %bb.2(0x80000000)1512 ; CHECK-NEXT: {{ $}}1513 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)1514 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s128)1515 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV4]]1516 ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV5]], [[UADDO1]]1517 ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV2]], [[UV6]], [[UADDE1]]1518 ; CHECK-NEXT: [[UADDE4:%[0-9]+]]:_(s32), [[UADDE5:%[0-9]+]]:_(s1) = G_UADDE [[UV3]], [[UV7]], [[UADDE3]]1519 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32), [[UADDE2]](s32), [[UADDE4]](s32)1520 ; CHECK-NEXT: G_BR %bb.21521 ; CHECK-NEXT: {{ $}}1522 ; CHECK-NEXT: bb.2:1523 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s128) = G_PHI [[COPY]](s128), %bb.0, [[MV]](s128), %bb.11524 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[PHI]](s128)1525 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311526 bb.0:1527 successors: %bb.1, %bb.21528 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr41529 1530 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr31531 %1:_(s32) = COPY $vgpr41532 %2:_(s32) = G_CONSTANT i32 01533 %3:_(s1) = G_ICMP intpred(eq), %1, %21534 G_BRCOND %3, %bb.11535 G_BR %bb.21536 1537 bb.1:1538 successors: %bb.21539 1540 %4:_(s128) = G_ADD %0, %01541 G_BR %bb.21542 1543 bb.2:1544 %5:_(s128) = G_PHI %0, %bb.0, %4, %bb.11545 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %51546 S_SETPC_B64 undef $sgpr30_sgpr311547 1548...1549---1550name: test_phi_s2561551tracksRegLiveness: true1552 1553body: |1554 ; CHECK-LABEL: name: test_phi_s2561555 ; CHECK: bb.0:1556 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1557 ; CHECK-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr81558 ; CHECK-NEXT: {{ $}}1559 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr71560 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr81561 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01562 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]]1563 ; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.11564 ; CHECK-NEXT: G_BR %bb.21565 ; CHECK-NEXT: {{ $}}1566 ; CHECK-NEXT: bb.1:1567 ; CHECK-NEXT: successors: %bb.2(0x80000000)1568 ; CHECK-NEXT: {{ $}}1569 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s256)1570 ; CHECK-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s256)1571 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV8]]1572 ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV9]], [[UADDO1]]1573 ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV2]], [[UV10]], [[UADDE1]]1574 ; CHECK-NEXT: [[UADDE4:%[0-9]+]]:_(s32), [[UADDE5:%[0-9]+]]:_(s1) = G_UADDE [[UV3]], [[UV11]], [[UADDE3]]1575 ; CHECK-NEXT: [[UADDE6:%[0-9]+]]:_(s32), [[UADDE7:%[0-9]+]]:_(s1) = G_UADDE [[UV4]], [[UV12]], [[UADDE5]]1576 ; CHECK-NEXT: [[UADDE8:%[0-9]+]]:_(s32), [[UADDE9:%[0-9]+]]:_(s1) = G_UADDE [[UV5]], [[UV13]], [[UADDE7]]1577 ; CHECK-NEXT: [[UADDE10:%[0-9]+]]:_(s32), [[UADDE11:%[0-9]+]]:_(s1) = G_UADDE [[UV6]], [[UV14]], [[UADDE9]]1578 ; CHECK-NEXT: [[UADDE12:%[0-9]+]]:_(s32), [[UADDE13:%[0-9]+]]:_(s1) = G_UADDE [[UV7]], [[UV15]], [[UADDE11]]1579 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32), [[UADDE2]](s32), [[UADDE4]](s32), [[UADDE6]](s32), [[UADDE8]](s32), [[UADDE10]](s32), [[UADDE12]](s32)1580 ; CHECK-NEXT: G_BR %bb.21581 ; CHECK-NEXT: {{ $}}1582 ; CHECK-NEXT: bb.2:1583 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s256) = G_PHI [[COPY]](s256), %bb.0, [[MV]](s256), %bb.11584 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[PHI]](s256)1585 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311586 bb.0:1587 successors: %bb.1, %bb.21588 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr81589 1590 %0:_(s256) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr71591 %1:_(s32) = COPY $vgpr81592 %2:_(s32) = G_CONSTANT i32 01593 %3:_(s1) = G_ICMP intpred(eq), %1, %21594 G_BRCOND %3, %bb.11595 G_BR %bb.21596 1597 bb.1:1598 successors: %bb.21599 1600 %4:_(s256) = G_ADD %0, %01601 G_BR %bb.21602 1603 bb.2:1604 %5:_(s256) = G_PHI %0, %bb.0, %4, %bb.11605 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %51606 S_SETPC_B64 undef $sgpr30_sgpr311607 1608...1609---1610name: test_phi_v2s11611tracksRegLiveness: true1612 1613body: |1614 ; CHECK-LABEL: name: test_phi_v2s11615 ; CHECK: bb.0:1616 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)1617 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr31618 ; CHECK-NEXT: {{ $}}1619 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr01620 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr11621 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr21622 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr11623 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01624 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)1625 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 161626 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32)1627 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>)1628 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C1]](s32)1629 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 655351630 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C2]]1631 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C2]]1632 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[AND]](s32), [[AND1]]1633 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[LSHR]](s32), [[LSHR1]]1634 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY3]](s32), [[C]]1635 ; CHECK-NEXT: G_BRCOND [[ICMP2]](s1), %bb.11636 ; CHECK-NEXT: G_BR %bb.21637 ; CHECK-NEXT: {{ $}}1638 ; CHECK-NEXT: bb.1:1639 ; CHECK-NEXT: successors: %bb.2(0x80000000)1640 ; CHECK-NEXT: {{ $}}1641 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)1642 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 161643 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C3]](s32)1644 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[COPY2]](<2 x s16>)1645 ; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C3]](s32)1646 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 655351647 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[BITCAST2]], [[C4]]1648 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[BITCAST3]], [[C4]]1649 ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND2]](s32), [[AND3]]1650 ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[LSHR2]](s32), [[LSHR3]]1651 ; CHECK-NEXT: G_BR %bb.21652 ; CHECK-NEXT: {{ $}}1653 ; CHECK-NEXT: bb.2:1654 ; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s1) = G_PHI [[ICMP]](s1), %bb.0, [[ICMP3]](s1), %bb.11655 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s1) = G_PHI [[ICMP1]](s1), %bb.0, [[ICMP4]](s1), %bb.11656 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s1)1657 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI1]](s1)1658 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 11659 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C5]]1660 ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s32) = G_AND [[ANYEXT1]], [[C5]]1661 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[AND4]](s32), [[AND5]](s32)1662 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)1663 ; CHECK-NEXT: S_SETPC_B64 undef $sgpr30_sgpr311664 bb.0:1665 successors: %bb.1, %bb.21666 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr31667 1668 %0:_(<2 x s16>) = COPY $vgpr01669 %1:_(<2 x s16>) = COPY $vgpr11670 %2:_(<2 x s16>) = COPY $vgpr21671 %3:_(s32) = COPY $vgpr11672 %4:_(s32) = G_CONSTANT i32 01673 %5:_(<2 x s1>) = G_ICMP intpred(eq), %0, %11674 %6:_(s1) = G_ICMP intpred(eq), %3, %41675 G_BRCOND %6, %bb.11676 G_BR %bb.21677 1678 bb.1:1679 successors: %bb.21680 1681 %7:_(<2 x s1>) = G_ICMP intpred(ne), %0, %21682 G_BR %bb.21683 1684 bb.2:1685 %8:_(<2 x s1>) = G_PHI %5, %bb.0, %7, %bb.11686 %9:_(<2 x s32>) = G_ZEXT %81687 $vgpr0_vgpr1 = COPY %91688 S_SETPC_B64 undef $sgpr30_sgpr311689...1690