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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: test_sext_s32_to_s646body: |7 bb.0:8 liveins: $vgpr09 10 ; CHECK-LABEL: name: test_sext_s32_to_s6411 ; CHECK: liveins: $vgpr012 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr014 ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s32)15 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)16 %0:_(s32) = COPY $vgpr017 %1:_(s64) = G_SEXT %018 $vgpr0_vgpr1 = COPY %119...20 21---22name: test_sext_s16_to_s6423body: |24 bb.0:25 liveins: $vgpr026 27 ; CHECK-LABEL: name: test_sext_s16_to_s6428 ; CHECK: liveins: $vgpr029 ; CHECK-NEXT: {{ $}}30 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr031 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s32)32 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ANYEXT]], 1633 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[SEXT_INREG]](s64)34 %0:_(s32) = COPY $vgpr035 %1:_(s16) = G_TRUNC %036 %2:_(s64) = G_SEXT %137 $vgpr0_vgpr1 = COPY %238...39 40---41name: test_sext_s16_to_s3242body: |43 bb.0:44 liveins: $vgpr045 46 ; CHECK-LABEL: name: test_sext_s16_to_s3247 ; CHECK: liveins: $vgpr048 ; CHECK-NEXT: {{ $}}49 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr050 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 1651 ; CHECK-NEXT: $vgpr0 = COPY [[SEXT_INREG]](s32)52 %0:_(s32) = COPY $vgpr053 %1:_(s16) = G_TRUNC %054 %2:_(s32) = G_SEXT %155 $vgpr0 = COPY %256...57 58---59name: test_sext_s24_to_s3260body: |61 bb.0:62 liveins: $vgpr063 64 ; CHECK-LABEL: name: test_sext_s24_to_s3265 ; CHECK: liveins: $vgpr066 ; CHECK-NEXT: {{ $}}67 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr068 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 2469 ; CHECK-NEXT: $vgpr0 = COPY [[SEXT_INREG]](s32)70 %0:_(s32) = COPY $vgpr071 %1:_(s24) = G_TRUNC %072 %2:_(s32) = G_SEXT %173 $vgpr0 = COPY %274...75 76---77name: test_sext_i1_to_s3278body: |79 bb.0:80 liveins: $vgpr081 82 ; CHECK-LABEL: name: test_sext_i1_to_s3283 ; CHECK: liveins: $vgpr084 ; CHECK-NEXT: {{ $}}85 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr086 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 187 ; CHECK-NEXT: $vgpr0 = COPY [[SEXT_INREG]](s32)88 %0:_(s32) = COPY $vgpr089 %1:_(s1) = G_TRUNC %090 %2:_(s32) = G_SEXT %191 $vgpr0 = COPY %292...93 94---95name: test_sext_v2s16_to_v2s3296body: |97 bb.0:98 liveins: $vgpr099 100 ; CHECK-LABEL: name: test_sext_v2s16_to_v2s32101 ; CHECK: liveins: $vgpr0102 ; CHECK-NEXT: {{ $}}103 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0104 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)105 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16106 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)107 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[BITCAST]], 16108 ; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[LSHR]], 16109 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SEXT_INREG]](s32), [[SEXT_INREG1]](s32)110 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)111 %0:_(<2 x s16>) = COPY $vgpr0112 %1:_(<2 x s32>) = G_SEXT %0113 $vgpr0_vgpr1 = COPY %1114...115 116---117name: test_sext_v3s16_to_v3s32118body: |119 bb.0:120 liveins: $vgpr0_vgpr1121 122 ; CHECK-LABEL: name: test_sext_v3s16_to_v3s32123 ; CHECK: liveins: $vgpr0_vgpr1124 ; CHECK-NEXT: {{ $}}125 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1126 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)127 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)128 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16129 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)130 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)131 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[BITCAST]], 16132 ; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[LSHR]], 16133 ; CHECK-NEXT: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[BITCAST1]], 16134 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[SEXT_INREG]](s32), [[SEXT_INREG1]](s32), [[SEXT_INREG2]](s32)135 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)136 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1137 %1:_(<3 x s16>) = G_EXTRACT %0, 0138 %2:_(<3 x s32>) = G_SEXT %1139 $vgpr0_vgpr1_vgpr2 = COPY %2140...141 142---143name: test_sext_v4s16_to_v4s32144body: |145 bb.0:146 liveins: $vgpr0_vgpr1147 148 ; CHECK-LABEL: name: test_sext_v4s16_to_v4s32149 ; CHECK: liveins: $vgpr0_vgpr1150 ; CHECK-NEXT: {{ $}}151 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1152 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)153 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)154 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16155 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)156 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)157 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)158 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[BITCAST]], 16159 ; CHECK-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[LSHR]], 16160 ; CHECK-NEXT: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[BITCAST1]], 16161 ; CHECK-NEXT: [[SEXT_INREG3:%[0-9]+]]:_(s32) = G_SEXT_INREG [[LSHR1]], 16162 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[SEXT_INREG]](s32), [[SEXT_INREG1]](s32), [[SEXT_INREG2]](s32), [[SEXT_INREG3]](s32)163 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)164 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1165 %1:_(<4 x s32>) = G_SEXT %0166 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1167...168 169---170name: test_sext_v2s32_to_v2s64171body: |172 bb.0:173 liveins: $vgpr0_vgpr1174 175 ; CHECK-LABEL: name: test_sext_v2s32_to_v2s64176 ; CHECK: liveins: $vgpr0_vgpr1177 ; CHECK-NEXT: {{ $}}178 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1179 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)180 ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[UV]](s32)181 ; CHECK-NEXT: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[UV1]](s32)182 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SEXT]](s64), [[SEXT1]](s64)183 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)184 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1185 %1:_(<2 x s64>) = G_SEXT %0186 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1187...188 189---190name: test_sext_v3s32_to_v3s64191body: |192 bb.0:193 liveins: $vgpr0_vgpr1_vgpr2194 195 ; CHECK-LABEL: name: test_sext_v3s32_to_v3s64196 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2197 ; CHECK-NEXT: {{ $}}198 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2199 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)200 ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[UV]](s32)201 ; CHECK-NEXT: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[UV1]](s32)202 ; CHECK-NEXT: [[SEXT2:%[0-9]+]]:_(s64) = G_SEXT [[UV2]](s32)203 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[SEXT]](s64), [[SEXT1]](s64), [[SEXT2]](s64)204 ; CHECK-NEXT: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s64>)205 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2206 %1:_(<3 x s64>) = G_SEXT %0207 S_NOP 0, implicit %1208 209...210 211---212name: test_sext_v4s32_to_v4s64213body: |214 bb.0:215 liveins: $vgpr0_vgpr1_vgpr2_vgpr3216 217 ; CHECK-LABEL: name: test_sext_v4s32_to_v4s64218 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3219 ; CHECK-NEXT: {{ $}}220 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3221 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)222 ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[UV]](s32)223 ; CHECK-NEXT: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[UV1]](s32)224 ; CHECK-NEXT: [[SEXT2:%[0-9]+]]:_(s64) = G_SEXT [[UV2]](s32)225 ; CHECK-NEXT: [[SEXT3:%[0-9]+]]:_(s64) = G_SEXT [[UV3]](s32)226 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[SEXT]](s64), [[SEXT1]](s64), [[SEXT2]](s64), [[SEXT3]](s64)227 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>)228 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3229 %1:_(<4 x s64>) = G_SEXT %0230 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1231...232 233---234name: test_sext_s8_to_s16235body: |236 bb.0:237 liveins: $vgpr0238 239 ; CHECK-LABEL: name: test_sext_s8_to_s16240 ; CHECK: liveins: $vgpr0241 ; CHECK-NEXT: {{ $}}242 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0243 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8244 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SEXT_INREG]](s32)245 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s16)246 %0:_(s32) = COPY $vgpr0247 %1:_(s8) = G_TRUNC %0248 %2:_(s16) = G_SEXT %1249 S_ENDPGM 0, implicit %2250...251 252---253name: test_sext_s8_to_s24254body: |255 bb.0:256 liveins: $vgpr0257 258 ; CHECK-LABEL: name: test_sext_s8_to_s24259 ; CHECK: liveins: $vgpr0260 ; CHECK-NEXT: {{ $}}261 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0262 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8263 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s24) = G_TRUNC [[SEXT_INREG]](s32)264 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s24)265 %0:_(s32) = COPY $vgpr0266 %1:_(s8) = G_TRUNC %0267 %2:_(s24) = G_SEXT %1268 S_ENDPGM 0, implicit %2269...270 271---272name: test_sext_s7_to_s32273body: |274 bb.0:275 liveins: $vgpr0276 277 ; CHECK-LABEL: name: test_sext_s7_to_s32278 ; CHECK: liveins: $vgpr0279 ; CHECK-NEXT: {{ $}}280 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0281 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 7282 ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s32)283 %0:_(s32) = COPY $vgpr0284 %1:_(s7) = G_TRUNC %0285 %2:_(s32) = G_SEXT %1286 S_ENDPGM 0, implicit %2287...288 289---290name: test_sext_s8_to_s32291body: |292 bb.0:293 liveins: $vgpr0294 295 ; CHECK-LABEL: name: test_sext_s8_to_s32296 ; CHECK: liveins: $vgpr0297 ; CHECK-NEXT: {{ $}}298 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0299 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY]], 8300 ; CHECK-NEXT: S_ENDPGM 0, implicit [[SEXT_INREG]](s32)301 %0:_(s32) = COPY $vgpr0302 %1:_(s8) = G_TRUNC %0303 %2:_(s32) = G_SEXT %1304 S_ENDPGM 0, implicit %2305...306 307---308name: test_sext_s32_to_s96309body: |310 bb.0:311 liveins: $vgpr0312 313 ; CHECK-LABEL: name: test_sext_s32_to_s96314 ; CHECK: liveins: $vgpr0315 ; CHECK-NEXT: {{ $}}316 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0317 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31318 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)319 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)320 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)321 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64)322 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[MV2]](s192)323 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s96)324 %0:_(s32) = COPY $vgpr0325 %1:_(s96) = G_SEXT %0326 S_ENDPGM 0, implicit %1327...328 329---330name: test_sext_s32_to_s128331body: |332 bb.0:333 liveins: $vgpr0334 335 ; CHECK-LABEL: name: test_sext_s32_to_s128336 ; CHECK: liveins: $vgpr0337 ; CHECK-NEXT: {{ $}}338 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0339 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31340 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)341 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)342 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)343 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64)344 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV2]](s128)345 %0:_(s32) = COPY $vgpr0346 %1:_(s128) = G_SEXT %0347 S_ENDPGM 0, implicit %1348...349 350---351name: test_sext_s32_to_s160352body: |353 bb.0:354 liveins: $vgpr0355 356 ; CHECK-LABEL: name: test_sext_s32_to_s160357 ; CHECK: liveins: $vgpr0358 ; CHECK-NEXT: {{ $}}359 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0360 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31361 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)362 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)363 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)364 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s320) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64)365 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[MV2]](s320)366 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s160)367 %0:_(s32) = COPY $vgpr0368 %1:_(s160) = G_SEXT %0369 S_ENDPGM 0, implicit %1370...371 372---373name: test_sext_s32_to_s192374body: |375 bb.0:376 liveins: $vgpr0377 378 ; CHECK-LABEL: name: test_sext_s32_to_s192379 ; CHECK: liveins: $vgpr0380 ; CHECK-NEXT: {{ $}}381 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0382 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31383 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)384 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)385 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)386 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64)387 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV2]](s192)388 %0:_(s32) = COPY $vgpr0389 %1:_(s192) = G_SEXT %0390 S_ENDPGM 0, implicit %1391...392 393---394name: test_sext_s32_to_s224395body: |396 bb.0:397 liveins: $vgpr0398 399 ; CHECK-LABEL: name: test_sext_s32_to_s224400 ; CHECK: liveins: $vgpr0401 ; CHECK-NEXT: {{ $}}402 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0403 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31404 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)405 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)406 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)407 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64)408 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[MV2]](s448)409 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s224)410 %0:_(s32) = COPY $vgpr0411 %1:_(s224) = G_SEXT %0412 S_ENDPGM 0, implicit %1413...414 415---416name: test_sext_s32_to_s256417body: |418 bb.0:419 liveins: $vgpr0420 421 ; CHECK-LABEL: name: test_sext_s32_to_s256422 ; CHECK: liveins: $vgpr0423 ; CHECK-NEXT: {{ $}}424 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0425 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31426 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)427 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)428 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)429 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64)430 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV2]](s256)431 %0:_(s32) = COPY $vgpr0432 %1:_(s256) = G_SEXT %0433 S_ENDPGM 0, implicit %1434...435 436---437name: test_sext_s32_to_s512438body: |439 bb.0:440 liveins: $vgpr0441 442 ; CHECK-LABEL: name: test_sext_s32_to_s512443 ; CHECK: liveins: $vgpr0444 ; CHECK-NEXT: {{ $}}445 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0446 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31447 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)448 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)449 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)450 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64)451 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV2]](s512)452 %0:_(s32) = COPY $vgpr0453 %1:_(s512) = G_SEXT %0454 S_ENDPGM 0, implicit %1455...456 457---458name: test_sext_s32_to_s992459body: |460 bb.0:461 liveins: $vgpr0462 463 ; CHECK-LABEL: name: test_sext_s32_to_s992464 ; CHECK: liveins: $vgpr0465 ; CHECK-NEXT: {{ $}}466 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0467 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31468 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)469 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)470 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)471 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64)472 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[MV2]](s448)473 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s224)474 %0:_(s32) = COPY $vgpr0475 %1:_(s224) = G_SEXT %0476 S_ENDPGM 0, implicit %1477...478 479---480 481name: test_sext_s32_to_s1024482body: |483 bb.0:484 liveins: $vgpr0485 486 ; CHECK-LABEL: name: test_sext_s32_to_s1024487 ; CHECK: liveins: $vgpr0488 ; CHECK-NEXT: {{ $}}489 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0490 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31491 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)492 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[ASHR]](s32)493 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR]](s32), [[ASHR]](s32)494 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64)495 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV2]](s1024)496 %0:_(s32) = COPY $vgpr0497 %1:_(s1024) = G_SEXT %0498 S_ENDPGM 0, implicit %1499...500 501---502name: test_sext_s64_to_s128503body: |504 bb.0:505 liveins: $vgpr0_vgpr1506 507 ; CHECK-LABEL: name: test_sext_s64_to_s128508 ; CHECK: liveins: $vgpr0_vgpr1509 ; CHECK-NEXT: {{ $}}510 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1511 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 63512 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[COPY]], [[C]](s32)513 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[ASHR]](s64)514 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s128)515 %0:_(s64) = COPY $vgpr0_vgpr1516 %1:_(s128) = G_SEXT %0517 S_ENDPGM 0, implicit %1518...519 520---521name: test_sext_s64_to_s192522body: |523 bb.0:524 liveins: $vgpr0_vgpr1525 526 ; CHECK-LABEL: name: test_sext_s64_to_s192527 ; CHECK: liveins: $vgpr0_vgpr1528 ; CHECK-NEXT: {{ $}}529 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1530 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 63531 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[COPY]], [[C]](s32)532 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[COPY]](s64), [[ASHR]](s64), [[ASHR]](s64)533 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s192)534 %0:_(s64) = COPY $vgpr0_vgpr1535 %1:_(s192) = G_SEXT %0536 S_ENDPGM 0, implicit %1537...538 539---540name: test_sext_s64_to_s256541body: |542 bb.0:543 liveins: $vgpr0_vgpr1544 545 ; CHECK-LABEL: name: test_sext_s64_to_s256546 ; CHECK: liveins: $vgpr0_vgpr1547 ; CHECK-NEXT: {{ $}}548 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1549 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 63550 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[COPY]], [[C]](s32)551 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64)552 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s256)553 %0:_(s64) = COPY $vgpr0_vgpr1554 %1:_(s256) = G_SEXT %0555 S_ENDPGM 0, implicit %1556...557 558---559name: test_sext_s64_to_s512560body: |561 bb.0:562 liveins: $vgpr0_vgpr1563 564 ; CHECK-LABEL: name: test_sext_s64_to_s512565 ; CHECK: liveins: $vgpr0_vgpr1566 ; CHECK-NEXT: {{ $}}567 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1568 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 63569 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[COPY]], [[C]](s32)570 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64)571 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s512)572 %0:_(s64) = COPY $vgpr0_vgpr1573 %1:_(s512) = G_SEXT %0574 S_ENDPGM 0, implicit %1575...576 577---578name: test_sext_s64_to_s1024579body: |580 bb.0:581 liveins: $vgpr0_vgpr1582 583 ; CHECK-LABEL: name: test_sext_s64_to_s1024584 ; CHECK: liveins: $vgpr0_vgpr1585 ; CHECK-NEXT: {{ $}}586 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1587 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 63588 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[COPY]], [[C]](s32)589 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64), [[ASHR]](s64)590 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s1024)591 %0:_(s64) = COPY $vgpr0_vgpr1592 %1:_(s1024) = G_SEXT %0593 S_ENDPGM 0, implicit %1594...595 596---597name: test_sext_s96_to_s128598body: |599 bb.0:600 liveins: $vgpr0_vgpr1_vgpr2601 602 ; CHECK-LABEL: name: test_sext_s96_to_s128603 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2604 ; CHECK-NEXT: {{ $}}605 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2606 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s96)607 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31608 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[UV2]], [[C]](s32)609 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32)610 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV2]](s32), [[ASHR]](s32)611 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64)612 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV2]](s128)613 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2614 %1:_(s128) = G_SEXT %0615 S_ENDPGM 0, implicit %1616...617 618---619name: test_sext_s128_to_s256620body: |621 bb.0:622 liveins: $vgpr0_vgpr1_vgpr2_vgpr3623 624 ; CHECK-LABEL: name: test_sext_s128_to_s256625 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3626 ; CHECK-NEXT: {{ $}}627 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3628 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)629 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 63630 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[C]](s32)631 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[UV]](s64), [[UV1]](s64), [[ASHR]](s64), [[ASHR]](s64)632 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s256)633 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3634 %1:_(s256) = G_SEXT %0635 S_ENDPGM 0, implicit %1636...637 638---639name: test_sext_s32_to_s88640body: |641 bb.0:642 liveins: $vgpr0643 644 ; CHECK-LABEL: name: test_sext_s32_to_s88645 ; CHECK: liveins: $vgpr0646 ; CHECK-NEXT: {{ $}}647 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0648 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8649 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)650 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16651 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C1]](s32)652 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24653 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s32)654 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[LSHR2]], 8655 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SEXT_INREG]](s32)656 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 7657 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s16) = G_ASHR [[TRUNC]], [[C3]](s16)658 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)659 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 255660 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C4]]661 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)662 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C4]]663 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 8664 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C5]](s16)665 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]]666 ; CHECK-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32)667 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C4]]668 ; CHECK-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32)669 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C4]]670 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C5]](s16)671 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]]672 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]673 ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]674 ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C5]](s16)675 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]]676 ; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]677 ; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]678 ; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C5]](s16)679 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]]680 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16)681 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16)682 ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C1]](s32)683 ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL4]]684 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16)685 ; CHECK-NEXT: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16)686 ; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C1]](s32)687 ; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]]688 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32)689 ; CHECK-NEXT: [[AND8:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]690 ; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]691 ; CHECK-NEXT: [[SHL6:%[0-9]+]]:_(s16) = G_SHL [[AND9]], [[C5]](s16)692 ; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s16) = G_OR [[AND8]], [[SHL6]]693 ; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]694 ; CHECK-NEXT: [[AND11:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]695 ; CHECK-NEXT: [[SHL7:%[0-9]+]]:_(s16) = G_SHL [[AND11]], [[C5]](s16)696 ; CHECK-NEXT: [[OR7:%[0-9]+]]:_(s16) = G_OR [[AND10]], [[SHL7]]697 ; CHECK-NEXT: [[AND12:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]698 ; CHECK-NEXT: [[AND13:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]699 ; CHECK-NEXT: [[SHL8:%[0-9]+]]:_(s16) = G_SHL [[AND13]], [[C5]](s16)700 ; CHECK-NEXT: [[OR8:%[0-9]+]]:_(s16) = G_OR [[AND12]], [[SHL8]]701 ; CHECK-NEXT: [[AND14:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]702 ; CHECK-NEXT: [[AND15:%[0-9]+]]:_(s16) = G_AND [[ASHR]], [[C4]]703 ; CHECK-NEXT: [[SHL9:%[0-9]+]]:_(s16) = G_SHL [[AND15]], [[C5]](s16)704 ; CHECK-NEXT: [[OR9:%[0-9]+]]:_(s16) = G_OR [[AND14]], [[SHL9]]705 ; CHECK-NEXT: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[OR6]](s16)706 ; CHECK-NEXT: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[OR7]](s16)707 ; CHECK-NEXT: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[ZEXT5]], [[C1]](s32)708 ; CHECK-NEXT: [[OR10:%[0-9]+]]:_(s32) = G_OR [[ZEXT4]], [[SHL10]]709 ; CHECK-NEXT: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[OR8]](s16)710 ; CHECK-NEXT: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[OR9]](s16)711 ; CHECK-NEXT: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[ZEXT7]], [[C1]](s32)712 ; CHECK-NEXT: [[OR11:%[0-9]+]]:_(s32) = G_OR [[ZEXT6]], [[SHL11]]713 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR10]](s32), [[OR11]](s32)714 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s704) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64), [[MV1]](s64)715 ; CHECK-NEXT: [[TRUNC5:%[0-9]+]]:_(s88) = G_TRUNC [[MV2]](s704)716 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC5]](s88)717 %0:_(s32) = COPY $vgpr0718 %1:_(s88) = G_SEXT %0719 S_ENDPGM 0, implicit %1720...721 722# The instruction count blows up for this and takes too long to723# generate checks. This fails on a G_MERGE_VALUES to s4160724#725# ---726# name: test_sext_s32_to_s65727# body: |728# bb.0:729# liveins: $vgpr0730 731# %0:_(s32) = COPY $vgpr0732# %1:_(s65) = G_SEXT %0733# S_ENDPGM 0, implicit %1734# ...735 736 737# This requires fixing a bug in merge/unmerge legalization.738# ---739# name: test_sext_s2_to_s112740# body: |741# bb.0:742# liveins: $vgpr0743 744# %0:_(s32) = COPY $vgpr0745# %1:_(s2) = G_TRUNC %0746# %2:_(s112) = G_SEXT %1747# S_ENDPGM 0, implicit %2748# ...749 750---751name: test_sext_s112_to_s128752body: |753 bb.0:754 liveins: $vgpr0_vgpr1_vgpr2_vgpr3755 ; CHECK-LABEL: name: test_sext_s112_to_s128756 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3757 ; CHECK-NEXT: {{ $}}758 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3759 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)760 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[UV1]], 48761 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[UV]](s64), [[SEXT_INREG]](s64)762 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s128)763 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3764 %1:_(s112) = G_TRUNC %0765 %2:_(s128) = G_SEXT %1766 S_ENDPGM 0, implicit %2767...768