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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -o - %s | FileCheck %s -check-prefix=SI3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -o - %s | FileCheck %s -check-prefix=VI4---5name: test_sextload_flat_i32_i86body: |7 bb.0:8 liveins: $vgpr0_vgpr19 10 ; SI-LABEL: name: test_sextload_flat_i32_i811 ; SI: liveins: $vgpr0_vgpr112 ; SI-NEXT: {{ $}}13 ; SI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr114 ; SI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))15 ; SI-NEXT: $vgpr0 = COPY [[SEXTLOAD]](s32)16 ; VI-LABEL: name: test_sextload_flat_i32_i817 ; VI: liveins: $vgpr0_vgpr118 ; VI-NEXT: {{ $}}19 ; VI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr120 ; VI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))21 ; VI-NEXT: $vgpr0 = COPY [[SEXTLOAD]](s32)22 %0:_(p0) = COPY $vgpr0_vgpr123 %1:_(s32) = G_SEXTLOAD %0 :: (load (s8), addrspace 0)24 $vgpr0 = COPY %125...26---27name: test_sextload_flat_i32_i1628body: |29 bb.0:30 liveins: $vgpr0_vgpr131 32 ; SI-LABEL: name: test_sextload_flat_i32_i1633 ; SI: liveins: $vgpr0_vgpr134 ; SI-NEXT: {{ $}}35 ; SI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr136 ; SI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s16))37 ; SI-NEXT: $vgpr0 = COPY [[SEXTLOAD]](s32)38 ; VI-LABEL: name: test_sextload_flat_i32_i1639 ; VI: liveins: $vgpr0_vgpr140 ; VI-NEXT: {{ $}}41 ; VI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr142 ; VI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s16))43 ; VI-NEXT: $vgpr0 = COPY [[SEXTLOAD]](s32)44 %0:_(p0) = COPY $vgpr0_vgpr145 %1:_(s32) = G_SEXTLOAD %0 :: (load (s16), addrspace 0)46 $vgpr0 = COPY %147...48---49name: test_sextload_flat_i31_i850body: |51 bb.0:52 liveins: $vgpr0_vgpr153 54 ; SI-LABEL: name: test_sextload_flat_i31_i855 ; SI: liveins: $vgpr0_vgpr156 ; SI-NEXT: {{ $}}57 ; SI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr158 ; SI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))59 ; SI-NEXT: $vgpr0 = COPY [[SEXTLOAD]](s32)60 ; VI-LABEL: name: test_sextload_flat_i31_i861 ; VI: liveins: $vgpr0_vgpr162 ; VI-NEXT: {{ $}}63 ; VI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr164 ; VI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))65 ; VI-NEXT: $vgpr0 = COPY [[SEXTLOAD]](s32)66 %0:_(p0) = COPY $vgpr0_vgpr167 %1:_(s31) = G_SEXTLOAD %0 :: (load (s8), addrspace 0)68 %2:_(s32) = G_ANYEXT %169 $vgpr0 = COPY %270...71---72name: test_sextload_flat_i64_i873body: |74 bb.0:75 liveins: $vgpr0_vgpr176 77 ; SI-LABEL: name: test_sextload_flat_i64_i878 ; SI: liveins: $vgpr0_vgpr179 ; SI-NEXT: {{ $}}80 ; SI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr181 ; SI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))82 ; SI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXTLOAD]](s32)83 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)84 ; VI-LABEL: name: test_sextload_flat_i64_i885 ; VI: liveins: $vgpr0_vgpr186 ; VI-NEXT: {{ $}}87 ; VI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr188 ; VI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8))89 ; VI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXTLOAD]](s32)90 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)91 %0:_(p0) = COPY $vgpr0_vgpr192 %1:_(s64) = G_SEXTLOAD %0 :: (load (s8), addrspace 0)93 $vgpr0_vgpr1 = COPY %194...95---96name: test_sextload_flat_i64_i1697body: |98 bb.0:99 liveins: $vgpr0_vgpr1100 101 ; SI-LABEL: name: test_sextload_flat_i64_i16102 ; SI: liveins: $vgpr0_vgpr1103 ; SI-NEXT: {{ $}}104 ; SI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1105 ; SI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s16))106 ; SI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXTLOAD]](s32)107 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)108 ; VI-LABEL: name: test_sextload_flat_i64_i16109 ; VI: liveins: $vgpr0_vgpr1110 ; VI-NEXT: {{ $}}111 ; VI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1112 ; VI-NEXT: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s16))113 ; VI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXTLOAD]](s32)114 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)115 %0:_(p0) = COPY $vgpr0_vgpr1116 %1:_(s64) = G_SEXTLOAD %0 :: (load (s16), addrspace 0)117 $vgpr0_vgpr1 = COPY %1118...119---120name: test_sextload_flat_i64_i32121body: |122 bb.0:123 liveins: $vgpr0_vgpr1124 125 ; SI-LABEL: name: test_sextload_flat_i64_i32126 ; SI: liveins: $vgpr0_vgpr1127 ; SI-NEXT: {{ $}}128 ; SI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1129 ; SI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))130 ; SI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[LOAD]](s32)131 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)132 ; VI-LABEL: name: test_sextload_flat_i64_i32133 ; VI: liveins: $vgpr0_vgpr1134 ; VI-NEXT: {{ $}}135 ; VI-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1136 ; VI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))137 ; VI-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[LOAD]](s32)138 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[SEXT]](s64)139 %0:_(p0) = COPY $vgpr0_vgpr1140 %1:_(s64) = G_SEXTLOAD %0 :: (load (s32), addrspace 0)141 $vgpr0_vgpr1 = COPY %1142...143