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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s4# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9 %s5# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9 %s6# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -mattr=-real-true16 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=GFX9 %s7# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1250 -mattr=-real-true16 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=GFX1250 %s8 9---10name: test_umin_s3211body: |12 bb.0:13 liveins: $vgpr0, $vgpr114 15 ; SI-LABEL: name: test_umin_s3216 ; SI: liveins: $vgpr0, $vgpr117 ; SI-NEXT: {{ $}}18 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr019 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr120 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[COPY]], [[COPY1]]21 ; SI-NEXT: $vgpr0 = COPY [[UMIN]](s32)22 ;23 ; VI-LABEL: name: test_umin_s3224 ; VI: liveins: $vgpr0, $vgpr125 ; VI-NEXT: {{ $}}26 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr027 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr128 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[COPY]], [[COPY1]]29 ; VI-NEXT: $vgpr0 = COPY [[UMIN]](s32)30 ;31 ; GFX9-LABEL: name: test_umin_s3232 ; GFX9: liveins: $vgpr0, $vgpr133 ; GFX9-NEXT: {{ $}}34 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr035 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr136 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[COPY]], [[COPY1]]37 ; GFX9-NEXT: $vgpr0 = COPY [[UMIN]](s32)38 ;39 ; GFX1250-LABEL: name: test_umin_s3240 ; GFX1250: liveins: $vgpr0, $vgpr141 ; GFX1250-NEXT: {{ $}}42 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr043 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr144 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[COPY]], [[COPY1]]45 ; GFX1250-NEXT: $vgpr0 = COPY [[UMIN]](s32)46 %0:_(s32) = COPY $vgpr047 %1:_(s32) = COPY $vgpr148 %2:_(s32) = G_UMIN %0, %149 $vgpr0 = COPY %250...51 52---53name: test_umin_s6454body: |55 bb.0:56 liveins: $vgpr0_vgpr1, $vgpr2_vgpr357 58 ; SI-LABEL: name: test_umin_s6459 ; SI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr360 ; SI-NEXT: {{ $}}61 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr162 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr363 ; SI-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY]](s64), [[COPY1]]64 ; SI-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]65 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[SELECT]](s64)66 ;67 ; VI-LABEL: name: test_umin_s6468 ; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr369 ; VI-NEXT: {{ $}}70 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr171 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr372 ; VI-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY]](s64), [[COPY1]]73 ; VI-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]74 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[SELECT]](s64)75 ;76 ; GFX9-LABEL: name: test_umin_s6477 ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr378 ; GFX9-NEXT: {{ $}}79 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr180 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr381 ; GFX9-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY]](s64), [[COPY1]]82 ; GFX9-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]83 ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[SELECT]](s64)84 ;85 ; GFX1250-LABEL: name: test_umin_s6486 ; GFX1250: liveins: $vgpr0_vgpr1, $vgpr2_vgpr387 ; GFX1250-NEXT: {{ $}}88 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr189 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr390 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[COPY]], [[COPY1]]91 ; GFX1250-NEXT: $vgpr0_vgpr1 = COPY [[UMIN]](s64)92 %0:_(s64) = COPY $vgpr0_vgpr193 %1:_(s64) = COPY $vgpr2_vgpr394 %2:_(s64) = G_UMIN %0, %195 $vgpr0_vgpr1 = COPY %296...97 98---99name: test_umin_s16100body: |101 bb.0:102 liveins: $vgpr0, $vgpr1103 104 ; SI-LABEL: name: test_umin_s16105 ; SI: liveins: $vgpr0, $vgpr1106 ; SI-NEXT: {{ $}}107 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0108 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1109 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535110 ; SI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]111 ; SI-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]112 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]113 ; SI-NEXT: $vgpr0 = COPY [[UMIN]](s32)114 ;115 ; VI-LABEL: name: test_umin_s16116 ; VI: liveins: $vgpr0, $vgpr1117 ; VI-NEXT: {{ $}}118 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0119 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1120 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)121 ; VI-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)122 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC]], [[TRUNC1]]123 ; VI-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN]](s16)124 ; VI-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)125 ;126 ; GFX9-LABEL: name: test_umin_s16127 ; GFX9: liveins: $vgpr0, $vgpr1128 ; GFX9-NEXT: {{ $}}129 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0130 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1131 ; GFX9-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)132 ; GFX9-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)133 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC]], [[TRUNC1]]134 ; GFX9-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN]](s16)135 ; GFX9-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)136 ;137 ; GFX1250-LABEL: name: test_umin_s16138 ; GFX1250: liveins: $vgpr0, $vgpr1139 ; GFX1250-NEXT: {{ $}}140 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0141 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1142 ; GFX1250-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)143 ; GFX1250-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)144 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC]], [[TRUNC1]]145 ; GFX1250-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN]](s16)146 ; GFX1250-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)147 %0:_(s32) = COPY $vgpr0148 %1:_(s32) = COPY $vgpr1149 %2:_(s16) = G_TRUNC %0150 %3:_(s16) = G_TRUNC %1151 %4:_(s16) = G_UMIN %2, %3152 %5:_(s32) = G_ANYEXT %4153 $vgpr0 = COPY %5154...155 156---157name: test_umin_s8158body: |159 bb.0:160 liveins: $vgpr0, $vgpr1161 162 ; SI-LABEL: name: test_umin_s8163 ; SI: liveins: $vgpr0, $vgpr1164 ; SI-NEXT: {{ $}}165 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0166 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1167 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255168 ; SI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]169 ; SI-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]170 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]171 ; SI-NEXT: $vgpr0 = COPY [[UMIN]](s32)172 ;173 ; VI-LABEL: name: test_umin_s8174 ; VI: liveins: $vgpr0, $vgpr1175 ; VI-NEXT: {{ $}}176 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0177 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1178 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)179 ; VI-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255180 ; VI-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]181 ; VI-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)182 ; VI-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C]]183 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[AND]], [[AND1]]184 ; VI-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN]](s16)185 ; VI-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)186 ;187 ; GFX9-LABEL: name: test_umin_s8188 ; GFX9: liveins: $vgpr0, $vgpr1189 ; GFX9-NEXT: {{ $}}190 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0191 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1192 ; GFX9-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)193 ; GFX9-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255194 ; GFX9-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]195 ; GFX9-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)196 ; GFX9-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C]]197 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[AND]], [[AND1]]198 ; GFX9-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN]](s16)199 ; GFX9-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)200 ;201 ; GFX1250-LABEL: name: test_umin_s8202 ; GFX1250: liveins: $vgpr0, $vgpr1203 ; GFX1250-NEXT: {{ $}}204 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0205 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1206 ; GFX1250-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)207 ; GFX1250-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255208 ; GFX1250-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]209 ; GFX1250-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)210 ; GFX1250-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C]]211 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[AND]], [[AND1]]212 ; GFX1250-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN]](s16)213 ; GFX1250-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)214 %0:_(s32) = COPY $vgpr0215 %1:_(s32) = COPY $vgpr1216 %2:_(s8) = G_TRUNC %0217 %3:_(s8) = G_TRUNC %1218 %4:_(s8) = G_UMIN %2, %3219 %5:_(s32) = G_ANYEXT %4220 $vgpr0 = COPY %5221...222 223---224name: test_umin_s17225body: |226 bb.0:227 liveins: $vgpr0, $vgpr1228 229 ; SI-LABEL: name: test_umin_s17230 ; SI: liveins: $vgpr0, $vgpr1231 ; SI-NEXT: {{ $}}232 ; SI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0233 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1234 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 131071235 ; SI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]236 ; SI-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]237 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]238 ; SI-NEXT: $vgpr0 = COPY [[UMIN]](s32)239 ;240 ; VI-LABEL: name: test_umin_s17241 ; VI: liveins: $vgpr0, $vgpr1242 ; VI-NEXT: {{ $}}243 ; VI-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0244 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1245 ; VI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 131071246 ; VI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]247 ; VI-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]248 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]249 ; VI-NEXT: $vgpr0 = COPY [[UMIN]](s32)250 ;251 ; GFX9-LABEL: name: test_umin_s17252 ; GFX9: liveins: $vgpr0, $vgpr1253 ; GFX9-NEXT: {{ $}}254 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0255 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1256 ; GFX9-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 131071257 ; GFX9-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]258 ; GFX9-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]259 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]260 ; GFX9-NEXT: $vgpr0 = COPY [[UMIN]](s32)261 ;262 ; GFX1250-LABEL: name: test_umin_s17263 ; GFX1250: liveins: $vgpr0, $vgpr1264 ; GFX1250-NEXT: {{ $}}265 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0266 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1267 ; GFX1250-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 131071268 ; GFX1250-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]269 ; GFX1250-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]270 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]271 ; GFX1250-NEXT: $vgpr0 = COPY [[UMIN]](s32)272 %0:_(s32) = COPY $vgpr0273 %1:_(s32) = COPY $vgpr1274 %2:_(s17) = G_TRUNC %0275 %3:_(s17) = G_TRUNC %1276 %4:_(s17) = G_UMIN %2, %3277 %5:_(s32) = G_ANYEXT %4278 $vgpr0 = COPY %5279...280 281---282name: test_umin_v2s32283body: |284 bb.0:285 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3286 287 ; SI-LABEL: name: test_umin_v2s32288 ; SI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3289 ; SI-NEXT: {{ $}}290 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1291 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3292 ; SI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)293 ; SI-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)294 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[UV]], [[UV2]]295 ; SI-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[UV1]], [[UV3]]296 ; SI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32)297 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)298 ;299 ; VI-LABEL: name: test_umin_v2s32300 ; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3301 ; VI-NEXT: {{ $}}302 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1303 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3304 ; VI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)305 ; VI-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)306 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[UV]], [[UV2]]307 ; VI-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[UV1]], [[UV3]]308 ; VI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32)309 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)310 ;311 ; GFX9-LABEL: name: test_umin_v2s32312 ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3313 ; GFX9-NEXT: {{ $}}314 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1315 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3316 ; GFX9-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)317 ; GFX9-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)318 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[UV]], [[UV2]]319 ; GFX9-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[UV1]], [[UV3]]320 ; GFX9-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32)321 ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)322 ;323 ; GFX1250-LABEL: name: test_umin_v2s32324 ; GFX1250: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3325 ; GFX1250-NEXT: {{ $}}326 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1327 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3328 ; GFX1250-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)329 ; GFX1250-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)330 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[UV]], [[UV2]]331 ; GFX1250-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[UV1]], [[UV3]]332 ; GFX1250-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32)333 ; GFX1250-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)334 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1335 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3336 %2:_(<2 x s32>) = G_UMIN %0, %1337 $vgpr0_vgpr1 = COPY %2338...339 340---341name: test_umin_v3s32342body: |343 bb.0:344 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5345 346 ; SI-LABEL: name: test_umin_v3s32347 ; SI: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5348 ; SI-NEXT: {{ $}}349 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2350 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5351 ; SI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)352 ; SI-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)353 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[UV]], [[UV3]]354 ; SI-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[UV1]], [[UV4]]355 ; SI-NEXT: [[UMIN2:%[0-9]+]]:_(s32) = G_UMIN [[UV2]], [[UV5]]356 ; SI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32), [[UMIN2]](s32)357 ; SI-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)358 ;359 ; VI-LABEL: name: test_umin_v3s32360 ; VI: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5361 ; VI-NEXT: {{ $}}362 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2363 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5364 ; VI-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)365 ; VI-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)366 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[UV]], [[UV3]]367 ; VI-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[UV1]], [[UV4]]368 ; VI-NEXT: [[UMIN2:%[0-9]+]]:_(s32) = G_UMIN [[UV2]], [[UV5]]369 ; VI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32), [[UMIN2]](s32)370 ; VI-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)371 ;372 ; GFX9-LABEL: name: test_umin_v3s32373 ; GFX9: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5374 ; GFX9-NEXT: {{ $}}375 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2376 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5377 ; GFX9-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)378 ; GFX9-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)379 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[UV]], [[UV3]]380 ; GFX9-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[UV1]], [[UV4]]381 ; GFX9-NEXT: [[UMIN2:%[0-9]+]]:_(s32) = G_UMIN [[UV2]], [[UV5]]382 ; GFX9-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32), [[UMIN2]](s32)383 ; GFX9-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)384 ;385 ; GFX1250-LABEL: name: test_umin_v3s32386 ; GFX1250: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5387 ; GFX1250-NEXT: {{ $}}388 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2389 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5390 ; GFX1250-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)391 ; GFX1250-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)392 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[UV]], [[UV3]]393 ; GFX1250-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[UV1]], [[UV4]]394 ; GFX1250-NEXT: [[UMIN2:%[0-9]+]]:_(s32) = G_UMIN [[UV2]], [[UV5]]395 ; GFX1250-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32), [[UMIN2]](s32)396 ; GFX1250-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)397 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2398 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5399 %2:_(<3 x s32>) = G_UMIN %0, %1400 $vgpr0_vgpr1_vgpr2 = COPY %2401...402 403---404name: test_umin_v2s16405body: |406 bb.0:407 liveins: $vgpr0, $vgpr1408 409 ; SI-LABEL: name: test_umin_v2s16410 ; SI: liveins: $vgpr0, $vgpr1411 ; SI-NEXT: {{ $}}412 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0413 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1414 ; SI-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)415 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16416 ; SI-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)417 ; SI-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>)418 ; SI-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)419 ; SI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535420 ; SI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]421 ; SI-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]]422 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]423 ; SI-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[LSHR]], [[LSHR1]]424 ; SI-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[UMIN1]], [[C]](s32)425 ; SI-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[UMIN]], [[SHL]]426 ; SI-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)427 ; SI-NEXT: $vgpr0 = COPY [[BITCAST2]](<2 x s16>)428 ;429 ; VI-LABEL: name: test_umin_v2s16430 ; VI: liveins: $vgpr0, $vgpr1431 ; VI-NEXT: {{ $}}432 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0433 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1434 ; VI-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)435 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)436 ; VI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16437 ; VI-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)438 ; VI-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)439 ; VI-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>)440 ; VI-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32)441 ; VI-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)442 ; VI-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32)443 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC]], [[TRUNC2]]444 ; VI-NEXT: [[UMIN1:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC1]], [[TRUNC3]]445 ; VI-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[UMIN]](s16)446 ; VI-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[UMIN1]](s16)447 ; VI-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C]](s32)448 ; VI-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL]]449 ; VI-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)450 ; VI-NEXT: $vgpr0 = COPY [[BITCAST2]](<2 x s16>)451 ;452 ; GFX9-LABEL: name: test_umin_v2s16453 ; GFX9: liveins: $vgpr0, $vgpr1454 ; GFX9-NEXT: {{ $}}455 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0456 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1457 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(<2 x s16>) = G_UMIN [[COPY]], [[COPY1]]458 ; GFX9-NEXT: $vgpr0 = COPY [[UMIN]](<2 x s16>)459 ;460 ; GFX1250-LABEL: name: test_umin_v2s16461 ; GFX1250: liveins: $vgpr0, $vgpr1462 ; GFX1250-NEXT: {{ $}}463 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0464 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1465 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(<2 x s16>) = G_UMIN [[COPY]], [[COPY1]]466 ; GFX1250-NEXT: $vgpr0 = COPY [[UMIN]](<2 x s16>)467 %0:_(<2 x s16>) = COPY $vgpr0468 %1:_(<2 x s16>) = COPY $vgpr1469 %2:_(<2 x s16>) = G_UMIN %0, %1470 $vgpr0 = COPY %2471...472 473---474name: test_umin_v3s16475body: |476 bb.0:477 liveins: $vgpr0, $vgpr1478 479 ; SI-LABEL: name: test_umin_v3s16480 ; SI: liveins: $vgpr0, $vgpr1481 ; SI-NEXT: {{ $}}482 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0483 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[C]], [[C]]484 ; SI-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C]], [[C]]485 ; SI-NEXT: [[UMIN2:%[0-9]+]]:_(s32) = G_UMIN [[C]], [[C]]486 ; SI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UMIN]](s32), [[UMIN1]](s32), [[UMIN2]](s32)487 ; SI-NEXT: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s32>)488 ;489 ; VI-LABEL: name: test_umin_v3s16490 ; VI: liveins: $vgpr0, $vgpr1491 ; VI-NEXT: {{ $}}492 ; VI-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF493 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[DEF]], [[DEF]]494 ; VI-NEXT: [[UMIN1:%[0-9]+]]:_(s16) = G_UMIN [[DEF]], [[DEF]]495 ; VI-NEXT: [[UMIN2:%[0-9]+]]:_(s16) = G_UMIN [[DEF]], [[DEF]]496 ; VI-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN]](s16)497 ; VI-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN1]](s16)498 ; VI-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN2]](s16)499 ; VI-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32)500 ; VI-NEXT: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s32>)501 ;502 ; GFX9-LABEL: name: test_umin_v3s16503 ; GFX9: liveins: $vgpr0, $vgpr1504 ; GFX9-NEXT: {{ $}}505 ; GFX9-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF506 ; GFX9-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[DEF]](s16), [[DEF]](s16)507 ; GFX9-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[DEF]](s16), [[DEF]](s16)508 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(<2 x s16>) = G_UMIN [[BUILD_VECTOR]], [[BUILD_VECTOR1]]509 ; GFX9-NEXT: [[UMIN1:%[0-9]+]]:_(s16) = G_UMIN [[DEF]], [[DEF]]510 ; GFX9-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UMIN]](<2 x s16>)511 ; GFX9-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16512 ; GFX9-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)513 ; GFX9-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN1]](s16)514 ; GFX9-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[BITCAST]](s32), [[LSHR]](s32), [[ANYEXT]](s32)515 ; GFX9-NEXT: S_NOP 0, implicit [[BUILD_VECTOR2]](<3 x s32>)516 ;517 ; GFX1250-LABEL: name: test_umin_v3s16518 ; GFX1250: liveins: $vgpr0, $vgpr1519 ; GFX1250-NEXT: {{ $}}520 ; GFX1250-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF521 ; GFX1250-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[DEF]](s16), [[DEF]](s16)522 ; GFX1250-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[DEF]](s16), [[DEF]](s16)523 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(<2 x s16>) = G_UMIN [[BUILD_VECTOR]], [[BUILD_VECTOR1]]524 ; GFX1250-NEXT: [[UMIN1:%[0-9]+]]:_(s16) = G_UMIN [[DEF]], [[DEF]]525 ; GFX1250-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UMIN]](<2 x s16>)526 ; GFX1250-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16527 ; GFX1250-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)528 ; GFX1250-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UMIN1]](s16)529 ; GFX1250-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[BITCAST]](s32), [[LSHR]](s32), [[ANYEXT]](s32)530 ; GFX1250-NEXT: S_NOP 0, implicit [[BUILD_VECTOR2]](<3 x s32>)531 %0:_(<3 x s16>) = G_IMPLICIT_DEF532 %1:_(<3 x s16>) = G_IMPLICIT_DEF533 %2:_(<3 x s16>) = G_UMIN %0, %1534 %3:_(<3 x s32>) = G_ANYEXT %2535 S_NOP 0, implicit %3536...537 538---539name: test_umin_v4s16540body: |541 bb.0:542 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3543 544 ; SI-LABEL: name: test_umin_v4s16545 ; SI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3546 ; SI-NEXT: {{ $}}547 ; SI-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1548 ; SI-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3549 ; SI-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)550 ; SI-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)551 ; SI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16552 ; SI-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)553 ; SI-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)554 ; SI-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)555 ; SI-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)556 ; SI-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>)557 ; SI-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32)558 ; SI-NEXT: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>)559 ; SI-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32)560 ; SI-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535561 ; SI-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]562 ; SI-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST2]], [[C1]]563 ; SI-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]564 ; SI-NEXT: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[LSHR]], [[LSHR2]]565 ; SI-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]]566 ; SI-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[BITCAST3]], [[C1]]567 ; SI-NEXT: [[UMIN2:%[0-9]+]]:_(s32) = G_UMIN [[AND2]], [[AND3]]568 ; SI-NEXT: [[UMIN3:%[0-9]+]]:_(s32) = G_UMIN [[LSHR1]], [[LSHR3]]569 ; SI-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[UMIN1]], [[C]](s32)570 ; SI-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[UMIN]], [[SHL]]571 ; SI-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)572 ; SI-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[UMIN3]], [[C]](s32)573 ; SI-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[UMIN2]], [[SHL1]]574 ; SI-NEXT: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)575 ; SI-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>)576 ; SI-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)577 ;578 ; VI-LABEL: name: test_umin_v4s16579 ; VI: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3580 ; VI-NEXT: {{ $}}581 ; VI-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1582 ; VI-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3583 ; VI-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)584 ; VI-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)585 ; VI-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32)586 ; VI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16587 ; VI-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)588 ; VI-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)589 ; VI-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)590 ; VI-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST1]](s32)591 ; VI-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)592 ; VI-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32)593 ; VI-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)594 ; VI-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>)595 ; VI-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST2]](s32)596 ; VI-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32)597 ; VI-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32)598 ; VI-NEXT: [[BITCAST3:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>)599 ; VI-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST3]](s32)600 ; VI-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST3]], [[C]](s32)601 ; VI-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR3]](s32)602 ; VI-NEXT: [[UMIN:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC]], [[TRUNC4]]603 ; VI-NEXT: [[UMIN1:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC1]], [[TRUNC5]]604 ; VI-NEXT: [[UMIN2:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC2]], [[TRUNC6]]605 ; VI-NEXT: [[UMIN3:%[0-9]+]]:_(s16) = G_UMIN [[TRUNC3]], [[TRUNC7]]606 ; VI-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[UMIN]](s16)607 ; VI-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[UMIN1]](s16)608 ; VI-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C]](s32)609 ; VI-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL]]610 ; VI-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)611 ; VI-NEXT: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[UMIN2]](s16)612 ; VI-NEXT: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[UMIN3]](s16)613 ; VI-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C]](s32)614 ; VI-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL1]]615 ; VI-NEXT: [[BITCAST5:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)616 ; VI-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST4]](<2 x s16>), [[BITCAST5]](<2 x s16>)617 ; VI-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)618 ;619 ; GFX9-LABEL: name: test_umin_v4s16620 ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3621 ; GFX9-NEXT: {{ $}}622 ; GFX9-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1623 ; GFX9-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3624 ; GFX9-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)625 ; GFX9-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)626 ; GFX9-NEXT: [[UMIN:%[0-9]+]]:_(<2 x s16>) = G_UMIN [[UV]], [[UV2]]627 ; GFX9-NEXT: [[UMIN1:%[0-9]+]]:_(<2 x s16>) = G_UMIN [[UV1]], [[UV3]]628 ; GFX9-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UMIN]](<2 x s16>), [[UMIN1]](<2 x s16>)629 ; GFX9-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)630 ;631 ; GFX1250-LABEL: name: test_umin_v4s16632 ; GFX1250: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3633 ; GFX1250-NEXT: {{ $}}634 ; GFX1250-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1635 ; GFX1250-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3636 ; GFX1250-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)637 ; GFX1250-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>)638 ; GFX1250-NEXT: [[UMIN:%[0-9]+]]:_(<2 x s16>) = G_UMIN [[UV]], [[UV2]]639 ; GFX1250-NEXT: [[UMIN1:%[0-9]+]]:_(<2 x s16>) = G_UMIN [[UV1]], [[UV3]]640 ; GFX1250-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UMIN]](<2 x s16>), [[UMIN1]](<2 x s16>)641 ; GFX1250-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>)642 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1643 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3644 %2:_(<4 x s16>) = G_UMIN %0, %1645 $vgpr0_vgpr1 = COPY %2646...647