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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: test_xor_s326body: |7 bb.0:8 liveins: $vgpr0, $vgpr19 10 ; CHECK-LABEL: name: test_xor_s3211 ; CHECK: liveins: $vgpr0, $vgpr112 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr014 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr115 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]16 ; CHECK-NEXT: $vgpr0 = COPY [[XOR]](s32)17 %0:_(s32) = COPY $vgpr018 %1:_(s32) = COPY $vgpr119 %2:_(s32) = G_XOR %0, %120 $vgpr0 = COPY %221...22 23---24name: test_xor_s125body: |26 bb.0:27 liveins: $vgpr0, $vgpr128 29 ; CHECK-LABEL: name: test_xor_s130 ; CHECK: liveins: $vgpr0, $vgpr131 ; CHECK-NEXT: {{ $}}32 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr033 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr134 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]35 ; CHECK-NEXT: S_NOP 0, implicit [[XOR]](s32)36 %0:_(s32) = COPY $vgpr037 %1:_(s32) = COPY $vgpr138 %2:_(s32) = G_CONSTANT i32 039 %3:_(s1) = G_ICMP intpred(ne), %0, %240 %4:_(s1) = G_ICMP intpred(ne), %1, %241 %5:_(s32) = G_XOR %0, %142 S_NOP 0, implicit %543...44 45---46name: test_xor_v2s147body: |48 bb.0:49 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr550 51 ; CHECK-LABEL: name: test_xor_v2s152 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr553 ; CHECK-NEXT: {{ $}}54 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr155 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr356 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr557 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)58 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)59 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](s32), [[UV2]]60 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](s32), [[UV3]]61 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)62 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<2 x s32>)63 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV4]](s32), [[UV6]]64 ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV5]](s32), [[UV7]]65 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP]], [[ICMP2]]66 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s1) = G_XOR [[ICMP1]], [[ICMP3]]67 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s1)68 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR1]](s1)69 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32)70 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)71 %0:_(<2 x s32>) = COPY $vgpr0_vgpr172 %1:_(<2 x s32>) = COPY $vgpr2_vgpr373 %2:_(<2 x s32>) = COPY $vgpr4_vgpr574 %3:_(<2 x s1>) = G_ICMP intpred(ne), %0, %175 %4:_(<2 x s1>) = G_ICMP intpred(ne), %0, %276 %5:_(<2 x s1>) = G_XOR %3, %477 %6:_(<2 x s32>) = G_ANYEXT %578 $vgpr0_vgpr1 = COPY %679...80 81---82name: test_xor_v3s183body: |84 bb.0:85 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5, $vgpr6_vgpr7_vgpr886 87 ; CHECK-LABEL: name: test_xor_v3s188 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5, $vgpr6_vgpr7_vgpr889 ; CHECK-NEXT: {{ $}}90 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr291 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr592 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr6_vgpr7_vgpr893 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)94 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)95 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](s32), [[UV3]]96 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](s32), [[UV4]]97 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV2]](s32), [[UV5]]98 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)99 ; CHECK-NEXT: [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<3 x s32>)100 ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV6]](s32), [[UV9]]101 ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV7]](s32), [[UV10]]102 ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV8]](s32), [[UV11]]103 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s1) = G_XOR [[ICMP]], [[ICMP3]]104 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s1) = G_XOR [[ICMP1]], [[ICMP4]]105 ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s1) = G_XOR [[ICMP2]], [[ICMP5]]106 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s1)107 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR1]](s1)108 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR2]](s1)109 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32)110 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)111 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2112 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5113 %2:_(<3 x s32>) = COPY $vgpr6_vgpr7_vgpr8114 %3:_(<3 x s1>) = G_ICMP intpred(ne), %0, %1115 %4:_(<3 x s1>) = G_ICMP intpred(ne), %0, %2116 %5:_(<3 x s1>) = G_XOR %3, %4117 %6:_(<3 x s32>) = G_ANYEXT %5118 $vgpr0_vgpr1_vgpr2 = COPY %6119...120 121---122name: test_xor_s64123body: |124 bb.0:125 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3126 127 ; CHECK-LABEL: name: test_xor_s64128 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3129 ; CHECK-NEXT: {{ $}}130 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1131 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3132 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]133 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[XOR]](s64)134 %0:_(s64) = COPY $vgpr0_vgpr1135 %1:_(s64) = COPY $vgpr2_vgpr3136 %2:_(s64) = G_XOR %0, %1137 $vgpr0_vgpr1 = COPY %2138...139 140---141name: test_xor_s96142body: |143 bb.0:144 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5145 146 ; CHECK-LABEL: name: test_xor_s96147 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5148 ; CHECK-NEXT: {{ $}}149 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2150 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr3_vgpr4_vgpr5151 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT [[COPY]](s96), 0152 ; CHECK-NEXT: [[EXTRACT1:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY]](s96), 64153 ; CHECK-NEXT: [[EXTRACT2:%[0-9]+]]:_(s64) = G_EXTRACT [[COPY1]](s96), 0154 ; CHECK-NEXT: [[EXTRACT3:%[0-9]+]]:_(s32) = G_EXTRACT [[COPY1]](s96), 64155 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[EXTRACT]], [[EXTRACT2]]156 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[EXTRACT1]], [[EXTRACT3]]157 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64)158 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32), [[XOR1]](s32)159 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)160 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2161 %1:_(s96) = COPY $vgpr3_vgpr4_vgpr5162 %2:_(s96) = G_XOR %0, %1163 $vgpr0_vgpr1_vgpr2 = COPY %2164...165 166---167name: test_xor_128168body: |169 bb.0:170 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7171 172 ; CHECK-LABEL: name: test_xor_128173 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7174 ; CHECK-NEXT: {{ $}}175 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3176 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7177 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)178 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](s128)179 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[UV]], [[UV2]]180 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[UV1]], [[UV3]]181 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[XOR]](s64), [[XOR1]](s64)182 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](s128)183 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3184 %1:_(s128) = COPY $vgpr4_vgpr5_vgpr6_vgpr7185 %2:_(s128) = G_XOR %0, %1186 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2187...188 189---190name: test_xor_s7191body: |192 bb.0:193 liveins: $vgpr0, $vgpr1194 195 ; CHECK-LABEL: name: test_xor_s7196 ; CHECK: liveins: $vgpr0, $vgpr1197 ; CHECK-NEXT: {{ $}}198 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0199 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1200 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]201 ; CHECK-NEXT: $vgpr0 = COPY [[XOR]](s32)202 %0:_(s32) = COPY $vgpr0203 %1:_(s32) = COPY $vgpr1204 %2:_(s7) = G_TRUNC %0205 %3:_(s7) = G_TRUNC %1206 %4:_(s7) = G_XOR %2, %3207 %5:_(s32) = G_ANYEXT %4208 $vgpr0 = COPY %5209...210 211---212name: test_xor_s8213body: |214 bb.0:215 liveins: $vgpr0, $vgpr1216 217 ; CHECK-LABEL: name: test_xor_s8218 ; CHECK: liveins: $vgpr0, $vgpr1219 ; CHECK-NEXT: {{ $}}220 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0221 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1222 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]223 ; CHECK-NEXT: $vgpr0 = COPY [[XOR]](s32)224 %0:_(s32) = COPY $vgpr0225 %1:_(s32) = COPY $vgpr1226 %2:_(s8) = G_TRUNC %0227 %3:_(s8) = G_TRUNC %1228 %4:_(s8) = G_XOR %2, %3229 %5:_(s32) = G_ANYEXT %4230 $vgpr0 = COPY %5231...232 233---234name: test_xor_s16235body: |236 bb.0:237 liveins: $vgpr0, $vgpr1238 239 ; CHECK-LABEL: name: test_xor_s16240 ; CHECK: liveins: $vgpr0, $vgpr1241 ; CHECK-NEXT: {{ $}}242 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0243 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1244 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)245 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)246 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s16) = G_XOR [[TRUNC]], [[TRUNC1]]247 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s16)248 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)249 %0:_(s32) = COPY $vgpr0250 %1:_(s32) = COPY $vgpr1251 %2:_(s16) = G_TRUNC %0252 %3:_(s16) = G_TRUNC %1253 %4:_(s16) = G_XOR %2, %3254 %5:_(s32) = G_ANYEXT %4255 $vgpr0 = COPY %5256...257 258---259name: test_xor_s24260body: |261 bb.0:262 liveins: $vgpr0, $vgpr1263 264 ; CHECK-LABEL: name: test_xor_s24265 ; CHECK: liveins: $vgpr0, $vgpr1266 ; CHECK-NEXT: {{ $}}267 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0268 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1269 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)270 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)271 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s16) = G_XOR [[TRUNC]], [[TRUNC1]]272 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[XOR]](s16)273 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)274 %0:_(s32) = COPY $vgpr0275 %1:_(s32) = COPY $vgpr1276 %2:_(s16) = G_TRUNC %0277 %3:_(s16) = G_TRUNC %1278 %4:_(s16) = G_XOR %2, %3279 %5:_(s32) = G_ANYEXT %4280 $vgpr0 = COPY %5281...282 283---284name: test_xor_s48285body: |286 bb.0:287 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3288 289 ; CHECK-LABEL: name: test_xor_s48290 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3291 ; CHECK-NEXT: {{ $}}292 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1293 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3294 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]295 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[XOR]](s64)296 %0:_(s64) = COPY $vgpr0_vgpr1297 %1:_(s64) = COPY $vgpr2_vgpr3298 %2:_(s48) = G_TRUNC %0299 %3:_(s48) = G_TRUNC %1300 %4:_(s48) = G_XOR %2, %3301 %5:_(s64) = G_ANYEXT %4302 $vgpr0_vgpr1 = COPY %5303...304 305---306name: test_xor_v2s32307body: |308 bb.0:309 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3310 311 ; CHECK-LABEL: name: test_xor_v2s32312 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3313 ; CHECK-NEXT: {{ $}}314 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1315 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3316 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[COPY]], [[COPY1]]317 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[XOR]](<2 x s32>)318 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1319 %1:_(<2 x s32>) = COPY $vgpr2_vgpr3320 %2:_(<2 x s32>) = G_XOR %0, %1321 $vgpr0_vgpr1 = COPY %2322...323 324---325name: test_xor_v3s32326body: |327 bb.0:328 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5329 330 ; CHECK-LABEL: name: test_xor_v3s32331 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5332 ; CHECK-NEXT: {{ $}}333 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2334 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5335 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)336 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32)337 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)338 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV3]](s32), [[UV4]](s32)339 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[BUILD_VECTOR]], [[BUILD_VECTOR1]]340 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[UV2]], [[UV5]]341 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](<2 x s32>)342 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UV6]](s32), [[UV7]](s32), [[XOR1]](s32)343 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR2]](<3 x s32>)344 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2345 %1:_(<3 x s32>) = COPY $vgpr3_vgpr4_vgpr5346 %2:_(<3 x s32>) = G_XOR %0, %1347 $vgpr0_vgpr1_vgpr2 = COPY %2348...349 350---351name: test_xor_v4s32352body: |353 bb.0:354 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7355 356 ; CHECK-LABEL: name: test_xor_v4s32357 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7358 ; CHECK-NEXT: {{ $}}359 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3360 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7361 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s32>), [[UV1:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)362 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s32>), [[UV3:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY1]](<4 x s32>)363 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[UV]], [[UV2]]364 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<2 x s32>) = G_XOR [[UV1]], [[UV3]]365 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[XOR]](<2 x s32>), [[XOR1]](<2 x s32>)366 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<4 x s32>)367 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3368 %1:_(<4 x s32>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7369 %2:_(<4 x s32>) = G_XOR %0, %1370 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2371...372 373---374name: test_xor_v5s32375body: |376 bb.0:377 378 ; CHECK-LABEL: name: test_xor_v5s32379 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF380 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)381 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)382 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)383 ; CHECK-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[DEF]](s32), [[DEF]](s32)384 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[BUILD_VECTOR]], [[BUILD_VECTOR2]]385 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<2 x s32>) = G_XOR [[BUILD_VECTOR1]], [[BUILD_VECTOR3]]386 ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]387 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](<2 x s32>)388 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](<2 x s32>)389 ; CHECK-NEXT: [[BUILD_VECTOR4:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[UV3]](s32), [[XOR2]](s32), [[DEF]](s32), [[DEF]](s32), [[DEF]](s32)390 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR4]](<8 x s32>)391 %0:_(<5 x s32>) = G_IMPLICIT_DEF392 %1:_(<5 x s32>) = G_IMPLICIT_DEF393 %2:_(<5 x s32>) = G_XOR %0, %1394 %3:_(<8 x s32>) = G_IMPLICIT_DEF395 %4:_(<8 x s32>) = G_INSERT %3, %2, 0396 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %4397...398 399---400name: test_xor_v2s64401body: |402 bb.0:403 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7404 405 ; CHECK-LABEL: name: test_xor_v2s64406 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7407 ; CHECK-NEXT: {{ $}}408 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3409 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7410 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)411 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)412 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[UV]], [[UV2]]413 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[UV1]], [[UV3]]414 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[XOR]](s64), [[XOR1]](s64)415 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)416 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3417 %1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7418 %2:_(<2 x s64>) = G_XOR %0, %1419 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2420...421 422---423name: test_xor_v2s16424body: |425 bb.0:426 liveins: $vgpr0, $vgpr1427 428 ; CHECK-LABEL: name: test_xor_v2s16429 ; CHECK: liveins: $vgpr0, $vgpr1430 ; CHECK-NEXT: {{ $}}431 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0432 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1433 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s16>) = G_XOR [[COPY]], [[COPY1]]434 ; CHECK-NEXT: $vgpr0 = COPY [[XOR]](<2 x s16>)435 %0:_(<2 x s16>) = COPY $vgpr0436 %1:_(<2 x s16>) = COPY $vgpr1437 %2:_(<2 x s16>) = G_XOR %0, %1438 $vgpr0 = COPY %2439...440 441---442name: test_xor_v3s16443body: |444 bb.0:445 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5446 ; CHECK-LABEL: name: test_xor_v3s16447 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3_vgpr4_vgpr5448 ; CHECK-NEXT: {{ $}}449 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2450 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr3_vgpr4_vgpr5451 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<6 x s16>)452 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[UV1]](<2 x s16>)453 ; CHECK-NEXT: [[UV3:%[0-9]+]]:_(<2 x s16>), [[UV4:%[0-9]+]]:_(<2 x s16>), [[UV5:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<6 x s16>)454 ; CHECK-NEXT: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV3]](<2 x s16>), [[UV4]](<2 x s16>)455 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<4 x s16>) = G_XOR [[CONCAT_VECTORS]], [[CONCAT_VECTORS1]]456 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(<2 x s16>), [[UV7:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[XOR]](<4 x s16>)457 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0458 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16459 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)460 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]461 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)462 ; CHECK-NEXT: [[CONCAT_VECTORS2:%[0-9]+]]:_(<6 x s16>) = G_CONCAT_VECTORS [[UV6]](<2 x s16>), [[UV7]](<2 x s16>), [[BITCAST]](<2 x s16>)463 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[CONCAT_VECTORS2]](<6 x s16>)464 %0:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2465 %1:_(<6 x s16>) = COPY $vgpr3_vgpr4_vgpr5466 %2:_(<3 x s16>), %3:_(<3 x s16>) = G_UNMERGE_VALUES %0467 %4:_(<3 x s16>), %5:_(<3 x s16>) = G_UNMERGE_VALUES %1468 %6:_(<3 x s16>) = G_XOR %2, %4469 %7:_(<3 x s16>) = G_IMPLICIT_DEF470 %8:_(<6 x s16>) = G_CONCAT_VECTORS %6, %7471 $vgpr0_vgpr1_vgpr2 = COPY %8472...473 474---475name: test_xor_v4s16476body: |477 bb.0:478 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3479 480 ; CHECK-LABEL: name: test_xor_v4s16481 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3482 ; CHECK-NEXT: {{ $}}483 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1484 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3485 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<4 x s16>) = G_XOR [[COPY]], [[COPY1]]486 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[XOR]](<4 x s16>)487 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1488 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3489 %2:_(<4 x s16>) = G_XOR %0, %1490 $vgpr0_vgpr1 = COPY %2491...492 493---494name: test_xor_v5s16495body: |496 bb.0:497 498 ; CHECK-LABEL: name: test_xor_v5s16499 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0500 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16501 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)502 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL]]503 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)504 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)505 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL1]]506 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32)507 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>)508 ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)509 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL2]]510 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32)511 ; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)512 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL3]]513 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR3]](s32)514 ; CHECK-NEXT: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>)515 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<4 x s16>) = G_XOR [[CONCAT_VECTORS]], [[CONCAT_VECTORS1]]516 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[XOR]](<4 x s16>)517 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)518 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST4]], [[C1]](s32)519 ; CHECK-NEXT: [[BITCAST5:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)520 ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)521 ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL4]]522 ; CHECK-NEXT: [[BITCAST6:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR4]](s32)523 ; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)524 ; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL5]]525 ; CHECK-NEXT: [[BITCAST7:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32)526 ; CHECK-NEXT: [[CONCAT_VECTORS2:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST6]](<2 x s16>), [[BITCAST7]](<2 x s16>)527 ; CHECK-NEXT: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)528 ; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL6]]529 ; CHECK-NEXT: [[BITCAST8:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR6]](s32)530 ; CHECK-NEXT: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)531 ; CHECK-NEXT: [[OR7:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL7]]532 ; CHECK-NEXT: [[BITCAST9:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR7]](s32)533 ; CHECK-NEXT: [[CONCAT_VECTORS3:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST8]](<2 x s16>), [[BITCAST9]](<2 x s16>)534 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<4 x s16>) = G_XOR [[CONCAT_VECTORS2]], [[CONCAT_VECTORS3]]535 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[XOR1]](<4 x s16>)536 ; CHECK-NEXT: [[BITCAST10:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>)537 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST10]], [[C1]](s32)538 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535539 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST4]], [[C2]]540 ; CHECK-NEXT: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C1]](s32)541 ; CHECK-NEXT: [[OR8:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL8]]542 ; CHECK-NEXT: [[BITCAST11:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR8]](s32)543 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST5]], [[C2]]544 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[BITCAST10]], [[C2]]545 ; CHECK-NEXT: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C1]](s32)546 ; CHECK-NEXT: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL9]]547 ; CHECK-NEXT: [[BITCAST12:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR9]](s32)548 ; CHECK-NEXT: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)549 ; CHECK-NEXT: [[OR10:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL10]]550 ; CHECK-NEXT: [[BITCAST13:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR10]](s32)551 ; CHECK-NEXT: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[C]], [[C1]](s32)552 ; CHECK-NEXT: [[OR11:%[0-9]+]]:_(s32) = G_OR [[C]], [[SHL11]]553 ; CHECK-NEXT: [[BITCAST14:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR11]](s32)554 ; CHECK-NEXT: [[CONCAT_VECTORS4:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[BITCAST11]](<2 x s16>), [[BITCAST12]](<2 x s16>), [[BITCAST13]](<2 x s16>), [[BITCAST14]](<2 x s16>)555 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS4]](<8 x s16>)556 %0:_(<5 x s16>) = G_IMPLICIT_DEF557 %1:_(<5 x s16>) = G_IMPLICIT_DEF558 %2:_(<5 x s16>) = G_XOR %0, %1559 %4:_(<8 x s16>) = G_IMPLICIT_DEF560 %5:_(<8 x s16>) = G_INSERT %4, %2, 0561 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %5562...563 564---565name: test_xor_v3s8566body: |567 bb.0:568 569 ; CHECK-LABEL: name: test_xor_v3s8570 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF571 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]572 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]573 ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]574 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[XOR]](s32), [[XOR1]](s32), [[XOR2]](s32)575 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)576 %0:_(<3 x s8>) = G_IMPLICIT_DEF577 %1:_(<3 x s8>) = G_IMPLICIT_DEF578 %2:_(<3 x s8>) = G_XOR %0, %1579 %3:_(<3 x s32>) = G_ANYEXT %2580 $vgpr0_vgpr1_vgpr2 = COPY %3581...582 583---584name: test_xor_v4s8585body: |586 bb.0:587 588 ; CHECK-LABEL: name: test_xor_v4s8589 ; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF590 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]591 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]592 ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]593 ; CHECK-NEXT: [[XOR3:%[0-9]+]]:_(s32) = G_XOR [[DEF]], [[DEF]]594 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[XOR]](s32), [[XOR1]](s32), [[XOR2]](s32), [[XOR3]](s32)595 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)596 %0:_(<4 x s8>) = G_IMPLICIT_DEF597 %1:_(<4 x s8>) = G_IMPLICIT_DEF598 %2:_(<4 x s8>) = G_XOR %0, %1599 %3:_(<4 x s32>) = G_ANYEXT %2600 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3601...602