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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck %s3 4---5name: test_zext_s32_to_s646body: |7 bb.0:8 liveins: $vgpr09 10 ; CHECK-LABEL: name: test_zext_s32_to_s6411 ; CHECK: liveins: $vgpr012 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr014 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)15 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)16 %0:_(s32) = COPY $vgpr017 %1:_(s64) = G_ZEXT %018 $vgpr0_vgpr1 = COPY %119...20 21---22name: test_zext_s16_to_s6423body: |24 bb.0:25 liveins: $vgpr026 27 ; CHECK-LABEL: name: test_zext_s16_to_s6428 ; CHECK: liveins: $vgpr029 ; CHECK-NEXT: {{ $}}30 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr031 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s32)32 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 6553533 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]34 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[AND]](s64)35 %0:_(s32) = COPY $vgpr036 %1:_(s16) = G_TRUNC %037 %2:_(s64) = G_ZEXT %138 $vgpr0_vgpr1 = COPY %239...40 41---42name: test_zext_s16_to_s3243body: |44 bb.0:45 liveins: $vgpr046 47 ; CHECK-LABEL: name: test_zext_s16_to_s3248 ; CHECK: liveins: $vgpr049 ; CHECK-NEXT: {{ $}}50 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr051 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 6553552 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]53 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)54 %0:_(s32) = COPY $vgpr055 %1:_(s16) = G_TRUNC %056 %2:_(s32) = G_ZEXT %157 $vgpr0 = COPY %258...59 60---61name: test_zext_s24_to_s3262body: |63 bb.0:64 liveins: $vgpr065 66 ; CHECK-LABEL: name: test_zext_s24_to_s3267 ; CHECK: liveins: $vgpr068 ; CHECK-NEXT: {{ $}}69 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr070 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1677721571 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]72 ; CHECK-NEXT: $vgpr0 = COPY [[AND]](s32)73 %0:_(s32) = COPY $vgpr074 %1:_(s24) = G_TRUNC %075 %2:_(s32) = G_ZEXT %176 $vgpr0 = COPY %277...78 79---80name: test_zext_s32_to_s9681body: |82 bb.0:83 liveins: $vgpr084 85 ; CHECK-LABEL: name: test_zext_s32_to_s9686 ; CHECK: liveins: $vgpr087 ; CHECK-NEXT: {{ $}}88 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr089 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 090 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)91 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 092 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64), [[C1]](s64)93 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[MV1]](s192)94 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[TRUNC]](s96)95 %0:_(s32) = COPY $vgpr096 %1:_(s96) = G_ZEXT %097 $vgpr0_vgpr1_vgpr2 = COPY %198...99 100---101name: test_zext_i1_to_s32102body: |103 bb.0:104 105 ; CHECK-LABEL: name: test_zext_i1_to_s32106 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0107 ; CHECK-NEXT: $vgpr0 = COPY [[C]](s32)108 %0:_(s1) = G_CONSTANT i1 0109 %1:_(s32) = G_ZEXT %0110 $vgpr0 = COPY %1111...112 113---114name: test_zext_i1_to_i64115body: |116 bb.0:117 118 ; CHECK-LABEL: name: test_zext_i1_to_i64119 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0120 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[C]](s64)121 %0:_(s1) = G_CONSTANT i1 0122 %1:_(s64) = G_ZEXT %0123 $vgpr0_vgpr1 = COPY %1124...125 126---127name: test_zext_v2s16_to_v2s32128body: |129 bb.0:130 liveins: $vgpr0131 132 ; CHECK-LABEL: name: test_zext_v2s16_to_v2s32133 ; CHECK: liveins: $vgpr0134 ; CHECK-NEXT: {{ $}}135 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0136 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)137 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16138 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)139 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535140 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]141 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[LSHR]](s32)142 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)143 %0:_(<2 x s16>) = COPY $vgpr0144 %1:_(<2 x s32>) = G_ZEXT %0145 $vgpr0_vgpr1 = COPY %1146...147 148---149name: test_zext_v3s16_to_v3s32150body: |151 bb.0:152 liveins: $vgpr0_vgpr1153 154 ; CHECK-LABEL: name: test_zext_v3s16_to_v3s32155 ; CHECK: liveins: $vgpr0_vgpr1156 ; CHECK-NEXT: {{ $}}157 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1158 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)159 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)160 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16161 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)162 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)163 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535164 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]165 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]]166 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[LSHR]](s32), [[AND1]](s32)167 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)168 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1169 %1:_(<3 x s16>) = G_EXTRACT %0, 0170 %2:_(<3 x s32>) = G_ZEXT %1171 $vgpr0_vgpr1_vgpr2 = COPY %2172...173 174---175name: test_zext_v4s16_to_v4s32176body: |177 bb.0:178 liveins: $vgpr0_vgpr1179 180 ; CHECK-LABEL: name: test_zext_v4s16_to_v4s32181 ; CHECK: liveins: $vgpr0_vgpr1182 ; CHECK-NEXT: {{ $}}183 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1184 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)185 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)186 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16187 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)188 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)189 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)190 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535191 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]192 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]]193 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[AND]](s32), [[LSHR]](s32), [[AND1]](s32), [[LSHR1]](s32)194 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>)195 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1196 %1:_(<4 x s32>) = G_ZEXT %0197 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1198...199 200---201name: test_zext_v2s32_to_v2s64202body: |203 bb.0:204 liveins: $vgpr0_vgpr1205 206 ; CHECK-LABEL: name: test_zext_v2s32_to_v2s64207 ; CHECK: liveins: $vgpr0_vgpr1208 ; CHECK-NEXT: {{ $}}209 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1210 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)211 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV]](s32)212 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV1]](s32)213 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64)214 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)215 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1216 %1:_(<2 x s64>) = G_ZEXT %0217 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1218...219 220---221name: test_zext_v3s32_to_v3s64222body: |223 bb.0:224 liveins: $vgpr0_vgpr1_vgpr2225 226 ; CHECK-LABEL: name: test_zext_v3s32_to_v3s64227 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2228 ; CHECK-NEXT: {{ $}}229 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2230 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)231 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV]](s32)232 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV1]](s32)233 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]]:_(s64) = G_ZEXT [[UV2]](s32)234 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64), [[ZEXT2]](s64)235 ; CHECK-NEXT: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s64>)236 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2237 %1:_(<3 x s64>) = G_ZEXT %0238 S_NOP 0, implicit %1239 240...241 242---243name: test_zext_v4s32_to_v4s64244body: |245 bb.0:246 liveins: $vgpr0_vgpr1_vgpr2_vgpr3247 248 ; CHECK-LABEL: name: test_zext_v4s32_to_v4s64249 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3250 ; CHECK-NEXT: {{ $}}251 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3252 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)253 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV]](s32)254 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV1]](s32)255 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]]:_(s64) = G_ZEXT [[UV2]](s32)256 ; CHECK-NEXT: [[ZEXT3:%[0-9]+]]:_(s64) = G_ZEXT [[UV3]](s32)257 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[ZEXT]](s64), [[ZEXT1]](s64), [[ZEXT2]](s64), [[ZEXT3]](s64)258 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>)259 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3260 %1:_(<4 x s64>) = G_ZEXT %0261 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1262...263 264---265name: test_zext_s8_to_s16266body: |267 bb.0:268 liveins: $vgpr0269 270 ; CHECK-LABEL: name: test_zext_s8_to_s16271 ; CHECK: liveins: $vgpr0272 ; CHECK-NEXT: {{ $}}273 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0274 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)275 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255276 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]277 ; CHECK-NEXT: S_ENDPGM 0, implicit [[AND]](s16)278 %0:_(s32) = COPY $vgpr0279 %1:_(s8) = G_TRUNC %0280 %2:_(s16) = G_ZEXT %1281 S_ENDPGM 0, implicit %2282...283 284---285name: test_zext_s8_to_s24286body: |287 bb.0:288 liveins: $vgpr0289 290 ; CHECK-LABEL: name: test_zext_s8_to_s24291 ; CHECK: liveins: $vgpr0292 ; CHECK-NEXT: {{ $}}293 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0294 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255295 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]296 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s24) = G_TRUNC [[AND]](s32)297 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s24)298 %0:_(s32) = COPY $vgpr0299 %1:_(s8) = G_TRUNC %0300 %2:_(s24) = G_ZEXT %1301 S_ENDPGM 0, implicit %2302...303 304 305---306name: test_zext_s7_to_s32307body: |308 bb.0:309 liveins: $vgpr0310 311 ; CHECK-LABEL: name: test_zext_s7_to_s32312 ; CHECK: liveins: $vgpr0313 ; CHECK-NEXT: {{ $}}314 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0315 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 127316 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]317 ; CHECK-NEXT: S_ENDPGM 0, implicit [[AND]](s32)318 %0:_(s32) = COPY $vgpr0319 %1:_(s7) = G_TRUNC %0320 %2:_(s32) = G_ZEXT %1321 S_ENDPGM 0, implicit %2322...323 324---325name: test_zext_s8_to_s32326body: |327 bb.0:328 liveins: $vgpr0329 330 ; CHECK-LABEL: name: test_zext_s8_to_s32331 ; CHECK: liveins: $vgpr0332 ; CHECK-NEXT: {{ $}}333 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0334 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255335 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]336 ; CHECK-NEXT: S_ENDPGM 0, implicit [[AND]](s32)337 %0:_(s32) = COPY $vgpr0338 %1:_(s8) = G_TRUNC %0339 %2:_(s32) = G_ZEXT %1340 S_ENDPGM 0, implicit %2341...342 343---344name: test_zext_s32_to_s128345body: |346 bb.0:347 liveins: $vgpr0348 349 ; CHECK-LABEL: name: test_zext_s32_to_s128350 ; CHECK: liveins: $vgpr0351 ; CHECK-NEXT: {{ $}}352 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0353 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0354 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)355 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0356 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64)357 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s128)358 %0:_(s32) = COPY $vgpr0359 %1:_(s128) = G_ZEXT %0360 S_ENDPGM 0, implicit %1361...362 363---364name: test_zext_s32_to_s160365body: |366 bb.0:367 liveins: $vgpr0368 369 ; CHECK-LABEL: name: test_zext_s32_to_s160370 ; CHECK: liveins: $vgpr0371 ; CHECK-NEXT: {{ $}}372 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0373 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0374 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)375 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0376 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s320) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64)377 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[MV1]](s320)378 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s160)379 %0:_(s32) = COPY $vgpr0380 %1:_(s160) = G_ZEXT %0381 S_ENDPGM 0, implicit %1382...383 384 385---386name: test_zext_s32_to_s192387body: |388 bb.0:389 liveins: $vgpr0390 391 ; CHECK-LABEL: name: test_zext_s32_to_s192392 ; CHECK: liveins: $vgpr0393 ; CHECK-NEXT: {{ $}}394 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0395 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0396 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)397 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0398 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64), [[C1]](s64)399 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s192)400 %0:_(s32) = COPY $vgpr0401 %1:_(s192) = G_ZEXT %0402 S_ENDPGM 0, implicit %1403...404 405---406name: test_zext_s32_to_s224407body: |408 bb.0:409 liveins: $vgpr0410 411 ; CHECK-LABEL: name: test_zext_s32_to_s224412 ; CHECK: liveins: $vgpr0413 ; CHECK-NEXT: {{ $}}414 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0415 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0416 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)417 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0418 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64)419 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[MV1]](s448)420 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s224)421 %0:_(s32) = COPY $vgpr0422 %1:_(s224) = G_ZEXT %0423 S_ENDPGM 0, implicit %1424...425 426---427name: test_zext_s32_to_s256428body: |429 bb.0:430 liveins: $vgpr0431 432 ; CHECK-LABEL: name: test_zext_s32_to_s256433 ; CHECK: liveins: $vgpr0434 ; CHECK-NEXT: {{ $}}435 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0436 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0437 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)438 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0439 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64)440 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s256)441 %0:_(s32) = COPY $vgpr0442 %1:_(s256) = G_ZEXT %0443 S_ENDPGM 0, implicit %1444...445 446---447name: test_zext_s32_to_s512448body: |449 bb.0:450 liveins: $vgpr0451 452 ; CHECK-LABEL: name: test_zext_s32_to_s512453 ; CHECK: liveins: $vgpr0454 ; CHECK-NEXT: {{ $}}455 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0456 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0457 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)458 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0459 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64)460 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s512)461 %0:_(s32) = COPY $vgpr0462 %1:_(s512) = G_ZEXT %0463 S_ENDPGM 0, implicit %1464...465 466---467name: test_zext_s32_to_s992468body: |469 bb.0:470 liveins: $vgpr0471 472 ; CHECK-LABEL: name: test_zext_s32_to_s992473 ; CHECK: liveins: $vgpr0474 ; CHECK-NEXT: {{ $}}475 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0476 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0477 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)478 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0479 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64)480 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[MV1]](s448)481 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s224)482 %0:_(s32) = COPY $vgpr0483 %1:_(s224) = G_ZEXT %0484 S_ENDPGM 0, implicit %1485...486 487---488name: test_zext_s32_to_s1024489body: |490 bb.0:491 liveins: $vgpr0492 493 ; CHECK-LABEL: name: test_zext_s32_to_s1024494 ; CHECK: liveins: $vgpr0495 ; CHECK-NEXT: {{ $}}496 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0497 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0498 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)499 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0500 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[MV]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64), [[C1]](s64)501 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s1024)502 %0:_(s32) = COPY $vgpr0503 %1:_(s1024) = G_ZEXT %0504 S_ENDPGM 0, implicit %1505...506 507---508name: test_zext_s64_to_s128509body: |510 bb.0:511 liveins: $vgpr0_vgpr1512 513 ; CHECK-LABEL: name: test_zext_s64_to_s128514 ; CHECK: liveins: $vgpr0_vgpr1515 ; CHECK-NEXT: {{ $}}516 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1517 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0518 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[C]](s64)519 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s128)520 %0:_(s64) = COPY $vgpr0_vgpr1521 %1:_(s128) = G_ZEXT %0522 S_ENDPGM 0, implicit %1523...524 525---526name: test_zext_s64_to_s192527body: |528 bb.0:529 liveins: $vgpr0_vgpr1530 531 ; CHECK-LABEL: name: test_zext_s64_to_s192532 ; CHECK: liveins: $vgpr0_vgpr1533 ; CHECK-NEXT: {{ $}}534 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1535 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0536 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[COPY]](s64), [[C]](s64), [[C]](s64)537 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s192)538 %0:_(s64) = COPY $vgpr0_vgpr1539 %1:_(s192) = G_ZEXT %0540 S_ENDPGM 0, implicit %1541...542 543---544name: test_zext_s64_to_s256545body: |546 bb.0:547 liveins: $vgpr0_vgpr1548 549 ; CHECK-LABEL: name: test_zext_s64_to_s256550 ; CHECK: liveins: $vgpr0_vgpr1551 ; CHECK-NEXT: {{ $}}552 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1553 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0554 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s64), [[C]](s64), [[C]](s64), [[C]](s64)555 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s256)556 %0:_(s64) = COPY $vgpr0_vgpr1557 %1:_(s256) = G_ZEXT %0558 S_ENDPGM 0, implicit %1559...560 561---562name: test_zext_s64_to_s512563body: |564 bb.0:565 liveins: $vgpr0_vgpr1566 567 ; CHECK-LABEL: name: test_zext_s64_to_s512568 ; CHECK: liveins: $vgpr0_vgpr1569 ; CHECK-NEXT: {{ $}}570 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1571 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0572 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64)573 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s512)574 %0:_(s64) = COPY $vgpr0_vgpr1575 %1:_(s512) = G_ZEXT %0576 S_ENDPGM 0, implicit %1577...578 579---580name: test_zext_s64_to_s1024581body: |582 bb.0:583 liveins: $vgpr0_vgpr1584 585 ; CHECK-LABEL: name: test_zext_s64_to_s1024586 ; CHECK: liveins: $vgpr0_vgpr1587 ; CHECK-NEXT: {{ $}}588 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1589 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0590 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64), [[C]](s64)591 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s1024)592 %0:_(s64) = COPY $vgpr0_vgpr1593 %1:_(s1024) = G_ZEXT %0594 S_ENDPGM 0, implicit %1595...596 597---598name: test_zext_s96_to_s128599body: |600 bb.0:601 liveins: $vgpr0_vgpr1_vgpr2602 603 ; CHECK-LABEL: name: test_zext_s96_to_s128604 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2605 ; CHECK-NEXT: {{ $}}606 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2607 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s96)608 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0609 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32)610 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV2]](s32), [[C]](s32)611 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64)612 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV2]](s128)613 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2614 %1:_(s128) = G_ZEXT %0615 S_ENDPGM 0, implicit %1616...617 618---619name: test_zext_s128_to_s256620body: |621 bb.0:622 liveins: $vgpr0_vgpr1_vgpr2_vgpr3623 624 ; CHECK-LABEL: name: test_zext_s128_to_s256625 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3626 ; CHECK-NEXT: {{ $}}627 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3628 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)629 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0630 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[UV]](s64), [[UV1]](s64), [[C]](s64), [[C]](s64)631 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s256)632 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3633 %1:_(s256) = G_ZEXT %0634 S_ENDPGM 0, implicit %1635...636 637---638name: test_zext_s32_to_s88639body: |640 bb.0:641 liveins: $vgpr0642 643 ; CHECK-LABEL: name: test_zext_s32_to_s88644 ; CHECK: liveins: $vgpr0645 ; CHECK-NEXT: {{ $}}646 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0647 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8648 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)649 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16650 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C1]](s32)651 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24652 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s32)653 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)654 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255655 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]]656 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32)657 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C3]]658 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8659 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C4]](s16)660 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]]661 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32)662 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C3]]663 ; CHECK-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32)664 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[TRUNC3]], [[C4]](s16)665 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]]666 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 0667 ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[C5]], [[C4]](s16)668 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[C5]], [[SHL2]]669 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY [[OR2]](s16)670 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16)671 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16)672 ; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C1]](s32)673 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL3]]674 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16)675 ; CHECK-NEXT: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[COPY1]](s16)676 ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C1]](s32)677 ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL4]]678 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR3]](s32), [[OR4]](s32)679 ; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 0680 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s704) = G_MERGE_VALUES [[MV]](s64), [[C6]](s64), [[C6]](s64), [[C6]](s64), [[C6]](s64), [[C6]](s64), [[C6]](s64), [[C6]](s64), [[C6]](s64), [[C6]](s64), [[C6]](s64)681 ; CHECK-NEXT: [[TRUNC4:%[0-9]+]]:_(s88) = G_TRUNC [[MV1]](s704)682 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC4]](s88)683 %0:_(s32) = COPY $vgpr0684 %1:_(s88) = G_ZEXT %0685 S_ENDPGM 0, implicit %1686...687 688# The instruction count blows up for this and takes too long to689# generate checks. This fails on a G_MERGE_VALUES to s4160690#691# ---692# name: test_zext_s32_to_s65693# body: |694# bb.0:695# liveins: $vgpr0696 697# %0:_(s32) = COPY $vgpr0698# %1:_(s65) = G_ZEXT %0699# S_ENDPGM 0, implicit %1700# ...701 702---703name: test_zext_s2_to_s112704body: |705 bb.0:706 liveins: $vgpr0707 708 ; CHECK-LABEL: name: test_zext_s2_to_s112709 ; CHECK: liveins: $vgpr0710 ; CHECK-NEXT: {{ $}}711 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0712 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16713 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)714 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535715 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]716 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32)717 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]]718 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0719 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C]](s32)720 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[C2]], [[SHL1]]721 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32)722 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF723 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3724 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0725 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C4]](s64)726 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)727 ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[LSHR1]], [[C]](s32)728 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[UV]], [[SHL2]]729 ; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C]](s32)730 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[UV1]], [[SHL3]]731 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR3]](s32)732 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[MV]](s64)733 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[C3]](s64)734 ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s48) = G_EXTRACT [[MV1]](s64), 0735 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[COPY2]]736 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[EXTRACT]](s48)737 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[ANYEXT]]738 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[AND2]](s64)739 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[UV2]], [[C]](s32)740 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[UV2]], [[C1]]741 ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[LSHR2]], [[C]](s32)742 ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND3]], [[SHL4]]743 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s32) = G_AND [[UV3]], [[C1]]744 ; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]]745 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR4]](s32), [[OR5]](s32)746 ; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s32) = G_OR [[C2]], [[SHL3]]747 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[OR6]](s32)748 ; CHECK-NEXT: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR6]](s32), [[COPY3]](s32)749 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY [[OR6]](s32)750 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[OR6]](s32)751 ; CHECK-NEXT: [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)752 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[OR6]](s32)753 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY [[OR6]](s32)754 ; CHECK-NEXT: [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)755 ; CHECK-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY [[OR6]](s32)756 ; CHECK-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY [[OR6]](s32)757 ; CHECK-NEXT: [[MV6:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY8]](s32), [[COPY9]](s32)758 ; CHECK-NEXT: [[MV7:%[0-9]+]]:_(s384) = G_MERGE_VALUES [[AND1]](s64), [[MV2]](s64), [[MV3]](s64), [[MV4]](s64), [[MV5]](s64), [[MV6]](s64)759 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s112) = G_TRUNC [[MV7]](s384)760 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s112)761 %0:_(s32) = COPY $vgpr0762 %1:_(s2) = G_TRUNC %0763 %2:_(s112) = G_ZEXT %1764 S_ENDPGM 0, implicit %2765...766 767---768name: test_zext_s112_to_s128769body: |770 bb.0:771 liveins: $vgpr0_vgpr1_vgpr2_vgpr3772 ; CHECK-LABEL: name: test_zext_s112_to_s128773 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3774 ; CHECK-NEXT: {{ $}}775 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3776 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1777 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 281474976710655778 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128)779 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UV]], [[C]]780 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UV1]], [[C1]]781 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[AND]](s64), [[AND1]](s64)782 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s128)783 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3784 %1:_(s112) = G_TRUNC %0785 %2:_(s128) = G_ZEXT %1786 S_ENDPGM 0, implicit %2787...788