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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn--amdhsa -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10 %s3; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn--amdhsa -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefix=GFX11 %s4 5define amdgpu_kernel void @test_wave32(i32 %arg0, [8 x i32], i32 %saved) {6; GFX10-LABEL: test_wave32:7; GFX10: ; %bb.0: ; %entry8; GFX10-NEXT: s_load_dword s0, s[8:9], 0x09; GFX10-NEXT: s_waitcnt lgkmcnt(0)10; GFX10-NEXT: s_cmp_lg_u32 s0, 011; GFX10-NEXT: s_cbranch_scc1 .LBB0_212; GFX10-NEXT: ; %bb.1: ; %mid13; GFX10-NEXT: v_mov_b32_e32 v0, 014; GFX10-NEXT: global_store_dword v[0:1], v0, off15; GFX10-NEXT: s_waitcnt_vscnt null, 0x016; GFX10-NEXT: .LBB0_2: ; %bb17; GFX10-NEXT: s_load_dword s0, s[8:9], 0x2418; GFX10-NEXT: s_waitcnt lgkmcnt(0)19; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)20; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s021; GFX10-NEXT: v_mov_b32_e32 v0, 022; GFX10-NEXT: global_store_dword v[0:1], v0, off23; GFX10-NEXT: s_waitcnt_vscnt null, 0x024; GFX10-NEXT: s_endpgm25;26; GFX11-LABEL: test_wave32:27; GFX11: ; %bb.0: ; %entry28; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x029; GFX11-NEXT: s_waitcnt lgkmcnt(0)30; GFX11-NEXT: s_cmp_lg_u32 s0, 031; GFX11-NEXT: s_cbranch_scc1 .LBB0_232; GFX11-NEXT: ; %bb.1: ; %mid33; GFX11-NEXT: v_mov_b32_e32 v0, 034; GFX11-NEXT: global_store_b32 v[0:1], v0, off dlc35; GFX11-NEXT: s_waitcnt_vscnt null, 0x036; GFX11-NEXT: .LBB0_2: ; %bb37; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x2438; GFX11-NEXT: s_waitcnt lgkmcnt(0)39; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s040; GFX11-NEXT: v_mov_b32_e32 v0, 041; GFX11-NEXT: global_store_b32 v[0:1], v0, off dlc42; GFX11-NEXT: s_waitcnt_vscnt null, 0x043; GFX11-NEXT: s_endpgm44entry:45 %cond = icmp eq i32 %arg0, 046 br i1 %cond, label %mid, label %bb47 48mid:49 store volatile i32 0, ptr addrspace(1) poison50 br label %bb51 52bb:53 call void @llvm.amdgcn.end.cf.i32(i32 %saved)54 store volatile i32 0, ptr addrspace(1) poison55 ret void56}57 58declare void @llvm.amdgcn.end.cf.i32(i32 %val)59