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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck %s -check-prefix=GFX103; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 < %s | FileCheck %s -check-prefix=GFX104; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck %s -check-prefix=GFX115; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck %s -check-prefix=GFX126 7define i32 @global_atomic_csub(ptr addrspace(1) %ptr, i32 %data) {8; GFX10-LABEL: global_atomic_csub:9; GFX10: ; %bb.0:10; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11; GFX10-NEXT: global_atomic_csub v0, v[0:1], v2, off glc12; GFX10-NEXT: s_waitcnt vmcnt(0)13; GFX10-NEXT: s_setpc_b64 s[30:31]14;15; GFX11-LABEL: global_atomic_csub:16; GFX11: ; %bb.0:17; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)18; GFX11-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc19; GFX11-NEXT: s_waitcnt vmcnt(0)20; GFX11-NEXT: s_setpc_b64 s[30:31]21;22; GFX12-LABEL: global_atomic_csub:23; GFX12: ; %bb.0:24; GFX12-NEXT: s_wait_loadcnt_dscnt 0x025; GFX12-NEXT: s_wait_expcnt 0x026; GFX12-NEXT: s_wait_samplecnt 0x027; GFX12-NEXT: s_wait_bvhcnt 0x028; GFX12-NEXT: s_wait_kmcnt 0x029; GFX12-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN30; GFX12-NEXT: s_wait_loadcnt 0x031; GFX12-NEXT: s_setpc_b64 s[30:31]32 %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1(ptr addrspace(1) %ptr, i32 %data)33 ret i32 %ret34}35 36define i32 @global_atomic_csub_offset(ptr addrspace(1) %ptr, i32 %data) {37; GFX10-LABEL: global_atomic_csub_offset:38; GFX10: ; %bb.0:39; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)40; GFX10-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v041; GFX10-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo42; GFX10-NEXT: global_atomic_csub v0, v[0:1], v2, off glc43; GFX10-NEXT: s_waitcnt vmcnt(0)44; GFX10-NEXT: s_setpc_b64 s[30:31]45;46; GFX11-LABEL: global_atomic_csub_offset:47; GFX11: ; %bb.0:48; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)49; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v050; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)51; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo52; GFX11-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc53; GFX11-NEXT: s_waitcnt vmcnt(0)54; GFX11-NEXT: s_setpc_b64 s[30:31]55;56; GFX12-LABEL: global_atomic_csub_offset:57; GFX12: ; %bb.0:58; GFX12-NEXT: s_wait_loadcnt_dscnt 0x059; GFX12-NEXT: s_wait_expcnt 0x060; GFX12-NEXT: s_wait_samplecnt 0x061; GFX12-NEXT: s_wait_bvhcnt 0x062; GFX12-NEXT: s_wait_kmcnt 0x063; GFX12-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off offset:4096 th:TH_ATOMIC_RETURN64; GFX12-NEXT: s_wait_loadcnt 0x065; GFX12-NEXT: s_setpc_b64 s[30:31]66 %gep = getelementptr i32, ptr addrspace(1) %ptr, i64 102467 %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1(ptr addrspace(1) %gep, i32 %data)68 ret i32 %ret69}70 71define void @global_atomic_csub_nortn(ptr addrspace(1) %ptr, i32 %data) {72; GFX10-LABEL: global_atomic_csub_nortn:73; GFX10: ; %bb.0:74; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)75; GFX10-NEXT: global_atomic_csub v0, v[0:1], v2, off glc76; GFX10-NEXT: s_waitcnt vmcnt(0)77; GFX10-NEXT: s_setpc_b64 s[30:31]78;79; GFX11-LABEL: global_atomic_csub_nortn:80; GFX11: ; %bb.0:81; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)82; GFX11-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc83; GFX11-NEXT: s_waitcnt vmcnt(0)84; GFX11-NEXT: s_setpc_b64 s[30:31]85;86; GFX12-LABEL: global_atomic_csub_nortn:87; GFX12: ; %bb.0:88; GFX12-NEXT: s_wait_loadcnt_dscnt 0x089; GFX12-NEXT: s_wait_expcnt 0x090; GFX12-NEXT: s_wait_samplecnt 0x091; GFX12-NEXT: s_wait_bvhcnt 0x092; GFX12-NEXT: s_wait_kmcnt 0x093; GFX12-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN94; GFX12-NEXT: s_wait_loadcnt 0x095; GFX12-NEXT: s_setpc_b64 s[30:31]96 %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1(ptr addrspace(1) %ptr, i32 %data)97 ret void98}99 100define void @global_atomic_csub_offset_nortn(ptr addrspace(1) %ptr, i32 %data) {101; GFX10-LABEL: global_atomic_csub_offset_nortn:102; GFX10: ; %bb.0:103; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)104; GFX10-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0105; GFX10-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo106; GFX10-NEXT: global_atomic_csub v0, v[0:1], v2, off glc107; GFX10-NEXT: s_waitcnt vmcnt(0)108; GFX10-NEXT: s_setpc_b64 s[30:31]109;110; GFX11-LABEL: global_atomic_csub_offset_nortn:111; GFX11: ; %bb.0:112; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)113; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, 0x1000, v0114; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)115; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo116; GFX11-NEXT: global_atomic_csub_u32 v0, v[0:1], v2, off glc117; GFX11-NEXT: s_waitcnt vmcnt(0)118; GFX11-NEXT: s_setpc_b64 s[30:31]119;120; GFX12-LABEL: global_atomic_csub_offset_nortn:121; GFX12: ; %bb.0:122; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0123; GFX12-NEXT: s_wait_expcnt 0x0124; GFX12-NEXT: s_wait_samplecnt 0x0125; GFX12-NEXT: s_wait_bvhcnt 0x0126; GFX12-NEXT: s_wait_kmcnt 0x0127; GFX12-NEXT: global_atomic_sub_clamp_u32 v0, v[0:1], v2, off offset:4096 th:TH_ATOMIC_RETURN128; GFX12-NEXT: s_wait_loadcnt 0x0129; GFX12-NEXT: s_setpc_b64 s[30:31]130 %gep = getelementptr i32, ptr addrspace(1) %ptr, i64 1024131 %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1(ptr addrspace(1) %gep, i32 %data)132 ret void133}134 135define amdgpu_kernel void @global_atomic_csub_sgpr_base_offset(ptr addrspace(1) %ptr, i32 %data) {136; GFX10-LABEL: global_atomic_csub_sgpr_base_offset:137; GFX10: ; %bb.0:138; GFX10-NEXT: s_clause 0x1139; GFX10-NEXT: s_load_dword s2, s[8:9], 0x8140; GFX10-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0141; GFX10-NEXT: v_mov_b32_e32 v1, 0x1000142; GFX10-NEXT: s_waitcnt lgkmcnt(0)143; GFX10-NEXT: v_mov_b32_e32 v0, s2144; GFX10-NEXT: global_atomic_csub v0, v1, v0, s[0:1] glc145; GFX10-NEXT: s_waitcnt vmcnt(0)146; GFX10-NEXT: global_store_dword v[0:1], v0, off147; GFX10-NEXT: s_endpgm148;149; GFX11-LABEL: global_atomic_csub_sgpr_base_offset:150; GFX11: ; %bb.0:151; GFX11-NEXT: s_clause 0x1152; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8153; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0154; GFX11-NEXT: s_waitcnt lgkmcnt(0)155; GFX11-NEXT: v_dual_mov_b32 v1, 0x1000 :: v_dual_mov_b32 v0, s2156; GFX11-NEXT: global_atomic_csub_u32 v0, v1, v0, s[0:1] glc157; GFX11-NEXT: s_waitcnt vmcnt(0)158; GFX11-NEXT: global_store_b32 v[0:1], v0, off159; GFX11-NEXT: s_endpgm160;161; GFX12-LABEL: global_atomic_csub_sgpr_base_offset:162; GFX12: ; %bb.0:163; GFX12-NEXT: s_load_b96 s[0:2], s[4:5], 0x0164; GFX12-NEXT: s_wait_kmcnt 0x0165; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2166; GFX12-NEXT: global_atomic_sub_clamp_u32 v0, v1, v0, s[0:1] offset:4096 th:TH_ATOMIC_RETURN167; GFX12-NEXT: s_wait_loadcnt 0x0168; GFX12-NEXT: global_store_b32 v[0:1], v0, off169; GFX12-NEXT: s_endpgm170 %gep = getelementptr i32, ptr addrspace(1) %ptr, i64 1024171 %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1(ptr addrspace(1) %gep, i32 %data)172 store i32 %ret, ptr addrspace(1) poison173 ret void174}175 176define amdgpu_kernel void @global_atomic_csub_sgpr_base_offset_nortn(ptr addrspace(1) %ptr, i32 %data) {177; GFX10-LABEL: global_atomic_csub_sgpr_base_offset_nortn:178; GFX10: ; %bb.0:179; GFX10-NEXT: s_clause 0x1180; GFX10-NEXT: s_load_dword s2, s[8:9], 0x8181; GFX10-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0182; GFX10-NEXT: v_mov_b32_e32 v1, 0x1000183; GFX10-NEXT: s_waitcnt lgkmcnt(0)184; GFX10-NEXT: v_mov_b32_e32 v0, s2185; GFX10-NEXT: global_atomic_csub v0, v1, v0, s[0:1] glc186; GFX10-NEXT: s_endpgm187;188; GFX11-LABEL: global_atomic_csub_sgpr_base_offset_nortn:189; GFX11: ; %bb.0:190; GFX11-NEXT: s_clause 0x1191; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8192; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0193; GFX11-NEXT: s_waitcnt lgkmcnt(0)194; GFX11-NEXT: v_dual_mov_b32 v1, 0x1000 :: v_dual_mov_b32 v0, s2195; GFX11-NEXT: global_atomic_csub_u32 v0, v1, v0, s[0:1] glc196; GFX11-NEXT: s_endpgm197;198; GFX12-LABEL: global_atomic_csub_sgpr_base_offset_nortn:199; GFX12: ; %bb.0:200; GFX12-NEXT: s_load_b96 s[0:2], s[4:5], 0x0201; GFX12-NEXT: s_wait_kmcnt 0x0202; GFX12-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2203; GFX12-NEXT: global_atomic_sub_clamp_u32 v0, v1, v0, s[0:1] offset:4096 th:TH_ATOMIC_RETURN204; GFX12-NEXT: s_endpgm205 %gep = getelementptr i32, ptr addrspace(1) %ptr, i64 1024206 %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1(ptr addrspace(1) %gep, i32 %data)207 ret void208}209 210declare i32 @llvm.amdgcn.global.atomic.csub.p1(ptr addrspace(1) nocapture, i32) #1211 212attributes #0 = { nounwind willreturn }213attributes #1 = { argmemonly nounwind }214