556 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - %s | FileCheck -check-prefix=GFX6 %s3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - %s | FileCheck -check-prefix=GFX10 %s4; RUN: not llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -o - %s 2>&1 | FileCheck -check-prefix=GFX11-ERR %s5 6; GFX11-ERR: LLVM ERROR: cannot select: {{.*}} = G_AMDGPU_INTRIN_IMAGE_LOAD intrinsic(@llvm.amdgcn.image.gather47 8define amdgpu_ps <4 x float> @gather4_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %s, float %t) {9; GFX6-LABEL: gather4_o_2d:10; GFX6: ; %bb.0: ; %main_body11; GFX6-NEXT: s_mov_b64 s[14:15], exec12; GFX6-NEXT: s_mov_b32 s0, s213; GFX6-NEXT: s_mov_b32 s1, s314; GFX6-NEXT: s_mov_b32 s2, s415; GFX6-NEXT: s_mov_b32 s3, s516; GFX6-NEXT: s_mov_b32 s4, s617; GFX6-NEXT: s_mov_b32 s5, s718; GFX6-NEXT: s_mov_b32 s6, s819; GFX6-NEXT: s_mov_b32 s7, s920; GFX6-NEXT: s_mov_b32 s8, s1021; GFX6-NEXT: s_mov_b32 s9, s1122; GFX6-NEXT: s_mov_b32 s10, s1223; GFX6-NEXT: s_mov_b32 s11, s1324; GFX6-NEXT: s_wqm_b64 exec, exec25; GFX6-NEXT: s_and_b64 exec, exec, s[14:15]26; GFX6-NEXT: image_gather4_o v[0:3], v[0:2], s[0:7], s[8:11] dmask:0x127; GFX6-NEXT: s_waitcnt vmcnt(0)28; GFX6-NEXT: ; return to shader part epilog29;30; GFX10-LABEL: gather4_o_2d:31; GFX10: ; %bb.0: ; %main_body32; GFX10-NEXT: s_mov_b32 s1, exec_lo33; GFX10-NEXT: s_mov_b32 s0, s234; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo35; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s136; GFX10-NEXT: s_mov_b32 s1, s337; GFX10-NEXT: s_mov_b32 s2, s438; GFX10-NEXT: s_mov_b32 s3, s539; GFX10-NEXT: s_mov_b32 s4, s640; GFX10-NEXT: s_mov_b32 s5, s741; GFX10-NEXT: s_mov_b32 s6, s842; GFX10-NEXT: s_mov_b32 s7, s943; GFX10-NEXT: s_mov_b32 s8, s1044; GFX10-NEXT: s_mov_b32 s9, s1145; GFX10-NEXT: s_mov_b32 s10, s1246; GFX10-NEXT: s_mov_b32 s11, s1347; GFX10-NEXT: image_gather4_o v[0:3], v[0:2], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D48; GFX10-NEXT: s_waitcnt vmcnt(0)49; GFX10-NEXT: ; return to shader part epilog50main_body:51 %v = call <4 x float> @llvm.amdgcn.image.gather4.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)52 ret <4 x float> %v53}54 55define amdgpu_ps <4 x float> @gather4_c_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, float %s, float %t) {56; GFX6-LABEL: gather4_c_o_2d:57; GFX6: ; %bb.0: ; %main_body58; GFX6-NEXT: s_mov_b64 s[14:15], exec59; GFX6-NEXT: s_mov_b32 s0, s260; GFX6-NEXT: s_mov_b32 s1, s361; GFX6-NEXT: s_mov_b32 s2, s462; GFX6-NEXT: s_mov_b32 s3, s563; GFX6-NEXT: s_mov_b32 s4, s664; GFX6-NEXT: s_mov_b32 s5, s765; GFX6-NEXT: s_mov_b32 s6, s866; GFX6-NEXT: s_mov_b32 s7, s967; GFX6-NEXT: s_mov_b32 s8, s1068; GFX6-NEXT: s_mov_b32 s9, s1169; GFX6-NEXT: s_mov_b32 s10, s1270; GFX6-NEXT: s_mov_b32 s11, s1371; GFX6-NEXT: s_wqm_b64 exec, exec72; GFX6-NEXT: s_and_b64 exec, exec, s[14:15]73; GFX6-NEXT: image_gather4_c_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x174; GFX6-NEXT: s_waitcnt vmcnt(0)75; GFX6-NEXT: ; return to shader part epilog76;77; GFX10-LABEL: gather4_c_o_2d:78; GFX10: ; %bb.0: ; %main_body79; GFX10-NEXT: s_mov_b32 s1, exec_lo80; GFX10-NEXT: s_mov_b32 s0, s281; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo82; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s183; GFX10-NEXT: s_mov_b32 s1, s384; GFX10-NEXT: s_mov_b32 s2, s485; GFX10-NEXT: s_mov_b32 s3, s586; GFX10-NEXT: s_mov_b32 s4, s687; GFX10-NEXT: s_mov_b32 s5, s788; GFX10-NEXT: s_mov_b32 s6, s889; GFX10-NEXT: s_mov_b32 s7, s990; GFX10-NEXT: s_mov_b32 s8, s1091; GFX10-NEXT: s_mov_b32 s9, s1192; GFX10-NEXT: s_mov_b32 s10, s1293; GFX10-NEXT: s_mov_b32 s11, s1394; GFX10-NEXT: image_gather4_c_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D95; GFX10-NEXT: s_waitcnt vmcnt(0)96; GFX10-NEXT: ; return to shader part epilog97main_body:98 %v = call <4 x float> @llvm.amdgcn.image.gather4.c.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)99 ret <4 x float> %v100}101 102define amdgpu_ps <4 x float> @gather4_cl_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %s, float %t, float %clamp) {103; GFX6-LABEL: gather4_cl_o_2d:104; GFX6: ; %bb.0: ; %main_body105; GFX6-NEXT: s_mov_b64 s[14:15], exec106; GFX6-NEXT: s_mov_b32 s0, s2107; GFX6-NEXT: s_mov_b32 s1, s3108; GFX6-NEXT: s_mov_b32 s2, s4109; GFX6-NEXT: s_mov_b32 s3, s5110; GFX6-NEXT: s_mov_b32 s4, s6111; GFX6-NEXT: s_mov_b32 s5, s7112; GFX6-NEXT: s_mov_b32 s6, s8113; GFX6-NEXT: s_mov_b32 s7, s9114; GFX6-NEXT: s_mov_b32 s8, s10115; GFX6-NEXT: s_mov_b32 s9, s11116; GFX6-NEXT: s_mov_b32 s10, s12117; GFX6-NEXT: s_mov_b32 s11, s13118; GFX6-NEXT: s_wqm_b64 exec, exec119; GFX6-NEXT: s_and_b64 exec, exec, s[14:15]120; GFX6-NEXT: image_gather4_cl_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1121; GFX6-NEXT: s_waitcnt vmcnt(0)122; GFX6-NEXT: ; return to shader part epilog123;124; GFX10-LABEL: gather4_cl_o_2d:125; GFX10: ; %bb.0: ; %main_body126; GFX10-NEXT: s_mov_b32 s1, exec_lo127; GFX10-NEXT: s_mov_b32 s0, s2128; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo129; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s1130; GFX10-NEXT: s_mov_b32 s1, s3131; GFX10-NEXT: s_mov_b32 s2, s4132; GFX10-NEXT: s_mov_b32 s3, s5133; GFX10-NEXT: s_mov_b32 s4, s6134; GFX10-NEXT: s_mov_b32 s5, s7135; GFX10-NEXT: s_mov_b32 s6, s8136; GFX10-NEXT: s_mov_b32 s7, s9137; GFX10-NEXT: s_mov_b32 s8, s10138; GFX10-NEXT: s_mov_b32 s9, s11139; GFX10-NEXT: s_mov_b32 s10, s12140; GFX10-NEXT: s_mov_b32 s11, s13141; GFX10-NEXT: image_gather4_cl_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D142; GFX10-NEXT: s_waitcnt vmcnt(0)143; GFX10-NEXT: ; return to shader part epilog144main_body:145 %v = call <4 x float> @llvm.amdgcn.image.gather4.cl.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)146 ret <4 x float> %v147}148 149define amdgpu_ps <4 x float> @gather4_c_cl_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, float %s, float %t, float %clamp) {150; GFX6-LABEL: gather4_c_cl_o_2d:151; GFX6: ; %bb.0: ; %main_body152; GFX6-NEXT: s_mov_b64 s[14:15], exec153; GFX6-NEXT: s_mov_b32 s0, s2154; GFX6-NEXT: s_mov_b32 s1, s3155; GFX6-NEXT: s_mov_b32 s2, s4156; GFX6-NEXT: s_mov_b32 s3, s5157; GFX6-NEXT: s_mov_b32 s4, s6158; GFX6-NEXT: s_mov_b32 s5, s7159; GFX6-NEXT: s_mov_b32 s6, s8160; GFX6-NEXT: s_mov_b32 s7, s9161; GFX6-NEXT: s_mov_b32 s8, s10162; GFX6-NEXT: s_mov_b32 s9, s11163; GFX6-NEXT: s_mov_b32 s10, s12164; GFX6-NEXT: s_mov_b32 s11, s13165; GFX6-NEXT: s_wqm_b64 exec, exec166; GFX6-NEXT: s_and_b64 exec, exec, s[14:15]167; GFX6-NEXT: image_gather4_c_cl_o v[0:3], v[0:4], s[0:7], s[8:11] dmask:0x1168; GFX6-NEXT: s_waitcnt vmcnt(0)169; GFX6-NEXT: ; return to shader part epilog170;171; GFX10-LABEL: gather4_c_cl_o_2d:172; GFX10: ; %bb.0: ; %main_body173; GFX10-NEXT: s_mov_b32 s1, exec_lo174; GFX10-NEXT: s_mov_b32 s0, s2175; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo176; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s1177; GFX10-NEXT: s_mov_b32 s1, s3178; GFX10-NEXT: s_mov_b32 s2, s4179; GFX10-NEXT: s_mov_b32 s3, s5180; GFX10-NEXT: s_mov_b32 s4, s6181; GFX10-NEXT: s_mov_b32 s5, s7182; GFX10-NEXT: s_mov_b32 s6, s8183; GFX10-NEXT: s_mov_b32 s7, s9184; GFX10-NEXT: s_mov_b32 s8, s10185; GFX10-NEXT: s_mov_b32 s9, s11186; GFX10-NEXT: s_mov_b32 s10, s12187; GFX10-NEXT: s_mov_b32 s11, s13188; GFX10-NEXT: image_gather4_c_cl_o v[0:3], v[0:4], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D189; GFX10-NEXT: s_waitcnt vmcnt(0)190; GFX10-NEXT: ; return to shader part epilog191main_body:192 %v = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)193 ret <4 x float> %v194}195 196define amdgpu_ps <4 x float> @gather4_b_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %bias, float %s, float %t) {197; GFX6-LABEL: gather4_b_o_2d:198; GFX6: ; %bb.0: ; %main_body199; GFX6-NEXT: s_mov_b64 s[14:15], exec200; GFX6-NEXT: s_mov_b32 s0, s2201; GFX6-NEXT: s_mov_b32 s1, s3202; GFX6-NEXT: s_mov_b32 s2, s4203; GFX6-NEXT: s_mov_b32 s3, s5204; GFX6-NEXT: s_mov_b32 s4, s6205; GFX6-NEXT: s_mov_b32 s5, s7206; GFX6-NEXT: s_mov_b32 s6, s8207; GFX6-NEXT: s_mov_b32 s7, s9208; GFX6-NEXT: s_mov_b32 s8, s10209; GFX6-NEXT: s_mov_b32 s9, s11210; GFX6-NEXT: s_mov_b32 s10, s12211; GFX6-NEXT: s_mov_b32 s11, s13212; GFX6-NEXT: s_wqm_b64 exec, exec213; GFX6-NEXT: s_and_b64 exec, exec, s[14:15]214; GFX6-NEXT: image_gather4_b_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1215; GFX6-NEXT: s_waitcnt vmcnt(0)216; GFX6-NEXT: ; return to shader part epilog217;218; GFX10-LABEL: gather4_b_o_2d:219; GFX10: ; %bb.0: ; %main_body220; GFX10-NEXT: s_mov_b32 s1, exec_lo221; GFX10-NEXT: s_mov_b32 s0, s2222; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo223; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s1224; GFX10-NEXT: s_mov_b32 s1, s3225; GFX10-NEXT: s_mov_b32 s2, s4226; GFX10-NEXT: s_mov_b32 s3, s5227; GFX10-NEXT: s_mov_b32 s4, s6228; GFX10-NEXT: s_mov_b32 s5, s7229; GFX10-NEXT: s_mov_b32 s6, s8230; GFX10-NEXT: s_mov_b32 s7, s9231; GFX10-NEXT: s_mov_b32 s8, s10232; GFX10-NEXT: s_mov_b32 s9, s11233; GFX10-NEXT: s_mov_b32 s10, s12234; GFX10-NEXT: s_mov_b32 s11, s13235; GFX10-NEXT: image_gather4_b_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D236; GFX10-NEXT: s_waitcnt vmcnt(0)237; GFX10-NEXT: ; return to shader part epilog238main_body:239 %v = call <4 x float> @llvm.amdgcn.image.gather4.b.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)240 ret <4 x float> %v241}242 243define amdgpu_ps <4 x float> @gather4_c_b_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %bias, float %zcompare, float %s, float %t) {244; GFX6-LABEL: gather4_c_b_o_2d:245; GFX6: ; %bb.0: ; %main_body246; GFX6-NEXT: s_mov_b64 s[14:15], exec247; GFX6-NEXT: s_mov_b32 s0, s2248; GFX6-NEXT: s_mov_b32 s1, s3249; GFX6-NEXT: s_mov_b32 s2, s4250; GFX6-NEXT: s_mov_b32 s3, s5251; GFX6-NEXT: s_mov_b32 s4, s6252; GFX6-NEXT: s_mov_b32 s5, s7253; GFX6-NEXT: s_mov_b32 s6, s8254; GFX6-NEXT: s_mov_b32 s7, s9255; GFX6-NEXT: s_mov_b32 s8, s10256; GFX6-NEXT: s_mov_b32 s9, s11257; GFX6-NEXT: s_mov_b32 s10, s12258; GFX6-NEXT: s_mov_b32 s11, s13259; GFX6-NEXT: s_wqm_b64 exec, exec260; GFX6-NEXT: s_and_b64 exec, exec, s[14:15]261; GFX6-NEXT: image_gather4_c_b_o v[0:3], v[0:4], s[0:7], s[8:11] dmask:0x1262; GFX6-NEXT: s_waitcnt vmcnt(0)263; GFX6-NEXT: ; return to shader part epilog264;265; GFX10-LABEL: gather4_c_b_o_2d:266; GFX10: ; %bb.0: ; %main_body267; GFX10-NEXT: s_mov_b32 s1, exec_lo268; GFX10-NEXT: s_mov_b32 s0, s2269; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo270; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s1271; GFX10-NEXT: s_mov_b32 s1, s3272; GFX10-NEXT: s_mov_b32 s2, s4273; GFX10-NEXT: s_mov_b32 s3, s5274; GFX10-NEXT: s_mov_b32 s4, s6275; GFX10-NEXT: s_mov_b32 s5, s7276; GFX10-NEXT: s_mov_b32 s6, s8277; GFX10-NEXT: s_mov_b32 s7, s9278; GFX10-NEXT: s_mov_b32 s8, s10279; GFX10-NEXT: s_mov_b32 s9, s11280; GFX10-NEXT: s_mov_b32 s10, s12281; GFX10-NEXT: s_mov_b32 s11, s13282; GFX10-NEXT: image_gather4_c_b_o v[0:3], v[0:4], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D283; GFX10-NEXT: s_waitcnt vmcnt(0)284; GFX10-NEXT: ; return to shader part epilog285main_body:286 %v = call <4 x float> @llvm.amdgcn.image.gather4.c.b.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %zcompare, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)287 ret <4 x float> %v288}289 290define amdgpu_ps <4 x float> @gather4_b_cl_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %bias, float %s, float %t, float %clamp) {291; GFX6-LABEL: gather4_b_cl_o_2d:292; GFX6: ; %bb.0: ; %main_body293; GFX6-NEXT: s_mov_b32 s0, s2294; GFX6-NEXT: s_mov_b32 s1, s3295; GFX6-NEXT: s_mov_b32 s2, s4296; GFX6-NEXT: s_mov_b32 s3, s5297; GFX6-NEXT: s_mov_b32 s4, s6298; GFX6-NEXT: s_mov_b32 s5, s7299; GFX6-NEXT: s_mov_b32 s6, s8300; GFX6-NEXT: s_mov_b32 s7, s9301; GFX6-NEXT: s_mov_b32 s8, s10302; GFX6-NEXT: s_mov_b32 s9, s11303; GFX6-NEXT: s_mov_b32 s10, s12304; GFX6-NEXT: s_mov_b32 s11, s13305; GFX6-NEXT: image_gather4_b_cl_o v[0:3], v[0:4], s[0:7], s[8:11] dmask:0x1306; GFX6-NEXT: s_waitcnt vmcnt(0)307; GFX6-NEXT: ; return to shader part epilog308;309; GFX10-LABEL: gather4_b_cl_o_2d:310; GFX10: ; %bb.0: ; %main_body311; GFX10-NEXT: s_mov_b32 s0, s2312; GFX10-NEXT: s_mov_b32 s1, s3313; GFX10-NEXT: s_mov_b32 s2, s4314; GFX10-NEXT: s_mov_b32 s3, s5315; GFX10-NEXT: s_mov_b32 s4, s6316; GFX10-NEXT: s_mov_b32 s5, s7317; GFX10-NEXT: s_mov_b32 s6, s8318; GFX10-NEXT: s_mov_b32 s7, s9319; GFX10-NEXT: s_mov_b32 s8, s10320; GFX10-NEXT: s_mov_b32 s9, s11321; GFX10-NEXT: s_mov_b32 s10, s12322; GFX10-NEXT: s_mov_b32 s11, s13323; GFX10-NEXT: image_gather4_b_cl_o v[0:3], v[0:4], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D324; GFX10-NEXT: s_waitcnt vmcnt(0)325; GFX10-NEXT: ; return to shader part epilog326main_body:327 %v = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)328 ret <4 x float> %v329}330 331define amdgpu_ps <4 x float> @gather4_c_b_cl_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %bias, float %zcompare, float %s, float %t, float %clamp) {332; GFX6-LABEL: gather4_c_b_cl_o_2d:333; GFX6: ; %bb.0: ; %main_body334; GFX6-NEXT: s_mov_b64 s[14:15], exec335; GFX6-NEXT: s_mov_b32 s0, s2336; GFX6-NEXT: s_mov_b32 s1, s3337; GFX6-NEXT: s_mov_b32 s2, s4338; GFX6-NEXT: s_mov_b32 s3, s5339; GFX6-NEXT: s_mov_b32 s4, s6340; GFX6-NEXT: s_mov_b32 s5, s7341; GFX6-NEXT: s_mov_b32 s6, s8342; GFX6-NEXT: s_mov_b32 s7, s9343; GFX6-NEXT: s_mov_b32 s8, s10344; GFX6-NEXT: s_mov_b32 s9, s11345; GFX6-NEXT: s_mov_b32 s10, s12346; GFX6-NEXT: s_mov_b32 s11, s13347; GFX6-NEXT: s_wqm_b64 exec, exec348; GFX6-NEXT: s_and_b64 exec, exec, s[14:15]349; GFX6-NEXT: image_gather4_c_b_cl_o v[0:3], v[0:5], s[0:7], s[8:11] dmask:0x1350; GFX6-NEXT: s_waitcnt vmcnt(0)351; GFX6-NEXT: ; return to shader part epilog352;353; GFX10-LABEL: gather4_c_b_cl_o_2d:354; GFX10: ; %bb.0: ; %main_body355; GFX10-NEXT: s_mov_b32 s1, exec_lo356; GFX10-NEXT: s_mov_b32 s0, s2357; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo358; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s1359; GFX10-NEXT: s_mov_b32 s1, s3360; GFX10-NEXT: s_mov_b32 s2, s4361; GFX10-NEXT: s_mov_b32 s3, s5362; GFX10-NEXT: s_mov_b32 s4, s6363; GFX10-NEXT: s_mov_b32 s5, s7364; GFX10-NEXT: s_mov_b32 s6, s8365; GFX10-NEXT: s_mov_b32 s7, s9366; GFX10-NEXT: s_mov_b32 s8, s10367; GFX10-NEXT: s_mov_b32 s9, s11368; GFX10-NEXT: s_mov_b32 s10, s12369; GFX10-NEXT: s_mov_b32 s11, s13370; GFX10-NEXT: image_gather4_c_b_cl_o v[0:3], v[0:5], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D371; GFX10-NEXT: s_waitcnt vmcnt(0)372; GFX10-NEXT: ; return to shader part epilog373main_body:374 %v = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %bias, float %zcompare, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)375 ret <4 x float> %v376}377 378define amdgpu_ps <4 x float> @gather4_l_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %s, float %t, float %lod) {379; GFX6-LABEL: gather4_l_o_2d:380; GFX6: ; %bb.0: ; %main_body381; GFX6-NEXT: s_mov_b32 s0, s2382; GFX6-NEXT: s_mov_b32 s1, s3383; GFX6-NEXT: s_mov_b32 s2, s4384; GFX6-NEXT: s_mov_b32 s3, s5385; GFX6-NEXT: s_mov_b32 s4, s6386; GFX6-NEXT: s_mov_b32 s5, s7387; GFX6-NEXT: s_mov_b32 s6, s8388; GFX6-NEXT: s_mov_b32 s7, s9389; GFX6-NEXT: s_mov_b32 s8, s10390; GFX6-NEXT: s_mov_b32 s9, s11391; GFX6-NEXT: s_mov_b32 s10, s12392; GFX6-NEXT: s_mov_b32 s11, s13393; GFX6-NEXT: image_gather4_l_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1394; GFX6-NEXT: s_waitcnt vmcnt(0)395; GFX6-NEXT: ; return to shader part epilog396;397; GFX10-LABEL: gather4_l_o_2d:398; GFX10: ; %bb.0: ; %main_body399; GFX10-NEXT: s_mov_b32 s0, s2400; GFX10-NEXT: s_mov_b32 s1, s3401; GFX10-NEXT: s_mov_b32 s2, s4402; GFX10-NEXT: s_mov_b32 s3, s5403; GFX10-NEXT: s_mov_b32 s4, s6404; GFX10-NEXT: s_mov_b32 s5, s7405; GFX10-NEXT: s_mov_b32 s6, s8406; GFX10-NEXT: s_mov_b32 s7, s9407; GFX10-NEXT: s_mov_b32 s8, s10408; GFX10-NEXT: s_mov_b32 s9, s11409; GFX10-NEXT: s_mov_b32 s10, s12410; GFX10-NEXT: s_mov_b32 s11, s13411; GFX10-NEXT: image_gather4_l_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D412; GFX10-NEXT: s_waitcnt vmcnt(0)413; GFX10-NEXT: ; return to shader part epilog414main_body:415 %v = call <4 x float> @llvm.amdgcn.image.gather4.l.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, float %lod, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)416 ret <4 x float> %v417}418 419define amdgpu_ps <4 x float> @gather4_c_l_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, float %s, float %t, float %lod) {420; GFX6-LABEL: gather4_c_l_o_2d:421; GFX6: ; %bb.0: ; %main_body422; GFX6-NEXT: s_mov_b32 s0, s2423; GFX6-NEXT: s_mov_b32 s1, s3424; GFX6-NEXT: s_mov_b32 s2, s4425; GFX6-NEXT: s_mov_b32 s3, s5426; GFX6-NEXT: s_mov_b32 s4, s6427; GFX6-NEXT: s_mov_b32 s5, s7428; GFX6-NEXT: s_mov_b32 s6, s8429; GFX6-NEXT: s_mov_b32 s7, s9430; GFX6-NEXT: s_mov_b32 s8, s10431; GFX6-NEXT: s_mov_b32 s9, s11432; GFX6-NEXT: s_mov_b32 s10, s12433; GFX6-NEXT: s_mov_b32 s11, s13434; GFX6-NEXT: image_gather4_c_l_o v[0:3], v[0:4], s[0:7], s[8:11] dmask:0x1435; GFX6-NEXT: s_waitcnt vmcnt(0)436; GFX6-NEXT: ; return to shader part epilog437;438; GFX10-LABEL: gather4_c_l_o_2d:439; GFX10: ; %bb.0: ; %main_body440; GFX10-NEXT: s_mov_b32 s0, s2441; GFX10-NEXT: s_mov_b32 s1, s3442; GFX10-NEXT: s_mov_b32 s2, s4443; GFX10-NEXT: s_mov_b32 s3, s5444; GFX10-NEXT: s_mov_b32 s4, s6445; GFX10-NEXT: s_mov_b32 s5, s7446; GFX10-NEXT: s_mov_b32 s6, s8447; GFX10-NEXT: s_mov_b32 s7, s9448; GFX10-NEXT: s_mov_b32 s8, s10449; GFX10-NEXT: s_mov_b32 s9, s11450; GFX10-NEXT: s_mov_b32 s10, s12451; GFX10-NEXT: s_mov_b32 s11, s13452; GFX10-NEXT: image_gather4_c_l_o v[0:3], v[0:4], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D453; GFX10-NEXT: s_waitcnt vmcnt(0)454; GFX10-NEXT: ; return to shader part epilog455main_body:456 %v = call <4 x float> @llvm.amdgcn.image.gather4.c.l.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, float %lod, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)457 ret <4 x float> %v458}459 460define amdgpu_ps <4 x float> @gather4_lz_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %s, float %t) {461; GFX6-LABEL: gather4_lz_o_2d:462; GFX6: ; %bb.0: ; %main_body463; GFX6-NEXT: s_mov_b32 s0, s2464; GFX6-NEXT: s_mov_b32 s1, s3465; GFX6-NEXT: s_mov_b32 s2, s4466; GFX6-NEXT: s_mov_b32 s3, s5467; GFX6-NEXT: s_mov_b32 s4, s6468; GFX6-NEXT: s_mov_b32 s5, s7469; GFX6-NEXT: s_mov_b32 s6, s8470; GFX6-NEXT: s_mov_b32 s7, s9471; GFX6-NEXT: s_mov_b32 s8, s10472; GFX6-NEXT: s_mov_b32 s9, s11473; GFX6-NEXT: s_mov_b32 s10, s12474; GFX6-NEXT: s_mov_b32 s11, s13475; GFX6-NEXT: image_gather4_lz_o v[0:3], v[0:2], s[0:7], s[8:11] dmask:0x1476; GFX6-NEXT: s_waitcnt vmcnt(0)477; GFX6-NEXT: ; return to shader part epilog478;479; GFX10-LABEL: gather4_lz_o_2d:480; GFX10: ; %bb.0: ; %main_body481; GFX10-NEXT: s_mov_b32 s0, s2482; GFX10-NEXT: s_mov_b32 s1, s3483; GFX10-NEXT: s_mov_b32 s2, s4484; GFX10-NEXT: s_mov_b32 s3, s5485; GFX10-NEXT: s_mov_b32 s4, s6486; GFX10-NEXT: s_mov_b32 s5, s7487; GFX10-NEXT: s_mov_b32 s6, s8488; GFX10-NEXT: s_mov_b32 s7, s9489; GFX10-NEXT: s_mov_b32 s8, s10490; GFX10-NEXT: s_mov_b32 s9, s11491; GFX10-NEXT: s_mov_b32 s10, s12492; GFX10-NEXT: s_mov_b32 s11, s13493; GFX10-NEXT: image_gather4_lz_o v[0:3], v[0:2], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D494; GFX10-NEXT: s_waitcnt vmcnt(0)495; GFX10-NEXT: ; return to shader part epilog496main_body:497 %v = call <4 x float> @llvm.amdgcn.image.gather4.lz.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)498 ret <4 x float> %v499}500 501define amdgpu_ps <4 x float> @gather4_c_lz_o_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, float %s, float %t) {502; GFX6-LABEL: gather4_c_lz_o_2d:503; GFX6: ; %bb.0: ; %main_body504; GFX6-NEXT: s_mov_b32 s0, s2505; GFX6-NEXT: s_mov_b32 s1, s3506; GFX6-NEXT: s_mov_b32 s2, s4507; GFX6-NEXT: s_mov_b32 s3, s5508; GFX6-NEXT: s_mov_b32 s4, s6509; GFX6-NEXT: s_mov_b32 s5, s7510; GFX6-NEXT: s_mov_b32 s6, s8511; GFX6-NEXT: s_mov_b32 s7, s9512; GFX6-NEXT: s_mov_b32 s8, s10513; GFX6-NEXT: s_mov_b32 s9, s11514; GFX6-NEXT: s_mov_b32 s10, s12515; GFX6-NEXT: s_mov_b32 s11, s13516; GFX6-NEXT: image_gather4_c_lz_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1517; GFX6-NEXT: s_waitcnt vmcnt(0)518; GFX6-NEXT: ; return to shader part epilog519;520; GFX10-LABEL: gather4_c_lz_o_2d:521; GFX10: ; %bb.0: ; %main_body522; GFX10-NEXT: s_mov_b32 s0, s2523; GFX10-NEXT: s_mov_b32 s1, s3524; GFX10-NEXT: s_mov_b32 s2, s4525; GFX10-NEXT: s_mov_b32 s3, s5526; GFX10-NEXT: s_mov_b32 s4, s6527; GFX10-NEXT: s_mov_b32 s5, s7528; GFX10-NEXT: s_mov_b32 s6, s8529; GFX10-NEXT: s_mov_b32 s7, s9530; GFX10-NEXT: s_mov_b32 s8, s10531; GFX10-NEXT: s_mov_b32 s9, s11532; GFX10-NEXT: s_mov_b32 s10, s12533; GFX10-NEXT: s_mov_b32 s11, s13534; GFX10-NEXT: image_gather4_c_lz_o v[0:3], v[0:3], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D535; GFX10-NEXT: s_waitcnt vmcnt(0)536; GFX10-NEXT: ; return to shader part epilog537main_body:538 %v = call <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcompare, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0)539 ret <4 x float> %v540}541 542declare <4 x float> @llvm.amdgcn.image.gather4.o.2d.v4f32.f32(i32 immarg, i32, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0543declare <4 x float> @llvm.amdgcn.image.gather4.c.o.2d.v4f32.f32(i32 immarg, i32, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0544declare <4 x float> @llvm.amdgcn.image.gather4.cl.o.2d.v4f32.f32(i32 immarg, i32, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0545declare <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.2d.v4f32.f32(i32 immarg, i32, float, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0546declare <4 x float> @llvm.amdgcn.image.gather4.b.o.2d.v4f32.f32.f32(i32 immarg, i32, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0547declare <4 x float> @llvm.amdgcn.image.gather4.c.b.o.2d.v4f32.f32.f32(i32 immarg, i32, float, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0548declare <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.2d.v4f32.f32.f32(i32 immarg, i32, float, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0549declare <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.2d.v4f32.f32.f32(i32 immarg, i32, float, float, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0550declare <4 x float> @llvm.amdgcn.image.gather4.l.o.2d.v4f32.f32(i32 immarg, i32, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0551declare <4 x float> @llvm.amdgcn.image.gather4.c.l.o.2d.v4f32.f32(i32 immarg, i32, float, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0552declare <4 x float> @llvm.amdgcn.image.gather4.lz.o.2d.v4f32.f32(i32 immarg, i32, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0553declare <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.2d.v4f32.f32(i32 immarg, i32, float, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #0554 555attributes #0 = { nounwind readonly }556