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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10 %s3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GFX11 %s4; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GFX12 %s5 6define amdgpu_ps <4 x float> @sample_d_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, float %s) {7; GFX10-LABEL: sample_d_1d:8; GFX10: ; %bb.0: ; %main_body9; GFX10-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D10; GFX10-NEXT: s_waitcnt vmcnt(0)11; GFX10-NEXT: ; return to shader part epilog12;13; GFX11-LABEL: sample_d_1d:14; GFX11: ; %bb.0: ; %main_body15; GFX11-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D16; GFX11-NEXT: s_waitcnt vmcnt(0)17; GFX11-NEXT: ; return to shader part epilog18;19; GFX12-LABEL: sample_d_1d:20; GFX12: ; %bb.0: ; %main_body21; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D22; GFX12-NEXT: s_wait_samplecnt 0x023; GFX12-NEXT: ; return to shader part epilog24main_body:25 %v = call <4 x float> @llvm.amdgcn.image.sample.d.1d.v4f32.f16.f32(i32 15, half %dsdh, half %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)26 ret <4 x float> %v27}28 29define amdgpu_ps <4 x float> @sample_d_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t) {30; GFX10-LABEL: sample_d_2d:31; GFX10: ; %bb.0: ; %main_body32; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v033; GFX10-NEXT: v_and_b32_e32 v2, 0xffff, v234; GFX10-NEXT: v_lshl_or_b32 v0, v1, 16, v035; GFX10-NEXT: v_lshl_or_b32 v1, v3, 16, v236; GFX10-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D37; GFX10-NEXT: s_waitcnt vmcnt(0)38; GFX10-NEXT: ; return to shader part epilog39;40; GFX11-LABEL: sample_d_2d:41; GFX11: ; %bb.0: ; %main_body42; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v043; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v244; GFX11-NEXT: v_lshl_or_b32 v0, v1, 16, v045; GFX11-NEXT: v_lshl_or_b32 v1, v3, 16, v246; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D47; GFX11-NEXT: s_waitcnt vmcnt(0)48; GFX11-NEXT: ; return to shader part epilog49;50; GFX12-LABEL: sample_d_2d:51; GFX12: ; %bb.0: ; %main_body52; GFX12-NEXT: v_and_b32_e32 v0, 0xffff, v053; GFX12-NEXT: v_and_b32_e32 v2, 0xffff, v254; GFX12-NEXT: v_lshl_or_b32 v0, v1, 16, v055; GFX12-NEXT: v_lshl_or_b32 v1, v3, 16, v256; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D57; GFX12-NEXT: s_wait_samplecnt 0x058; GFX12-NEXT: ; return to shader part epilog59main_body:60 %v = call <4 x float> @llvm.amdgcn.image.sample.d.2d.v4f32.f16.f32(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)61 ret <4 x float> %v62}63 64define amdgpu_ps <4 x float> @sample_d_3d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %drdh, half %dsdv, half %dtdv, half %drdv, float %s, float %t, float %r) {65; GFX10-LABEL: sample_d_3d:66; GFX10: ; %bb.0: ; %main_body67; GFX10-NEXT: v_mov_b32_e32 v9, v368; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v069; GFX10-NEXT: v_mov_b32_e32 v3, v270; GFX10-NEXT: v_and_b32_e32 v9, 0xffff, v971; GFX10-NEXT: v_lshl_or_b32 v2, v1, 16, v072; GFX10-NEXT: v_lshl_or_b32 v4, v4, 16, v973; GFX10-NEXT: image_sample_d_g16 v[0:3], v[2:8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D74; GFX10-NEXT: s_waitcnt vmcnt(0)75; GFX10-NEXT: ; return to shader part epilog76;77; GFX11-LABEL: sample_d_3d:78; GFX11: ; %bb.0: ; %main_body79; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v080; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v381; GFX11-NEXT: v_lshl_or_b32 v0, v1, 16, v082; GFX11-NEXT: v_lshl_or_b32 v1, v4, 16, v383; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v1, v5, v[6:8]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D84; GFX11-NEXT: s_waitcnt vmcnt(0)85; GFX11-NEXT: ; return to shader part epilog86;87; GFX12-LABEL: sample_d_3d:88; GFX12: ; %bb.0: ; %main_body89; GFX12-NEXT: v_and_b32_e32 v0, 0xffff, v090; GFX12-NEXT: v_and_b32_e32 v3, 0xffff, v391; GFX12-NEXT: v_lshl_or_b32 v0, v1, 16, v092; GFX12-NEXT: v_lshl_or_b32 v1, v4, 16, v393; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v1, v[5:8]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D94; GFX12-NEXT: s_wait_samplecnt 0x095; GFX12-NEXT: ; return to shader part epilog96main_body:97 %v = call <4 x float> @llvm.amdgcn.image.sample.d.3d.v4f32.f16.f32(i32 15, half %dsdh, half %dtdh, half %drdh, half %dsdv, half %dtdv, half %drdv, float %s, float %t, float %r, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)98 ret <4 x float> %v99}100 101define amdgpu_ps <4 x float> @sample_c_d_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, float %s) {102; GFX10-LABEL: sample_c_d_1d:103; GFX10: ; %bb.0: ; %main_body104; GFX10-NEXT: image_sample_c_d_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D105; GFX10-NEXT: s_waitcnt vmcnt(0)106; GFX10-NEXT: ; return to shader part epilog107;108; GFX11-LABEL: sample_c_d_1d:109; GFX11: ; %bb.0: ; %main_body110; GFX11-NEXT: image_sample_c_d_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D111; GFX11-NEXT: s_waitcnt vmcnt(0)112; GFX11-NEXT: ; return to shader part epilog113;114; GFX12-LABEL: sample_c_d_1d:115; GFX12: ; %bb.0: ; %main_body116; GFX12-NEXT: image_sample_c_d_g16 v[0:3], [v0, v1, v2, v3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D117; GFX12-NEXT: s_wait_samplecnt 0x0118; GFX12-NEXT: ; return to shader part epilog119main_body:120 %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.1d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)121 ret <4 x float> %v122}123 124define amdgpu_ps <4 x float> @sample_c_d_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t) {125; GFX10-LABEL: sample_c_d_2d:126; GFX10: ; %bb.0: ; %main_body127; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v1128; GFX10-NEXT: v_and_b32_e32 v3, 0xffff, v3129; GFX10-NEXT: v_lshl_or_b32 v1, v2, 16, v1130; GFX10-NEXT: v_lshl_or_b32 v2, v4, 16, v3131; GFX10-NEXT: image_sample_c_d_g16 v[0:3], [v0, v1, v2, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D132; GFX10-NEXT: s_waitcnt vmcnt(0)133; GFX10-NEXT: ; return to shader part epilog134;135; GFX11-LABEL: sample_c_d_2d:136; GFX11: ; %bb.0: ; %main_body137; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1138; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3139; GFX11-NEXT: v_lshl_or_b32 v1, v2, 16, v1140; GFX11-NEXT: v_lshl_or_b32 v2, v4, 16, v3141; GFX11-NEXT: image_sample_c_d_g16 v[0:3], [v0, v1, v2, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D142; GFX11-NEXT: s_waitcnt vmcnt(0)143; GFX11-NEXT: ; return to shader part epilog144;145; GFX12-LABEL: sample_c_d_2d:146; GFX12: ; %bb.0: ; %main_body147; GFX12-NEXT: v_and_b32_e32 v1, 0xffff, v1148; GFX12-NEXT: v_and_b32_e32 v3, 0xffff, v3149; GFX12-NEXT: v_lshl_or_b32 v1, v2, 16, v1150; GFX12-NEXT: v_lshl_or_b32 v2, v4, 16, v3151; GFX12-NEXT: image_sample_c_d_g16 v[0:3], [v0, v1, v2, v[5:6]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D152; GFX12-NEXT: s_wait_samplecnt 0x0153; GFX12-NEXT: ; return to shader part epilog154main_body:155 %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.2d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)156 ret <4 x float> %v157}158 159define amdgpu_ps <4 x float> @sample_d_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dsdv, float %s, float %clamp) {160; GFX10-LABEL: sample_d_cl_1d:161; GFX10: ; %bb.0: ; %main_body162; GFX10-NEXT: image_sample_d_cl_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D163; GFX10-NEXT: s_waitcnt vmcnt(0)164; GFX10-NEXT: ; return to shader part epilog165;166; GFX11-LABEL: sample_d_cl_1d:167; GFX11: ; %bb.0: ; %main_body168; GFX11-NEXT: image_sample_d_cl_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D169; GFX11-NEXT: s_waitcnt vmcnt(0)170; GFX11-NEXT: ; return to shader part epilog171;172; GFX12-LABEL: sample_d_cl_1d:173; GFX12: ; %bb.0: ; %main_body174; GFX12-NEXT: image_sample_d_cl_g16 v[0:3], [v0, v1, v2, v3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D175; GFX12-NEXT: s_wait_samplecnt 0x0176; GFX12-NEXT: ; return to shader part epilog177main_body:178 %v = call <4 x float> @llvm.amdgcn.image.sample.d.cl.1d.v4f32.f16.f32(i32 15, half %dsdh, half %dsdv, float %s, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)179 ret <4 x float> %v180}181 182define amdgpu_ps <4 x float> @sample_d_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp) {183; GFX10-LABEL: sample_d_cl_2d:184; GFX10: ; %bb.0: ; %main_body185; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0186; GFX10-NEXT: v_and_b32_e32 v2, 0xffff, v2187; GFX10-NEXT: v_lshl_or_b32 v0, v1, 16, v0188; GFX10-NEXT: v_lshl_or_b32 v1, v3, 16, v2189; GFX10-NEXT: image_sample_d_cl_g16 v[0:3], [v0, v1, v4, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D190; GFX10-NEXT: s_waitcnt vmcnt(0)191; GFX10-NEXT: ; return to shader part epilog192;193; GFX11-LABEL: sample_d_cl_2d:194; GFX11: ; %bb.0: ; %main_body195; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0196; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2197; GFX11-NEXT: v_lshl_or_b32 v0, v1, 16, v0198; GFX11-NEXT: v_lshl_or_b32 v1, v3, 16, v2199; GFX11-NEXT: image_sample_d_cl_g16 v[0:3], [v0, v1, v4, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D200; GFX11-NEXT: s_waitcnt vmcnt(0)201; GFX11-NEXT: ; return to shader part epilog202;203; GFX12-LABEL: sample_d_cl_2d:204; GFX12: ; %bb.0: ; %main_body205; GFX12-NEXT: v_and_b32_e32 v0, 0xffff, v0206; GFX12-NEXT: v_and_b32_e32 v2, 0xffff, v2207; GFX12-NEXT: v_lshl_or_b32 v0, v1, 16, v0208; GFX12-NEXT: v_lshl_or_b32 v1, v3, 16, v2209; GFX12-NEXT: image_sample_d_cl_g16 v[0:3], [v0, v1, v4, v[5:6]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D210; GFX12-NEXT: s_wait_samplecnt 0x0211; GFX12-NEXT: ; return to shader part epilog212main_body:213 %v = call <4 x float> @llvm.amdgcn.image.sample.d.cl.2d.v4f32.f16.f32(i32 15, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)214 ret <4 x float> %v215}216 217define amdgpu_ps <4 x float> @sample_c_d_cl_1d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dsdv, float %s, float %clamp) {218; GFX10-LABEL: sample_c_d_cl_1d:219; GFX10: ; %bb.0: ; %main_body220; GFX10-NEXT: image_sample_c_d_cl_g16 v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D221; GFX10-NEXT: s_waitcnt vmcnt(0)222; GFX10-NEXT: ; return to shader part epilog223;224; GFX11-LABEL: sample_c_d_cl_1d:225; GFX11: ; %bb.0: ; %main_body226; GFX11-NEXT: image_sample_c_d_cl_g16 v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D227; GFX11-NEXT: s_waitcnt vmcnt(0)228; GFX11-NEXT: ; return to shader part epilog229;230; GFX12-LABEL: sample_c_d_cl_1d:231; GFX12: ; %bb.0: ; %main_body232; GFX12-NEXT: image_sample_c_d_cl_g16 v[0:3], [v0, v1, v2, v[3:4]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D233; GFX12-NEXT: s_wait_samplecnt 0x0234; GFX12-NEXT: ; return to shader part epilog235main_body:236 %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.1d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dsdv, float %s, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)237 ret <4 x float> %v238}239 240define amdgpu_ps <4 x float> @sample_c_d_cl_2d(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp) {241; GFX10-LABEL: sample_c_d_cl_2d:242; GFX10: ; %bb.0: ; %main_body243; GFX10-NEXT: v_mov_b32_e32 v8, v2244; GFX10-NEXT: v_mov_b32_e32 v2, v0245; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v1246; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v3247; GFX10-NEXT: v_lshl_or_b32 v3, v8, 16, v0248; GFX10-NEXT: v_lshl_or_b32 v4, v4, 16, v1249; GFX10-NEXT: image_sample_c_d_cl_g16 v[0:3], v[2:7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D250; GFX10-NEXT: s_waitcnt vmcnt(0)251; GFX10-NEXT: ; return to shader part epilog252;253; GFX11-LABEL: sample_c_d_cl_2d:254; GFX11: ; %bb.0: ; %main_body255; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1256; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v3257; GFX11-NEXT: v_lshl_or_b32 v1, v2, 16, v1258; GFX11-NEXT: v_lshl_or_b32 v2, v4, 16, v3259; GFX11-NEXT: image_sample_c_d_cl_g16 v[0:3], [v0, v1, v2, v5, v[6:7]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D260; GFX11-NEXT: s_waitcnt vmcnt(0)261; GFX11-NEXT: ; return to shader part epilog262;263; GFX12-LABEL: sample_c_d_cl_2d:264; GFX12: ; %bb.0: ; %main_body265; GFX12-NEXT: v_and_b32_e32 v1, 0xffff, v1266; GFX12-NEXT: v_and_b32_e32 v3, 0xffff, v3267; GFX12-NEXT: v_lshl_or_b32 v1, v2, 16, v1268; GFX12-NEXT: v_lshl_or_b32 v2, v4, 16, v3269; GFX12-NEXT: image_sample_c_d_cl_g16 v[0:3], [v0, v1, v2, v[5:7]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D270; GFX12-NEXT: s_wait_samplecnt 0x0271; GFX12-NEXT: ; return to shader part epilog272main_body:273 %v = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.2d.v4f32.f16.f32(i32 15, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %clamp, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)274 ret <4 x float> %v275}276 277define amdgpu_ps float @sample_c_d_o_2darray_V1(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %slice) {278; GFX10-LABEL: sample_c_d_o_2darray_V1:279; GFX10: ; %bb.0: ; %main_body280; GFX10-NEXT: v_mov_b32_e32 v9, v2281; GFX10-NEXT: v_mov_b32_e32 v10, v3282; GFX10-NEXT: v_mov_b32_e32 v2, v0283; GFX10-NEXT: v_mov_b32_e32 v3, v1284; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v4285; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v9286; GFX10-NEXT: v_lshl_or_b32 v5, v5, 16, v1287; GFX10-NEXT: v_lshl_or_b32 v4, v10, 16, v0288; GFX10-NEXT: image_sample_c_d_o_g16 v0, v[2:8], s[0:7], s[8:11] dmask:0x4 dim:SQ_RSRC_IMG_2D_ARRAY289; GFX10-NEXT: s_waitcnt vmcnt(0)290; GFX10-NEXT: ; return to shader part epilog291;292; GFX11-LABEL: sample_c_d_o_2darray_V1:293; GFX11: ; %bb.0: ; %main_body294; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2295; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4296; GFX11-NEXT: v_lshl_or_b32 v2, v3, 16, v2297; GFX11-NEXT: v_lshl_or_b32 v3, v5, 16, v4298; GFX11-NEXT: image_sample_c_d_o_g16 v0, [v0, v1, v2, v3, v[6:8]], s[0:7], s[8:11] dmask:0x4 dim:SQ_RSRC_IMG_2D_ARRAY299; GFX11-NEXT: s_waitcnt vmcnt(0)300; GFX11-NEXT: ; return to shader part epilog301;302; GFX12-LABEL: sample_c_d_o_2darray_V1:303; GFX12: ; %bb.0: ; %main_body304; GFX12-NEXT: v_and_b32_e32 v2, 0xffff, v2305; GFX12-NEXT: v_and_b32_e32 v4, 0xffff, v4306; GFX12-NEXT: v_lshl_or_b32 v2, v3, 16, v2307; GFX12-NEXT: v_lshl_or_b32 v5, v5, 16, v4308; GFX12-NEXT: image_sample_c_d_o_g16 v0, [v0, v1, v2, v[5:8]], s[0:7], s[8:11] dmask:0x4 dim:SQ_RSRC_IMG_2D_ARRAY309; GFX12-NEXT: s_wait_samplecnt 0x0310; GFX12-NEXT: ; return to shader part epilog311main_body:312 %v = call float @llvm.amdgcn.image.sample.c.d.o.2darray.f16.f32.f32(i32 4, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %slice, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)313 ret float %v314}315 316define amdgpu_ps <2 x float> @sample_c_d_o_2darray_V2(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %slice) {317; GFX10-LABEL: sample_c_d_o_2darray_V2:318; GFX10: ; %bb.0: ; %main_body319; GFX10-NEXT: v_mov_b32_e32 v9, v2320; GFX10-NEXT: v_mov_b32_e32 v10, v3321; GFX10-NEXT: v_mov_b32_e32 v2, v0322; GFX10-NEXT: v_mov_b32_e32 v3, v1323; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v4324; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v9325; GFX10-NEXT: v_lshl_or_b32 v5, v5, 16, v1326; GFX10-NEXT: v_lshl_or_b32 v4, v10, 16, v0327; GFX10-NEXT: image_sample_c_d_o_g16 v[0:1], v[2:8], s[0:7], s[8:11] dmask:0x6 dim:SQ_RSRC_IMG_2D_ARRAY328; GFX10-NEXT: s_waitcnt vmcnt(0)329; GFX10-NEXT: ; return to shader part epilog330;331; GFX11-LABEL: sample_c_d_o_2darray_V2:332; GFX11: ; %bb.0: ; %main_body333; GFX11-NEXT: v_and_b32_e32 v2, 0xffff, v2334; GFX11-NEXT: v_and_b32_e32 v4, 0xffff, v4335; GFX11-NEXT: v_lshl_or_b32 v2, v3, 16, v2336; GFX11-NEXT: v_lshl_or_b32 v3, v5, 16, v4337; GFX11-NEXT: image_sample_c_d_o_g16 v[0:1], [v0, v1, v2, v3, v[6:8]], s[0:7], s[8:11] dmask:0x6 dim:SQ_RSRC_IMG_2D_ARRAY338; GFX11-NEXT: s_waitcnt vmcnt(0)339; GFX11-NEXT: ; return to shader part epilog340;341; GFX12-LABEL: sample_c_d_o_2darray_V2:342; GFX12: ; %bb.0: ; %main_body343; GFX12-NEXT: v_and_b32_e32 v2, 0xffff, v2344; GFX12-NEXT: v_and_b32_e32 v4, 0xffff, v4345; GFX12-NEXT: v_lshl_or_b32 v2, v3, 16, v2346; GFX12-NEXT: v_lshl_or_b32 v5, v5, 16, v4347; GFX12-NEXT: image_sample_c_d_o_g16 v[0:1], [v0, v1, v2, v[5:8]], s[0:7], s[8:11] dmask:0x6 dim:SQ_RSRC_IMG_2D_ARRAY348; GFX12-NEXT: s_wait_samplecnt 0x0349; GFX12-NEXT: ; return to shader part epilog350main_body:351 %v = call <2 x float> @llvm.amdgcn.image.sample.c.d.o.2darray.v2f32.f16.f32(i32 6, i32 %offset, float %zcompare, half %dsdh, half %dtdh, half %dsdv, half %dtdv, float %s, float %t, float %slice, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)352 ret <2 x float> %v353}354 355declare <4 x float> @llvm.amdgcn.image.sample.d.1d.v4f32.f16.f32(i32, half, half, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1356declare <4 x float> @llvm.amdgcn.image.sample.d.2d.v4f32.f16.f32(i32, half, half, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1357declare <4 x float> @llvm.amdgcn.image.sample.d.3d.v4f32.f16.f32(i32, half, half, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1358declare <4 x float> @llvm.amdgcn.image.sample.c.d.1d.v4f32.f16.f32(i32, float, half, half, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1359declare <4 x float> @llvm.amdgcn.image.sample.c.d.2d.v4f32.f16.f32(i32, float, half, half, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1360declare <4 x float> @llvm.amdgcn.image.sample.d.cl.1d.v4f32.f16.f32(i32, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1361declare <4 x float> @llvm.amdgcn.image.sample.d.cl.2d.v4f32.f16.f32(i32, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1362declare <4 x float> @llvm.amdgcn.image.sample.c.d.cl.1d.v4f32.f16.f32(i32, float, half, half, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1363declare <4 x float> @llvm.amdgcn.image.sample.c.d.cl.2d.v4f32.f16.f32(i32, float, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1364 365declare float @llvm.amdgcn.image.sample.c.d.o.2darray.f16.f32.f32(i32, i32, float, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1366declare <2 x float> @llvm.amdgcn.image.sample.c.d.o.2darray.v2f32.f16.f32(i32, i32, float, half, half, half, half, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1367 368attributes #0 = { nounwind }369attributes #1 = { nounwind readonly }370attributes #2 = { nounwind readnone }371