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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - %s | FileCheck -check-prefix=GFX6 %s3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - %s | FileCheck -check-prefix=GFX8 %s4; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - %s | FileCheck -check-prefix=GFX10 %s5; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -o - %s | FileCheck -check-prefix=GFX11 %s6; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -o - %s | FileCheck -check-prefix=GFX12 %s7 8define amdgpu_ps void @image_store_f32(<8 x i32> inreg %rsrc, i32 %s, i32 %t, float %data) {9; GFX6-LABEL: image_store_f32:10; GFX6: ; %bb.0:11; GFX6-NEXT: s_mov_b32 s0, s212; GFX6-NEXT: s_mov_b32 s1, s313; GFX6-NEXT: s_mov_b32 s2, s414; GFX6-NEXT: s_mov_b32 s3, s515; GFX6-NEXT: s_mov_b32 s4, s616; GFX6-NEXT: s_mov_b32 s5, s717; GFX6-NEXT: s_mov_b32 s6, s818; GFX6-NEXT: s_mov_b32 s7, s919; GFX6-NEXT: image_store v2, v[0:1], s[0:7] dmask:0x1 unorm20; GFX6-NEXT: s_endpgm21;22; GFX8-LABEL: image_store_f32:23; GFX8: ; %bb.0:24; GFX8-NEXT: s_mov_b32 s0, s225; GFX8-NEXT: s_mov_b32 s1, s326; GFX8-NEXT: s_mov_b32 s2, s427; GFX8-NEXT: s_mov_b32 s3, s528; GFX8-NEXT: s_mov_b32 s4, s629; GFX8-NEXT: s_mov_b32 s5, s730; GFX8-NEXT: s_mov_b32 s6, s831; GFX8-NEXT: s_mov_b32 s7, s932; GFX8-NEXT: image_store v2, v[0:1], s[0:7] dmask:0x1 unorm33; GFX8-NEXT: s_endpgm34;35; GFX10-LABEL: image_store_f32:36; GFX10: ; %bb.0:37; GFX10-NEXT: s_mov_b32 s0, s238; GFX10-NEXT: s_mov_b32 s1, s339; GFX10-NEXT: s_mov_b32 s2, s440; GFX10-NEXT: s_mov_b32 s3, s541; GFX10-NEXT: s_mov_b32 s4, s642; GFX10-NEXT: s_mov_b32 s5, s743; GFX10-NEXT: s_mov_b32 s6, s844; GFX10-NEXT: s_mov_b32 s7, s945; GFX10-NEXT: image_store v2, v[0:1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D unorm46; GFX10-NEXT: s_endpgm47;48; GFX11-LABEL: image_store_f32:49; GFX11: ; %bb.0:50; GFX11-NEXT: s_mov_b32 s0, s251; GFX11-NEXT: s_mov_b32 s1, s352; GFX11-NEXT: s_mov_b32 s2, s453; GFX11-NEXT: s_mov_b32 s3, s554; GFX11-NEXT: s_mov_b32 s4, s655; GFX11-NEXT: s_mov_b32 s5, s756; GFX11-NEXT: s_mov_b32 s6, s857; GFX11-NEXT: s_mov_b32 s7, s958; GFX11-NEXT: image_store v2, v[0:1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D unorm59; GFX11-NEXT: s_endpgm60;61; GFX12-LABEL: image_store_f32:62; GFX12: ; %bb.0:63; GFX12-NEXT: s_mov_b32 s0, s264; GFX12-NEXT: s_mov_b32 s1, s365; GFX12-NEXT: s_mov_b32 s2, s466; GFX12-NEXT: s_mov_b32 s3, s567; GFX12-NEXT: s_mov_b32 s4, s668; GFX12-NEXT: s_mov_b32 s5, s769; GFX12-NEXT: s_mov_b32 s6, s870; GFX12-NEXT: s_mov_b32 s7, s971; GFX12-NEXT: image_store v2, [v0, v1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D72; GFX12-NEXT: s_endpgm73 call void @llvm.amdgcn.image.store.2d.f32.i32(float %data, i32 1, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)74 ret void75}76 77define amdgpu_ps void @image_store_v2f32(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <2 x float> %in) {78; GFX6-LABEL: image_store_v2f32:79; GFX6: ; %bb.0:80; GFX6-NEXT: s_mov_b32 s0, s281; GFX6-NEXT: s_mov_b32 s1, s382; GFX6-NEXT: s_mov_b32 s2, s483; GFX6-NEXT: s_mov_b32 s3, s584; GFX6-NEXT: s_mov_b32 s4, s685; GFX6-NEXT: s_mov_b32 s5, s786; GFX6-NEXT: s_mov_b32 s6, s887; GFX6-NEXT: s_mov_b32 s7, s988; GFX6-NEXT: image_store v[2:3], v[0:1], s[0:7] dmask:0x3 unorm89; GFX6-NEXT: s_endpgm90;91; GFX8-LABEL: image_store_v2f32:92; GFX8: ; %bb.0:93; GFX8-NEXT: s_mov_b32 s0, s294; GFX8-NEXT: s_mov_b32 s1, s395; GFX8-NEXT: s_mov_b32 s2, s496; GFX8-NEXT: s_mov_b32 s3, s597; GFX8-NEXT: s_mov_b32 s4, s698; GFX8-NEXT: s_mov_b32 s5, s799; GFX8-NEXT: s_mov_b32 s6, s8100; GFX8-NEXT: s_mov_b32 s7, s9101; GFX8-NEXT: image_store v[2:3], v[0:1], s[0:7] dmask:0x3 unorm102; GFX8-NEXT: s_endpgm103;104; GFX10-LABEL: image_store_v2f32:105; GFX10: ; %bb.0:106; GFX10-NEXT: s_mov_b32 s0, s2107; GFX10-NEXT: s_mov_b32 s1, s3108; GFX10-NEXT: s_mov_b32 s2, s4109; GFX10-NEXT: s_mov_b32 s3, s5110; GFX10-NEXT: s_mov_b32 s4, s6111; GFX10-NEXT: s_mov_b32 s5, s7112; GFX10-NEXT: s_mov_b32 s6, s8113; GFX10-NEXT: s_mov_b32 s7, s9114; GFX10-NEXT: image_store v[2:3], v[0:1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D unorm115; GFX10-NEXT: s_endpgm116;117; GFX11-LABEL: image_store_v2f32:118; GFX11: ; %bb.0:119; GFX11-NEXT: s_mov_b32 s0, s2120; GFX11-NEXT: s_mov_b32 s1, s3121; GFX11-NEXT: s_mov_b32 s2, s4122; GFX11-NEXT: s_mov_b32 s3, s5123; GFX11-NEXT: s_mov_b32 s4, s6124; GFX11-NEXT: s_mov_b32 s5, s7125; GFX11-NEXT: s_mov_b32 s6, s8126; GFX11-NEXT: s_mov_b32 s7, s9127; GFX11-NEXT: image_store v[2:3], v[0:1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D unorm128; GFX11-NEXT: s_endpgm129;130; GFX12-LABEL: image_store_v2f32:131; GFX12: ; %bb.0:132; GFX12-NEXT: s_mov_b32 s0, s2133; GFX12-NEXT: s_mov_b32 s1, s3134; GFX12-NEXT: s_mov_b32 s2, s4135; GFX12-NEXT: s_mov_b32 s3, s5136; GFX12-NEXT: s_mov_b32 s4, s6137; GFX12-NEXT: s_mov_b32 s5, s7138; GFX12-NEXT: s_mov_b32 s6, s8139; GFX12-NEXT: s_mov_b32 s7, s9140; GFX12-NEXT: image_store v[2:3], [v0, v1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D141; GFX12-NEXT: s_endpgm142 call void @llvm.amdgcn.image.store.2d.v2f32.i32(<2 x float> %in, i32 3, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)143 ret void144}145 146define amdgpu_ps void @image_store_v3f32(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <3 x float> %in) {147; GFX6-LABEL: image_store_v3f32:148; GFX6: ; %bb.0:149; GFX6-NEXT: s_mov_b32 s0, s2150; GFX6-NEXT: s_mov_b32 s1, s3151; GFX6-NEXT: s_mov_b32 s2, s4152; GFX6-NEXT: s_mov_b32 s3, s5153; GFX6-NEXT: s_mov_b32 s4, s6154; GFX6-NEXT: s_mov_b32 s5, s7155; GFX6-NEXT: s_mov_b32 s6, s8156; GFX6-NEXT: s_mov_b32 s7, s9157; GFX6-NEXT: image_store v[2:4], v[0:1], s[0:7] dmask:0x7 unorm158; GFX6-NEXT: s_endpgm159;160; GFX8-LABEL: image_store_v3f32:161; GFX8: ; %bb.0:162; GFX8-NEXT: s_mov_b32 s0, s2163; GFX8-NEXT: s_mov_b32 s1, s3164; GFX8-NEXT: s_mov_b32 s2, s4165; GFX8-NEXT: s_mov_b32 s3, s5166; GFX8-NEXT: s_mov_b32 s4, s6167; GFX8-NEXT: s_mov_b32 s5, s7168; GFX8-NEXT: s_mov_b32 s6, s8169; GFX8-NEXT: s_mov_b32 s7, s9170; GFX8-NEXT: image_store v[2:4], v[0:1], s[0:7] dmask:0x7 unorm171; GFX8-NEXT: s_endpgm172;173; GFX10-LABEL: image_store_v3f32:174; GFX10: ; %bb.0:175; GFX10-NEXT: s_mov_b32 s0, s2176; GFX10-NEXT: s_mov_b32 s1, s3177; GFX10-NEXT: s_mov_b32 s2, s4178; GFX10-NEXT: s_mov_b32 s3, s5179; GFX10-NEXT: s_mov_b32 s4, s6180; GFX10-NEXT: s_mov_b32 s5, s7181; GFX10-NEXT: s_mov_b32 s6, s8182; GFX10-NEXT: s_mov_b32 s7, s9183; GFX10-NEXT: image_store v[2:4], v[0:1], s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_2D unorm184; GFX10-NEXT: s_endpgm185;186; GFX11-LABEL: image_store_v3f32:187; GFX11: ; %bb.0:188; GFX11-NEXT: s_mov_b32 s0, s2189; GFX11-NEXT: s_mov_b32 s1, s3190; GFX11-NEXT: s_mov_b32 s2, s4191; GFX11-NEXT: s_mov_b32 s3, s5192; GFX11-NEXT: s_mov_b32 s4, s6193; GFX11-NEXT: s_mov_b32 s5, s7194; GFX11-NEXT: s_mov_b32 s6, s8195; GFX11-NEXT: s_mov_b32 s7, s9196; GFX11-NEXT: image_store v[2:4], v[0:1], s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_2D unorm197; GFX11-NEXT: s_endpgm198;199; GFX12-LABEL: image_store_v3f32:200; GFX12: ; %bb.0:201; GFX12-NEXT: s_mov_b32 s0, s2202; GFX12-NEXT: s_mov_b32 s1, s3203; GFX12-NEXT: s_mov_b32 s2, s4204; GFX12-NEXT: s_mov_b32 s3, s5205; GFX12-NEXT: s_mov_b32 s4, s6206; GFX12-NEXT: s_mov_b32 s5, s7207; GFX12-NEXT: s_mov_b32 s6, s8208; GFX12-NEXT: s_mov_b32 s7, s9209; GFX12-NEXT: image_store v[2:4], [v0, v1], s[0:7] dmask:0x7 dim:SQ_RSRC_IMG_2D210; GFX12-NEXT: s_endpgm211 call void @llvm.amdgcn.image.store.2d.v3f32.i32(<3 x float> %in, i32 7, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)212 ret void213}214 215define amdgpu_ps void @image_store_v4f32(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <4 x float> %in) {216; GFX6-LABEL: image_store_v4f32:217; GFX6: ; %bb.0:218; GFX6-NEXT: s_mov_b32 s0, s2219; GFX6-NEXT: s_mov_b32 s1, s3220; GFX6-NEXT: s_mov_b32 s2, s4221; GFX6-NEXT: s_mov_b32 s3, s5222; GFX6-NEXT: s_mov_b32 s4, s6223; GFX6-NEXT: s_mov_b32 s5, s7224; GFX6-NEXT: s_mov_b32 s6, s8225; GFX6-NEXT: s_mov_b32 s7, s9226; GFX6-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0xf unorm227; GFX6-NEXT: s_endpgm228;229; GFX8-LABEL: image_store_v4f32:230; GFX8: ; %bb.0:231; GFX8-NEXT: s_mov_b32 s0, s2232; GFX8-NEXT: s_mov_b32 s1, s3233; GFX8-NEXT: s_mov_b32 s2, s4234; GFX8-NEXT: s_mov_b32 s3, s5235; GFX8-NEXT: s_mov_b32 s4, s6236; GFX8-NEXT: s_mov_b32 s5, s7237; GFX8-NEXT: s_mov_b32 s6, s8238; GFX8-NEXT: s_mov_b32 s7, s9239; GFX8-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0xf unorm240; GFX8-NEXT: s_endpgm241;242; GFX10-LABEL: image_store_v4f32:243; GFX10: ; %bb.0:244; GFX10-NEXT: s_mov_b32 s0, s2245; GFX10-NEXT: s_mov_b32 s1, s3246; GFX10-NEXT: s_mov_b32 s2, s4247; GFX10-NEXT: s_mov_b32 s3, s5248; GFX10-NEXT: s_mov_b32 s4, s6249; GFX10-NEXT: s_mov_b32 s5, s7250; GFX10-NEXT: s_mov_b32 s6, s8251; GFX10-NEXT: s_mov_b32 s7, s9252; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm253; GFX10-NEXT: s_endpgm254;255; GFX11-LABEL: image_store_v4f32:256; GFX11: ; %bb.0:257; GFX11-NEXT: s_mov_b32 s0, s2258; GFX11-NEXT: s_mov_b32 s1, s3259; GFX11-NEXT: s_mov_b32 s2, s4260; GFX11-NEXT: s_mov_b32 s3, s5261; GFX11-NEXT: s_mov_b32 s4, s6262; GFX11-NEXT: s_mov_b32 s5, s7263; GFX11-NEXT: s_mov_b32 s6, s8264; GFX11-NEXT: s_mov_b32 s7, s9265; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm266; GFX11-NEXT: s_endpgm267;268; GFX12-LABEL: image_store_v4f32:269; GFX12: ; %bb.0:270; GFX12-NEXT: s_mov_b32 s0, s2271; GFX12-NEXT: s_mov_b32 s1, s3272; GFX12-NEXT: s_mov_b32 s2, s4273; GFX12-NEXT: s_mov_b32 s3, s5274; GFX12-NEXT: s_mov_b32 s4, s6275; GFX12-NEXT: s_mov_b32 s5, s7276; GFX12-NEXT: s_mov_b32 s6, s8277; GFX12-NEXT: s_mov_b32 s7, s9278; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D279; GFX12-NEXT: s_endpgm280 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %in, i32 15, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)281 ret void282}283 284define amdgpu_ps void @image_store_v4f32_dmask_0001(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <4 x float> %in) {285; GFX6-LABEL: image_store_v4f32_dmask_0001:286; GFX6: ; %bb.0:287; GFX6-NEXT: s_mov_b32 s0, s2288; GFX6-NEXT: s_mov_b32 s1, s3289; GFX6-NEXT: s_mov_b32 s2, s4290; GFX6-NEXT: s_mov_b32 s3, s5291; GFX6-NEXT: s_mov_b32 s4, s6292; GFX6-NEXT: s_mov_b32 s5, s7293; GFX6-NEXT: s_mov_b32 s6, s8294; GFX6-NEXT: s_mov_b32 s7, s9295; GFX6-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x1 unorm296; GFX6-NEXT: s_endpgm297;298; GFX8-LABEL: image_store_v4f32_dmask_0001:299; GFX8: ; %bb.0:300; GFX8-NEXT: s_mov_b32 s0, s2301; GFX8-NEXT: s_mov_b32 s1, s3302; GFX8-NEXT: s_mov_b32 s2, s4303; GFX8-NEXT: s_mov_b32 s3, s5304; GFX8-NEXT: s_mov_b32 s4, s6305; GFX8-NEXT: s_mov_b32 s5, s7306; GFX8-NEXT: s_mov_b32 s6, s8307; GFX8-NEXT: s_mov_b32 s7, s9308; GFX8-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x1 unorm309; GFX8-NEXT: s_endpgm310;311; GFX10-LABEL: image_store_v4f32_dmask_0001:312; GFX10: ; %bb.0:313; GFX10-NEXT: s_mov_b32 s0, s2314; GFX10-NEXT: s_mov_b32 s1, s3315; GFX10-NEXT: s_mov_b32 s2, s4316; GFX10-NEXT: s_mov_b32 s3, s5317; GFX10-NEXT: s_mov_b32 s4, s6318; GFX10-NEXT: s_mov_b32 s5, s7319; GFX10-NEXT: s_mov_b32 s6, s8320; GFX10-NEXT: s_mov_b32 s7, s9321; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D unorm322; GFX10-NEXT: s_endpgm323;324; GFX11-LABEL: image_store_v4f32_dmask_0001:325; GFX11: ; %bb.0:326; GFX11-NEXT: s_mov_b32 s0, s2327; GFX11-NEXT: s_mov_b32 s1, s3328; GFX11-NEXT: s_mov_b32 s2, s4329; GFX11-NEXT: s_mov_b32 s3, s5330; GFX11-NEXT: s_mov_b32 s4, s6331; GFX11-NEXT: s_mov_b32 s5, s7332; GFX11-NEXT: s_mov_b32 s6, s8333; GFX11-NEXT: s_mov_b32 s7, s9334; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D unorm335; GFX11-NEXT: s_endpgm336;337; GFX12-LABEL: image_store_v4f32_dmask_0001:338; GFX12: ; %bb.0:339; GFX12-NEXT: s_mov_b32 s0, s2340; GFX12-NEXT: s_mov_b32 s1, s3341; GFX12-NEXT: s_mov_b32 s2, s4342; GFX12-NEXT: s_mov_b32 s3, s5343; GFX12-NEXT: s_mov_b32 s4, s6344; GFX12-NEXT: s_mov_b32 s5, s7345; GFX12-NEXT: s_mov_b32 s6, s8346; GFX12-NEXT: s_mov_b32 s7, s9347; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_2D348; GFX12-NEXT: s_endpgm349 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %in, i32 1, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)350 ret void351}352 353define amdgpu_ps void @image_store_v4f32_dmask_0010(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <4 x float> %in) {354; GFX6-LABEL: image_store_v4f32_dmask_0010:355; GFX6: ; %bb.0:356; GFX6-NEXT: s_mov_b32 s0, s2357; GFX6-NEXT: s_mov_b32 s1, s3358; GFX6-NEXT: s_mov_b32 s2, s4359; GFX6-NEXT: s_mov_b32 s3, s5360; GFX6-NEXT: s_mov_b32 s4, s6361; GFX6-NEXT: s_mov_b32 s5, s7362; GFX6-NEXT: s_mov_b32 s6, s8363; GFX6-NEXT: s_mov_b32 s7, s9364; GFX6-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x2 unorm365; GFX6-NEXT: s_endpgm366;367; GFX8-LABEL: image_store_v4f32_dmask_0010:368; GFX8: ; %bb.0:369; GFX8-NEXT: s_mov_b32 s0, s2370; GFX8-NEXT: s_mov_b32 s1, s3371; GFX8-NEXT: s_mov_b32 s2, s4372; GFX8-NEXT: s_mov_b32 s3, s5373; GFX8-NEXT: s_mov_b32 s4, s6374; GFX8-NEXT: s_mov_b32 s5, s7375; GFX8-NEXT: s_mov_b32 s6, s8376; GFX8-NEXT: s_mov_b32 s7, s9377; GFX8-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x2 unorm378; GFX8-NEXT: s_endpgm379;380; GFX10-LABEL: image_store_v4f32_dmask_0010:381; GFX10: ; %bb.0:382; GFX10-NEXT: s_mov_b32 s0, s2383; GFX10-NEXT: s_mov_b32 s1, s3384; GFX10-NEXT: s_mov_b32 s2, s4385; GFX10-NEXT: s_mov_b32 s3, s5386; GFX10-NEXT: s_mov_b32 s4, s6387; GFX10-NEXT: s_mov_b32 s5, s7388; GFX10-NEXT: s_mov_b32 s6, s8389; GFX10-NEXT: s_mov_b32 s7, s9390; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_2D unorm391; GFX10-NEXT: s_endpgm392;393; GFX11-LABEL: image_store_v4f32_dmask_0010:394; GFX11: ; %bb.0:395; GFX11-NEXT: s_mov_b32 s0, s2396; GFX11-NEXT: s_mov_b32 s1, s3397; GFX11-NEXT: s_mov_b32 s2, s4398; GFX11-NEXT: s_mov_b32 s3, s5399; GFX11-NEXT: s_mov_b32 s4, s6400; GFX11-NEXT: s_mov_b32 s5, s7401; GFX11-NEXT: s_mov_b32 s6, s8402; GFX11-NEXT: s_mov_b32 s7, s9403; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_2D unorm404; GFX11-NEXT: s_endpgm405;406; GFX12-LABEL: image_store_v4f32_dmask_0010:407; GFX12: ; %bb.0:408; GFX12-NEXT: s_mov_b32 s0, s2409; GFX12-NEXT: s_mov_b32 s1, s3410; GFX12-NEXT: s_mov_b32 s2, s4411; GFX12-NEXT: s_mov_b32 s3, s5412; GFX12-NEXT: s_mov_b32 s4, s6413; GFX12-NEXT: s_mov_b32 s5, s7414; GFX12-NEXT: s_mov_b32 s6, s8415; GFX12-NEXT: s_mov_b32 s7, s9416; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_2D417; GFX12-NEXT: s_endpgm418 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %in, i32 2, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)419 ret void420}421 422define amdgpu_ps void @image_store_v4f32_dmask_0100(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <4 x float> %in) {423; GFX6-LABEL: image_store_v4f32_dmask_0100:424; GFX6: ; %bb.0:425; GFX6-NEXT: s_mov_b32 s0, s2426; GFX6-NEXT: s_mov_b32 s1, s3427; GFX6-NEXT: s_mov_b32 s2, s4428; GFX6-NEXT: s_mov_b32 s3, s5429; GFX6-NEXT: s_mov_b32 s4, s6430; GFX6-NEXT: s_mov_b32 s5, s7431; GFX6-NEXT: s_mov_b32 s6, s8432; GFX6-NEXT: s_mov_b32 s7, s9433; GFX6-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x4 unorm434; GFX6-NEXT: s_endpgm435;436; GFX8-LABEL: image_store_v4f32_dmask_0100:437; GFX8: ; %bb.0:438; GFX8-NEXT: s_mov_b32 s0, s2439; GFX8-NEXT: s_mov_b32 s1, s3440; GFX8-NEXT: s_mov_b32 s2, s4441; GFX8-NEXT: s_mov_b32 s3, s5442; GFX8-NEXT: s_mov_b32 s4, s6443; GFX8-NEXT: s_mov_b32 s5, s7444; GFX8-NEXT: s_mov_b32 s6, s8445; GFX8-NEXT: s_mov_b32 s7, s9446; GFX8-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x4 unorm447; GFX8-NEXT: s_endpgm448;449; GFX10-LABEL: image_store_v4f32_dmask_0100:450; GFX10: ; %bb.0:451; GFX10-NEXT: s_mov_b32 s0, s2452; GFX10-NEXT: s_mov_b32 s1, s3453; GFX10-NEXT: s_mov_b32 s2, s4454; GFX10-NEXT: s_mov_b32 s3, s5455; GFX10-NEXT: s_mov_b32 s4, s6456; GFX10-NEXT: s_mov_b32 s5, s7457; GFX10-NEXT: s_mov_b32 s6, s8458; GFX10-NEXT: s_mov_b32 s7, s9459; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D unorm460; GFX10-NEXT: s_endpgm461;462; GFX11-LABEL: image_store_v4f32_dmask_0100:463; GFX11: ; %bb.0:464; GFX11-NEXT: s_mov_b32 s0, s2465; GFX11-NEXT: s_mov_b32 s1, s3466; GFX11-NEXT: s_mov_b32 s2, s4467; GFX11-NEXT: s_mov_b32 s3, s5468; GFX11-NEXT: s_mov_b32 s4, s6469; GFX11-NEXT: s_mov_b32 s5, s7470; GFX11-NEXT: s_mov_b32 s6, s8471; GFX11-NEXT: s_mov_b32 s7, s9472; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D unorm473; GFX11-NEXT: s_endpgm474;475; GFX12-LABEL: image_store_v4f32_dmask_0100:476; GFX12: ; %bb.0:477; GFX12-NEXT: s_mov_b32 s0, s2478; GFX12-NEXT: s_mov_b32 s1, s3479; GFX12-NEXT: s_mov_b32 s2, s4480; GFX12-NEXT: s_mov_b32 s3, s5481; GFX12-NEXT: s_mov_b32 s4, s6482; GFX12-NEXT: s_mov_b32 s5, s7483; GFX12-NEXT: s_mov_b32 s6, s8484; GFX12-NEXT: s_mov_b32 s7, s9485; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x4 dim:SQ_RSRC_IMG_2D486; GFX12-NEXT: s_endpgm487 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %in, i32 4, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)488 ret void489}490 491define amdgpu_ps void @image_store_v4f32_dmask_1000(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <4 x float> %in) {492; GFX6-LABEL: image_store_v4f32_dmask_1000:493; GFX6: ; %bb.0:494; GFX6-NEXT: s_mov_b32 s0, s2495; GFX6-NEXT: s_mov_b32 s1, s3496; GFX6-NEXT: s_mov_b32 s2, s4497; GFX6-NEXT: s_mov_b32 s3, s5498; GFX6-NEXT: s_mov_b32 s4, s6499; GFX6-NEXT: s_mov_b32 s5, s7500; GFX6-NEXT: s_mov_b32 s6, s8501; GFX6-NEXT: s_mov_b32 s7, s9502; GFX6-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x8 unorm503; GFX6-NEXT: s_endpgm504;505; GFX8-LABEL: image_store_v4f32_dmask_1000:506; GFX8: ; %bb.0:507; GFX8-NEXT: s_mov_b32 s0, s2508; GFX8-NEXT: s_mov_b32 s1, s3509; GFX8-NEXT: s_mov_b32 s2, s4510; GFX8-NEXT: s_mov_b32 s3, s5511; GFX8-NEXT: s_mov_b32 s4, s6512; GFX8-NEXT: s_mov_b32 s5, s7513; GFX8-NEXT: s_mov_b32 s6, s8514; GFX8-NEXT: s_mov_b32 s7, s9515; GFX8-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x8 unorm516; GFX8-NEXT: s_endpgm517;518; GFX10-LABEL: image_store_v4f32_dmask_1000:519; GFX10: ; %bb.0:520; GFX10-NEXT: s_mov_b32 s0, s2521; GFX10-NEXT: s_mov_b32 s1, s3522; GFX10-NEXT: s_mov_b32 s2, s4523; GFX10-NEXT: s_mov_b32 s3, s5524; GFX10-NEXT: s_mov_b32 s4, s6525; GFX10-NEXT: s_mov_b32 s5, s7526; GFX10-NEXT: s_mov_b32 s6, s8527; GFX10-NEXT: s_mov_b32 s7, s9528; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D unorm529; GFX10-NEXT: s_endpgm530;531; GFX11-LABEL: image_store_v4f32_dmask_1000:532; GFX11: ; %bb.0:533; GFX11-NEXT: s_mov_b32 s0, s2534; GFX11-NEXT: s_mov_b32 s1, s3535; GFX11-NEXT: s_mov_b32 s2, s4536; GFX11-NEXT: s_mov_b32 s3, s5537; GFX11-NEXT: s_mov_b32 s4, s6538; GFX11-NEXT: s_mov_b32 s5, s7539; GFX11-NEXT: s_mov_b32 s6, s8540; GFX11-NEXT: s_mov_b32 s7, s9541; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D unorm542; GFX11-NEXT: s_endpgm543;544; GFX12-LABEL: image_store_v4f32_dmask_1000:545; GFX12: ; %bb.0:546; GFX12-NEXT: s_mov_b32 s0, s2547; GFX12-NEXT: s_mov_b32 s1, s3548; GFX12-NEXT: s_mov_b32 s2, s4549; GFX12-NEXT: s_mov_b32 s3, s5550; GFX12-NEXT: s_mov_b32 s4, s6551; GFX12-NEXT: s_mov_b32 s5, s7552; GFX12-NEXT: s_mov_b32 s6, s8553; GFX12-NEXT: s_mov_b32 s7, s9554; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_2D555; GFX12-NEXT: s_endpgm556 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %in, i32 8, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)557 ret void558}559 560define amdgpu_ps void @image_store_v4f32_dmask_0011(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <4 x float> %in) {561; GFX6-LABEL: image_store_v4f32_dmask_0011:562; GFX6: ; %bb.0:563; GFX6-NEXT: s_mov_b32 s0, s2564; GFX6-NEXT: s_mov_b32 s1, s3565; GFX6-NEXT: s_mov_b32 s2, s4566; GFX6-NEXT: s_mov_b32 s3, s5567; GFX6-NEXT: s_mov_b32 s4, s6568; GFX6-NEXT: s_mov_b32 s5, s7569; GFX6-NEXT: s_mov_b32 s6, s8570; GFX6-NEXT: s_mov_b32 s7, s9571; GFX6-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x3 unorm572; GFX6-NEXT: s_endpgm573;574; GFX8-LABEL: image_store_v4f32_dmask_0011:575; GFX8: ; %bb.0:576; GFX8-NEXT: s_mov_b32 s0, s2577; GFX8-NEXT: s_mov_b32 s1, s3578; GFX8-NEXT: s_mov_b32 s2, s4579; GFX8-NEXT: s_mov_b32 s3, s5580; GFX8-NEXT: s_mov_b32 s4, s6581; GFX8-NEXT: s_mov_b32 s5, s7582; GFX8-NEXT: s_mov_b32 s6, s8583; GFX8-NEXT: s_mov_b32 s7, s9584; GFX8-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x3 unorm585; GFX8-NEXT: s_endpgm586;587; GFX10-LABEL: image_store_v4f32_dmask_0011:588; GFX10: ; %bb.0:589; GFX10-NEXT: s_mov_b32 s0, s2590; GFX10-NEXT: s_mov_b32 s1, s3591; GFX10-NEXT: s_mov_b32 s2, s4592; GFX10-NEXT: s_mov_b32 s3, s5593; GFX10-NEXT: s_mov_b32 s4, s6594; GFX10-NEXT: s_mov_b32 s5, s7595; GFX10-NEXT: s_mov_b32 s6, s8596; GFX10-NEXT: s_mov_b32 s7, s9597; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D unorm598; GFX10-NEXT: s_endpgm599;600; GFX11-LABEL: image_store_v4f32_dmask_0011:601; GFX11: ; %bb.0:602; GFX11-NEXT: s_mov_b32 s0, s2603; GFX11-NEXT: s_mov_b32 s1, s3604; GFX11-NEXT: s_mov_b32 s2, s4605; GFX11-NEXT: s_mov_b32 s3, s5606; GFX11-NEXT: s_mov_b32 s4, s6607; GFX11-NEXT: s_mov_b32 s5, s7608; GFX11-NEXT: s_mov_b32 s6, s8609; GFX11-NEXT: s_mov_b32 s7, s9610; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D unorm611; GFX11-NEXT: s_endpgm612;613; GFX12-LABEL: image_store_v4f32_dmask_0011:614; GFX12: ; %bb.0:615; GFX12-NEXT: s_mov_b32 s0, s2616; GFX12-NEXT: s_mov_b32 s1, s3617; GFX12-NEXT: s_mov_b32 s2, s4618; GFX12-NEXT: s_mov_b32 s3, s5619; GFX12-NEXT: s_mov_b32 s4, s6620; GFX12-NEXT: s_mov_b32 s5, s7621; GFX12-NEXT: s_mov_b32 s6, s8622; GFX12-NEXT: s_mov_b32 s7, s9623; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x3 dim:SQ_RSRC_IMG_2D624; GFX12-NEXT: s_endpgm625 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %in, i32 3, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)626 ret void627}628 629define amdgpu_ps void @image_store_v4f32_dmask_0110(<8 x i32> inreg %rsrc, i32 %s, i32 %t, <4 x float> %in) {630; GFX6-LABEL: image_store_v4f32_dmask_0110:631; GFX6: ; %bb.0:632; GFX6-NEXT: s_mov_b32 s0, s2633; GFX6-NEXT: s_mov_b32 s1, s3634; GFX6-NEXT: s_mov_b32 s2, s4635; GFX6-NEXT: s_mov_b32 s3, s5636; GFX6-NEXT: s_mov_b32 s4, s6637; GFX6-NEXT: s_mov_b32 s5, s7638; GFX6-NEXT: s_mov_b32 s6, s8639; GFX6-NEXT: s_mov_b32 s7, s9640; GFX6-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x6 unorm641; GFX6-NEXT: s_endpgm642;643; GFX8-LABEL: image_store_v4f32_dmask_0110:644; GFX8: ; %bb.0:645; GFX8-NEXT: s_mov_b32 s0, s2646; GFX8-NEXT: s_mov_b32 s1, s3647; GFX8-NEXT: s_mov_b32 s2, s4648; GFX8-NEXT: s_mov_b32 s3, s5649; GFX8-NEXT: s_mov_b32 s4, s6650; GFX8-NEXT: s_mov_b32 s5, s7651; GFX8-NEXT: s_mov_b32 s6, s8652; GFX8-NEXT: s_mov_b32 s7, s9653; GFX8-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x6 unorm654; GFX8-NEXT: s_endpgm655;656; GFX10-LABEL: image_store_v4f32_dmask_0110:657; GFX10: ; %bb.0:658; GFX10-NEXT: s_mov_b32 s0, s2659; GFX10-NEXT: s_mov_b32 s1, s3660; GFX10-NEXT: s_mov_b32 s2, s4661; GFX10-NEXT: s_mov_b32 s3, s5662; GFX10-NEXT: s_mov_b32 s4, s6663; GFX10-NEXT: s_mov_b32 s5, s7664; GFX10-NEXT: s_mov_b32 s6, s8665; GFX10-NEXT: s_mov_b32 s7, s9666; GFX10-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x6 dim:SQ_RSRC_IMG_2D unorm667; GFX10-NEXT: s_endpgm668;669; GFX11-LABEL: image_store_v4f32_dmask_0110:670; GFX11: ; %bb.0:671; GFX11-NEXT: s_mov_b32 s0, s2672; GFX11-NEXT: s_mov_b32 s1, s3673; GFX11-NEXT: s_mov_b32 s2, s4674; GFX11-NEXT: s_mov_b32 s3, s5675; GFX11-NEXT: s_mov_b32 s4, s6676; GFX11-NEXT: s_mov_b32 s5, s7677; GFX11-NEXT: s_mov_b32 s6, s8678; GFX11-NEXT: s_mov_b32 s7, s9679; GFX11-NEXT: image_store v[2:5], v[0:1], s[0:7] dmask:0x6 dim:SQ_RSRC_IMG_2D unorm680; GFX11-NEXT: s_endpgm681;682; GFX12-LABEL: image_store_v4f32_dmask_0110:683; GFX12: ; %bb.0:684; GFX12-NEXT: s_mov_b32 s0, s2685; GFX12-NEXT: s_mov_b32 s1, s3686; GFX12-NEXT: s_mov_b32 s2, s4687; GFX12-NEXT: s_mov_b32 s3, s5688; GFX12-NEXT: s_mov_b32 s4, s6689; GFX12-NEXT: s_mov_b32 s5, s7690; GFX12-NEXT: s_mov_b32 s6, s8691; GFX12-NEXT: s_mov_b32 s7, s9692; GFX12-NEXT: image_store v[2:5], [v0, v1], s[0:7] dmask:0x6 dim:SQ_RSRC_IMG_2D693; GFX12-NEXT: s_endpgm694 call void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float> %in, i32 6, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)695 ret void696}697 698define amdgpu_ps void @image_store_f32_dmask_1111(<8 x i32> inreg %rsrc, i32 inreg %s, i32 inreg %t, float %in) #0 {699; GFX6-LABEL: image_store_f32_dmask_1111:700; GFX6: ; %bb.0:701; GFX6-NEXT: v_mov_b32_e32 v1, s10702; GFX6-NEXT: s_mov_b32 s0, s2703; GFX6-NEXT: s_mov_b32 s1, s3704; GFX6-NEXT: s_mov_b32 s2, s4705; GFX6-NEXT: s_mov_b32 s3, s5706; GFX6-NEXT: s_mov_b32 s4, s6707; GFX6-NEXT: s_mov_b32 s5, s7708; GFX6-NEXT: s_mov_b32 s6, s8709; GFX6-NEXT: s_mov_b32 s7, s9710; GFX6-NEXT: v_mov_b32_e32 v2, s11711; GFX6-NEXT: image_store v0, v[1:2], s[0:7] dmask:0xf unorm712; GFX6-NEXT: s_endpgm713;714; GFX8-LABEL: image_store_f32_dmask_1111:715; GFX8: ; %bb.0:716; GFX8-NEXT: v_mov_b32_e32 v1, s10717; GFX8-NEXT: s_mov_b32 s0, s2718; GFX8-NEXT: s_mov_b32 s1, s3719; GFX8-NEXT: s_mov_b32 s2, s4720; GFX8-NEXT: s_mov_b32 s3, s5721; GFX8-NEXT: s_mov_b32 s4, s6722; GFX8-NEXT: s_mov_b32 s5, s7723; GFX8-NEXT: s_mov_b32 s6, s8724; GFX8-NEXT: s_mov_b32 s7, s9725; GFX8-NEXT: v_mov_b32_e32 v2, s11726; GFX8-NEXT: image_store v0, v[1:2], s[0:7] dmask:0xf unorm727; GFX8-NEXT: s_endpgm728;729; GFX10-LABEL: image_store_f32_dmask_1111:730; GFX10: ; %bb.0:731; GFX10-NEXT: v_mov_b32_e32 v1, s10732; GFX10-NEXT: v_mov_b32_e32 v2, s11733; GFX10-NEXT: s_mov_b32 s0, s2734; GFX10-NEXT: s_mov_b32 s1, s3735; GFX10-NEXT: s_mov_b32 s2, s4736; GFX10-NEXT: s_mov_b32 s3, s5737; GFX10-NEXT: s_mov_b32 s4, s6738; GFX10-NEXT: s_mov_b32 s5, s7739; GFX10-NEXT: s_mov_b32 s6, s8740; GFX10-NEXT: s_mov_b32 s7, s9741; GFX10-NEXT: image_store v0, v[1:2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm742; GFX10-NEXT: s_endpgm743;744; GFX11-LABEL: image_store_f32_dmask_1111:745; GFX11: ; %bb.0:746; GFX11-NEXT: v_dual_mov_b32 v1, s10 :: v_dual_mov_b32 v2, s11747; GFX11-NEXT: s_mov_b32 s0, s2748; GFX11-NEXT: s_mov_b32 s1, s3749; GFX11-NEXT: s_mov_b32 s2, s4750; GFX11-NEXT: s_mov_b32 s3, s5751; GFX11-NEXT: s_mov_b32 s4, s6752; GFX11-NEXT: s_mov_b32 s5, s7753; GFX11-NEXT: s_mov_b32 s6, s8754; GFX11-NEXT: s_mov_b32 s7, s9755; GFX11-NEXT: image_store v0, v[1:2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm756; GFX11-NEXT: s_endpgm757;758; GFX12-LABEL: image_store_f32_dmask_1111:759; GFX12: ; %bb.0:760; GFX12-NEXT: v_dual_mov_b32 v1, s10 :: v_dual_mov_b32 v2, s11761; GFX12-NEXT: s_mov_b32 s0, s2762; GFX12-NEXT: s_mov_b32 s1, s3763; GFX12-NEXT: s_mov_b32 s2, s4764; GFX12-NEXT: s_mov_b32 s3, s5765; GFX12-NEXT: s_mov_b32 s4, s6766; GFX12-NEXT: s_mov_b32 s5, s7767; GFX12-NEXT: s_mov_b32 s6, s8768; GFX12-NEXT: s_mov_b32 s7, s9769; GFX12-NEXT: image_store v0, [v1, v2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D770; GFX12-NEXT: s_endpgm771 tail call void @llvm.amdgcn.image.store.2d.f32.i32(float %in, i32 15, i32 %s, i32 %t, <8 x i32> %rsrc, i32 0, i32 0)772 ret void773}774 775declare void @llvm.amdgcn.image.store.2d.f32.i32(float, i32 immarg, i32, i32, <8 x i32>, i32 immarg, i32 immarg) #0776declare void @llvm.amdgcn.image.store.2d.v2f32.i32(<2 x float>, i32 immarg, i32, i32, <8 x i32>, i32 immarg, i32 immarg) #0777declare void @llvm.amdgcn.image.store.2d.v3f32.i32(<3 x float>, i32 immarg, i32, i32, <8 x i32>, i32 immarg, i32 immarg) #0778declare void @llvm.amdgcn.image.store.2d.v4f32.i32(<4 x float>, i32 immarg, i32, i32, <8 x i32>, i32 immarg, i32 immarg) #0779 780attributes #0 = { nounwind writeonly }781