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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=tahiti -amdgpu-load-store-vectorizer=0 < %s | FileCheck -check-prefix=GFX6 %s3 4define i32 @v_bfe_i32_arg_arg_arg(i32 %src0, i32 %src1, i32 %src2) #0 {5; GFX6-LABEL: v_bfe_i32_arg_arg_arg:6; GFX6:       ; %bb.0:7; GFX6-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8; GFX6-NEXT:    v_bfe_u32 v0, v0, v1, v29; GFX6-NEXT:    s_setpc_b64 s[30:31]10  %bfe_i32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 %src1, i32 %src2)11  ret i32 %bfe_i3212}13 14define amdgpu_ps i32 @s_bfe_i32_arg_arg_arg(i32 inreg %src0, i32 inreg %src1, i32 inreg %src2) #0 {15; GFX6-LABEL: s_bfe_i32_arg_arg_arg:16; GFX6:       ; %bb.0:17; GFX6-NEXT:    s_and_b32 s1, s1, 6318; GFX6-NEXT:    s_lshl_b32 s2, s2, 1619; GFX6-NEXT:    s_or_b32 s1, s1, s220; GFX6-NEXT:    s_bfe_u32 s0, s0, s121; GFX6-NEXT:    ; return to shader part epilog22  %bfe_i32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 %src1, i32 %src2)23  ret i32 %bfe_i3224}25 26; TODO: Need to expand this.27; define i64 @v_bfe_i64_arg_arg_arg(i64 %src0, i32 %src1, i32 %src2) #0 {28;   %bfe_i64 = call i32 @llvm.amdgcn.ubfe.i64(i32 %src0, i32 %src1, i32 %src2)29;   ret i64 %bfe_i6430; }31 32define amdgpu_ps i64 @s_bfe_i64_arg_arg_arg(i64 inreg %src0, i32 inreg %src1, i32 inreg %src2) #0 {33; GFX6-LABEL: s_bfe_i64_arg_arg_arg:34; GFX6:       ; %bb.0:35; GFX6-NEXT:    s_and_b32 s2, s2, 6336; GFX6-NEXT:    s_lshl_b32 s3, s3, 1637; GFX6-NEXT:    s_or_b32 s2, s2, s338; GFX6-NEXT:    s_bfe_u64 s[0:1], s[0:1], s239; GFX6-NEXT:    ; return to shader part epilog40  %bfe_i32 = call i64 @llvm.amdgcn.ubfe.i64(i64 %src0, i32 %src1, i32 %src2)41  ret i64 %bfe_i3242}43 44define amdgpu_kernel void @bfe_u32_arg_arg_arg(ptr addrspace(1) %out, i32 %src0, i32 %src1, i32 %src2) #0 {45; GFX6-LABEL: bfe_u32_arg_arg_arg:46; GFX6:       ; %bb.0:47; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x048; GFX6-NEXT:    s_waitcnt lgkmcnt(0)49; GFX6-NEXT:    s_and_b32 s4, s3, 6350; GFX6-NEXT:    s_lshl_b32 s3, s3, 1651; GFX6-NEXT:    s_or_b32 s3, s4, s352; GFX6-NEXT:    s_bfe_u32 s3, s2, s353; GFX6-NEXT:    s_mov_b32 s2, -154; GFX6-NEXT:    v_mov_b32_e32 v0, s355; GFX6-NEXT:    s_mov_b32 s3, 0xf00056; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 057; GFX6-NEXT:    s_endpgm58  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 %src1, i32 %src1)59  store i32 %bfe_u32, ptr addrspace(1) %out, align 460  ret void61}62 63define amdgpu_kernel void @bfe_u32_arg_arg_imm(ptr addrspace(1) %out, i32 %src0, i32 %src1) #0 {64; GFX6-LABEL: bfe_u32_arg_arg_imm:65; GFX6:       ; %bb.0:66; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x067; GFX6-NEXT:    s_waitcnt lgkmcnt(0)68; GFX6-NEXT:    s_and_b32 s3, s3, 6369; GFX6-NEXT:    s_or_b32 s3, s3, 0x7b000070; GFX6-NEXT:    s_bfe_u32 s3, s2, s371; GFX6-NEXT:    s_mov_b32 s2, -172; GFX6-NEXT:    v_mov_b32_e32 v0, s373; GFX6-NEXT:    s_mov_b32 s3, 0xf00074; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 075; GFX6-NEXT:    s_endpgm76  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 %src1, i32 123)77  store i32 %bfe_u32, ptr addrspace(1) %out, align 478  ret void79}80 81define amdgpu_kernel void @bfe_u32_arg_imm_arg(ptr addrspace(1) %out, i32 %src0, i32 %src2) #0 {82; GFX6-LABEL: bfe_u32_arg_imm_arg:83; GFX6:       ; %bb.0:84; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x085; GFX6-NEXT:    s_waitcnt lgkmcnt(0)86; GFX6-NEXT:    s_lshl_b32 s3, s3, 1687; GFX6-NEXT:    s_or_b32 s3, 59, s388; GFX6-NEXT:    s_bfe_u32 s3, s2, s389; GFX6-NEXT:    s_mov_b32 s2, -190; GFX6-NEXT:    v_mov_b32_e32 v0, s391; GFX6-NEXT:    s_mov_b32 s3, 0xf00092; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 093; GFX6-NEXT:    s_endpgm94  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 123, i32 %src2)95  store i32 %bfe_u32, ptr addrspace(1) %out, align 496  ret void97}98 99define amdgpu_kernel void @bfe_u32_imm_arg_arg(ptr addrspace(1) %out, i32 %src1, i32 %src2) #0 {100; GFX6-LABEL: bfe_u32_imm_arg_arg:101; GFX6:       ; %bb.0:102; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0103; GFX6-NEXT:    s_waitcnt lgkmcnt(0)104; GFX6-NEXT:    s_and_b32 s4, s2, 63105; GFX6-NEXT:    s_lshl_b32 s3, s3, 16106; GFX6-NEXT:    s_or_b32 s3, s4, s3107; GFX6-NEXT:    s_bfe_u32 s3, 0x7b, s3108; GFX6-NEXT:    s_mov_b32 s2, -1109; GFX6-NEXT:    v_mov_b32_e32 v0, s3110; GFX6-NEXT:    s_mov_b32 s3, 0xf000111; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0112; GFX6-NEXT:    s_endpgm113  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 123, i32 %src1, i32 %src2)114  store i32 %bfe_u32, ptr addrspace(1) %out, align 4115  ret void116}117 118define amdgpu_kernel void @bfe_u32_arg_0_width_reg_offset(ptr addrspace(1) %out, i32 %src0, i32 %src1) #0 {119; GFX6-LABEL: bfe_u32_arg_0_width_reg_offset:120; GFX6:       ; %bb.0:121; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0122; GFX6-NEXT:    s_waitcnt lgkmcnt(0)123; GFX6-NEXT:    s_and_b32 s3, s3, 63124; GFX6-NEXT:    s_bfe_u32 s3, s2, s3125; GFX6-NEXT:    s_mov_b32 s2, -1126; GFX6-NEXT:    v_mov_b32_e32 v0, s3127; GFX6-NEXT:    s_mov_b32 s3, 0xf000128; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0129; GFX6-NEXT:    s_endpgm130  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 %src1, i32 0)131  store i32 %bfe_u32, ptr addrspace(1) %out, align 4132  ret void133}134 135define amdgpu_kernel void @bfe_u32_arg_0_width_imm_offset(ptr addrspace(1) %out, i32 %src0, i32 %src1) #0 {136; GFX6-LABEL: bfe_u32_arg_0_width_imm_offset:137; GFX6:       ; %bb.0:138; GFX6-NEXT:    s_load_dword s3, s[4:5], 0x2139; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0140; GFX6-NEXT:    s_mov_b32 s2, -1141; GFX6-NEXT:    s_waitcnt lgkmcnt(0)142; GFX6-NEXT:    s_bfe_u32 s3, s3, 8143; GFX6-NEXT:    v_mov_b32_e32 v0, s3144; GFX6-NEXT:    s_mov_b32 s3, 0xf000145; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0146; GFX6-NEXT:    s_endpgm147  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 8, i32 0)148  store i32 %bfe_u32, ptr addrspace(1) %out, align 4149  ret void150}151 152define amdgpu_kernel void @bfe_u32_zextload_i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {153; GFX6-LABEL: bfe_u32_zextload_i8:154; GFX6:       ; %bb.0:155; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0156; GFX6-NEXT:    s_mov_b32 s6, -1157; GFX6-NEXT:    s_mov_b32 s7, 0xf000158; GFX6-NEXT:    s_waitcnt lgkmcnt(0)159; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]160; GFX6-NEXT:    buffer_load_ubyte v0, off, s[4:7], 0161; GFX6-NEXT:    s_mov_b64 s[2:3], s[6:7]162; GFX6-NEXT:    s_waitcnt vmcnt(0)163; GFX6-NEXT:    v_bfe_u32 v0, v0, 0, 8164; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0165; GFX6-NEXT:    s_endpgm166  %load = load i8, ptr addrspace(1) %in167  %ext = zext i8 %load to i32168  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 0, i32 8)169  store i32 %bfe, ptr addrspace(1) %out, align 4170  ret void171}172 173; FIXME: Should be using s_add_i32174define amdgpu_kernel void @bfe_u32_zext_in_reg_i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {175; GFX6-LABEL: bfe_u32_zext_in_reg_i8:176; GFX6:       ; %bb.0:177; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0178; GFX6-NEXT:    s_waitcnt lgkmcnt(0)179; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0180; GFX6-NEXT:    s_mov_b32 s2, -1181; GFX6-NEXT:    s_waitcnt lgkmcnt(0)182; GFX6-NEXT:    s_add_i32 s3, s3, 1183; GFX6-NEXT:    s_and_b32 s3, s3, 0xff184; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x80000185; GFX6-NEXT:    v_mov_b32_e32 v0, s3186; GFX6-NEXT:    s_mov_b32 s3, 0xf000187; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0188; GFX6-NEXT:    s_endpgm189  %load = load i32, ptr addrspace(1) %in, align 4190  %add = add i32 %load, 1191  %ext = and i32 %add, 255192  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 0, i32 8)193  store i32 %bfe, ptr addrspace(1) %out, align 4194  ret void195}196 197define amdgpu_kernel void @bfe_u32_zext_in_reg_i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {198; GFX6-LABEL: bfe_u32_zext_in_reg_i16:199; GFX6:       ; %bb.0:200; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0201; GFX6-NEXT:    s_waitcnt lgkmcnt(0)202; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0203; GFX6-NEXT:    s_mov_b32 s2, -1204; GFX6-NEXT:    s_waitcnt lgkmcnt(0)205; GFX6-NEXT:    s_add_i32 s3, s3, 1206; GFX6-NEXT:    s_and_b32 s3, s3, 0xffff207; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x100000208; GFX6-NEXT:    v_mov_b32_e32 v0, s3209; GFX6-NEXT:    s_mov_b32 s3, 0xf000210; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0211; GFX6-NEXT:    s_endpgm212  %load = load i32, ptr addrspace(1) %in, align 4213  %add = add i32 %load, 1214  %ext = and i32 %add, 65535215  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 0, i32 16)216  store i32 %bfe, ptr addrspace(1) %out, align 4217  ret void218}219 220define amdgpu_kernel void @bfe_u32_zext_in_reg_i8_offset_1(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {221; GFX6-LABEL: bfe_u32_zext_in_reg_i8_offset_1:222; GFX6:       ; %bb.0:223; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0224; GFX6-NEXT:    s_waitcnt lgkmcnt(0)225; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0226; GFX6-NEXT:    s_mov_b32 s2, -1227; GFX6-NEXT:    s_waitcnt lgkmcnt(0)228; GFX6-NEXT:    s_add_i32 s3, s3, 1229; GFX6-NEXT:    s_and_b32 s3, s3, 0xff230; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x80001231; GFX6-NEXT:    v_mov_b32_e32 v0, s3232; GFX6-NEXT:    s_mov_b32 s3, 0xf000233; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0234; GFX6-NEXT:    s_endpgm235  %load = load i32, ptr addrspace(1) %in, align 4236  %add = add i32 %load, 1237  %ext = and i32 %add, 255238  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 1, i32 8)239  store i32 %bfe, ptr addrspace(1) %out, align 4240  ret void241}242 243define amdgpu_kernel void @bfe_u32_zext_in_reg_i8_offset_3(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {244; GFX6-LABEL: bfe_u32_zext_in_reg_i8_offset_3:245; GFX6:       ; %bb.0:246; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0247; GFX6-NEXT:    s_waitcnt lgkmcnt(0)248; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0249; GFX6-NEXT:    s_mov_b32 s2, -1250; GFX6-NEXT:    s_waitcnt lgkmcnt(0)251; GFX6-NEXT:    s_add_i32 s3, s3, 1252; GFX6-NEXT:    s_and_b32 s3, s3, 0xff253; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x80003254; GFX6-NEXT:    v_mov_b32_e32 v0, s3255; GFX6-NEXT:    s_mov_b32 s3, 0xf000256; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0257; GFX6-NEXT:    s_endpgm258  %load = load i32, ptr addrspace(1) %in, align 4259  %add = add i32 %load, 1260  %ext = and i32 %add, 255261  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 3, i32 8)262  store i32 %bfe, ptr addrspace(1) %out, align 4263  ret void264}265 266define amdgpu_kernel void @bfe_u32_zext_in_reg_i8_offset_7(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {267; GFX6-LABEL: bfe_u32_zext_in_reg_i8_offset_7:268; GFX6:       ; %bb.0:269; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0270; GFX6-NEXT:    s_waitcnt lgkmcnt(0)271; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0272; GFX6-NEXT:    s_mov_b32 s2, -1273; GFX6-NEXT:    s_waitcnt lgkmcnt(0)274; GFX6-NEXT:    s_add_i32 s3, s3, 1275; GFX6-NEXT:    s_and_b32 s3, s3, 0xff276; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x80007277; GFX6-NEXT:    v_mov_b32_e32 v0, s3278; GFX6-NEXT:    s_mov_b32 s3, 0xf000279; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0280; GFX6-NEXT:    s_endpgm281  %load = load i32, ptr addrspace(1) %in, align 4282  %add = add i32 %load, 1283  %ext = and i32 %add, 255284  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 7, i32 8)285  store i32 %bfe, ptr addrspace(1) %out, align 4286  ret void287}288 289define amdgpu_kernel void @bfe_u32_zext_in_reg_i16_offset_8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {290; GFX6-LABEL: bfe_u32_zext_in_reg_i16_offset_8:291; GFX6:       ; %bb.0:292; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0293; GFX6-NEXT:    s_waitcnt lgkmcnt(0)294; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0295; GFX6-NEXT:    s_mov_b32 s2, -1296; GFX6-NEXT:    s_waitcnt lgkmcnt(0)297; GFX6-NEXT:    s_add_i32 s3, s3, 1298; GFX6-NEXT:    s_and_b32 s3, s3, 0xffff299; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x80008300; GFX6-NEXT:    v_mov_b32_e32 v0, s3301; GFX6-NEXT:    s_mov_b32 s3, 0xf000302; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0303; GFX6-NEXT:    s_endpgm304  %load = load i32, ptr addrspace(1) %in, align 4305  %add = add i32 %load, 1306  %ext = and i32 %add, 65535307  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 8, i32 8)308  store i32 %bfe, ptr addrspace(1) %out, align 4309  ret void310}311 312define amdgpu_kernel void @bfe_u32_test_1(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {313; GFX6-LABEL: bfe_u32_test_1:314; GFX6:       ; %bb.0:315; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0316; GFX6-NEXT:    s_waitcnt lgkmcnt(0)317; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0318; GFX6-NEXT:    s_mov_b32 s2, -1319; GFX6-NEXT:    s_waitcnt lgkmcnt(0)320; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x10000321; GFX6-NEXT:    v_mov_b32_e32 v0, s3322; GFX6-NEXT:    s_mov_b32 s3, 0xf000323; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0324; GFX6-NEXT:    s_endpgm325  %x = load i32, ptr addrspace(1) %in, align 4326  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 0, i32 1)327  store i32 %bfe, ptr addrspace(1) %out, align 4328  ret void329}330 331define amdgpu_kernel void @bfe_u32_test_2(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {332; GFX6-LABEL: bfe_u32_test_2:333; GFX6:       ; %bb.0:334; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0335; GFX6-NEXT:    s_waitcnt lgkmcnt(0)336; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0337; GFX6-NEXT:    s_mov_b32 s2, -1338; GFX6-NEXT:    s_waitcnt lgkmcnt(0)339; GFX6-NEXT:    s_lshl_b32 s3, s3, 31340; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x80000341; GFX6-NEXT:    v_mov_b32_e32 v0, s3342; GFX6-NEXT:    s_mov_b32 s3, 0xf000343; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0344; GFX6-NEXT:    s_endpgm345  %x = load i32, ptr addrspace(1) %in, align 4346  %shl = shl i32 %x, 31347  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 0, i32 8)348  store i32 %bfe, ptr addrspace(1) %out, align 4349  ret void350}351 352define amdgpu_kernel void @bfe_u32_test_3(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {353; GFX6-LABEL: bfe_u32_test_3:354; GFX6:       ; %bb.0:355; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0356; GFX6-NEXT:    s_waitcnt lgkmcnt(0)357; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0358; GFX6-NEXT:    s_mov_b32 s2, -1359; GFX6-NEXT:    s_waitcnt lgkmcnt(0)360; GFX6-NEXT:    s_lshl_b32 s3, s3, 31361; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x10000362; GFX6-NEXT:    v_mov_b32_e32 v0, s3363; GFX6-NEXT:    s_mov_b32 s3, 0xf000364; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0365; GFX6-NEXT:    s_endpgm366  %x = load i32, ptr addrspace(1) %in, align 4367  %shl = shl i32 %x, 31368  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 0, i32 1)369  store i32 %bfe, ptr addrspace(1) %out, align 4370  ret void371}372 373define amdgpu_kernel void @bfe_u32_test_4(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {374; GFX6-LABEL: bfe_u32_test_4:375; GFX6:       ; %bb.0:376; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0377; GFX6-NEXT:    s_waitcnt lgkmcnt(0)378; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0379; GFX6-NEXT:    s_mov_b32 s2, -1380; GFX6-NEXT:    s_waitcnt lgkmcnt(0)381; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x10000382; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1001f383; GFX6-NEXT:    v_mov_b32_e32 v0, s3384; GFX6-NEXT:    s_mov_b32 s3, 0xf000385; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0386; GFX6-NEXT:    s_endpgm387  %x = load i32, ptr addrspace(1) %in, align 4388  %shl = shl i32 %x, 31389  %shr = lshr i32 %shl, 31390  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shr, i32 31, i32 1)391  store i32 %bfe, ptr addrspace(1) %out, align 4392  ret void393}394 395define amdgpu_kernel void @bfe_u32_test_5(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {396; GFX6-LABEL: bfe_u32_test_5:397; GFX6:       ; %bb.0:398; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0399; GFX6-NEXT:    s_waitcnt lgkmcnt(0)400; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0401; GFX6-NEXT:    s_mov_b32 s2, -1402; GFX6-NEXT:    s_waitcnt lgkmcnt(0)403; GFX6-NEXT:    s_bfe_i32 s3, s3, 0x10000404; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x10000405; GFX6-NEXT:    v_mov_b32_e32 v0, s3406; GFX6-NEXT:    s_mov_b32 s3, 0xf000407; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0408; GFX6-NEXT:    s_endpgm409  %x = load i32, ptr addrspace(1) %in, align 4410  %shl = shl i32 %x, 31411  %shr = ashr i32 %shl, 31412  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shr, i32 0, i32 1)413  store i32 %bfe, ptr addrspace(1) %out, align 4414  ret void415}416 417define amdgpu_kernel void @bfe_u32_test_6(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {418; GFX6-LABEL: bfe_u32_test_6:419; GFX6:       ; %bb.0:420; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0421; GFX6-NEXT:    s_waitcnt lgkmcnt(0)422; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0423; GFX6-NEXT:    s_mov_b32 s2, -1424; GFX6-NEXT:    s_waitcnt lgkmcnt(0)425; GFX6-NEXT:    s_lshl_b32 s3, s3, 31426; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1f0001427; GFX6-NEXT:    v_mov_b32_e32 v0, s3428; GFX6-NEXT:    s_mov_b32 s3, 0xf000429; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0430; GFX6-NEXT:    s_endpgm431  %x = load i32, ptr addrspace(1) %in, align 4432  %shl = shl i32 %x, 31433  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 1, i32 31)434  store i32 %bfe, ptr addrspace(1) %out, align 4435  ret void436}437 438define amdgpu_kernel void @bfe_u32_test_7(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {439; GFX6-LABEL: bfe_u32_test_7:440; GFX6:       ; %bb.0:441; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0442; GFX6-NEXT:    s_waitcnt lgkmcnt(0)443; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0444; GFX6-NEXT:    s_mov_b32 s2, -1445; GFX6-NEXT:    s_waitcnt lgkmcnt(0)446; GFX6-NEXT:    s_lshl_b32 s3, s3, 31447; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1f0000448; GFX6-NEXT:    v_mov_b32_e32 v0, s3449; GFX6-NEXT:    s_mov_b32 s3, 0xf000450; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0451; GFX6-NEXT:    s_endpgm452  %x = load i32, ptr addrspace(1) %in, align 4453  %shl = shl i32 %x, 31454  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 0, i32 31)455  store i32 %bfe, ptr addrspace(1) %out, align 4456  ret void457}458 459define amdgpu_kernel void @bfe_u32_test_8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {460; GFX6-LABEL: bfe_u32_test_8:461; GFX6:       ; %bb.0:462; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0463; GFX6-NEXT:    s_waitcnt lgkmcnt(0)464; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0465; GFX6-NEXT:    s_mov_b32 s2, -1466; GFX6-NEXT:    s_waitcnt lgkmcnt(0)467; GFX6-NEXT:    s_lshl_b32 s3, s3, 31468; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1001f469; GFX6-NEXT:    v_mov_b32_e32 v0, s3470; GFX6-NEXT:    s_mov_b32 s3, 0xf000471; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0472; GFX6-NEXT:    s_endpgm473  %x = load i32, ptr addrspace(1) %in, align 4474  %shl = shl i32 %x, 31475  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 31, i32 1)476  store i32 %bfe, ptr addrspace(1) %out, align 4477  ret void478}479 480define amdgpu_kernel void @bfe_u32_test_9(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {481; GFX6-LABEL: bfe_u32_test_9:482; GFX6:       ; %bb.0:483; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0484; GFX6-NEXT:    s_waitcnt lgkmcnt(0)485; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0486; GFX6-NEXT:    s_mov_b32 s2, -1487; GFX6-NEXT:    s_waitcnt lgkmcnt(0)488; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1001f489; GFX6-NEXT:    v_mov_b32_e32 v0, s3490; GFX6-NEXT:    s_mov_b32 s3, 0xf000491; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0492; GFX6-NEXT:    s_endpgm493  %x = load i32, ptr addrspace(1) %in, align 4494  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 31, i32 1)495  store i32 %bfe, ptr addrspace(1) %out, align 4496  ret void497}498 499define amdgpu_kernel void @bfe_u32_test_10(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {500; GFX6-LABEL: bfe_u32_test_10:501; GFX6:       ; %bb.0:502; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0503; GFX6-NEXT:    s_waitcnt lgkmcnt(0)504; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0505; GFX6-NEXT:    s_mov_b32 s2, -1506; GFX6-NEXT:    s_waitcnt lgkmcnt(0)507; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1f0001508; GFX6-NEXT:    v_mov_b32_e32 v0, s3509; GFX6-NEXT:    s_mov_b32 s3, 0xf000510; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0511; GFX6-NEXT:    s_endpgm512  %x = load i32, ptr addrspace(1) %in, align 4513  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 1, i32 31)514  store i32 %bfe, ptr addrspace(1) %out, align 4515  ret void516}517 518define amdgpu_kernel void @bfe_u32_test_11(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {519; GFX6-LABEL: bfe_u32_test_11:520; GFX6:       ; %bb.0:521; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0522; GFX6-NEXT:    s_waitcnt lgkmcnt(0)523; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0524; GFX6-NEXT:    s_mov_b32 s2, -1525; GFX6-NEXT:    s_waitcnt lgkmcnt(0)526; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x180008527; GFX6-NEXT:    v_mov_b32_e32 v0, s3528; GFX6-NEXT:    s_mov_b32 s3, 0xf000529; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0530; GFX6-NEXT:    s_endpgm531  %x = load i32, ptr addrspace(1) %in, align 4532  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 8, i32 24)533  store i32 %bfe, ptr addrspace(1) %out, align 4534  ret void535}536 537define amdgpu_kernel void @bfe_u32_test_12(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {538; GFX6-LABEL: bfe_u32_test_12:539; GFX6:       ; %bb.0:540; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0541; GFX6-NEXT:    s_waitcnt lgkmcnt(0)542; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0543; GFX6-NEXT:    s_mov_b32 s2, -1544; GFX6-NEXT:    s_waitcnt lgkmcnt(0)545; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x80018546; GFX6-NEXT:    v_mov_b32_e32 v0, s3547; GFX6-NEXT:    s_mov_b32 s3, 0xf000548; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0549; GFX6-NEXT:    s_endpgm550  %x = load i32, ptr addrspace(1) %in, align 4551  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 24, i32 8)552  store i32 %bfe, ptr addrspace(1) %out, align 4553  ret void554}555 556; V_ASHRREV_U32_e32 {{v[0-9]+}}, 31, {{v[0-9]+}}557define amdgpu_kernel void @bfe_u32_test_13(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {558; GFX6-LABEL: bfe_u32_test_13:559; GFX6:       ; %bb.0:560; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0561; GFX6-NEXT:    s_waitcnt lgkmcnt(0)562; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0563; GFX6-NEXT:    s_mov_b32 s2, -1564; GFX6-NEXT:    s_waitcnt lgkmcnt(0)565; GFX6-NEXT:    s_ashr_i32 s3, s3, 31566; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1001f567; GFX6-NEXT:    v_mov_b32_e32 v0, s3568; GFX6-NEXT:    s_mov_b32 s3, 0xf000569; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0570; GFX6-NEXT:    s_endpgm571  %x = load i32, ptr addrspace(1) %in, align 4572  %shl = ashr i32 %x, 31573  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 31, i32 1)574  store i32 %bfe, ptr addrspace(1) %out, align 4 ret void575}576 577define amdgpu_kernel void @bfe_u32_test_14(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {578; GFX6-LABEL: bfe_u32_test_14:579; GFX6:       ; %bb.0:580; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0581; GFX6-NEXT:    s_waitcnt lgkmcnt(0)582; GFX6-NEXT:    s_load_dword s3, s[2:3], 0x0583; GFX6-NEXT:    s_mov_b32 s2, -1584; GFX6-NEXT:    s_waitcnt lgkmcnt(0)585; GFX6-NEXT:    s_lshr_b32 s3, s3, 31586; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1001f587; GFX6-NEXT:    v_mov_b32_e32 v0, s3588; GFX6-NEXT:    s_mov_b32 s3, 0xf000589; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0590; GFX6-NEXT:    s_endpgm591  %x = load i32, ptr addrspace(1) %in, align 4592  %shl = lshr i32 %x, 31593  %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 31, i32 1)594  store i32 %bfe, ptr addrspace(1) %out, align 4 ret void595}596 597define amdgpu_kernel void @bfe_u32_constant_fold_test_0(ptr addrspace(1) %out) #0 {598; GFX6-LABEL: bfe_u32_constant_fold_test_0:599; GFX6:       ; %bb.0:600; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0601; GFX6-NEXT:    s_bfe_u32 s2, 0, 0602; GFX6-NEXT:    v_mov_b32_e32 v0, s2603; GFX6-NEXT:    s_mov_b32 s2, -1604; GFX6-NEXT:    s_mov_b32 s3, 0xf000605; GFX6-NEXT:    s_waitcnt lgkmcnt(0)606; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0607; GFX6-NEXT:    s_endpgm608  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 0, i32 0, i32 0)609  store i32 %bfe_u32, ptr addrspace(1) %out, align 4610  ret void611}612 613define amdgpu_kernel void @bfe_u32_constant_fold_test_1(ptr addrspace(1) %out) #0 {614; GFX6-LABEL: bfe_u32_constant_fold_test_1:615; GFX6:       ; %bb.0:616; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0617; GFX6-NEXT:    s_bfe_u32 s2, 0x302e, 0618; GFX6-NEXT:    v_mov_b32_e32 v0, s2619; GFX6-NEXT:    s_mov_b32 s2, -1620; GFX6-NEXT:    s_mov_b32 s3, 0xf000621; GFX6-NEXT:    s_waitcnt lgkmcnt(0)622; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0623; GFX6-NEXT:    s_endpgm624  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 12334, i32 0, i32 0)625  store i32 %bfe_u32, ptr addrspace(1) %out, align 4626  ret void627}628 629define amdgpu_kernel void @bfe_u32_constant_fold_test_2(ptr addrspace(1) %out) #0 {630; GFX6-LABEL: bfe_u32_constant_fold_test_2:631; GFX6:       ; %bb.0:632; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0633; GFX6-NEXT:    s_bfe_u32 s2, 0, 0x10000634; GFX6-NEXT:    v_mov_b32_e32 v0, s2635; GFX6-NEXT:    s_mov_b32 s2, -1636; GFX6-NEXT:    s_mov_b32 s3, 0xf000637; GFX6-NEXT:    s_waitcnt lgkmcnt(0)638; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0639; GFX6-NEXT:    s_endpgm640  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 0, i32 0, i32 1)641  store i32 %bfe_u32, ptr addrspace(1) %out, align 4642  ret void643}644 645define amdgpu_kernel void @bfe_u32_constant_fold_test_3(ptr addrspace(1) %out) #0 {646; GFX6-LABEL: bfe_u32_constant_fold_test_3:647; GFX6:       ; %bb.0:648; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0649; GFX6-NEXT:    s_bfe_u32 s2, 1, 0x10000650; GFX6-NEXT:    v_mov_b32_e32 v0, s2651; GFX6-NEXT:    s_mov_b32 s2, -1652; GFX6-NEXT:    s_mov_b32 s3, 0xf000653; GFX6-NEXT:    s_waitcnt lgkmcnt(0)654; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0655; GFX6-NEXT:    s_endpgm656  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 1, i32 0, i32 1)657  store i32 %bfe_u32, ptr addrspace(1) %out, align 4658  ret void659}660 661define amdgpu_kernel void @bfe_u32_constant_fold_test_4(ptr addrspace(1) %out) #0 {662; GFX6-LABEL: bfe_u32_constant_fold_test_4:663; GFX6:       ; %bb.0:664; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0665; GFX6-NEXT:    s_bfe_u32 s2, -1, 0x10000666; GFX6-NEXT:    v_mov_b32_e32 v0, s2667; GFX6-NEXT:    s_mov_b32 s2, -1668; GFX6-NEXT:    s_mov_b32 s3, 0xf000669; GFX6-NEXT:    s_waitcnt lgkmcnt(0)670; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0671; GFX6-NEXT:    s_endpgm672  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 4294967295, i32 0, i32 1)673  store i32 %bfe_u32, ptr addrspace(1) %out, align 4674  ret void675}676 677define amdgpu_kernel void @bfe_u32_constant_fold_test_5(ptr addrspace(1) %out) #0 {678; GFX6-LABEL: bfe_u32_constant_fold_test_5:679; GFX6:       ; %bb.0:680; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0681; GFX6-NEXT:    s_mov_b32 s2, 0x10007682; GFX6-NEXT:    s_bfe_u32 s2, 0x80, s2683; GFX6-NEXT:    v_mov_b32_e32 v0, s2684; GFX6-NEXT:    s_mov_b32 s2, -1685; GFX6-NEXT:    s_mov_b32 s3, 0xf000686; GFX6-NEXT:    s_waitcnt lgkmcnt(0)687; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0688; GFX6-NEXT:    s_endpgm689  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 128, i32 7, i32 1)690  store i32 %bfe_u32, ptr addrspace(1) %out, align 4691  ret void692}693 694define amdgpu_kernel void @bfe_u32_constant_fold_test_6(ptr addrspace(1) %out) #0 {695; GFX6-LABEL: bfe_u32_constant_fold_test_6:696; GFX6:       ; %bb.0:697; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0698; GFX6-NEXT:    s_mov_b32 s2, 0x80000699; GFX6-NEXT:    s_bfe_u32 s2, 0x80, s2700; GFX6-NEXT:    v_mov_b32_e32 v0, s2701; GFX6-NEXT:    s_mov_b32 s2, -1702; GFX6-NEXT:    s_mov_b32 s3, 0xf000703; GFX6-NEXT:    s_waitcnt lgkmcnt(0)704; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0705; GFX6-NEXT:    s_endpgm706  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 128, i32 0, i32 8)707  store i32 %bfe_u32, ptr addrspace(1) %out, align 4708  ret void709}710 711define amdgpu_kernel void @bfe_u32_constant_fold_test_7(ptr addrspace(1) %out) #0 {712; GFX6-LABEL: bfe_u32_constant_fold_test_7:713; GFX6:       ; %bb.0:714; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0715; GFX6-NEXT:    s_mov_b32 s2, 0x80000716; GFX6-NEXT:    s_bfe_u32 s2, 0x7f, s2717; GFX6-NEXT:    v_mov_b32_e32 v0, s2718; GFX6-NEXT:    s_mov_b32 s2, -1719; GFX6-NEXT:    s_mov_b32 s3, 0xf000720; GFX6-NEXT:    s_waitcnt lgkmcnt(0)721; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0722; GFX6-NEXT:    s_endpgm723  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 127, i32 0, i32 8)724  store i32 %bfe_u32, ptr addrspace(1) %out, align 4725  ret void726}727 728define amdgpu_kernel void @bfe_u32_constant_fold_test_8(ptr addrspace(1) %out) #0 {729; GFX6-LABEL: bfe_u32_constant_fold_test_8:730; GFX6:       ; %bb.0:731; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0732; GFX6-NEXT:    s_mov_b32 s2, 0x80006733; GFX6-NEXT:    s_bfe_u32 s2, 0x7f, s2734; GFX6-NEXT:    v_mov_b32_e32 v0, s2735; GFX6-NEXT:    s_mov_b32 s2, -1736; GFX6-NEXT:    s_mov_b32 s3, 0xf000737; GFX6-NEXT:    s_waitcnt lgkmcnt(0)738; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0739; GFX6-NEXT:    s_endpgm740  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 127, i32 6, i32 8)741  store i32 %bfe_u32, ptr addrspace(1) %out, align 4742  ret void743}744 745define amdgpu_kernel void @bfe_u32_constant_fold_test_9(ptr addrspace(1) %out) #0 {746; GFX6-LABEL: bfe_u32_constant_fold_test_9:747; GFX6:       ; %bb.0:748; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0749; GFX6-NEXT:    s_mov_b32 s2, 0x80010750; GFX6-NEXT:    s_bfe_u32 s2, 0x10000, s2751; GFX6-NEXT:    v_mov_b32_e32 v0, s2752; GFX6-NEXT:    s_mov_b32 s2, -1753; GFX6-NEXT:    s_mov_b32 s3, 0xf000754; GFX6-NEXT:    s_waitcnt lgkmcnt(0)755; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0756; GFX6-NEXT:    s_endpgm757  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 65536, i32 16, i32 8)758  store i32 %bfe_u32, ptr addrspace(1) %out, align 4759  ret void760}761 762define amdgpu_kernel void @bfe_u32_constant_fold_test_10(ptr addrspace(1) %out) #0 {763; GFX6-LABEL: bfe_u32_constant_fold_test_10:764; GFX6:       ; %bb.0:765; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0766; GFX6-NEXT:    s_mov_b32 s2, 0x100010767; GFX6-NEXT:    s_bfe_u32 s2, 0xffff, s2768; GFX6-NEXT:    v_mov_b32_e32 v0, s2769; GFX6-NEXT:    s_mov_b32 s2, -1770; GFX6-NEXT:    s_mov_b32 s3, 0xf000771; GFX6-NEXT:    s_waitcnt lgkmcnt(0)772; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0773; GFX6-NEXT:    s_endpgm774  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 65535, i32 16, i32 16)775  store i32 %bfe_u32, ptr addrspace(1) %out, align 4776  ret void777}778 779define amdgpu_kernel void @bfe_u32_constant_fold_test_11(ptr addrspace(1) %out) #0 {780; GFX6-LABEL: bfe_u32_constant_fold_test_11:781; GFX6:       ; %bb.0:782; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0783; GFX6-NEXT:    s_mov_b32 s2, 0x40004784; GFX6-NEXT:    s_bfe_u32 s2, 0xa0, s2785; GFX6-NEXT:    v_mov_b32_e32 v0, s2786; GFX6-NEXT:    s_mov_b32 s2, -1787; GFX6-NEXT:    s_mov_b32 s3, 0xf000788; GFX6-NEXT:    s_waitcnt lgkmcnt(0)789; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0790; GFX6-NEXT:    s_endpgm791  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 160, i32 4, i32 4)792  store i32 %bfe_u32, ptr addrspace(1) %out, align 4793  ret void794}795 796define amdgpu_kernel void @bfe_u32_constant_fold_test_12(ptr addrspace(1) %out) #0 {797; GFX6-LABEL: bfe_u32_constant_fold_test_12:798; GFX6:       ; %bb.0:799; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0800; GFX6-NEXT:    s_mov_b32 s2, 0x1001f801; GFX6-NEXT:    s_bfe_u32 s2, 0xa0, s2802; GFX6-NEXT:    v_mov_b32_e32 v0, s2803; GFX6-NEXT:    s_mov_b32 s2, -1804; GFX6-NEXT:    s_mov_b32 s3, 0xf000805; GFX6-NEXT:    s_waitcnt lgkmcnt(0)806; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0807; GFX6-NEXT:    s_endpgm808  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 160, i32 31, i32 1)809  store i32 %bfe_u32, ptr addrspace(1) %out, align 4810  ret void811}812 813define amdgpu_kernel void @bfe_u32_constant_fold_test_13(ptr addrspace(1) %out) #0 {814; GFX6-LABEL: bfe_u32_constant_fold_test_13:815; GFX6:       ; %bb.0:816; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0817; GFX6-NEXT:    s_mov_b32 s2, 0x100010818; GFX6-NEXT:    s_bfe_u32 s2, 0x1fffe, s2819; GFX6-NEXT:    v_mov_b32_e32 v0, s2820; GFX6-NEXT:    s_mov_b32 s2, -1821; GFX6-NEXT:    s_mov_b32 s3, 0xf000822; GFX6-NEXT:    s_waitcnt lgkmcnt(0)823; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0824; GFX6-NEXT:    s_endpgm825  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 131070, i32 16, i32 16)826  store i32 %bfe_u32, ptr addrspace(1) %out, align 4827  ret void828}829 830define amdgpu_kernel void @bfe_u32_constant_fold_test_14(ptr addrspace(1) %out) #0 {831; GFX6-LABEL: bfe_u32_constant_fold_test_14:832; GFX6:       ; %bb.0:833; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0834; GFX6-NEXT:    s_mov_b32 s2, 0x1e0002835; GFX6-NEXT:    s_bfe_u32 s2, 0xa0, s2836; GFX6-NEXT:    v_mov_b32_e32 v0, s2837; GFX6-NEXT:    s_mov_b32 s2, -1838; GFX6-NEXT:    s_mov_b32 s3, 0xf000839; GFX6-NEXT:    s_waitcnt lgkmcnt(0)840; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0841; GFX6-NEXT:    s_endpgm842  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 160, i32 2, i32 30)843  store i32 %bfe_u32, ptr addrspace(1) %out, align 4844  ret void845}846 847define amdgpu_kernel void @bfe_u32_constant_fold_test_15(ptr addrspace(1) %out) #0 {848; GFX6-LABEL: bfe_u32_constant_fold_test_15:849; GFX6:       ; %bb.0:850; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0851; GFX6-NEXT:    s_mov_b32 s2, 0x1c0004852; GFX6-NEXT:    s_bfe_u32 s2, 0xa0, s2853; GFX6-NEXT:    v_mov_b32_e32 v0, s2854; GFX6-NEXT:    s_mov_b32 s2, -1855; GFX6-NEXT:    s_mov_b32 s3, 0xf000856; GFX6-NEXT:    s_waitcnt lgkmcnt(0)857; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0858; GFX6-NEXT:    s_endpgm859  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 160, i32 4, i32 28)860  store i32 %bfe_u32, ptr addrspace(1) %out, align 4861  ret void862}863 864define amdgpu_kernel void @bfe_u32_constant_fold_test_16(ptr addrspace(1) %out) #0 {865; GFX6-LABEL: bfe_u32_constant_fold_test_16:866; GFX6:       ; %bb.0:867; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0868; GFX6-NEXT:    s_bfe_u32 s2, -1, 0x70001869; GFX6-NEXT:    v_mov_b32_e32 v0, s2870; GFX6-NEXT:    s_mov_b32 s2, -1871; GFX6-NEXT:    s_mov_b32 s3, 0xf000872; GFX6-NEXT:    s_waitcnt lgkmcnt(0)873; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0874; GFX6-NEXT:    s_endpgm875  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 4294967295, i32 1, i32 7)876  store i32 %bfe_u32, ptr addrspace(1) %out, align 4877  ret void878}879 880define amdgpu_kernel void @bfe_u32_constant_fold_test_17(ptr addrspace(1) %out) #0 {881; GFX6-LABEL: bfe_u32_constant_fold_test_17:882; GFX6:       ; %bb.0:883; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0884; GFX6-NEXT:    s_mov_b32 s2, 0x1f0001885; GFX6-NEXT:    s_bfe_u32 s2, 0xff, s2886; GFX6-NEXT:    v_mov_b32_e32 v0, s2887; GFX6-NEXT:    s_mov_b32 s2, -1888; GFX6-NEXT:    s_mov_b32 s3, 0xf000889; GFX6-NEXT:    s_waitcnt lgkmcnt(0)890; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0891; GFX6-NEXT:    s_endpgm892  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 255, i32 1, i32 31)893  store i32 %bfe_u32, ptr addrspace(1) %out, align 4894  ret void895}896 897define amdgpu_kernel void @bfe_u32_constant_fold_test_18(ptr addrspace(1) %out) #0 {898; GFX6-LABEL: bfe_u32_constant_fold_test_18:899; GFX6:       ; %bb.0:900; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0901; GFX6-NEXT:    s_mov_b32 s2, 0x1001f902; GFX6-NEXT:    s_bfe_u32 s2, 0xff, s2903; GFX6-NEXT:    v_mov_b32_e32 v0, s2904; GFX6-NEXT:    s_mov_b32 s2, -1905; GFX6-NEXT:    s_mov_b32 s3, 0xf000906; GFX6-NEXT:    s_waitcnt lgkmcnt(0)907; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0908; GFX6-NEXT:    s_endpgm909  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 255, i32 31, i32 1)910  store i32 %bfe_u32, ptr addrspace(1) %out, align 4911  ret void912}913 914; Make sure that SimplifyDemandedBits doesn't cause the and to be915; reduced to the bits demanded by the bfe.916 917; XXX: The operand to v_bfe_u32 could also just directly be the load register.918define amdgpu_kernel void @simplify_bfe_u32_multi_use_arg(ptr addrspace(1) %out0,919; GFX6-LABEL: simplify_bfe_u32_multi_use_arg:920; GFX6:       ; %bb.0:921; GFX6-NEXT:    s_load_dwordx2 s[6:7], s[4:5], 0x4922; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0923; GFX6-NEXT:    s_waitcnt lgkmcnt(0)924; GFX6-NEXT:    s_load_dword s8, s[6:7], 0x0925; GFX6-NEXT:    s_mov_b64 s[4:5], s[0:1]926; GFX6-NEXT:    s_mov_b32 s6, -1927; GFX6-NEXT:    s_mov_b32 s7, 0xf000928; GFX6-NEXT:    s_waitcnt lgkmcnt(0)929; GFX6-NEXT:    s_and_b32 s0, s8, 63930; GFX6-NEXT:    s_bfe_u32 s1, s0, 0x20002931; GFX6-NEXT:    v_mov_b32_e32 v1, s1932; GFX6-NEXT:    v_mov_b32_e32 v0, s0933; GFX6-NEXT:    buffer_store_dword v1, off, s[4:7], 0934; GFX6-NEXT:    s_mov_b64 s[4:5], s[2:3]935; GFX6-NEXT:    buffer_store_dword v0, off, s[4:7], 0936; GFX6-NEXT:    s_endpgm937                                            ptr addrspace(1) %out1,938                                            ptr addrspace(1) %in) #0 {939  %src = load i32, ptr addrspace(1) %in, align 4940  %and = and i32 %src, 63941  %bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %and, i32 2, i32 2)942  store i32 %bfe_u32, ptr addrspace(1) %out0, align 4943  store i32 %and, ptr addrspace(1) %out1, align 4944  ret void945}946 947define amdgpu_kernel void @lshr_and(ptr addrspace(1) %out, i32 %a) #0 {948; GFX6-LABEL: lshr_and:949; GFX6:       ; %bb.0:950; GFX6-NEXT:    s_load_dword s3, s[4:5], 0x2951; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0952; GFX6-NEXT:    s_mov_b32 s2, -1953; GFX6-NEXT:    s_waitcnt lgkmcnt(0)954; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x30006955; GFX6-NEXT:    v_mov_b32_e32 v0, s3956; GFX6-NEXT:    s_mov_b32 s3, 0xf000957; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0958; GFX6-NEXT:    s_endpgm959  %b = lshr i32 %a, 6960  %c = and i32 %b, 7961  store i32 %c, ptr addrspace(1) %out, align 8962  ret void963}964 965define amdgpu_kernel void @v_lshr_and(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {966; GFX6-LABEL: v_lshr_and:967; GFX6:       ; %bb.0:968; GFX6-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x0969; GFX6-NEXT:    s_waitcnt lgkmcnt(0)970; GFX6-NEXT:    s_lshr_b32 s3, s2, s3971; GFX6-NEXT:    s_and_b32 s3, s3, 7972; GFX6-NEXT:    s_mov_b32 s2, -1973; GFX6-NEXT:    v_mov_b32_e32 v0, s3974; GFX6-NEXT:    s_mov_b32 s3, 0xf000975; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0976; GFX6-NEXT:    s_endpgm977  %c = lshr i32 %a, %b978  %d = and i32 %c, 7979  store i32 %d, ptr addrspace(1) %out, align 8980  ret void981}982 983define amdgpu_kernel void @and_lshr(ptr addrspace(1) %out, i32 %a) #0 {984; GFX6-LABEL: and_lshr:985; GFX6:       ; %bb.0:986; GFX6-NEXT:    s_load_dword s3, s[4:5], 0x2987; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0988; GFX6-NEXT:    s_mov_b32 s2, -1989; GFX6-NEXT:    s_waitcnt lgkmcnt(0)990; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x30006991; GFX6-NEXT:    v_mov_b32_e32 v0, s3992; GFX6-NEXT:    s_mov_b32 s3, 0xf000993; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 0994; GFX6-NEXT:    s_endpgm995  %b = and i32 %a, 448996  %c = lshr i32 %b, 6997  store i32 %c, ptr addrspace(1) %out, align 8998  ret void999}1000 1001define amdgpu_kernel void @and_lshr2(ptr addrspace(1) %out, i32 %a) #0 {1002; GFX6-LABEL: and_lshr2:1003; GFX6:       ; %bb.0:1004; GFX6-NEXT:    s_load_dword s3, s[4:5], 0x21005; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x01006; GFX6-NEXT:    s_mov_b32 s2, -11007; GFX6-NEXT:    s_waitcnt lgkmcnt(0)1008; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x300061009; GFX6-NEXT:    v_mov_b32_e32 v0, s31010; GFX6-NEXT:    s_mov_b32 s3, 0xf0001011; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 01012; GFX6-NEXT:    s_endpgm1013  %b = and i32 %a, 5111014  %c = lshr i32 %b, 61015  store i32 %c, ptr addrspace(1) %out, align 81016  ret void1017}1018 1019define amdgpu_kernel void @shl_lshr(ptr addrspace(1) %out, i32 %a) #0 {1020; GFX6-LABEL: shl_lshr:1021; GFX6:       ; %bb.0:1022; GFX6-NEXT:    s_load_dword s3, s[4:5], 0x21023; GFX6-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x01024; GFX6-NEXT:    s_mov_b32 s2, -11025; GFX6-NEXT:    s_waitcnt lgkmcnt(0)1026; GFX6-NEXT:    s_bfe_u32 s3, s3, 0x1500021027; GFX6-NEXT:    v_mov_b32_e32 v0, s31028; GFX6-NEXT:    s_mov_b32 s3, 0xf0001029; GFX6-NEXT:    buffer_store_dword v0, off, s[0:3], 01030; GFX6-NEXT:    s_endpgm1031  %b = shl i32 %a, 91032  %c = lshr i32 %b, 111033  store i32 %c, ptr addrspace(1) %out, align 81034  ret void1035}1036 1037declare i32 @llvm.amdgcn.ubfe.i32(i32, i32, i32) #11038declare i64 @llvm.amdgcn.ubfe.i64(i64, i32, i32) #11039 1040attributes #0 = { nounwind }1041attributes #1 = { nounwind readnone }1042